Stuart Northfield / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_DISCO_F334C8/stm32f3xx_hal_dma.c@381:5460fc57b6e4, 2014-11-03 (annotated)

Committer:
mbed_official
Date:
Mon Nov 03 10:30:07 2014 +0000
Revision:
381:5460fc57b6e4
Synchronized with git revision 02478cd1f27fc7b9643486472635eb515b2bca81



Full URL: https://github.com/mbedmicro/mbed/commit/02478cd1f27fc7b9643486472635eb515b2bca81/



Target: LPC1549 - Fix serial interrupt issues (issue report #616)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 381:5460fc57b6e4 1 /**
mbed_official 381:5460fc57b6e4 2 ******************************************************************************
mbed_official 381:5460fc57b6e4 3 * @file stm32f3xx_hal_dma.c
mbed_official 381:5460fc57b6e4 4 * @author MCD Application Team
mbed_official 381:5460fc57b6e4 5 * @version V1.1.0
mbed_official 381:5460fc57b6e4 6 * @date 12-Sept-2014
mbed_official 381:5460fc57b6e4 7 * @brief DMA HAL module driver.
mbed_official 381:5460fc57b6e4 8 *
mbed_official 381:5460fc57b6e4 9 * This file provides firmware functions to manage the following
mbed_official 381:5460fc57b6e4 10 * functionalities of the Direct Memory Access (DMA) peripheral:
mbed_official 381:5460fc57b6e4 11 * + Initialization and de-initialization functions
mbed_official 381:5460fc57b6e4 12 * + IO operation functions
mbed_official 381:5460fc57b6e4 13 * + Peripheral State and errors functions
mbed_official 381:5460fc57b6e4 14 @verbatim
mbed_official 381:5460fc57b6e4 15 ==============================================================================
mbed_official 381:5460fc57b6e4 16 ##### How to use this driver #####
mbed_official 381:5460fc57b6e4 17 ==============================================================================
mbed_official 381:5460fc57b6e4 18 [..]
mbed_official 381:5460fc57b6e4 19 (#) Enable and configure the peripheral to be connected to the DMA Channel
mbed_official 381:5460fc57b6e4 20 (except for internal SRAM / FLASH memories: no initialization is
mbed_official 381:5460fc57b6e4 21 necessary) please refer to Reference manual for connection between peripherals
mbed_official 381:5460fc57b6e4 22 and DMA requests .
mbed_official 381:5460fc57b6e4 23
mbed_official 381:5460fc57b6e4 24 (#) For a given Channel, program the required configuration through the following parameters:
mbed_official 381:5460fc57b6e4 25 Transfer Direction, Source and Destination data formats,
mbed_official 381:5460fc57b6e4 26 Circular, Normal or peripheral flow control mode, Channel Priority level,
mbed_official 381:5460fc57b6e4 27 Source and Destination Increment mode, FIFO mode and its Threshold (if needed),
mbed_official 381:5460fc57b6e4 28 Burst mode for Source and/or Destination (if needed) using HAL_DMA_Init() function.
mbed_official 381:5460fc57b6e4 29
mbed_official 381:5460fc57b6e4 30 *** Polling mode IO operation ***
mbed_official 381:5460fc57b6e4 31 =================================
mbed_official 381:5460fc57b6e4 32 [..]
mbed_official 381:5460fc57b6e4 33 (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
mbed_official 381:5460fc57b6e4 34 address and destination address and the Length of data to be transferred
mbed_official 381:5460fc57b6e4 35 (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
mbed_official 381:5460fc57b6e4 36 case a fixed Timeout can be configured by User depending from his application.
mbed_official 381:5460fc57b6e4 37
mbed_official 381:5460fc57b6e4 38 *** Interrupt mode IO operation ***
mbed_official 381:5460fc57b6e4 39 ===================================
mbed_official 381:5460fc57b6e4 40 [..]
mbed_official 381:5460fc57b6e4 41 (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
mbed_official 381:5460fc57b6e4 42 (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 381:5460fc57b6e4 43 (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
mbed_official 381:5460fc57b6e4 44 Source address and destination address and the Length of data to be transferred. In this
mbed_official 381:5460fc57b6e4 45 case the DMA interrupt is configured
mbed_official 381:5460fc57b6e4 46 (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
mbed_official 381:5460fc57b6e4 47 (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
mbed_official 381:5460fc57b6e4 48 add his own function by customization of function pointer XferCpltCallback and
mbed_official 381:5460fc57b6e4 49 XferErrorCallback (i.e a member of DMA handle structure).
mbed_official 381:5460fc57b6e4 50
mbed_official 381:5460fc57b6e4 51 (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
mbed_official 381:5460fc57b6e4 52 detection.
mbed_official 381:5460fc57b6e4 53
mbed_official 381:5460fc57b6e4 54 (#) Use HAL_DMA_Abort() function to abort the current transfer
mbed_official 381:5460fc57b6e4 55
mbed_official 381:5460fc57b6e4 56 -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
mbed_official 381:5460fc57b6e4 57
mbed_official 381:5460fc57b6e4 58 *** DMA HAL driver macros list ***
mbed_official 381:5460fc57b6e4 59 =============================================
mbed_official 381:5460fc57b6e4 60 [..]
mbed_official 381:5460fc57b6e4 61 Below the list of most used macros in DMA HAL driver.
mbed_official 381:5460fc57b6e4 62
mbed_official 381:5460fc57b6e4 63 (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
mbed_official 381:5460fc57b6e4 64 (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
mbed_official 381:5460fc57b6e4 65 (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
mbed_official 381:5460fc57b6e4 66 (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
mbed_official 381:5460fc57b6e4 67 (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
mbed_official 381:5460fc57b6e4 68 (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
mbed_official 381:5460fc57b6e4 69 (+) __HAL_DMA_IT_STATUS: Check whether the specified DMA Channel interrupt has occurred or not.
mbed_official 381:5460fc57b6e4 70
mbed_official 381:5460fc57b6e4 71 [..]
mbed_official 381:5460fc57b6e4 72 (@) You can refer to the DMA HAL driver header file for more useful macros
mbed_official 381:5460fc57b6e4 73
mbed_official 381:5460fc57b6e4 74 @endverbatim
mbed_official 381:5460fc57b6e4 75 ******************************************************************************
mbed_official 381:5460fc57b6e4 76 * @attention
mbed_official 381:5460fc57b6e4 77 *
mbed_official 381:5460fc57b6e4 78 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 381:5460fc57b6e4 79 *
mbed_official 381:5460fc57b6e4 80 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 381:5460fc57b6e4 81 * are permitted provided that the following conditions are met:
mbed_official 381:5460fc57b6e4 82 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 381:5460fc57b6e4 83 * this list of conditions and the following disclaimer.
mbed_official 381:5460fc57b6e4 84 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 381:5460fc57b6e4 85 * this list of conditions and the following disclaimer in the documentation
mbed_official 381:5460fc57b6e4 86 * and/or other materials provided with the distribution.
mbed_official 381:5460fc57b6e4 87 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 381:5460fc57b6e4 88 * may be used to endorse or promote products derived from this software
mbed_official 381:5460fc57b6e4 89 * without specific prior written permission.
mbed_official 381:5460fc57b6e4 90 *
mbed_official 381:5460fc57b6e4 91 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 381:5460fc57b6e4 92 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 381:5460fc57b6e4 93 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 381:5460fc57b6e4 94 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 381:5460fc57b6e4 95 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 381:5460fc57b6e4 96 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 381:5460fc57b6e4 97 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 381:5460fc57b6e4 98 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 381:5460fc57b6e4 99 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 381:5460fc57b6e4 100 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 381:5460fc57b6e4 101 *
mbed_official 381:5460fc57b6e4 102 ******************************************************************************
mbed_official 381:5460fc57b6e4 103 */
mbed_official 381:5460fc57b6e4 104
mbed_official 381:5460fc57b6e4 105 /* Includes ------------------------------------------------------------------*/
mbed_official 381:5460fc57b6e4 106 #include "stm32f3xx_hal.h"
mbed_official 381:5460fc57b6e4 107
mbed_official 381:5460fc57b6e4 108 /** @addtogroup STM32F3xx_HAL_Driver
mbed_official 381:5460fc57b6e4 109 * @{
mbed_official 381:5460fc57b6e4 110 */
mbed_official 381:5460fc57b6e4 111
mbed_official 381:5460fc57b6e4 112 /** @defgroup DMA DMA HAL module driver
mbed_official 381:5460fc57b6e4 113 * @brief DMA HAL module driver
mbed_official 381:5460fc57b6e4 114 * @{
mbed_official 381:5460fc57b6e4 115 */
mbed_official 381:5460fc57b6e4 116
mbed_official 381:5460fc57b6e4 117 #ifdef HAL_DMA_MODULE_ENABLED
mbed_official 381:5460fc57b6e4 118
mbed_official 381:5460fc57b6e4 119 /* Private typedef -----------------------------------------------------------*/
mbed_official 381:5460fc57b6e4 120 /* Private define ------------------------------------------------------------*/
mbed_official 381:5460fc57b6e4 121 /** @defgroup DMA_Private_Defines DMA Private Define
mbed_official 381:5460fc57b6e4 122 * @{
mbed_official 381:5460fc57b6e4 123 */
mbed_official 381:5460fc57b6e4 124 #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */
mbed_official 381:5460fc57b6e4 125 /**
mbed_official 381:5460fc57b6e4 126 * @}
mbed_official 381:5460fc57b6e4 127 */
mbed_official 381:5460fc57b6e4 128
mbed_official 381:5460fc57b6e4 129 /* Private macro -------------------------------------------------------------*/
mbed_official 381:5460fc57b6e4 130 /* Private variables ---------------------------------------------------------*/
mbed_official 381:5460fc57b6e4 131 /* Private function prototypes -----------------------------------------------*/
mbed_official 381:5460fc57b6e4 132 /** @defgroup DMA_Private_Functions DMA Private Functions
mbed_official 381:5460fc57b6e4 133 * @{
mbed_official 381:5460fc57b6e4 134 */
mbed_official 381:5460fc57b6e4 135 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 381:5460fc57b6e4 136 /**
mbed_official 381:5460fc57b6e4 137 * @}
mbed_official 381:5460fc57b6e4 138 */
mbed_official 381:5460fc57b6e4 139
mbed_official 381:5460fc57b6e4 140 /* Exported functions ---------------------------------------------------------*/
mbed_official 381:5460fc57b6e4 141 /** @defgroup DMA_Exported_Functions DMA Exported Functions
mbed_official 381:5460fc57b6e4 142 * @{
mbed_official 381:5460fc57b6e4 143 */
mbed_official 381:5460fc57b6e4 144
mbed_official 381:5460fc57b6e4 145 /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 381:5460fc57b6e4 146 * @brief Initialization and de-initialization functions
mbed_official 381:5460fc57b6e4 147 *
mbed_official 381:5460fc57b6e4 148 @verbatim
mbed_official 381:5460fc57b6e4 149 ===============================================================================
mbed_official 381:5460fc57b6e4 150 ##### Initialization and de-initialization functions #####
mbed_official 381:5460fc57b6e4 151 ===============================================================================
mbed_official 381:5460fc57b6e4 152 [..]
mbed_official 381:5460fc57b6e4 153 This section provides functions allowing to initialize the DMA Channel source
mbed_official 381:5460fc57b6e4 154 and destination addresses, incrementation and data sizes, transfer direction,
mbed_official 381:5460fc57b6e4 155 circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
mbed_official 381:5460fc57b6e4 156 [..]
mbed_official 381:5460fc57b6e4 157 The HAL_DMA_Init() function follows the DMA configuration procedures as described in
mbed_official 381:5460fc57b6e4 158 reference manual.
mbed_official 381:5460fc57b6e4 159
mbed_official 381:5460fc57b6e4 160 @endverbatim
mbed_official 381:5460fc57b6e4 161 * @{
mbed_official 381:5460fc57b6e4 162 */
mbed_official 381:5460fc57b6e4 163
mbed_official 381:5460fc57b6e4 164 /**
mbed_official 381:5460fc57b6e4 165 * @brief Initializes the DMA according to the specified
mbed_official 381:5460fc57b6e4 166 * parameters in the DMA_InitTypeDef and create the associated handle.
mbed_official 381:5460fc57b6e4 167 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 168 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 169 * @retval HAL status
mbed_official 381:5460fc57b6e4 170 */
mbed_official 381:5460fc57b6e4 171 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
mbed_official 381:5460fc57b6e4 172 {
mbed_official 381:5460fc57b6e4 173 uint32_t tmp = 0;
mbed_official 381:5460fc57b6e4 174
mbed_official 381:5460fc57b6e4 175 /* Check the DMA handle allocation */
mbed_official 381:5460fc57b6e4 176 if(hdma == HAL_NULL)
mbed_official 381:5460fc57b6e4 177 {
mbed_official 381:5460fc57b6e4 178 return HAL_ERROR;
mbed_official 381:5460fc57b6e4 179 }
mbed_official 381:5460fc57b6e4 180
mbed_official 381:5460fc57b6e4 181 /* Check the parameters */
mbed_official 381:5460fc57b6e4 182 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
mbed_official 381:5460fc57b6e4 183 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
mbed_official 381:5460fc57b6e4 184 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
mbed_official 381:5460fc57b6e4 185 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
mbed_official 381:5460fc57b6e4 186 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
mbed_official 381:5460fc57b6e4 187 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
mbed_official 381:5460fc57b6e4 188 assert_param(IS_DMA_MODE(hdma->Init.Mode));
mbed_official 381:5460fc57b6e4 189 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
mbed_official 381:5460fc57b6e4 190
mbed_official 381:5460fc57b6e4 191 /* Change DMA peripheral state */
mbed_official 381:5460fc57b6e4 192 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 381:5460fc57b6e4 193
mbed_official 381:5460fc57b6e4 194 /* Get the CR register value */
mbed_official 381:5460fc57b6e4 195 tmp = hdma->Instance->CCR;
mbed_official 381:5460fc57b6e4 196
mbed_official 381:5460fc57b6e4 197 /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
mbed_official 381:5460fc57b6e4 198 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
mbed_official 381:5460fc57b6e4 199 DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
mbed_official 381:5460fc57b6e4 200 DMA_CCR_DIR));
mbed_official 381:5460fc57b6e4 201
mbed_official 381:5460fc57b6e4 202 /* Prepare the DMA Channel configuration */
mbed_official 381:5460fc57b6e4 203 tmp |= hdma->Init.Direction |
mbed_official 381:5460fc57b6e4 204 hdma->Init.PeriphInc | hdma->Init.MemInc |
mbed_official 381:5460fc57b6e4 205 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
mbed_official 381:5460fc57b6e4 206 hdma->Init.Mode | hdma->Init.Priority;
mbed_official 381:5460fc57b6e4 207
mbed_official 381:5460fc57b6e4 208 /* Write to DMA Channel CR register */
mbed_official 381:5460fc57b6e4 209 hdma->Instance->CCR = tmp;
mbed_official 381:5460fc57b6e4 210
mbed_official 381:5460fc57b6e4 211 /* Initialise the error code */
mbed_official 381:5460fc57b6e4 212 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 381:5460fc57b6e4 213
mbed_official 381:5460fc57b6e4 214 /* Initialize the DMA state*/
mbed_official 381:5460fc57b6e4 215 hdma->State = HAL_DMA_STATE_READY;
mbed_official 381:5460fc57b6e4 216
mbed_official 381:5460fc57b6e4 217 return HAL_OK;
mbed_official 381:5460fc57b6e4 218 }
mbed_official 381:5460fc57b6e4 219
mbed_official 381:5460fc57b6e4 220 /**
mbed_official 381:5460fc57b6e4 221 * @brief DeInitializes the DMA peripheral
mbed_official 381:5460fc57b6e4 222 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 223 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 224 * @retval HAL status
mbed_official 381:5460fc57b6e4 225 */
mbed_official 381:5460fc57b6e4 226 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
mbed_official 381:5460fc57b6e4 227 {
mbed_official 381:5460fc57b6e4 228 /* Check the DMA handle allocation */
mbed_official 381:5460fc57b6e4 229 if(hdma == HAL_NULL)
mbed_official 381:5460fc57b6e4 230 {
mbed_official 381:5460fc57b6e4 231 return HAL_ERROR;
mbed_official 381:5460fc57b6e4 232 }
mbed_official 381:5460fc57b6e4 233
mbed_official 381:5460fc57b6e4 234 /* Check the parameters */
mbed_official 381:5460fc57b6e4 235 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
mbed_official 381:5460fc57b6e4 236
mbed_official 381:5460fc57b6e4 237 /* Check the DMA peripheral state */
mbed_official 381:5460fc57b6e4 238 if(hdma->State == HAL_DMA_STATE_BUSY)
mbed_official 381:5460fc57b6e4 239 {
mbed_official 381:5460fc57b6e4 240 return HAL_ERROR;
mbed_official 381:5460fc57b6e4 241 }
mbed_official 381:5460fc57b6e4 242
mbed_official 381:5460fc57b6e4 243 /* Disable the selected DMA Channelx */
mbed_official 381:5460fc57b6e4 244 __HAL_DMA_DISABLE(hdma);
mbed_official 381:5460fc57b6e4 245
mbed_official 381:5460fc57b6e4 246 /* Reset DMA Channel control register */
mbed_official 381:5460fc57b6e4 247 hdma->Instance->CCR = 0;
mbed_official 381:5460fc57b6e4 248
mbed_official 381:5460fc57b6e4 249 /* Reset DMA Channel Number of Data to Transfer register */
mbed_official 381:5460fc57b6e4 250 hdma->Instance->CNDTR = 0;
mbed_official 381:5460fc57b6e4 251
mbed_official 381:5460fc57b6e4 252 /* Reset DMA Channel peripheral address register */
mbed_official 381:5460fc57b6e4 253 hdma->Instance->CPAR = 0;
mbed_official 381:5460fc57b6e4 254
mbed_official 381:5460fc57b6e4 255 /* Reset DMA Channel memory address register */
mbed_official 381:5460fc57b6e4 256 hdma->Instance->CMAR = 0;
mbed_official 381:5460fc57b6e4 257
mbed_official 381:5460fc57b6e4 258 /* Clear all flags */
mbed_official 381:5460fc57b6e4 259 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 381:5460fc57b6e4 260 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 381:5460fc57b6e4 261 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 381:5460fc57b6e4 262
mbed_official 381:5460fc57b6e4 263 /* Initialise the error code */
mbed_official 381:5460fc57b6e4 264 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 381:5460fc57b6e4 265
mbed_official 381:5460fc57b6e4 266 /* Initialize the DMA state */
mbed_official 381:5460fc57b6e4 267 hdma->State = HAL_DMA_STATE_RESET;
mbed_official 381:5460fc57b6e4 268
mbed_official 381:5460fc57b6e4 269 /* Release Lock */
mbed_official 381:5460fc57b6e4 270 __HAL_UNLOCK(hdma);
mbed_official 381:5460fc57b6e4 271
mbed_official 381:5460fc57b6e4 272 return HAL_OK;
mbed_official 381:5460fc57b6e4 273 }
mbed_official 381:5460fc57b6e4 274
mbed_official 381:5460fc57b6e4 275 /**
mbed_official 381:5460fc57b6e4 276 * @}
mbed_official 381:5460fc57b6e4 277 */
mbed_official 381:5460fc57b6e4 278
mbed_official 381:5460fc57b6e4 279 /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
mbed_official 381:5460fc57b6e4 280 * @brief I/O operation functions
mbed_official 381:5460fc57b6e4 281 *
mbed_official 381:5460fc57b6e4 282 @verbatim
mbed_official 381:5460fc57b6e4 283 ===============================================================================
mbed_official 381:5460fc57b6e4 284 ##### IO operation functions #####
mbed_official 381:5460fc57b6e4 285 ===============================================================================
mbed_official 381:5460fc57b6e4 286 [..] This section provides functions allowing to:
mbed_official 381:5460fc57b6e4 287 (+) Configure the source, destination address and data length and Start DMA transfer
mbed_official 381:5460fc57b6e4 288 (+) Configure the source, destination address and data length and
mbed_official 381:5460fc57b6e4 289 Start DMA transfer with interrupt
mbed_official 381:5460fc57b6e4 290 (+) Abort DMA transfer
mbed_official 381:5460fc57b6e4 291 (+) Poll for transfer complete
mbed_official 381:5460fc57b6e4 292 (+) Handle DMA interrupt request
mbed_official 381:5460fc57b6e4 293
mbed_official 381:5460fc57b6e4 294 @endverbatim
mbed_official 381:5460fc57b6e4 295 * @{
mbed_official 381:5460fc57b6e4 296 */
mbed_official 381:5460fc57b6e4 297
mbed_official 381:5460fc57b6e4 298 /**
mbed_official 381:5460fc57b6e4 299 * @brief Starts the DMA Transfer.
mbed_official 381:5460fc57b6e4 300 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 301 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 302 * @param SrcAddress: The source memory Buffer address
mbed_official 381:5460fc57b6e4 303 * @param DstAddress: The destination memory Buffer address
mbed_official 381:5460fc57b6e4 304 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 381:5460fc57b6e4 305 * @retval HAL status
mbed_official 381:5460fc57b6e4 306 */
mbed_official 381:5460fc57b6e4 307 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 381:5460fc57b6e4 308 {
mbed_official 381:5460fc57b6e4 309 /* Process locked */
mbed_official 381:5460fc57b6e4 310 __HAL_LOCK(hdma);
mbed_official 381:5460fc57b6e4 311
mbed_official 381:5460fc57b6e4 312 /* Change DMA peripheral state */
mbed_official 381:5460fc57b6e4 313 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 381:5460fc57b6e4 314
mbed_official 381:5460fc57b6e4 315 /* Check the parameters */
mbed_official 381:5460fc57b6e4 316 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 381:5460fc57b6e4 317
mbed_official 381:5460fc57b6e4 318 /* Disable the peripheral */
mbed_official 381:5460fc57b6e4 319 __HAL_DMA_DISABLE(hdma);
mbed_official 381:5460fc57b6e4 320
mbed_official 381:5460fc57b6e4 321 /* Configure the source, destination address and the data length */
mbed_official 381:5460fc57b6e4 322 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 381:5460fc57b6e4 323
mbed_official 381:5460fc57b6e4 324 /* Enable the Peripheral */
mbed_official 381:5460fc57b6e4 325 __HAL_DMA_ENABLE(hdma);
mbed_official 381:5460fc57b6e4 326
mbed_official 381:5460fc57b6e4 327 return HAL_OK;
mbed_official 381:5460fc57b6e4 328 }
mbed_official 381:5460fc57b6e4 329
mbed_official 381:5460fc57b6e4 330 /**
mbed_official 381:5460fc57b6e4 331 * @brief Start the DMA Transfer with interrupt enabled.
mbed_official 381:5460fc57b6e4 332 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 333 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 334 * @param SrcAddress: The source memory Buffer address
mbed_official 381:5460fc57b6e4 335 * @param DstAddress: The destination memory Buffer address
mbed_official 381:5460fc57b6e4 336 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 381:5460fc57b6e4 337 * @retval HAL status
mbed_official 381:5460fc57b6e4 338 */
mbed_official 381:5460fc57b6e4 339 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 381:5460fc57b6e4 340 {
mbed_official 381:5460fc57b6e4 341 /* Process locked */
mbed_official 381:5460fc57b6e4 342 __HAL_LOCK(hdma);
mbed_official 381:5460fc57b6e4 343
mbed_official 381:5460fc57b6e4 344 /* Change DMA peripheral state */
mbed_official 381:5460fc57b6e4 345 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 381:5460fc57b6e4 346
mbed_official 381:5460fc57b6e4 347 /* Check the parameters */
mbed_official 381:5460fc57b6e4 348 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 381:5460fc57b6e4 349
mbed_official 381:5460fc57b6e4 350 /* Disable the peripheral */
mbed_official 381:5460fc57b6e4 351 __HAL_DMA_DISABLE(hdma);
mbed_official 381:5460fc57b6e4 352
mbed_official 381:5460fc57b6e4 353 /* Configure the source, destination address and the data length */
mbed_official 381:5460fc57b6e4 354 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 381:5460fc57b6e4 355
mbed_official 381:5460fc57b6e4 356 /* Enable the transfer complete interrupt */
mbed_official 381:5460fc57b6e4 357 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
mbed_official 381:5460fc57b6e4 358
mbed_official 381:5460fc57b6e4 359 /* Enable the Half transfer complete interrupt */
mbed_official 381:5460fc57b6e4 360 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
mbed_official 381:5460fc57b6e4 361
mbed_official 381:5460fc57b6e4 362 /* Enable the transfer Error interrupt */
mbed_official 381:5460fc57b6e4 363 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
mbed_official 381:5460fc57b6e4 364
mbed_official 381:5460fc57b6e4 365 /* Enable the Peripheral */
mbed_official 381:5460fc57b6e4 366 __HAL_DMA_ENABLE(hdma);
mbed_official 381:5460fc57b6e4 367
mbed_official 381:5460fc57b6e4 368 return HAL_OK;
mbed_official 381:5460fc57b6e4 369 }
mbed_official 381:5460fc57b6e4 370
mbed_official 381:5460fc57b6e4 371 /**
mbed_official 381:5460fc57b6e4 372 * @brief Aborts the DMA Transfer.
mbed_official 381:5460fc57b6e4 373 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 374 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 375 *
mbed_official 381:5460fc57b6e4 376 * @note After disabling a DMA Channel, a check for wait until the DMA Channel is
mbed_official 381:5460fc57b6e4 377 * effectively disabled is added. If a Channel is disabled
mbed_official 381:5460fc57b6e4 378 * while a data transfer is ongoing, the current data will be transferred
mbed_official 381:5460fc57b6e4 379 * and the Channel will be effectively disabled only after the transfer of
mbed_official 381:5460fc57b6e4 380 * this single data is finished.
mbed_official 381:5460fc57b6e4 381 * @retval HAL status
mbed_official 381:5460fc57b6e4 382 */
mbed_official 381:5460fc57b6e4 383 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
mbed_official 381:5460fc57b6e4 384 {
mbed_official 381:5460fc57b6e4 385 uint32_t tickstart = 0x00;
mbed_official 381:5460fc57b6e4 386
mbed_official 381:5460fc57b6e4 387 /* Disable the channel */
mbed_official 381:5460fc57b6e4 388 __HAL_DMA_DISABLE(hdma);
mbed_official 381:5460fc57b6e4 389
mbed_official 381:5460fc57b6e4 390 /* Get timeout */
mbed_official 381:5460fc57b6e4 391 tickstart = HAL_GetTick();
mbed_official 381:5460fc57b6e4 392
mbed_official 381:5460fc57b6e4 393 /* Check if the DMA Channel is effectively disabled */
mbed_official 381:5460fc57b6e4 394 while((hdma->Instance->CCR & DMA_CCR_EN) != 0)
mbed_official 381:5460fc57b6e4 395 {
mbed_official 381:5460fc57b6e4 396 /* Check for the Timeout */
mbed_official 381:5460fc57b6e4 397 if((HAL_GetTick()-tickstart) > HAL_TIMEOUT_DMA_ABORT)
mbed_official 381:5460fc57b6e4 398 {
mbed_official 381:5460fc57b6e4 399 /* Update error code */
mbed_official 381:5460fc57b6e4 400 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 381:5460fc57b6e4 401
mbed_official 381:5460fc57b6e4 402 /* Change the DMA state */
mbed_official 381:5460fc57b6e4 403 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 381:5460fc57b6e4 404
mbed_official 381:5460fc57b6e4 405 /* Process Unlocked */
mbed_official 381:5460fc57b6e4 406 __HAL_UNLOCK(hdma);
mbed_official 381:5460fc57b6e4 407
mbed_official 381:5460fc57b6e4 408 return HAL_TIMEOUT;
mbed_official 381:5460fc57b6e4 409 }
mbed_official 381:5460fc57b6e4 410 }
mbed_official 381:5460fc57b6e4 411 /* Change the DMA state*/
mbed_official 381:5460fc57b6e4 412 hdma->State = HAL_DMA_STATE_READY;
mbed_official 381:5460fc57b6e4 413
mbed_official 381:5460fc57b6e4 414 /* Process Unlocked */
mbed_official 381:5460fc57b6e4 415 __HAL_UNLOCK(hdma);
mbed_official 381:5460fc57b6e4 416
mbed_official 381:5460fc57b6e4 417 return HAL_OK;
mbed_official 381:5460fc57b6e4 418 }
mbed_official 381:5460fc57b6e4 419
mbed_official 381:5460fc57b6e4 420 /**
mbed_official 381:5460fc57b6e4 421 * @brief Polling for transfer complete.
mbed_official 381:5460fc57b6e4 422 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 423 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 424 * @param CompleteLevel: Specifies the DMA level complete.
mbed_official 381:5460fc57b6e4 425 * @param Timeout: Timeout duration.
mbed_official 381:5460fc57b6e4 426 * @retval HAL status
mbed_official 381:5460fc57b6e4 427 */
mbed_official 381:5460fc57b6e4 428 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
mbed_official 381:5460fc57b6e4 429 {
mbed_official 381:5460fc57b6e4 430 uint32_t temp;
mbed_official 381:5460fc57b6e4 431 uint32_t tickstart = 0x00;
mbed_official 381:5460fc57b6e4 432
mbed_official 381:5460fc57b6e4 433 /* Get the level transfer complete flag */
mbed_official 381:5460fc57b6e4 434 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 381:5460fc57b6e4 435 {
mbed_official 381:5460fc57b6e4 436 /* Transfer Complete flag */
mbed_official 381:5460fc57b6e4 437 temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
mbed_official 381:5460fc57b6e4 438 }
mbed_official 381:5460fc57b6e4 439 else
mbed_official 381:5460fc57b6e4 440 {
mbed_official 381:5460fc57b6e4 441 /* Half Transfer Complete flag */
mbed_official 381:5460fc57b6e4 442 temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
mbed_official 381:5460fc57b6e4 443 }
mbed_official 381:5460fc57b6e4 444
mbed_official 381:5460fc57b6e4 445 /* Get timeout */
mbed_official 381:5460fc57b6e4 446 tickstart = HAL_GetTick();
mbed_official 381:5460fc57b6e4 447
mbed_official 381:5460fc57b6e4 448 while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
mbed_official 381:5460fc57b6e4 449 {
mbed_official 381:5460fc57b6e4 450 if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
mbed_official 381:5460fc57b6e4 451 {
mbed_official 381:5460fc57b6e4 452 /* Clear the transfer error flags */
mbed_official 381:5460fc57b6e4 453 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 381:5460fc57b6e4 454
mbed_official 381:5460fc57b6e4 455 /* Change the DMA state */
mbed_official 381:5460fc57b6e4 456 hdma->State= HAL_DMA_STATE_ERROR;
mbed_official 381:5460fc57b6e4 457
mbed_official 381:5460fc57b6e4 458 /* Process Unlocked */
mbed_official 381:5460fc57b6e4 459 __HAL_UNLOCK(hdma);
mbed_official 381:5460fc57b6e4 460
mbed_official 381:5460fc57b6e4 461 return HAL_ERROR;
mbed_official 381:5460fc57b6e4 462 }
mbed_official 381:5460fc57b6e4 463 /* Check for the Timeout */
mbed_official 381:5460fc57b6e4 464 if(Timeout != HAL_MAX_DELAY)
mbed_official 381:5460fc57b6e4 465 {
mbed_official 381:5460fc57b6e4 466 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
mbed_official 381:5460fc57b6e4 467 {
mbed_official 381:5460fc57b6e4 468 /* Update error code */
mbed_official 381:5460fc57b6e4 469 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 381:5460fc57b6e4 470
mbed_official 381:5460fc57b6e4 471 /* Change the DMA state */
mbed_official 381:5460fc57b6e4 472 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 381:5460fc57b6e4 473
mbed_official 381:5460fc57b6e4 474 /* Process Unlocked */
mbed_official 381:5460fc57b6e4 475 __HAL_UNLOCK(hdma);
mbed_official 381:5460fc57b6e4 476
mbed_official 381:5460fc57b6e4 477 return HAL_TIMEOUT;
mbed_official 381:5460fc57b6e4 478 }
mbed_official 381:5460fc57b6e4 479 }
mbed_official 381:5460fc57b6e4 480 }
mbed_official 381:5460fc57b6e4 481
mbed_official 381:5460fc57b6e4 482 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 381:5460fc57b6e4 483 {
mbed_official 381:5460fc57b6e4 484 /* Clear the transfer complete flag */
mbed_official 381:5460fc57b6e4 485 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 381:5460fc57b6e4 486
mbed_official 381:5460fc57b6e4 487 /* The selected Channelx EN bit is cleared (DMA is disabled and
mbed_official 381:5460fc57b6e4 488 all transfers are complete) */
mbed_official 381:5460fc57b6e4 489 hdma->State = HAL_DMA_STATE_READY;
mbed_official 381:5460fc57b6e4 490
mbed_official 381:5460fc57b6e4 491 }
mbed_official 381:5460fc57b6e4 492 else
mbed_official 381:5460fc57b6e4 493 {
mbed_official 381:5460fc57b6e4 494 /* Clear the half transfer complete flag */
mbed_official 381:5460fc57b6e4 495 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 381:5460fc57b6e4 496
mbed_official 381:5460fc57b6e4 497 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 381:5460fc57b6e4 498 }
mbed_official 381:5460fc57b6e4 499
mbed_official 381:5460fc57b6e4 500 /* Process unlocked */
mbed_official 381:5460fc57b6e4 501 __HAL_UNLOCK(hdma);
mbed_official 381:5460fc57b6e4 502
mbed_official 381:5460fc57b6e4 503 return HAL_OK;
mbed_official 381:5460fc57b6e4 504 }
mbed_official 381:5460fc57b6e4 505
mbed_official 381:5460fc57b6e4 506 /**
mbed_official 381:5460fc57b6e4 507 * @brief Handles DMA interrupt request.
mbed_official 381:5460fc57b6e4 508 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 509 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 510 * @retval None
mbed_official 381:5460fc57b6e4 511 */
mbed_official 381:5460fc57b6e4 512 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
mbed_official 381:5460fc57b6e4 513 {
mbed_official 381:5460fc57b6e4 514 /* Transfer Error Interrupt management ***************************************/
mbed_official 381:5460fc57b6e4 515 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
mbed_official 381:5460fc57b6e4 516 {
mbed_official 381:5460fc57b6e4 517 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
mbed_official 381:5460fc57b6e4 518 {
mbed_official 381:5460fc57b6e4 519 /* Disable the transfer error interrupt */
mbed_official 381:5460fc57b6e4 520 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
mbed_official 381:5460fc57b6e4 521
mbed_official 381:5460fc57b6e4 522 /* Clear the transfer error flag */
mbed_official 381:5460fc57b6e4 523 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 381:5460fc57b6e4 524
mbed_official 381:5460fc57b6e4 525 /* Update error code */
mbed_official 381:5460fc57b6e4 526 hdma->ErrorCode |= HAL_DMA_ERROR_TE;
mbed_official 381:5460fc57b6e4 527
mbed_official 381:5460fc57b6e4 528 /* Change the DMA state */
mbed_official 381:5460fc57b6e4 529 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 381:5460fc57b6e4 530
mbed_official 381:5460fc57b6e4 531 /* Process Unlocked */
mbed_official 381:5460fc57b6e4 532 __HAL_UNLOCK(hdma);
mbed_official 381:5460fc57b6e4 533
mbed_official 381:5460fc57b6e4 534 if (hdma->XferErrorCallback != HAL_NULL)
mbed_official 381:5460fc57b6e4 535 {
mbed_official 381:5460fc57b6e4 536 /* Transfer error callback */
mbed_official 381:5460fc57b6e4 537 hdma->XferErrorCallback(hdma);
mbed_official 381:5460fc57b6e4 538 }
mbed_official 381:5460fc57b6e4 539 }
mbed_official 381:5460fc57b6e4 540 }
mbed_official 381:5460fc57b6e4 541
mbed_official 381:5460fc57b6e4 542 /* Half Transfer Complete Interrupt management ******************************/
mbed_official 381:5460fc57b6e4 543 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
mbed_official 381:5460fc57b6e4 544 {
mbed_official 381:5460fc57b6e4 545 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
mbed_official 381:5460fc57b6e4 546 {
mbed_official 381:5460fc57b6e4 547 /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
mbed_official 381:5460fc57b6e4 548 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 381:5460fc57b6e4 549 {
mbed_official 381:5460fc57b6e4 550 /* Disable the half transfer interrupt */
mbed_official 381:5460fc57b6e4 551 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
mbed_official 381:5460fc57b6e4 552 }
mbed_official 381:5460fc57b6e4 553 /* Clear the half transfer complete flag */
mbed_official 381:5460fc57b6e4 554 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 381:5460fc57b6e4 555
mbed_official 381:5460fc57b6e4 556 /* Change DMA peripheral state */
mbed_official 381:5460fc57b6e4 557 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 381:5460fc57b6e4 558
mbed_official 381:5460fc57b6e4 559 if(hdma->XferHalfCpltCallback != HAL_NULL)
mbed_official 381:5460fc57b6e4 560 {
mbed_official 381:5460fc57b6e4 561 /* Half transfer callback */
mbed_official 381:5460fc57b6e4 562 hdma->XferHalfCpltCallback(hdma);
mbed_official 381:5460fc57b6e4 563 }
mbed_official 381:5460fc57b6e4 564 }
mbed_official 381:5460fc57b6e4 565 }
mbed_official 381:5460fc57b6e4 566
mbed_official 381:5460fc57b6e4 567 /* Transfer Complete Interrupt management ***********************************/
mbed_official 381:5460fc57b6e4 568 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
mbed_official 381:5460fc57b6e4 569 {
mbed_official 381:5460fc57b6e4 570 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
mbed_official 381:5460fc57b6e4 571 {
mbed_official 381:5460fc57b6e4 572 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 381:5460fc57b6e4 573 {
mbed_official 381:5460fc57b6e4 574 /* Disable the transfer complete interrupt */
mbed_official 381:5460fc57b6e4 575 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
mbed_official 381:5460fc57b6e4 576 }
mbed_official 381:5460fc57b6e4 577 /* Clear the transfer complete flag */
mbed_official 381:5460fc57b6e4 578 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 381:5460fc57b6e4 579
mbed_official 381:5460fc57b6e4 580 /* Update error code */
mbed_official 381:5460fc57b6e4 581 hdma->ErrorCode |= HAL_DMA_ERROR_NONE;
mbed_official 381:5460fc57b6e4 582
mbed_official 381:5460fc57b6e4 583 /* Change the DMA state */
mbed_official 381:5460fc57b6e4 584 hdma->State = HAL_DMA_STATE_READY;
mbed_official 381:5460fc57b6e4 585
mbed_official 381:5460fc57b6e4 586 /* Process Unlocked */
mbed_official 381:5460fc57b6e4 587 __HAL_UNLOCK(hdma);
mbed_official 381:5460fc57b6e4 588
mbed_official 381:5460fc57b6e4 589 if(hdma->XferCpltCallback != HAL_NULL)
mbed_official 381:5460fc57b6e4 590 {
mbed_official 381:5460fc57b6e4 591 /* Transfer complete callback */
mbed_official 381:5460fc57b6e4 592 hdma->XferCpltCallback(hdma);
mbed_official 381:5460fc57b6e4 593 }
mbed_official 381:5460fc57b6e4 594 }
mbed_official 381:5460fc57b6e4 595 }
mbed_official 381:5460fc57b6e4 596 }
mbed_official 381:5460fc57b6e4 597
mbed_official 381:5460fc57b6e4 598 /**
mbed_official 381:5460fc57b6e4 599 * @}
mbed_official 381:5460fc57b6e4 600 */
mbed_official 381:5460fc57b6e4 601
mbed_official 381:5460fc57b6e4 602 /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
mbed_official 381:5460fc57b6e4 603 * @brief Peripheral State functions
mbed_official 381:5460fc57b6e4 604 *
mbed_official 381:5460fc57b6e4 605 @verbatim
mbed_official 381:5460fc57b6e4 606 ===============================================================================
mbed_official 381:5460fc57b6e4 607 ##### State and Errors functions #####
mbed_official 381:5460fc57b6e4 608 ===============================================================================
mbed_official 381:5460fc57b6e4 609 [..]
mbed_official 381:5460fc57b6e4 610 This subsection provides functions allowing to
mbed_official 381:5460fc57b6e4 611 (+) Check the DMA state
mbed_official 381:5460fc57b6e4 612 (+) Get error code
mbed_official 381:5460fc57b6e4 613
mbed_official 381:5460fc57b6e4 614 @endverbatim
mbed_official 381:5460fc57b6e4 615 * @{
mbed_official 381:5460fc57b6e4 616 */
mbed_official 381:5460fc57b6e4 617
mbed_official 381:5460fc57b6e4 618 /**
mbed_official 381:5460fc57b6e4 619 * @brief Returns the DMA state.
mbed_official 381:5460fc57b6e4 620 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 621 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 622 * @retval HAL state
mbed_official 381:5460fc57b6e4 623 */
mbed_official 381:5460fc57b6e4 624 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
mbed_official 381:5460fc57b6e4 625 {
mbed_official 381:5460fc57b6e4 626 return hdma->State;
mbed_official 381:5460fc57b6e4 627 }
mbed_official 381:5460fc57b6e4 628
mbed_official 381:5460fc57b6e4 629 /**
mbed_official 381:5460fc57b6e4 630 * @brief Return the DMA error code
mbed_official 381:5460fc57b6e4 631 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 632 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 633 * @retval DMA Error Code
mbed_official 381:5460fc57b6e4 634 */
mbed_official 381:5460fc57b6e4 635 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
mbed_official 381:5460fc57b6e4 636 {
mbed_official 381:5460fc57b6e4 637 return hdma->ErrorCode;
mbed_official 381:5460fc57b6e4 638 }
mbed_official 381:5460fc57b6e4 639
mbed_official 381:5460fc57b6e4 640 /**
mbed_official 381:5460fc57b6e4 641 * @}
mbed_official 381:5460fc57b6e4 642 */
mbed_official 381:5460fc57b6e4 643
mbed_official 381:5460fc57b6e4 644 /**
mbed_official 381:5460fc57b6e4 645 * @}
mbed_official 381:5460fc57b6e4 646 */
mbed_official 381:5460fc57b6e4 647
mbed_official 381:5460fc57b6e4 648 /** @addtogroup DMA_Private_Functions DMA Private Functions
mbed_official 381:5460fc57b6e4 649 * @{
mbed_official 381:5460fc57b6e4 650 */
mbed_official 381:5460fc57b6e4 651
mbed_official 381:5460fc57b6e4 652 /**
mbed_official 381:5460fc57b6e4 653 * @brief Sets the DMA Transfer parameter.
mbed_official 381:5460fc57b6e4 654 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 381:5460fc57b6e4 655 * the configuration information for the specified DMA Channel.
mbed_official 381:5460fc57b6e4 656 * @param SrcAddress: The source memory Buffer address
mbed_official 381:5460fc57b6e4 657 * @param DstAddress: The destination memory Buffer address
mbed_official 381:5460fc57b6e4 658 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 381:5460fc57b6e4 659 * @retval HAL status
mbed_official 381:5460fc57b6e4 660 */
mbed_official 381:5460fc57b6e4 661 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 381:5460fc57b6e4 662 {
mbed_official 381:5460fc57b6e4 663 /* Configure DMA Channel data length */
mbed_official 381:5460fc57b6e4 664 hdma->Instance->CNDTR = DataLength;
mbed_official 381:5460fc57b6e4 665
mbed_official 381:5460fc57b6e4 666 /* Peripheral to Memory */
mbed_official 381:5460fc57b6e4 667 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
mbed_official 381:5460fc57b6e4 668 {
mbed_official 381:5460fc57b6e4 669 /* Configure DMA Channel destination address */
mbed_official 381:5460fc57b6e4 670 hdma->Instance->CPAR = DstAddress;
mbed_official 381:5460fc57b6e4 671
mbed_official 381:5460fc57b6e4 672 /* Configure DMA Channel source address */
mbed_official 381:5460fc57b6e4 673 hdma->Instance->CMAR = SrcAddress;
mbed_official 381:5460fc57b6e4 674 }
mbed_official 381:5460fc57b6e4 675 /* Memory to Peripheral */
mbed_official 381:5460fc57b6e4 676 else
mbed_official 381:5460fc57b6e4 677 {
mbed_official 381:5460fc57b6e4 678 /* Configure DMA Channel source address */
mbed_official 381:5460fc57b6e4 679 hdma->Instance->CPAR = SrcAddress;
mbed_official 381:5460fc57b6e4 680
mbed_official 381:5460fc57b6e4 681 /* Configure DMA Channel destination address */
mbed_official 381:5460fc57b6e4 682 hdma->Instance->CMAR = DstAddress;
mbed_official 381:5460fc57b6e4 683 }
mbed_official 381:5460fc57b6e4 684 }
mbed_official 381:5460fc57b6e4 685
mbed_official 381:5460fc57b6e4 686 /**
mbed_official 381:5460fc57b6e4 687 * @}
mbed_official 381:5460fc57b6e4 688 */
mbed_official 381:5460fc57b6e4 689
mbed_official 381:5460fc57b6e4 690 #endif /* HAL_DMA_MODULE_ENABLED */
mbed_official 381:5460fc57b6e4 691 /**
mbed_official 381:5460fc57b6e4 692 * @}
mbed_official 381:5460fc57b6e4 693 */
mbed_official 381:5460fc57b6e4 694
mbed_official 381:5460fc57b6e4 695 /**
mbed_official 381:5460fc57b6e4 696 * @}
mbed_official 381:5460fc57b6e4 697 */
mbed_official 381:5460fc57b6e4 698
mbed_official 381:5460fc57b6e4 699 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/