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targets/cmsis/TARGET_STM/TARGET_DISCO_F334C8/stm32f3xx_hal_cortex.c@381:5460fc57b6e4, 2014-11-03 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Nov 03 10:30:07 2014 +0000
- Revision:
- 381:5460fc57b6e4
Synchronized with git revision 02478cd1f27fc7b9643486472635eb515b2bca81
Full URL: https://github.com/mbedmicro/mbed/commit/02478cd1f27fc7b9643486472635eb515b2bca81/
Target: LPC1549 - Fix serial interrupt issues (issue report #616)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 381:5460fc57b6e4 | 1 | /** |
mbed_official | 381:5460fc57b6e4 | 2 | ****************************************************************************** |
mbed_official | 381:5460fc57b6e4 | 3 | * @file stm32f3xx_hal_cortex.c |
mbed_official | 381:5460fc57b6e4 | 4 | * @author MCD Application Team |
mbed_official | 381:5460fc57b6e4 | 5 | * @version V1.1.0 |
mbed_official | 381:5460fc57b6e4 | 6 | * @date 12-Sept-2014 |
mbed_official | 381:5460fc57b6e4 | 7 | * @brief CORTEX HAL module driver. |
mbed_official | 381:5460fc57b6e4 | 8 | * |
mbed_official | 381:5460fc57b6e4 | 9 | * This file provides firmware functions to manage the following |
mbed_official | 381:5460fc57b6e4 | 10 | * functionalities of the CORTEX: |
mbed_official | 381:5460fc57b6e4 | 11 | * + Initialization/de-initialization functions |
mbed_official | 381:5460fc57b6e4 | 12 | * + Peripheral Control functions |
mbed_official | 381:5460fc57b6e4 | 13 | * |
mbed_official | 381:5460fc57b6e4 | 14 | * @verbatim |
mbed_official | 381:5460fc57b6e4 | 15 | ============================================================================== |
mbed_official | 381:5460fc57b6e4 | 16 | ##### How to use this driver ##### |
mbed_official | 381:5460fc57b6e4 | 17 | ============================================================================== |
mbed_official | 381:5460fc57b6e4 | 18 | |
mbed_official | 381:5460fc57b6e4 | 19 | [..] |
mbed_official | 381:5460fc57b6e4 | 20 | *** How to configure Interrupts using Cortex HAL driver *** |
mbed_official | 381:5460fc57b6e4 | 21 | =========================================================== |
mbed_official | 381:5460fc57b6e4 | 22 | [..] |
mbed_official | 381:5460fc57b6e4 | 23 | This section provide functions allowing to configure the NVIC interrupts (IRQ). |
mbed_official | 381:5460fc57b6e4 | 24 | The Cortex-M4 exceptions are managed by CMSIS functions. |
mbed_official | 381:5460fc57b6e4 | 25 | |
mbed_official | 381:5460fc57b6e4 | 26 | (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping() |
mbed_official | 381:5460fc57b6e4 | 27 | function according to the following table. |
mbed_official | 381:5460fc57b6e4 | 28 | |
mbed_official | 381:5460fc57b6e4 | 29 | @brief CORTEX_NVIC_Priority_Table |
mbed_official | 381:5460fc57b6e4 | 30 | The table below gives the allowed values of the pre-emption priority and subpriority according |
mbed_official | 381:5460fc57b6e4 | 31 | to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function |
mbed_official | 381:5460fc57b6e4 | 32 | ========================================================================================================================== |
mbed_official | 381:5460fc57b6e4 | 33 | NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description |
mbed_official | 381:5460fc57b6e4 | 34 | ========================================================================================================================== |
mbed_official | 381:5460fc57b6e4 | 35 | NVIC_PRIORITYGROUP_0 | 0 | 0-15 | 0 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 36 | | | | 4 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 37 | -------------------------------------------------------------------------------------------------------------------------- |
mbed_official | 381:5460fc57b6e4 | 38 | NVIC_PRIORITYGROUP_1 | 0-1 | 0-7 | 1 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 39 | | | | 3 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 40 | -------------------------------------------------------------------------------------------------------------------------- |
mbed_official | 381:5460fc57b6e4 | 41 | NVIC_PRIORITYGROUP_2 | 0-3 | 0-3 | 2 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 42 | | | | 2 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 43 | -------------------------------------------------------------------------------------------------------------------------- |
mbed_official | 381:5460fc57b6e4 | 44 | NVIC_PRIORITYGROUP_3 | 0-7 | 0-1 | 3 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 45 | | | | 1 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 46 | -------------------------------------------------------------------------------------------------------------------------- |
mbed_official | 381:5460fc57b6e4 | 47 | NVIC_PRIORITYGROUP_4 | 0-15 | 0 | 4 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 48 | | | | 0 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 49 | ========================================================================================================================== |
mbed_official | 381:5460fc57b6e4 | 50 | (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() |
mbed_official | 381:5460fc57b6e4 | 51 | |
mbed_official | 381:5460fc57b6e4 | 52 | (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() |
mbed_official | 381:5460fc57b6e4 | 53 | |
mbed_official | 381:5460fc57b6e4 | 54 | |
mbed_official | 381:5460fc57b6e4 | 55 | -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible. |
mbed_official | 381:5460fc57b6e4 | 56 | The pending IRQ priority will be managed only by the sub priority. |
mbed_official | 381:5460fc57b6e4 | 57 | |
mbed_official | 381:5460fc57b6e4 | 58 | -@- IRQ priority order (sorted by highest to lowest priority): |
mbed_official | 381:5460fc57b6e4 | 59 | (+@) Lowest pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 60 | (+@) Lowest sub priority |
mbed_official | 381:5460fc57b6e4 | 61 | (+@) Lowest hardware priority (IRQ number) |
mbed_official | 381:5460fc57b6e4 | 62 | |
mbed_official | 381:5460fc57b6e4 | 63 | [..] |
mbed_official | 381:5460fc57b6e4 | 64 | *** How to configure Systick using Cortex HAL driver *** |
mbed_official | 381:5460fc57b6e4 | 65 | ======================================================== |
mbed_official | 381:5460fc57b6e4 | 66 | [..] |
mbed_official | 381:5460fc57b6e4 | 67 | Setup SysTick Timer for time base. |
mbed_official | 381:5460fc57b6e4 | 68 | |
mbed_official | 381:5460fc57b6e4 | 69 | (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which |
mbed_official | 381:5460fc57b6e4 | 70 | is a CMSIS function that: |
mbed_official | 381:5460fc57b6e4 | 71 | (++) Configures the SysTick Reload register with value passed as function parameter. |
mbed_official | 381:5460fc57b6e4 | 72 | (++) Configures the SysTick IRQ priority to the lowest value (0x0F). |
mbed_official | 381:5460fc57b6e4 | 73 | (++) Resets the SysTick Counter register. |
mbed_official | 381:5460fc57b6e4 | 74 | (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). |
mbed_official | 381:5460fc57b6e4 | 75 | (++) Enables the SysTick Interrupt. |
mbed_official | 381:5460fc57b6e4 | 76 | (++) Starts the SysTick Counter. |
mbed_official | 381:5460fc57b6e4 | 77 | |
mbed_official | 381:5460fc57b6e4 | 78 | (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro |
mbed_official | 381:5460fc57b6e4 | 79 | __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the |
mbed_official | 381:5460fc57b6e4 | 80 | HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined |
mbed_official | 381:5460fc57b6e4 | 81 | inside the stm32f3xx_hal_cortex.h file. |
mbed_official | 381:5460fc57b6e4 | 82 | |
mbed_official | 381:5460fc57b6e4 | 83 | (+) You can change the SysTick IRQ priority by calling the |
mbed_official | 381:5460fc57b6e4 | 84 | HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function |
mbed_official | 381:5460fc57b6e4 | 85 | call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function. |
mbed_official | 381:5460fc57b6e4 | 86 | |
mbed_official | 381:5460fc57b6e4 | 87 | (+) To adjust the SysTick time base, use the following formula: |
mbed_official | 381:5460fc57b6e4 | 88 | |
mbed_official | 381:5460fc57b6e4 | 89 | Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) |
mbed_official | 381:5460fc57b6e4 | 90 | (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function |
mbed_official | 381:5460fc57b6e4 | 91 | (++) Reload Value should not exceed 0xFFFFFF |
mbed_official | 381:5460fc57b6e4 | 92 | |
mbed_official | 381:5460fc57b6e4 | 93 | @endverbatim |
mbed_official | 381:5460fc57b6e4 | 94 | ****************************************************************************** |
mbed_official | 381:5460fc57b6e4 | 95 | * @attention |
mbed_official | 381:5460fc57b6e4 | 96 | * |
mbed_official | 381:5460fc57b6e4 | 97 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 381:5460fc57b6e4 | 98 | * |
mbed_official | 381:5460fc57b6e4 | 99 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 381:5460fc57b6e4 | 100 | * are permitted provided that the following conditions are met: |
mbed_official | 381:5460fc57b6e4 | 101 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 381:5460fc57b6e4 | 102 | * this list of conditions and the following disclaimer. |
mbed_official | 381:5460fc57b6e4 | 103 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 381:5460fc57b6e4 | 104 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 381:5460fc57b6e4 | 105 | * and/or other materials provided with the distribution. |
mbed_official | 381:5460fc57b6e4 | 106 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 381:5460fc57b6e4 | 107 | * may be used to endorse or promote products derived from this software |
mbed_official | 381:5460fc57b6e4 | 108 | * without specific prior written permission. |
mbed_official | 381:5460fc57b6e4 | 109 | * |
mbed_official | 381:5460fc57b6e4 | 110 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 381:5460fc57b6e4 | 111 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 381:5460fc57b6e4 | 112 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 381:5460fc57b6e4 | 113 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 381:5460fc57b6e4 | 114 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 381:5460fc57b6e4 | 115 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 381:5460fc57b6e4 | 116 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 381:5460fc57b6e4 | 117 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 381:5460fc57b6e4 | 118 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 381:5460fc57b6e4 | 119 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 381:5460fc57b6e4 | 120 | * |
mbed_official | 381:5460fc57b6e4 | 121 | ****************************************************************************** |
mbed_official | 381:5460fc57b6e4 | 122 | */ |
mbed_official | 381:5460fc57b6e4 | 123 | |
mbed_official | 381:5460fc57b6e4 | 124 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 381:5460fc57b6e4 | 125 | #include "stm32f3xx_hal.h" |
mbed_official | 381:5460fc57b6e4 | 126 | |
mbed_official | 381:5460fc57b6e4 | 127 | /** @addtogroup STM32F3xx_HAL_Driver |
mbed_official | 381:5460fc57b6e4 | 128 | * @{ |
mbed_official | 381:5460fc57b6e4 | 129 | */ |
mbed_official | 381:5460fc57b6e4 | 130 | |
mbed_official | 381:5460fc57b6e4 | 131 | /** @defgroup CORTEX CORTEX HAL module driver |
mbed_official | 381:5460fc57b6e4 | 132 | * @brief CORTEX HAL module driver |
mbed_official | 381:5460fc57b6e4 | 133 | * @{ |
mbed_official | 381:5460fc57b6e4 | 134 | */ |
mbed_official | 381:5460fc57b6e4 | 135 | |
mbed_official | 381:5460fc57b6e4 | 136 | #ifdef HAL_CORTEX_MODULE_ENABLED |
mbed_official | 381:5460fc57b6e4 | 137 | |
mbed_official | 381:5460fc57b6e4 | 138 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 381:5460fc57b6e4 | 139 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 381:5460fc57b6e4 | 140 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 381:5460fc57b6e4 | 141 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 381:5460fc57b6e4 | 142 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 381:5460fc57b6e4 | 143 | /* Exported functions --------------------------------------------------------*/ |
mbed_official | 381:5460fc57b6e4 | 144 | |
mbed_official | 381:5460fc57b6e4 | 145 | /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions |
mbed_official | 381:5460fc57b6e4 | 146 | * @{ |
mbed_official | 381:5460fc57b6e4 | 147 | */ |
mbed_official | 381:5460fc57b6e4 | 148 | |
mbed_official | 381:5460fc57b6e4 | 149 | |
mbed_official | 381:5460fc57b6e4 | 150 | /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions |
mbed_official | 381:5460fc57b6e4 | 151 | * @brief Initialization and Configuration functions |
mbed_official | 381:5460fc57b6e4 | 152 | * |
mbed_official | 381:5460fc57b6e4 | 153 | @verbatim |
mbed_official | 381:5460fc57b6e4 | 154 | ============================================================================== |
mbed_official | 381:5460fc57b6e4 | 155 | ##### Initialization and de-initialization functions ##### |
mbed_official | 381:5460fc57b6e4 | 156 | ============================================================================== |
mbed_official | 381:5460fc57b6e4 | 157 | [..] |
mbed_official | 381:5460fc57b6e4 | 158 | This section provide the Cortex HAL driver functions allowing to configure Interrupts |
mbed_official | 381:5460fc57b6e4 | 159 | Systick functionalities |
mbed_official | 381:5460fc57b6e4 | 160 | |
mbed_official | 381:5460fc57b6e4 | 161 | @endverbatim |
mbed_official | 381:5460fc57b6e4 | 162 | * @{ |
mbed_official | 381:5460fc57b6e4 | 163 | */ |
mbed_official | 381:5460fc57b6e4 | 164 | |
mbed_official | 381:5460fc57b6e4 | 165 | |
mbed_official | 381:5460fc57b6e4 | 166 | /** |
mbed_official | 381:5460fc57b6e4 | 167 | * @brief Sets the priority grouping field (pre-emption priority and subpriority) |
mbed_official | 381:5460fc57b6e4 | 168 | * using the required unlock sequence. |
mbed_official | 381:5460fc57b6e4 | 169 | * @param PriorityGroup: The priority grouping bits length. |
mbed_official | 381:5460fc57b6e4 | 170 | * This parameter can be one of the following values: |
mbed_official | 381:5460fc57b6e4 | 171 | * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 172 | * 4 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 173 | * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 174 | * 3 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 175 | * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 176 | * 2 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 177 | * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 178 | * 1 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 179 | * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 180 | * 0 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 181 | * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. |
mbed_official | 381:5460fc57b6e4 | 182 | * The pending IRQ priority will be managed only by the subpriority. |
mbed_official | 381:5460fc57b6e4 | 183 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 184 | */ |
mbed_official | 381:5460fc57b6e4 | 185 | void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) |
mbed_official | 381:5460fc57b6e4 | 186 | { |
mbed_official | 381:5460fc57b6e4 | 187 | /* Check the parameters */ |
mbed_official | 381:5460fc57b6e4 | 188 | assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); |
mbed_official | 381:5460fc57b6e4 | 189 | |
mbed_official | 381:5460fc57b6e4 | 190 | /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ |
mbed_official | 381:5460fc57b6e4 | 191 | NVIC_SetPriorityGrouping(PriorityGroup); |
mbed_official | 381:5460fc57b6e4 | 192 | } |
mbed_official | 381:5460fc57b6e4 | 193 | |
mbed_official | 381:5460fc57b6e4 | 194 | /** |
mbed_official | 381:5460fc57b6e4 | 195 | * @brief Sets the priority of an interrupt. |
mbed_official | 381:5460fc57b6e4 | 196 | * @param IRQn: External interrupt number |
mbed_official | 381:5460fc57b6e4 | 197 | * This parameter can be an enumerator of IRQn_Type enumeration |
mbed_official | 381:5460fc57b6e4 | 198 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) |
mbed_official | 381:5460fc57b6e4 | 199 | * @param PreemptPriority: The pre-emption priority for the IRQn channel. |
mbed_official | 381:5460fc57b6e4 | 200 | * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Priority_Table |
mbed_official | 381:5460fc57b6e4 | 201 | * A lower priority value indicates a higher priority |
mbed_official | 381:5460fc57b6e4 | 202 | * @param SubPriority: the subpriority level for the IRQ channel. |
mbed_official | 381:5460fc57b6e4 | 203 | * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Priority_Table |
mbed_official | 381:5460fc57b6e4 | 204 | * A lower priority value indicates a higher priority. |
mbed_official | 381:5460fc57b6e4 | 205 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 206 | */ |
mbed_official | 381:5460fc57b6e4 | 207 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) |
mbed_official | 381:5460fc57b6e4 | 208 | { |
mbed_official | 381:5460fc57b6e4 | 209 | uint32_t prioritygroup = 0x00; |
mbed_official | 381:5460fc57b6e4 | 210 | |
mbed_official | 381:5460fc57b6e4 | 211 | /* Check the parameters */ |
mbed_official | 381:5460fc57b6e4 | 212 | assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); |
mbed_official | 381:5460fc57b6e4 | 213 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); |
mbed_official | 381:5460fc57b6e4 | 214 | |
mbed_official | 381:5460fc57b6e4 | 215 | prioritygroup = NVIC_GetPriorityGrouping(); |
mbed_official | 381:5460fc57b6e4 | 216 | |
mbed_official | 381:5460fc57b6e4 | 217 | NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); |
mbed_official | 381:5460fc57b6e4 | 218 | } |
mbed_official | 381:5460fc57b6e4 | 219 | |
mbed_official | 381:5460fc57b6e4 | 220 | /** |
mbed_official | 381:5460fc57b6e4 | 221 | * @brief Enables a device specific interrupt in the NVIC interrupt controller. |
mbed_official | 381:5460fc57b6e4 | 222 | * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() |
mbed_official | 381:5460fc57b6e4 | 223 | * function should be called before. |
mbed_official | 381:5460fc57b6e4 | 224 | * @param IRQn External interrupt number |
mbed_official | 381:5460fc57b6e4 | 225 | * This parameter can be an enumerator of IRQn_Type enumeration |
mbed_official | 381:5460fc57b6e4 | 226 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) |
mbed_official | 381:5460fc57b6e4 | 227 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 228 | */ |
mbed_official | 381:5460fc57b6e4 | 229 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) |
mbed_official | 381:5460fc57b6e4 | 230 | { |
mbed_official | 381:5460fc57b6e4 | 231 | /* Enable interrupt */ |
mbed_official | 381:5460fc57b6e4 | 232 | NVIC_EnableIRQ(IRQn); |
mbed_official | 381:5460fc57b6e4 | 233 | } |
mbed_official | 381:5460fc57b6e4 | 234 | |
mbed_official | 381:5460fc57b6e4 | 235 | /** |
mbed_official | 381:5460fc57b6e4 | 236 | * @brief Disables a device specific interrupt in the NVIC interrupt controller. |
mbed_official | 381:5460fc57b6e4 | 237 | * @param IRQn External interrupt number |
mbed_official | 381:5460fc57b6e4 | 238 | * This parameter can be an enumerator of IRQn_Type enumeration |
mbed_official | 381:5460fc57b6e4 | 239 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) |
mbed_official | 381:5460fc57b6e4 | 240 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 241 | */ |
mbed_official | 381:5460fc57b6e4 | 242 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) |
mbed_official | 381:5460fc57b6e4 | 243 | { |
mbed_official | 381:5460fc57b6e4 | 244 | /* Disable interrupt */ |
mbed_official | 381:5460fc57b6e4 | 245 | NVIC_DisableIRQ(IRQn); |
mbed_official | 381:5460fc57b6e4 | 246 | } |
mbed_official | 381:5460fc57b6e4 | 247 | |
mbed_official | 381:5460fc57b6e4 | 248 | /** |
mbed_official | 381:5460fc57b6e4 | 249 | * @brief Initiates a system reset request to reset the MCU. |
mbed_official | 381:5460fc57b6e4 | 250 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 251 | */ |
mbed_official | 381:5460fc57b6e4 | 252 | void HAL_NVIC_SystemReset(void) |
mbed_official | 381:5460fc57b6e4 | 253 | { |
mbed_official | 381:5460fc57b6e4 | 254 | /* System Reset */ |
mbed_official | 381:5460fc57b6e4 | 255 | NVIC_SystemReset(); |
mbed_official | 381:5460fc57b6e4 | 256 | } |
mbed_official | 381:5460fc57b6e4 | 257 | |
mbed_official | 381:5460fc57b6e4 | 258 | /** |
mbed_official | 381:5460fc57b6e4 | 259 | * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. |
mbed_official | 381:5460fc57b6e4 | 260 | * Counter is in free running mode to generate periodic interrupts. |
mbed_official | 381:5460fc57b6e4 | 261 | * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. |
mbed_official | 381:5460fc57b6e4 | 262 | * @retval status: - 0 Function succeeded. |
mbed_official | 381:5460fc57b6e4 | 263 | * - 1 Function failed. |
mbed_official | 381:5460fc57b6e4 | 264 | */ |
mbed_official | 381:5460fc57b6e4 | 265 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) |
mbed_official | 381:5460fc57b6e4 | 266 | { |
mbed_official | 381:5460fc57b6e4 | 267 | return SysTick_Config(TicksNumb); |
mbed_official | 381:5460fc57b6e4 | 268 | } |
mbed_official | 381:5460fc57b6e4 | 269 | /** |
mbed_official | 381:5460fc57b6e4 | 270 | * @} |
mbed_official | 381:5460fc57b6e4 | 271 | */ |
mbed_official | 381:5460fc57b6e4 | 272 | |
mbed_official | 381:5460fc57b6e4 | 273 | /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions |
mbed_official | 381:5460fc57b6e4 | 274 | * @brief Cortex control functions |
mbed_official | 381:5460fc57b6e4 | 275 | * |
mbed_official | 381:5460fc57b6e4 | 276 | @verbatim |
mbed_official | 381:5460fc57b6e4 | 277 | ============================================================================== |
mbed_official | 381:5460fc57b6e4 | 278 | ##### Peripheral Control functions ##### |
mbed_official | 381:5460fc57b6e4 | 279 | ============================================================================== |
mbed_official | 381:5460fc57b6e4 | 280 | [..] |
mbed_official | 381:5460fc57b6e4 | 281 | This subsection provides a set of functions allowing to control the CORTEX |
mbed_official | 381:5460fc57b6e4 | 282 | (NVIC, SYSTICK) functionalities. |
mbed_official | 381:5460fc57b6e4 | 283 | |
mbed_official | 381:5460fc57b6e4 | 284 | |
mbed_official | 381:5460fc57b6e4 | 285 | @endverbatim |
mbed_official | 381:5460fc57b6e4 | 286 | * @{ |
mbed_official | 381:5460fc57b6e4 | 287 | */ |
mbed_official | 381:5460fc57b6e4 | 288 | |
mbed_official | 381:5460fc57b6e4 | 289 | /** |
mbed_official | 381:5460fc57b6e4 | 290 | * @brief Gets the priority grouping field from the NVIC Interrupt Controller. |
mbed_official | 381:5460fc57b6e4 | 291 | * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field) |
mbed_official | 381:5460fc57b6e4 | 292 | */ |
mbed_official | 381:5460fc57b6e4 | 293 | uint32_t HAL_NVIC_GetPriorityGrouping(void) |
mbed_official | 381:5460fc57b6e4 | 294 | { |
mbed_official | 381:5460fc57b6e4 | 295 | /* Get the PRIGROUP[10:8] field value */ |
mbed_official | 381:5460fc57b6e4 | 296 | return NVIC_GetPriorityGrouping(); |
mbed_official | 381:5460fc57b6e4 | 297 | } |
mbed_official | 381:5460fc57b6e4 | 298 | |
mbed_official | 381:5460fc57b6e4 | 299 | /** |
mbed_official | 381:5460fc57b6e4 | 300 | * @brief Gets the priority of an interrupt. |
mbed_official | 381:5460fc57b6e4 | 301 | * @param IRQn: External interrupt number |
mbed_official | 381:5460fc57b6e4 | 302 | * This parameter can be an enumerator of IRQn_Type enumeration |
mbed_official | 381:5460fc57b6e4 | 303 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) |
mbed_official | 381:5460fc57b6e4 | 304 | * @param PriorityGroup: the priority grouping bits length. |
mbed_official | 381:5460fc57b6e4 | 305 | * This parameter can be one of the following values: |
mbed_official | 381:5460fc57b6e4 | 306 | * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 307 | * 4 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 308 | * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 309 | * 3 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 310 | * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 311 | * 2 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 312 | * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 313 | * 1 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 314 | * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority |
mbed_official | 381:5460fc57b6e4 | 315 | * 0 bits for subpriority |
mbed_official | 381:5460fc57b6e4 | 316 | * @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0). |
mbed_official | 381:5460fc57b6e4 | 317 | * @param pSubPriority: Pointer on the Subpriority value (starting from 0). |
mbed_official | 381:5460fc57b6e4 | 318 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 319 | */ |
mbed_official | 381:5460fc57b6e4 | 320 | void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) |
mbed_official | 381:5460fc57b6e4 | 321 | { |
mbed_official | 381:5460fc57b6e4 | 322 | /* Check the parameters */ |
mbed_official | 381:5460fc57b6e4 | 323 | assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); |
mbed_official | 381:5460fc57b6e4 | 324 | /* Get priority for Cortex-M system or device specific interrupts */ |
mbed_official | 381:5460fc57b6e4 | 325 | NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority); |
mbed_official | 381:5460fc57b6e4 | 326 | } |
mbed_official | 381:5460fc57b6e4 | 327 | |
mbed_official | 381:5460fc57b6e4 | 328 | /** |
mbed_official | 381:5460fc57b6e4 | 329 | * @brief Sets Pending bit of an external interrupt. |
mbed_official | 381:5460fc57b6e4 | 330 | * @param IRQn External interrupt number |
mbed_official | 381:5460fc57b6e4 | 331 | * This parameter can be an enumerator of IRQn_Type enumeration |
mbed_official | 381:5460fc57b6e4 | 332 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) |
mbed_official | 381:5460fc57b6e4 | 333 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 334 | */ |
mbed_official | 381:5460fc57b6e4 | 335 | void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) |
mbed_official | 381:5460fc57b6e4 | 336 | { |
mbed_official | 381:5460fc57b6e4 | 337 | /* Set interrupt pending */ |
mbed_official | 381:5460fc57b6e4 | 338 | NVIC_SetPendingIRQ(IRQn); |
mbed_official | 381:5460fc57b6e4 | 339 | } |
mbed_official | 381:5460fc57b6e4 | 340 | |
mbed_official | 381:5460fc57b6e4 | 341 | /** |
mbed_official | 381:5460fc57b6e4 | 342 | * @brief Gets Pending Interrupt (reads the pending register in the NVIC |
mbed_official | 381:5460fc57b6e4 | 343 | * and returns the pending bit for the specified interrupt). |
mbed_official | 381:5460fc57b6e4 | 344 | * @param IRQn External interrupt number |
mbed_official | 381:5460fc57b6e4 | 345 | * This parameter can be an enumerator of IRQn_Type enumeration |
mbed_official | 381:5460fc57b6e4 | 346 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) |
mbed_official | 381:5460fc57b6e4 | 347 | * @retval status: - 0 Interrupt status is not pending. |
mbed_official | 381:5460fc57b6e4 | 348 | * - 1 Interrupt status is pending. |
mbed_official | 381:5460fc57b6e4 | 349 | */ |
mbed_official | 381:5460fc57b6e4 | 350 | uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) |
mbed_official | 381:5460fc57b6e4 | 351 | { |
mbed_official | 381:5460fc57b6e4 | 352 | /* Return 1 if pending else 0 */ |
mbed_official | 381:5460fc57b6e4 | 353 | return NVIC_GetPendingIRQ(IRQn); |
mbed_official | 381:5460fc57b6e4 | 354 | } |
mbed_official | 381:5460fc57b6e4 | 355 | |
mbed_official | 381:5460fc57b6e4 | 356 | /** |
mbed_official | 381:5460fc57b6e4 | 357 | * @brief Clears the pending bit of an external interrupt. |
mbed_official | 381:5460fc57b6e4 | 358 | * @param IRQn External interrupt number |
mbed_official | 381:5460fc57b6e4 | 359 | * This parameter can be an enumerator of IRQn_Type enumeration |
mbed_official | 381:5460fc57b6e4 | 360 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) |
mbed_official | 381:5460fc57b6e4 | 361 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 362 | */ |
mbed_official | 381:5460fc57b6e4 | 363 | void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) |
mbed_official | 381:5460fc57b6e4 | 364 | { |
mbed_official | 381:5460fc57b6e4 | 365 | /* Clear pending interrupt */ |
mbed_official | 381:5460fc57b6e4 | 366 | NVIC_ClearPendingIRQ(IRQn); |
mbed_official | 381:5460fc57b6e4 | 367 | } |
mbed_official | 381:5460fc57b6e4 | 368 | |
mbed_official | 381:5460fc57b6e4 | 369 | /** |
mbed_official | 381:5460fc57b6e4 | 370 | * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit). |
mbed_official | 381:5460fc57b6e4 | 371 | * @param IRQn External interrupt number |
mbed_official | 381:5460fc57b6e4 | 372 | * This parameter can be an enumerator of IRQn_Type enumeration |
mbed_official | 381:5460fc57b6e4 | 373 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) |
mbed_official | 381:5460fc57b6e4 | 374 | * @retval status: - 0 Interrupt status is not pending. |
mbed_official | 381:5460fc57b6e4 | 375 | * - 1 Interrupt status is pending. |
mbed_official | 381:5460fc57b6e4 | 376 | */ |
mbed_official | 381:5460fc57b6e4 | 377 | uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn) |
mbed_official | 381:5460fc57b6e4 | 378 | { |
mbed_official | 381:5460fc57b6e4 | 379 | /* Return 1 if active else 0 */ |
mbed_official | 381:5460fc57b6e4 | 380 | return NVIC_GetActive(IRQn); |
mbed_official | 381:5460fc57b6e4 | 381 | } |
mbed_official | 381:5460fc57b6e4 | 382 | |
mbed_official | 381:5460fc57b6e4 | 383 | /** |
mbed_official | 381:5460fc57b6e4 | 384 | * @brief Configures the SysTick clock source. |
mbed_official | 381:5460fc57b6e4 | 385 | * @param CLKSource: specifies the SysTick clock source. |
mbed_official | 381:5460fc57b6e4 | 386 | * This parameter can be one of the following values: |
mbed_official | 381:5460fc57b6e4 | 387 | * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. |
mbed_official | 381:5460fc57b6e4 | 388 | * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. |
mbed_official | 381:5460fc57b6e4 | 389 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 390 | */ |
mbed_official | 381:5460fc57b6e4 | 391 | void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) |
mbed_official | 381:5460fc57b6e4 | 392 | { |
mbed_official | 381:5460fc57b6e4 | 393 | /* Check the parameters */ |
mbed_official | 381:5460fc57b6e4 | 394 | assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); |
mbed_official | 381:5460fc57b6e4 | 395 | if (CLKSource == SYSTICK_CLKSOURCE_HCLK) |
mbed_official | 381:5460fc57b6e4 | 396 | { |
mbed_official | 381:5460fc57b6e4 | 397 | SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; |
mbed_official | 381:5460fc57b6e4 | 398 | } |
mbed_official | 381:5460fc57b6e4 | 399 | else |
mbed_official | 381:5460fc57b6e4 | 400 | { |
mbed_official | 381:5460fc57b6e4 | 401 | SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; |
mbed_official | 381:5460fc57b6e4 | 402 | } |
mbed_official | 381:5460fc57b6e4 | 403 | } |
mbed_official | 381:5460fc57b6e4 | 404 | |
mbed_official | 381:5460fc57b6e4 | 405 | /** |
mbed_official | 381:5460fc57b6e4 | 406 | * @brief This function handles SYSTICK interrupt request. |
mbed_official | 381:5460fc57b6e4 | 407 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 408 | */ |
mbed_official | 381:5460fc57b6e4 | 409 | void HAL_SYSTICK_IRQHandler(void) |
mbed_official | 381:5460fc57b6e4 | 410 | { |
mbed_official | 381:5460fc57b6e4 | 411 | HAL_SYSTICK_Callback(); |
mbed_official | 381:5460fc57b6e4 | 412 | } |
mbed_official | 381:5460fc57b6e4 | 413 | |
mbed_official | 381:5460fc57b6e4 | 414 | /** |
mbed_official | 381:5460fc57b6e4 | 415 | * @brief SYSTICK callback. |
mbed_official | 381:5460fc57b6e4 | 416 | * @retval None |
mbed_official | 381:5460fc57b6e4 | 417 | */ |
mbed_official | 381:5460fc57b6e4 | 418 | __weak void HAL_SYSTICK_Callback(void) |
mbed_official | 381:5460fc57b6e4 | 419 | { |
mbed_official | 381:5460fc57b6e4 | 420 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 381:5460fc57b6e4 | 421 | the HAL_SYSTICK_Callback could be implemented in the user file |
mbed_official | 381:5460fc57b6e4 | 422 | */ |
mbed_official | 381:5460fc57b6e4 | 423 | } |
mbed_official | 381:5460fc57b6e4 | 424 | |
mbed_official | 381:5460fc57b6e4 | 425 | /** |
mbed_official | 381:5460fc57b6e4 | 426 | * @} |
mbed_official | 381:5460fc57b6e4 | 427 | */ |
mbed_official | 381:5460fc57b6e4 | 428 | |
mbed_official | 381:5460fc57b6e4 | 429 | /** |
mbed_official | 381:5460fc57b6e4 | 430 | * @} |
mbed_official | 381:5460fc57b6e4 | 431 | */ |
mbed_official | 381:5460fc57b6e4 | 432 | |
mbed_official | 381:5460fc57b6e4 | 433 | #endif /* HAL_CORTEX_MODULE_ENABLED */ |
mbed_official | 381:5460fc57b6e4 | 434 | /** |
mbed_official | 381:5460fc57b6e4 | 435 | * @} |
mbed_official | 381:5460fc57b6e4 | 436 | */ |
mbed_official | 381:5460fc57b6e4 | 437 | |
mbed_official | 381:5460fc57b6e4 | 438 | /** |
mbed_official | 381:5460fc57b6e4 | 439 | * @} |
mbed_official | 381:5460fc57b6e4 | 440 | */ |
mbed_official | 381:5460fc57b6e4 | 441 | |
mbed_official | 381:5460fc57b6e4 | 442 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |