Stuart Northfield / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/pl310.h@390:35c2c1cf29cd, 2014-11-06 (annotated)

Committer:
mbed_official
Date:
Thu Nov 06 11:00:10 2014 +0000
Revision:
390:35c2c1cf29cd
Synchronized with git revision 8724eb616b6e07a3bd111d3022652eb5bbefe9b7



Full URL: https://github.com/mbedmicro/mbed/commit/8724eb616b6e07a3bd111d3022652eb5bbefe9b7/



[RZ/A1H] mbed-RZ first release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /**************************************************************************//**
mbed_official 390:35c2c1cf29cd 2 * @file pl310.h
mbed_official 390:35c2c1cf29cd 3 * @brief Implementation of pl310 functions
mbed_official 390:35c2c1cf29cd 4 * @version
mbed_official 390:35c2c1cf29cd 5 * @date 11 June 2013
mbed_official 390:35c2c1cf29cd 6 *
mbed_official 390:35c2c1cf29cd 7 * @note
mbed_official 390:35c2c1cf29cd 8 *
mbed_official 390:35c2c1cf29cd 9 ******************************************************************************/
mbed_official 390:35c2c1cf29cd 10 /* Copyright (c) 2011 - 2013 ARM LIMITED
mbed_official 390:35c2c1cf29cd 11
mbed_official 390:35c2c1cf29cd 12 All rights reserved.
mbed_official 390:35c2c1cf29cd 13 Redistribution and use in source and binary forms, with or without
mbed_official 390:35c2c1cf29cd 14 modification, are permitted provided that the following conditions are met:
mbed_official 390:35c2c1cf29cd 15 - Redistributions of source code must retain the above copyright
mbed_official 390:35c2c1cf29cd 16 notice, this list of conditions and the following disclaimer.
mbed_official 390:35c2c1cf29cd 17 - Redistributions in binary form must reproduce the above copyright
mbed_official 390:35c2c1cf29cd 18 notice, this list of conditions and the following disclaimer in the
mbed_official 390:35c2c1cf29cd 19 documentation and/or other materials provided with the distribution.
mbed_official 390:35c2c1cf29cd 20 - Neither the name of ARM nor the names of its contributors may be used
mbed_official 390:35c2c1cf29cd 21 to endorse or promote products derived from this software without
mbed_official 390:35c2c1cf29cd 22 specific prior written permission.
mbed_official 390:35c2c1cf29cd 23 *
mbed_official 390:35c2c1cf29cd 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 390:35c2c1cf29cd 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 390:35c2c1cf29cd 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mbed_official 390:35c2c1cf29cd 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mbed_official 390:35c2c1cf29cd 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mbed_official 390:35c2c1cf29cd 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mbed_official 390:35c2c1cf29cd 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mbed_official 390:35c2c1cf29cd 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mbed_official 390:35c2c1cf29cd 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mbed_official 390:35c2c1cf29cd 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 390:35c2c1cf29cd 34 POSSIBILITY OF SUCH DAMAGE.
mbed_official 390:35c2c1cf29cd 35 ---------------------------------------------------------------------------*/
mbed_official 390:35c2c1cf29cd 36
mbed_official 390:35c2c1cf29cd 37 #ifndef __PL310
mbed_official 390:35c2c1cf29cd 38 #define __PL310
mbed_official 390:35c2c1cf29cd 39
mbed_official 390:35c2c1cf29cd 40 typedef struct
mbed_official 390:35c2c1cf29cd 41 {
mbed_official 390:35c2c1cf29cd 42 __I uint32_t CACHE_ID; /*!< Offset: 0x0000 Cache ID Register */
mbed_official 390:35c2c1cf29cd 43 __I uint32_t CACHE_TYPE; /*!< Offset: 0x0004 Cache Type Register */
mbed_official 390:35c2c1cf29cd 44 uint32_t RESERVED0[0x3e];
mbed_official 390:35c2c1cf29cd 45 __IO uint32_t CONTROL; /*!< Offset: 0x0100 Control Register */
mbed_official 390:35c2c1cf29cd 46 __IO uint32_t AUX_CNT; /*!< Offset: 0x0104 Auxiliary Control */
mbed_official 390:35c2c1cf29cd 47 uint32_t RESERVED1[0x3e];
mbed_official 390:35c2c1cf29cd 48 __IO uint32_t EVENT_CONTROL; /*!< Offset: 0x0200 Event Counter Control */
mbed_official 390:35c2c1cf29cd 49 __IO uint32_t EVENT_COUNTER1_CONF; /*!< Offset: 0x0204 Event Counter 1 Configuration */
mbed_official 390:35c2c1cf29cd 50 __IO uint32_t EVENT_COUNTER0_CONF; /*!< Offset: 0x0208 Event Counter 1 Configuration */
mbed_official 390:35c2c1cf29cd 51 uint32_t RESERVED2[0x2];
mbed_official 390:35c2c1cf29cd 52 __IO uint32_t INTERRUPT_MASK; /*!< Offset: 0x0214 Interrupt Mask */
mbed_official 390:35c2c1cf29cd 53 __I uint32_t MASKED_INT_STATUS; /*!< Offset: 0x0218 Masked Interrupt Status */
mbed_official 390:35c2c1cf29cd 54 __I uint32_t RAW_INT_STATUS; /*!< Offset: 0x021c Raw Interrupt Status */
mbed_official 390:35c2c1cf29cd 55 __O uint32_t INTERRUPT_CLEAR; /*!< Offset: 0x0220 Interrupt Clear */
mbed_official 390:35c2c1cf29cd 56 uint32_t RESERVED3[0x143];
mbed_official 390:35c2c1cf29cd 57 __IO uint32_t CACHE_SYNC; /*!< Offset: 0x0730 Cache Sync */
mbed_official 390:35c2c1cf29cd 58 uint32_t RESERVED4[0xf];
mbed_official 390:35c2c1cf29cd 59 __IO uint32_t INV_LINE_PA; /*!< Offset: 0x0770 Invalidate Line By PA */
mbed_official 390:35c2c1cf29cd 60 uint32_t RESERVED6[2];
mbed_official 390:35c2c1cf29cd 61 __IO uint32_t INV_WAY; /*!< Offset: 0x077c Invalidate by Way */
mbed_official 390:35c2c1cf29cd 62 uint32_t RESERVED5[0xc];
mbed_official 390:35c2c1cf29cd 63 __IO uint32_t CLEAN_LINE_PA; /*!< Offset: 0x07b0 Clean Line by PA */
mbed_official 390:35c2c1cf29cd 64 uint32_t RESERVED7[1];
mbed_official 390:35c2c1cf29cd 65 __IO uint32_t CLEAN_LINE_INDEX_WAY; /*!< Offset: 0x07b8 Clean Line by Index/Way */
mbed_official 390:35c2c1cf29cd 66 __IO uint32_t CLEAN_WAY; /*!< Offset: 0x07bc Clean by Way */
mbed_official 390:35c2c1cf29cd 67 uint32_t RESERVED8[0xc];
mbed_official 390:35c2c1cf29cd 68 __IO uint32_t CLEAN_INV_LINE_PA; /*!< Offset: 0x07f0 Clean and Invalidate Line by PA */
mbed_official 390:35c2c1cf29cd 69 uint32_t RESERVED9[1];
mbed_official 390:35c2c1cf29cd 70 __IO uint32_t CLEAN_INV_LINE_INDEX_WAY; /*!< Offset: 0x07f8 Clean and Invalidate Line by Index/Way */
mbed_official 390:35c2c1cf29cd 71 __IO uint32_t CLEAN_INV_WAY; /*!< Offset: 0x07fc Clean and Invalidate by Way */
mbed_official 390:35c2c1cf29cd 72 uint32_t RESERVED10[0x40];
mbed_official 390:35c2c1cf29cd 73 __IO uint32_t DATA_LOCK_0_WAY; /*!< Offset: 0x0900 Data Lockdown 0 by Way */
mbed_official 390:35c2c1cf29cd 74 __IO uint32_t INST_LOCK_0_WAY; /*!< Offset: 0x0904 Instruction Lockdown 0 by Way */
mbed_official 390:35c2c1cf29cd 75 __IO uint32_t DATA_LOCK_1_WAY; /*!< Offset: 0x0908 Data Lockdown 1 by Way */
mbed_official 390:35c2c1cf29cd 76 __IO uint32_t INST_LOCK_1_WAY; /*!< Offset: 0x090c Instruction Lockdown 1 by Way */
mbed_official 390:35c2c1cf29cd 77 __IO uint32_t DATA_LOCK_2_WAY; /*!< Offset: 0x0910 Data Lockdown 2 by Way */
mbed_official 390:35c2c1cf29cd 78 __IO uint32_t INST_LOCK_2_WAY; /*!< Offset: 0x0914 Instruction Lockdown 2 by Way */
mbed_official 390:35c2c1cf29cd 79 __IO uint32_t DATA_LOCK_3_WAY; /*!< Offset: 0x0918 Data Lockdown 3 by Way */
mbed_official 390:35c2c1cf29cd 80 __IO uint32_t INST_LOCK_3_WAY; /*!< Offset: 0x091c Instruction Lockdown 3 by Way */
mbed_official 390:35c2c1cf29cd 81 __IO uint32_t DATA_LOCK_4_WAY; /*!< Offset: 0x0920 Data Lockdown 4 by Way */
mbed_official 390:35c2c1cf29cd 82 __IO uint32_t INST_LOCK_4_WAY; /*!< Offset: 0x0924 Instruction Lockdown 4 by Way */
mbed_official 390:35c2c1cf29cd 83 __IO uint32_t DATA_LOCK_5_WAY; /*!< Offset: 0x0928 Data Lockdown 5 by Way */
mbed_official 390:35c2c1cf29cd 84 __IO uint32_t INST_LOCK_5_WAY; /*!< Offset: 0x092c Instruction Lockdown 5 by Way */
mbed_official 390:35c2c1cf29cd 85 __IO uint32_t DATA_LOCK_6_WAY; /*!< Offset: 0x0930 Data Lockdown 5 by Way */
mbed_official 390:35c2c1cf29cd 86 __IO uint32_t INST_LOCK_6_WAY; /*!< Offset: 0x0934 Instruction Lockdown 5 by Way */
mbed_official 390:35c2c1cf29cd 87 __IO uint32_t DATA_LOCK_7_WAY; /*!< Offset: 0x0938 Data Lockdown 6 by Way */
mbed_official 390:35c2c1cf29cd 88 __IO uint32_t INST_LOCK_7_WAY; /*!< Offset: 0x093c Instruction Lockdown 6 by Way */
mbed_official 390:35c2c1cf29cd 89 uint32_t RESERVED11[0x4];
mbed_official 390:35c2c1cf29cd 90 __IO uint32_t LOCK_LINE_EN; /*!< Offset: 0x0950 Lockdown by Line Enable */
mbed_official 390:35c2c1cf29cd 91 __IO uint32_t UNLOCK_ALL_BY_WAY; /*!< Offset: 0x0954 Unlock All Lines by Way */
mbed_official 390:35c2c1cf29cd 92 uint32_t RESERVED12[0xaa];
mbed_official 390:35c2c1cf29cd 93 __IO uint32_t ADDRESS_FILTER_START; /*!< Offset: 0x0c00 Address Filtering Start */
mbed_official 390:35c2c1cf29cd 94 __IO uint32_t ADDRESS_FILTER_END; /*!< Offset: 0x0c04 Address Filtering End */
mbed_official 390:35c2c1cf29cd 95 uint32_t RESERVED13[0xce];
mbed_official 390:35c2c1cf29cd 96 __IO uint32_t DEBUG_CONTROL; /*!< Offset: 0x0f40 Debug Control Register */
mbed_official 390:35c2c1cf29cd 97
mbed_official 390:35c2c1cf29cd 98 } PL310_TypeDef;
mbed_official 390:35c2c1cf29cd 99
mbed_official 390:35c2c1cf29cd 100 #define PL310 ((PL310_TypeDef *)Renesas_RZ_A1_PL310_BASE) /*!< PL310 Declaration */
mbed_official 390:35c2c1cf29cd 101
mbed_official 390:35c2c1cf29cd 102 extern int PL310_GetID (void);
mbed_official 390:35c2c1cf29cd 103 extern int PL310_GetType (void);
mbed_official 390:35c2c1cf29cd 104 extern void PL310_InvAllByWay (void);
mbed_official 390:35c2c1cf29cd 105 extern void PL310_CleanInvAllByWay(void);
mbed_official 390:35c2c1cf29cd 106 extern void PL310_Enable(void);
mbed_official 390:35c2c1cf29cd 107 extern void PL310_Disable(void);
mbed_official 390:35c2c1cf29cd 108 extern void PL310_InvPa (void *);
mbed_official 390:35c2c1cf29cd 109 extern void PL310_CleanPa (void *);
mbed_official 390:35c2c1cf29cd 110 extern void PL310_CleanInvPa (void *);
mbed_official 390:35c2c1cf29cd 111
mbed_official 390:35c2c1cf29cd 112 #endif
mbed_official 390:35c2c1cf29cd 113
mbed_official 390:35c2c1cf29cd 114