Stuart Northfield / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/mtu2_iodefine.h@390:35c2c1cf29cd, 2014-11-06 (annotated)

Committer:
mbed_official
Date:
Thu Nov 06 11:00:10 2014 +0000
Revision:
390:35c2c1cf29cd
Synchronized with git revision 8724eb616b6e07a3bd111d3022652eb5bbefe9b7



Full URL: https://github.com/mbedmicro/mbed/commit/8724eb616b6e07a3bd111d3022652eb5bbefe9b7/



[RZ/A1H] mbed-RZ first release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 2 * DISCLAIMER
mbed_official 390:35c2c1cf29cd 3 * This software is supplied by Renesas Electronics Corporation and is only
mbed_official 390:35c2c1cf29cd 4 * intended for use with Renesas products. No other uses are authorized. This
mbed_official 390:35c2c1cf29cd 5 * software is owned by Renesas Electronics Corporation and is protected under
mbed_official 390:35c2c1cf29cd 6 * all applicable laws, including copyright laws.
mbed_official 390:35c2c1cf29cd 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
mbed_official 390:35c2c1cf29cd 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
mbed_official 390:35c2c1cf29cd 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
mbed_official 390:35c2c1cf29cd 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
mbed_official 390:35c2c1cf29cd 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
mbed_official 390:35c2c1cf29cd 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
mbed_official 390:35c2c1cf29cd 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
mbed_official 390:35c2c1cf29cd 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
mbed_official 390:35c2c1cf29cd 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
mbed_official 390:35c2c1cf29cd 16 * Renesas reserves the right, without notice, to make changes to this software
mbed_official 390:35c2c1cf29cd 17 * and to discontinue the availability of this software. By using this software,
mbed_official 390:35c2c1cf29cd 18 * you agree to the additional terms and conditions found by accessing the
mbed_official 390:35c2c1cf29cd 19 * following link:
mbed_official 390:35c2c1cf29cd 20 * http://www.renesas.com/disclaimer*
mbed_official 390:35c2c1cf29cd 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
mbed_official 390:35c2c1cf29cd 22 *******************************************************************************/
mbed_official 390:35c2c1cf29cd 23 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 24 * File Name : mtu2_iodefine.h
mbed_official 390:35c2c1cf29cd 25 * $Rev: $
mbed_official 390:35c2c1cf29cd 26 * $Date:: $
mbed_official 390:35c2c1cf29cd 27 * Description : Definition of I/O Register (V1.00a)
mbed_official 390:35c2c1cf29cd 28 ******************************************************************************/
mbed_official 390:35c2c1cf29cd 29 #ifndef MTU2_IODEFINE_H
mbed_official 390:35c2c1cf29cd 30 #define MTU2_IODEFINE_H
mbed_official 390:35c2c1cf29cd 31 /* ->SEC M1.10.1 : Not magic number */
mbed_official 390:35c2c1cf29cd 32
mbed_official 390:35c2c1cf29cd 33 struct st_mtu2
mbed_official 390:35c2c1cf29cd 34 { /* MTU2 */
mbed_official 390:35c2c1cf29cd 35 volatile uint8_t TCR_2; /* TCR_2 */
mbed_official 390:35c2c1cf29cd 36 volatile uint8_t TMDR_2; /* TMDR_2 */
mbed_official 390:35c2c1cf29cd 37 volatile uint8_t TIOR_2; /* TIOR_2 */
mbed_official 390:35c2c1cf29cd 38 volatile uint8_t dummy520[1]; /* */
mbed_official 390:35c2c1cf29cd 39 volatile uint8_t TIER_2; /* TIER_2 */
mbed_official 390:35c2c1cf29cd 40 volatile uint8_t TSR_2; /* TSR_2 */
mbed_official 390:35c2c1cf29cd 41 volatile uint16_t TCNT_2; /* TCNT_2 */
mbed_official 390:35c2c1cf29cd 42 volatile uint16_t TGRA_2; /* TGRA_2 */
mbed_official 390:35c2c1cf29cd 43 volatile uint16_t TGRB_2; /* TGRB_2 */
mbed_official 390:35c2c1cf29cd 44 volatile uint8_t dummy521[500]; /* */
mbed_official 390:35c2c1cf29cd 45 volatile uint8_t TCR_3; /* TCR_3 */
mbed_official 390:35c2c1cf29cd 46 volatile uint8_t TCR_4; /* TCR_4 */
mbed_official 390:35c2c1cf29cd 47 volatile uint8_t TMDR_3; /* TMDR_3 */
mbed_official 390:35c2c1cf29cd 48 volatile uint8_t TMDR_4; /* TMDR_4 */
mbed_official 390:35c2c1cf29cd 49 volatile uint8_t TIORH_3; /* TIORH_3 */
mbed_official 390:35c2c1cf29cd 50 volatile uint8_t TIORL_3; /* TIORL_3 */
mbed_official 390:35c2c1cf29cd 51 volatile uint8_t TIORH_4; /* TIORH_4 */
mbed_official 390:35c2c1cf29cd 52 volatile uint8_t TIORL_4; /* TIORL_4 */
mbed_official 390:35c2c1cf29cd 53 volatile uint8_t TIER_3; /* TIER_3 */
mbed_official 390:35c2c1cf29cd 54 volatile uint8_t TIER_4; /* TIER_4 */
mbed_official 390:35c2c1cf29cd 55 volatile uint8_t TOER; /* TOER */
mbed_official 390:35c2c1cf29cd 56 volatile uint8_t dummy522[2]; /* */
mbed_official 390:35c2c1cf29cd 57 volatile uint8_t TGCR; /* TGCR */
mbed_official 390:35c2c1cf29cd 58 volatile uint8_t TOCR1; /* TOCR1 */
mbed_official 390:35c2c1cf29cd 59 volatile uint8_t TOCR2; /* TOCR2 */
mbed_official 390:35c2c1cf29cd 60 volatile uint16_t TCNT_3; /* TCNT_3 */
mbed_official 390:35c2c1cf29cd 61 volatile uint16_t TCNT_4; /* TCNT_4 */
mbed_official 390:35c2c1cf29cd 62 volatile uint16_t TCDR; /* TCDR */
mbed_official 390:35c2c1cf29cd 63 volatile uint16_t TDDR; /* TDDR */
mbed_official 390:35c2c1cf29cd 64 volatile uint16_t TGRA_3; /* TGRA_3 */
mbed_official 390:35c2c1cf29cd 65 volatile uint16_t TGRB_3; /* TGRB_3 */
mbed_official 390:35c2c1cf29cd 66 volatile uint16_t TGRA_4; /* TGRA_4 */
mbed_official 390:35c2c1cf29cd 67 volatile uint16_t TGRB_4; /* TGRB_4 */
mbed_official 390:35c2c1cf29cd 68 volatile uint16_t TCNTS; /* TCNTS */
mbed_official 390:35c2c1cf29cd 69 volatile uint16_t TCBR; /* TCBR */
mbed_official 390:35c2c1cf29cd 70 volatile uint16_t TGRC_3; /* TGRC_3 */
mbed_official 390:35c2c1cf29cd 71 volatile uint16_t TGRD_3; /* TGRD_3 */
mbed_official 390:35c2c1cf29cd 72 volatile uint16_t TGRC_4; /* TGRC_4 */
mbed_official 390:35c2c1cf29cd 73 volatile uint16_t TGRD_4; /* TGRD_4 */
mbed_official 390:35c2c1cf29cd 74 volatile uint8_t TSR_3; /* TSR_3 */
mbed_official 390:35c2c1cf29cd 75 volatile uint8_t TSR_4; /* TSR_4 */
mbed_official 390:35c2c1cf29cd 76 volatile uint8_t dummy523[2]; /* */
mbed_official 390:35c2c1cf29cd 77 volatile uint8_t TITCR; /* TITCR */
mbed_official 390:35c2c1cf29cd 78 volatile uint8_t TITCNT; /* TITCNT */
mbed_official 390:35c2c1cf29cd 79 volatile uint8_t TBTER; /* TBTER */
mbed_official 390:35c2c1cf29cd 80 volatile uint8_t dummy524[1]; /* */
mbed_official 390:35c2c1cf29cd 81 volatile uint8_t TDER; /* TDER */
mbed_official 390:35c2c1cf29cd 82 volatile uint8_t dummy525[1]; /* */
mbed_official 390:35c2c1cf29cd 83 volatile uint8_t TOLBR; /* TOLBR */
mbed_official 390:35c2c1cf29cd 84 volatile uint8_t dummy526[1]; /* */
mbed_official 390:35c2c1cf29cd 85 volatile uint8_t TBTM_3; /* TBTM_3 */
mbed_official 390:35c2c1cf29cd 86 volatile uint8_t TBTM_4; /* TBTM_4 */
mbed_official 390:35c2c1cf29cd 87 volatile uint8_t dummy527[6]; /* */
mbed_official 390:35c2c1cf29cd 88 volatile uint16_t TADCR; /* TADCR */
mbed_official 390:35c2c1cf29cd 89 volatile uint8_t dummy528[2]; /* */
mbed_official 390:35c2c1cf29cd 90 volatile uint16_t TADCORA_4; /* TADCORA_4 */
mbed_official 390:35c2c1cf29cd 91 volatile uint16_t TADCORB_4; /* TADCORB_4 */
mbed_official 390:35c2c1cf29cd 92 volatile uint16_t TADCOBRA_4; /* TADCOBRA_4 */
mbed_official 390:35c2c1cf29cd 93 volatile uint16_t TADCOBRB_4; /* TADCOBRB_4 */
mbed_official 390:35c2c1cf29cd 94 volatile uint8_t dummy529[20]; /* */
mbed_official 390:35c2c1cf29cd 95 volatile uint8_t TWCR; /* TWCR */
mbed_official 390:35c2c1cf29cd 96 volatile uint8_t dummy530[31]; /* */
mbed_official 390:35c2c1cf29cd 97 volatile uint8_t TSTR; /* TSTR */
mbed_official 390:35c2c1cf29cd 98 volatile uint8_t TSYR; /* TSYR */
mbed_official 390:35c2c1cf29cd 99 volatile uint8_t dummy531[2]; /* */
mbed_official 390:35c2c1cf29cd 100 volatile uint8_t TRWER; /* TRWER */
mbed_official 390:35c2c1cf29cd 101 volatile uint8_t dummy532[123]; /* */
mbed_official 390:35c2c1cf29cd 102 volatile uint8_t TCR_0; /* TCR_0 */
mbed_official 390:35c2c1cf29cd 103 volatile uint8_t TMDR_0; /* TMDR_0 */
mbed_official 390:35c2c1cf29cd 104 volatile uint8_t TIORH_0; /* TIORH_0 */
mbed_official 390:35c2c1cf29cd 105 volatile uint8_t TIORL_0; /* TIORL_0 */
mbed_official 390:35c2c1cf29cd 106 volatile uint8_t TIER_0; /* TIER_0 */
mbed_official 390:35c2c1cf29cd 107 volatile uint8_t TSR_0; /* TSR_0 */
mbed_official 390:35c2c1cf29cd 108 volatile uint16_t TCNT_0; /* TCNT_0 */
mbed_official 390:35c2c1cf29cd 109 volatile uint16_t TGRA_0; /* TGRA_0 */
mbed_official 390:35c2c1cf29cd 110 volatile uint16_t TGRB_0; /* TGRB_0 */
mbed_official 390:35c2c1cf29cd 111 volatile uint16_t TGRC_0; /* TGRC_0 */
mbed_official 390:35c2c1cf29cd 112 volatile uint16_t TGRD_0; /* TGRD_0 */
mbed_official 390:35c2c1cf29cd 113 volatile uint8_t dummy533[16]; /* */
mbed_official 390:35c2c1cf29cd 114 volatile uint16_t TGRE_0; /* TGRE_0 */
mbed_official 390:35c2c1cf29cd 115 volatile uint16_t TGRF_0; /* TGRF_0 */
mbed_official 390:35c2c1cf29cd 116 volatile uint8_t TIER2_0; /* TIER2_0 */
mbed_official 390:35c2c1cf29cd 117 volatile uint8_t TSR2_0; /* TSR2_0 */
mbed_official 390:35c2c1cf29cd 118 volatile uint8_t TBTM_0; /* TBTM_0 */
mbed_official 390:35c2c1cf29cd 119 volatile uint8_t dummy534[89]; /* */
mbed_official 390:35c2c1cf29cd 120 volatile uint8_t TCR_1; /* TCR_1 */
mbed_official 390:35c2c1cf29cd 121 volatile uint8_t TMDR_1; /* TMDR_1 */
mbed_official 390:35c2c1cf29cd 122 volatile uint8_t TIOR_1; /* TIOR_1 */
mbed_official 390:35c2c1cf29cd 123 volatile uint8_t dummy535[1]; /* */
mbed_official 390:35c2c1cf29cd 124 volatile uint8_t TIER_1; /* TIER_1 */
mbed_official 390:35c2c1cf29cd 125 volatile uint8_t TSR_1; /* TSR_1 */
mbed_official 390:35c2c1cf29cd 126 volatile uint16_t TCNT_1; /* TCNT_1 */
mbed_official 390:35c2c1cf29cd 127 volatile uint16_t TGRA_1; /* TGRA_1 */
mbed_official 390:35c2c1cf29cd 128 volatile uint16_t TGRB_1; /* TGRB_1 */
mbed_official 390:35c2c1cf29cd 129 volatile uint8_t dummy536[4]; /* */
mbed_official 390:35c2c1cf29cd 130 volatile uint8_t TICCR; /* TICCR */
mbed_official 390:35c2c1cf29cd 131 };
mbed_official 390:35c2c1cf29cd 132
mbed_official 390:35c2c1cf29cd 133
mbed_official 390:35c2c1cf29cd 134 #define MTU2 (*(struct st_mtu2 *)0xFCFF0000uL) /* MTU2 */
mbed_official 390:35c2c1cf29cd 135
mbed_official 390:35c2c1cf29cd 136
mbed_official 390:35c2c1cf29cd 137 #define MTU2TCR_2 MTU2.TCR_2
mbed_official 390:35c2c1cf29cd 138 #define MTU2TMDR_2 MTU2.TMDR_2
mbed_official 390:35c2c1cf29cd 139 #define MTU2TIOR_2 MTU2.TIOR_2
mbed_official 390:35c2c1cf29cd 140 #define MTU2TIER_2 MTU2.TIER_2
mbed_official 390:35c2c1cf29cd 141 #define MTU2TSR_2 MTU2.TSR_2
mbed_official 390:35c2c1cf29cd 142 #define MTU2TCNT_2 MTU2.TCNT_2
mbed_official 390:35c2c1cf29cd 143 #define MTU2TGRA_2 MTU2.TGRA_2
mbed_official 390:35c2c1cf29cd 144 #define MTU2TGRB_2 MTU2.TGRB_2
mbed_official 390:35c2c1cf29cd 145 #define MTU2TCR_3 MTU2.TCR_3
mbed_official 390:35c2c1cf29cd 146 #define MTU2TCR_4 MTU2.TCR_4
mbed_official 390:35c2c1cf29cd 147 #define MTU2TMDR_3 MTU2.TMDR_3
mbed_official 390:35c2c1cf29cd 148 #define MTU2TMDR_4 MTU2.TMDR_4
mbed_official 390:35c2c1cf29cd 149 #define MTU2TIORH_3 MTU2.TIORH_3
mbed_official 390:35c2c1cf29cd 150 #define MTU2TIORL_3 MTU2.TIORL_3
mbed_official 390:35c2c1cf29cd 151 #define MTU2TIORH_4 MTU2.TIORH_4
mbed_official 390:35c2c1cf29cd 152 #define MTU2TIORL_4 MTU2.TIORL_4
mbed_official 390:35c2c1cf29cd 153 #define MTU2TIER_3 MTU2.TIER_3
mbed_official 390:35c2c1cf29cd 154 #define MTU2TIER_4 MTU2.TIER_4
mbed_official 390:35c2c1cf29cd 155 #define MTU2TOER MTU2.TOER
mbed_official 390:35c2c1cf29cd 156 #define MTU2TGCR MTU2.TGCR
mbed_official 390:35c2c1cf29cd 157 #define MTU2TOCR1 MTU2.TOCR1
mbed_official 390:35c2c1cf29cd 158 #define MTU2TOCR2 MTU2.TOCR2
mbed_official 390:35c2c1cf29cd 159 #define MTU2TCNT_3 MTU2.TCNT_3
mbed_official 390:35c2c1cf29cd 160 #define MTU2TCNT_4 MTU2.TCNT_4
mbed_official 390:35c2c1cf29cd 161 #define MTU2TCDR MTU2.TCDR
mbed_official 390:35c2c1cf29cd 162 #define MTU2TDDR MTU2.TDDR
mbed_official 390:35c2c1cf29cd 163 #define MTU2TGRA_3 MTU2.TGRA_3
mbed_official 390:35c2c1cf29cd 164 #define MTU2TGRB_3 MTU2.TGRB_3
mbed_official 390:35c2c1cf29cd 165 #define MTU2TGRA_4 MTU2.TGRA_4
mbed_official 390:35c2c1cf29cd 166 #define MTU2TGRB_4 MTU2.TGRB_4
mbed_official 390:35c2c1cf29cd 167 #define MTU2TCNTS MTU2.TCNTS
mbed_official 390:35c2c1cf29cd 168 #define MTU2TCBR MTU2.TCBR
mbed_official 390:35c2c1cf29cd 169 #define MTU2TGRC_3 MTU2.TGRC_3
mbed_official 390:35c2c1cf29cd 170 #define MTU2TGRD_3 MTU2.TGRD_3
mbed_official 390:35c2c1cf29cd 171 #define MTU2TGRC_4 MTU2.TGRC_4
mbed_official 390:35c2c1cf29cd 172 #define MTU2TGRD_4 MTU2.TGRD_4
mbed_official 390:35c2c1cf29cd 173 #define MTU2TSR_3 MTU2.TSR_3
mbed_official 390:35c2c1cf29cd 174 #define MTU2TSR_4 MTU2.TSR_4
mbed_official 390:35c2c1cf29cd 175 #define MTU2TITCR MTU2.TITCR
mbed_official 390:35c2c1cf29cd 176 #define MTU2TITCNT MTU2.TITCNT
mbed_official 390:35c2c1cf29cd 177 #define MTU2TBTER MTU2.TBTER
mbed_official 390:35c2c1cf29cd 178 #define MTU2TDER MTU2.TDER
mbed_official 390:35c2c1cf29cd 179 #define MTU2TOLBR MTU2.TOLBR
mbed_official 390:35c2c1cf29cd 180 #define MTU2TBTM_3 MTU2.TBTM_3
mbed_official 390:35c2c1cf29cd 181 #define MTU2TBTM_4 MTU2.TBTM_4
mbed_official 390:35c2c1cf29cd 182 #define MTU2TADCR MTU2.TADCR
mbed_official 390:35c2c1cf29cd 183 #define MTU2TADCORA_4 MTU2.TADCORA_4
mbed_official 390:35c2c1cf29cd 184 #define MTU2TADCORB_4 MTU2.TADCORB_4
mbed_official 390:35c2c1cf29cd 185 #define MTU2TADCOBRA_4 MTU2.TADCOBRA_4
mbed_official 390:35c2c1cf29cd 186 #define MTU2TADCOBRB_4 MTU2.TADCOBRB_4
mbed_official 390:35c2c1cf29cd 187 #define MTU2TWCR MTU2.TWCR
mbed_official 390:35c2c1cf29cd 188 #define MTU2TSTR MTU2.TSTR
mbed_official 390:35c2c1cf29cd 189 #define MTU2TSYR MTU2.TSYR
mbed_official 390:35c2c1cf29cd 190 #define MTU2TRWER MTU2.TRWER
mbed_official 390:35c2c1cf29cd 191 #define MTU2TCR_0 MTU2.TCR_0
mbed_official 390:35c2c1cf29cd 192 #define MTU2TMDR_0 MTU2.TMDR_0
mbed_official 390:35c2c1cf29cd 193 #define MTU2TIORH_0 MTU2.TIORH_0
mbed_official 390:35c2c1cf29cd 194 #define MTU2TIORL_0 MTU2.TIORL_0
mbed_official 390:35c2c1cf29cd 195 #define MTU2TIER_0 MTU2.TIER_0
mbed_official 390:35c2c1cf29cd 196 #define MTU2TSR_0 MTU2.TSR_0
mbed_official 390:35c2c1cf29cd 197 #define MTU2TCNT_0 MTU2.TCNT_0
mbed_official 390:35c2c1cf29cd 198 #define MTU2TGRA_0 MTU2.TGRA_0
mbed_official 390:35c2c1cf29cd 199 #define MTU2TGRB_0 MTU2.TGRB_0
mbed_official 390:35c2c1cf29cd 200 #define MTU2TGRC_0 MTU2.TGRC_0
mbed_official 390:35c2c1cf29cd 201 #define MTU2TGRD_0 MTU2.TGRD_0
mbed_official 390:35c2c1cf29cd 202 #define MTU2TGRE_0 MTU2.TGRE_0
mbed_official 390:35c2c1cf29cd 203 #define MTU2TGRF_0 MTU2.TGRF_0
mbed_official 390:35c2c1cf29cd 204 #define MTU2TIER2_0 MTU2.TIER2_0
mbed_official 390:35c2c1cf29cd 205 #define MTU2TSR2_0 MTU2.TSR2_0
mbed_official 390:35c2c1cf29cd 206 #define MTU2TBTM_0 MTU2.TBTM_0
mbed_official 390:35c2c1cf29cd 207 #define MTU2TCR_1 MTU2.TCR_1
mbed_official 390:35c2c1cf29cd 208 #define MTU2TMDR_1 MTU2.TMDR_1
mbed_official 390:35c2c1cf29cd 209 #define MTU2TIOR_1 MTU2.TIOR_1
mbed_official 390:35c2c1cf29cd 210 #define MTU2TIER_1 MTU2.TIER_1
mbed_official 390:35c2c1cf29cd 211 #define MTU2TSR_1 MTU2.TSR_1
mbed_official 390:35c2c1cf29cd 212 #define MTU2TCNT_1 MTU2.TCNT_1
mbed_official 390:35c2c1cf29cd 213 #define MTU2TGRA_1 MTU2.TGRA_1
mbed_official 390:35c2c1cf29cd 214 #define MTU2TGRB_1 MTU2.TGRB_1
mbed_official 390:35c2c1cf29cd 215 #define MTU2TICCR MTU2.TICCR
mbed_official 390:35c2c1cf29cd 216 /* <-SEC M1.10.1 */
mbed_official 390:35c2c1cf29cd 217 #endif