Stuart Northfield / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefine.h@390:35c2c1cf29cd, 2014-11-06 (annotated)

Committer:
mbed_official
Date:
Thu Nov 06 11:00:10 2014 +0000
Revision:
390:35c2c1cf29cd
Child:
391:42ba2fb9673a
Synchronized with git revision 8724eb616b6e07a3bd111d3022652eb5bbefe9b7



Full URL: https://github.com/mbedmicro/mbed/commit/8724eb616b6e07a3bd111d3022652eb5bbefe9b7/



[RZ/A1H] mbed-RZ first release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 2 * DISCLAIMER
mbed_official 390:35c2c1cf29cd 3 * This software is supplied by Renesas Electronics Corporation and is only
mbed_official 390:35c2c1cf29cd 4 * intended for use with Renesas products. No other uses are authorized. This
mbed_official 390:35c2c1cf29cd 5 * software is owned by Renesas Electronics Corporation and is protected under
mbed_official 390:35c2c1cf29cd 6 * all applicable laws, including copyright laws.
mbed_official 390:35c2c1cf29cd 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
mbed_official 390:35c2c1cf29cd 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
mbed_official 390:35c2c1cf29cd 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
mbed_official 390:35c2c1cf29cd 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
mbed_official 390:35c2c1cf29cd 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
mbed_official 390:35c2c1cf29cd 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
mbed_official 390:35c2c1cf29cd 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
mbed_official 390:35c2c1cf29cd 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
mbed_official 390:35c2c1cf29cd 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
mbed_official 390:35c2c1cf29cd 16 * Renesas reserves the right, without notice, to make changes to this software
mbed_official 390:35c2c1cf29cd 17 * and to discontinue the availability of this software. By using this software,
mbed_official 390:35c2c1cf29cd 18 * you agree to the additional terms and conditions found by accessing the
mbed_official 390:35c2c1cf29cd 19 * following link:
mbed_official 390:35c2c1cf29cd 20 * http://www.renesas.com/disclaimer*
mbed_official 390:35c2c1cf29cd 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
mbed_official 390:35c2c1cf29cd 22 *******************************************************************************/
mbed_official 390:35c2c1cf29cd 23 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 24 * File Name : iodefine.h
mbed_official 390:35c2c1cf29cd 25 * $Rev: $
mbed_official 390:35c2c1cf29cd 26 * $Date:: $
mbed_official 390:35c2c1cf29cd 27 * Description : Definition of I/O Register (V1.00a)
mbed_official 390:35c2c1cf29cd 28 ******************************************************************************/
mbed_official 390:35c2c1cf29cd 29 #ifndef R7S72100_IODEFINE_H
mbed_official 390:35c2c1cf29cd 30 #define R7S72100_IODEFINE_H
mbed_official 390:35c2c1cf29cd 31 #define IODEFINE_H_VERSION 100
mbed_official 390:35c2c1cf29cd 32
mbed_official 390:35c2c1cf29cd 33 enum iodefine_byte_select_t
mbed_official 390:35c2c1cf29cd 34 {
mbed_official 390:35c2c1cf29cd 35 L = 0, H = 1,
mbed_official 390:35c2c1cf29cd 36 LL= 0, LH = 1, HL = 2, HH = 3
mbed_official 390:35c2c1cf29cd 37 };
mbed_official 390:35c2c1cf29cd 38
mbed_official 390:35c2c1cf29cd 39 /***********************************************************************
mbed_official 390:35c2c1cf29cd 40 <<< [iodefine_reg32_t] >>>
mbed_official 390:35c2c1cf29cd 41 - Padding : sizeof(iodefine_reg32_t) == 4
mbed_official 390:35c2c1cf29cd 42 - Alignment(Offset) : &UINT32==0, &UINT16[0]==0, &UINT16[1]==2
mbed_official 390:35c2c1cf29cd 43 - &UINT8[0]==0, &UINT8[1]==1, &UINT8[2]==2, &UINT8[3]==3
mbed_official 390:35c2c1cf29cd 44 - Endian : Independent (Same as CPU endian as register endian)
mbed_official 390:35c2c1cf29cd 45 - Bit-Order : Independent
mbed_official 390:35c2c1cf29cd 46 ************************************************************************/
mbed_official 390:35c2c1cf29cd 47 /* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
mbed_official 390:35c2c1cf29cd 48 /* ->SEC M1.10.1 : Not magic number */
mbed_official 390:35c2c1cf29cd 49 union iodefine_reg32_t
mbed_official 390:35c2c1cf29cd 50 {
mbed_official 390:35c2c1cf29cd 51 volatile uint32_t UINT32; /* 32-bit Access */
mbed_official 390:35c2c1cf29cd 52 volatile uint16_t UINT16[2]; /* 16-bit Access */
mbed_official 390:35c2c1cf29cd 53 volatile uint8_t UINT8[4]; /* 8-bit Access */
mbed_official 390:35c2c1cf29cd 54 };
mbed_official 390:35c2c1cf29cd 55 /* <-SEC M1.10.1 */
mbed_official 390:35c2c1cf29cd 56 /* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
mbed_official 390:35c2c1cf29cd 57
mbed_official 390:35c2c1cf29cd 58 /***********************************************************************
mbed_official 390:35c2c1cf29cd 59 <<< [iodefine_reg32_16_t] >>>
mbed_official 390:35c2c1cf29cd 60 - Padding : sizeof(iodefine_reg32_16_t) == 4
mbed_official 390:35c2c1cf29cd 61 - Alignment(Offset) : &UINT32==0, &UINT16[0]==0, &UINT16[1]==2
mbed_official 390:35c2c1cf29cd 62 - Endian : Independent (Same as CPU endian as register endian)
mbed_official 390:35c2c1cf29cd 63 - Bit-Order : Independent
mbed_official 390:35c2c1cf29cd 64 ************************************************************************/
mbed_official 390:35c2c1cf29cd 65 /* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
mbed_official 390:35c2c1cf29cd 66 /* ->SEC M1.10.1 : Not magic number */
mbed_official 390:35c2c1cf29cd 67 union iodefine_reg32_16_t
mbed_official 390:35c2c1cf29cd 68 {
mbed_official 390:35c2c1cf29cd 69 volatile uint32_t UINT32; /* 32-bit Access */
mbed_official 390:35c2c1cf29cd 70 volatile uint16_t UINT16[2]; /* 16-bit Access */
mbed_official 390:35c2c1cf29cd 71 };
mbed_official 390:35c2c1cf29cd 72 /* <-SEC M1.10.1 */
mbed_official 390:35c2c1cf29cd 73 /* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
mbed_official 390:35c2c1cf29cd 74
mbed_official 390:35c2c1cf29cd 75 /***********************************************************************
mbed_official 390:35c2c1cf29cd 76 <<< [iodefine_reg16_8_t] >>>
mbed_official 390:35c2c1cf29cd 77 - Padding : sizeof(iodefine_reg16_8_t) == 2
mbed_official 390:35c2c1cf29cd 78 - Alignment(Offset) : &UINT16==0, &UINT8[0]==0, &UINT8[1]==1
mbed_official 390:35c2c1cf29cd 79 - Endian : Independent (Same as CPU endian as register endian)
mbed_official 390:35c2c1cf29cd 80 - Bit-Order : Independent
mbed_official 390:35c2c1cf29cd 81 ************************************************************************/
mbed_official 390:35c2c1cf29cd 82 /* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
mbed_official 390:35c2c1cf29cd 83 /* ->SEC M1.10.1 : Not magic number */
mbed_official 390:35c2c1cf29cd 84 union iodefine_reg16_8_t
mbed_official 390:35c2c1cf29cd 85 {
mbed_official 390:35c2c1cf29cd 86 volatile uint16_t UINT16; /* 16-bit Access */
mbed_official 390:35c2c1cf29cd 87 volatile uint8_t UINT8[2]; /* 8-bit Access */
mbed_official 390:35c2c1cf29cd 88 };
mbed_official 390:35c2c1cf29cd 89 /* <-SEC M1.10.1 */
mbed_official 390:35c2c1cf29cd 90 /* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
mbed_official 390:35c2c1cf29cd 91
mbed_official 390:35c2c1cf29cd 92
mbed_official 390:35c2c1cf29cd 93
mbed_official 390:35c2c1cf29cd 94
mbed_official 390:35c2c1cf29cd 95
mbed_official 390:35c2c1cf29cd 96
mbed_official 390:35c2c1cf29cd 97 #include "iodefines/adc_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 98 #include "iodefines/bsc_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 99 #include "iodefines/ceu_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 100 #include "iodefines/cpg_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 101 #include "iodefines/disc_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 102 #include "iodefines/dmac_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 103 #include "iodefines/dvdec_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 104 #include "iodefines/ether_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 105 #include "iodefines/flctl_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 106 #include "iodefines/gpio_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 107 #include "iodefines/ieb_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 108 #include "iodefines/inb_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 109 #include "iodefines/intc_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 110 #include "iodefines/irda_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 111 #include "iodefines/jcu_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 112 #include "iodefines/l2c_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 113 #include "iodefines/lin_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 114 #include "iodefines/lvds_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 115 #include "iodefines/mlb_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 116 #include "iodefines/mmc_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 117 #include "iodefines/mtu2_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 118 #include "iodefines/ostm_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 119 #include "iodefines/pfv_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 120 #include "iodefines/pwm_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 121 #include "iodefines/riic_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 122 #include "iodefines/romdec_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 123 #include "iodefines/rscan0_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 124 #include "iodefines/rspi_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 125 #include "iodefines/rtc_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 126 #include "iodefines/scif_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 127 #include "iodefines/scim_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 128 #include "iodefines/scux_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 129 #include "iodefines/sdg_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 130 #include "iodefines/spdif_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 131 #include "iodefines/spibsc_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 132 #include "iodefines/ssif_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 133 #include "iodefines/usb20_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 134 #include "iodefines/vdc5_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 135 #include "iodefines/wdt_iodefine.h" /* (V1.00a) */
mbed_official 390:35c2c1cf29cd 136 #endif