A blink LED demo with power management to reduce power.

Dependencies:   mbed

Committer:
4180_1
Date:
Fri Jan 28 17:31:00 2011 +0000
Revision:
0:02d7e850d7cb

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
4180_1 0:02d7e850d7cb 1 /* mbed PowerControl Library
4180_1 0:02d7e850d7cb 2 * Copyright (c) 2010 Michael Wei
4180_1 0:02d7e850d7cb 3 */
4180_1 0:02d7e850d7cb 4
4180_1 0:02d7e850d7cb 5 #ifndef MBED_POWERCONTROL_H
4180_1 0:02d7e850d7cb 6 #define MBED_POWERCONTROL_H
4180_1 0:02d7e850d7cb 7
4180_1 0:02d7e850d7cb 8 //shouldn't have to include, but fixes weird problems with defines
4180_1 0:02d7e850d7cb 9 #include "LPC1768/LPC17xx.h"
4180_1 0:02d7e850d7cb 10
4180_1 0:02d7e850d7cb 11 //System Control Register
4180_1 0:02d7e850d7cb 12 // bit 0: Reserved
4180_1 0:02d7e850d7cb 13 // bit 1: Sleep on Exit
4180_1 0:02d7e850d7cb 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
4180_1 0:02d7e850d7cb 15 // bit 2: Deep Sleep
4180_1 0:02d7e850d7cb 16 #define LPC1768_SCR_SLEEPDEEP 0x4
4180_1 0:02d7e850d7cb 17 // bit 3: Resereved
4180_1 0:02d7e850d7cb 18 // bit 4: Send on Pending
4180_1 0:02d7e850d7cb 19 #define LPC1768_SCR_SEVONPEND 0x10
4180_1 0:02d7e850d7cb 20 // bit 5-31: Reserved
4180_1 0:02d7e850d7cb 21
4180_1 0:02d7e850d7cb 22 //Power Control Register
4180_1 0:02d7e850d7cb 23 // bit 0: Power mode control bit 0 (power-down mode)
4180_1 0:02d7e850d7cb 24 #define LPC1768_PCON_PM0 0x1
4180_1 0:02d7e850d7cb 25 // bit 1: Power mode control bit 1 (deep power-down mode)
4180_1 0:02d7e850d7cb 26 #define LPC1768_PCON_PM1 0x2
4180_1 0:02d7e850d7cb 27 // bit 2: Brown-out reduced power mode
4180_1 0:02d7e850d7cb 28 #define LPC1768_PCON_BODRPM 0x4
4180_1 0:02d7e850d7cb 29 // bit 3: Brown-out global disable
4180_1 0:02d7e850d7cb 30 #define LPC1768_PCON_BOGD 0x8
4180_1 0:02d7e850d7cb 31 // bit 4: Brown-out reset disable
4180_1 0:02d7e850d7cb 32 #define LPC1768_PCON_BORD 0x10
4180_1 0:02d7e850d7cb 33 // bit 5-7 : Reserved
4180_1 0:02d7e850d7cb 34 // bit 8: Sleep Mode Entry Flag
4180_1 0:02d7e850d7cb 35 #define LPC1768_PCON_SMFLAG 0x100
4180_1 0:02d7e850d7cb 36 // bit 9: Deep Sleep Entry Flag
4180_1 0:02d7e850d7cb 37 #define LPC1768_PCON_DSFLAG 0x200
4180_1 0:02d7e850d7cb 38 // bit 10: Power Down Entry Flag
4180_1 0:02d7e850d7cb 39 #define LPC1768_PCON_PDFLAG 0x400
4180_1 0:02d7e850d7cb 40 // bit 11: Deep Power Down Entry Flag
4180_1 0:02d7e850d7cb 41 #define LPC1768_PCON_DPDFLAG 0x800
4180_1 0:02d7e850d7cb 42 // bit 12-31: Reserved
4180_1 0:02d7e850d7cb 43
4180_1 0:02d7e850d7cb 44 //"Sleep Mode" (WFI).
4180_1 0:02d7e850d7cb 45 inline void Sleep(void)
4180_1 0:02d7e850d7cb 46 {
4180_1 0:02d7e850d7cb 47 __WFI();
4180_1 0:02d7e850d7cb 48 }
4180_1 0:02d7e850d7cb 49
4180_1 0:02d7e850d7cb 50 //"Deep Sleep" Mode
4180_1 0:02d7e850d7cb 51 inline void DeepSleep(void)
4180_1 0:02d7e850d7cb 52 {
4180_1 0:02d7e850d7cb 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
4180_1 0:02d7e850d7cb 54 __WFI();
4180_1 0:02d7e850d7cb 55 }
4180_1 0:02d7e850d7cb 56
4180_1 0:02d7e850d7cb 57 //"Power-Down" Mode
4180_1 0:02d7e850d7cb 58 inline void PowerDown(void)
4180_1 0:02d7e850d7cb 59 {
4180_1 0:02d7e850d7cb 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
4180_1 0:02d7e850d7cb 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
4180_1 0:02d7e850d7cb 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
4180_1 0:02d7e850d7cb 63 __WFI();
4180_1 0:02d7e850d7cb 64 //reset back to normal
4180_1 0:02d7e850d7cb 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
4180_1 0:02d7e850d7cb 66 }
4180_1 0:02d7e850d7cb 67
4180_1 0:02d7e850d7cb 68 //"Deep Power-Down" Mode
4180_1 0:02d7e850d7cb 69 inline void DeepPowerDown(void)
4180_1 0:02d7e850d7cb 70 {
4180_1 0:02d7e850d7cb 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
4180_1 0:02d7e850d7cb 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
4180_1 0:02d7e850d7cb 73 __WFI();
4180_1 0:02d7e850d7cb 74 //reset back to normal
4180_1 0:02d7e850d7cb 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
4180_1 0:02d7e850d7cb 76 }
4180_1 0:02d7e850d7cb 77
4180_1 0:02d7e850d7cb 78 //shut down BOD during power-down/deep sleep
4180_1 0:02d7e850d7cb 79 inline void BrownOut_ReducedPowerMode_Enable(void)
4180_1 0:02d7e850d7cb 80 {
4180_1 0:02d7e850d7cb 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
4180_1 0:02d7e850d7cb 82 }
4180_1 0:02d7e850d7cb 83
4180_1 0:02d7e850d7cb 84 //turn on BOD during power-down/deep sleep
4180_1 0:02d7e850d7cb 85 inline void BrownOut_ReducedPowerMode_Disable(void)
4180_1 0:02d7e850d7cb 86 {
4180_1 0:02d7e850d7cb 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
4180_1 0:02d7e850d7cb 88 }
4180_1 0:02d7e850d7cb 89
4180_1 0:02d7e850d7cb 90 //turn off brown out circutry
4180_1 0:02d7e850d7cb 91 inline void BrownOut_Global_Disable(void)
4180_1 0:02d7e850d7cb 92 {
4180_1 0:02d7e850d7cb 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
4180_1 0:02d7e850d7cb 94 }
4180_1 0:02d7e850d7cb 95
4180_1 0:02d7e850d7cb 96 //turn on brown out circutry
4180_1 0:02d7e850d7cb 97 inline void BrownOut_Global_Enable(void)
4180_1 0:02d7e850d7cb 98 {
4180_1 0:02d7e850d7cb 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
4180_1 0:02d7e850d7cb 100 }
4180_1 0:02d7e850d7cb 101
4180_1 0:02d7e850d7cb 102 //turn off brown out reset circutry
4180_1 0:02d7e850d7cb 103 inline void BrownOut_Reset_Disable(void)
4180_1 0:02d7e850d7cb 104 {
4180_1 0:02d7e850d7cb 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
4180_1 0:02d7e850d7cb 106 }
4180_1 0:02d7e850d7cb 107
4180_1 0:02d7e850d7cb 108 //turn on brown outreset circutry
4180_1 0:02d7e850d7cb 109 inline void BrownOut_Reset_Enable(void)
4180_1 0:02d7e850d7cb 110 {
4180_1 0:02d7e850d7cb 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
4180_1 0:02d7e850d7cb 112 }
4180_1 0:02d7e850d7cb 113 //Peripheral Control Register
4180_1 0:02d7e850d7cb 114 // bit 0: Reserved
4180_1 0:02d7e850d7cb 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
4180_1 0:02d7e850d7cb 116 #define LPC1768_PCONP_PCTIM0 0x2
4180_1 0:02d7e850d7cb 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
4180_1 0:02d7e850d7cb 118 #define LPC1768_PCONP_PCTIM1 0x4
4180_1 0:02d7e850d7cb 119 // bit 3: PCUART0: UART 0 power/clock enable
4180_1 0:02d7e850d7cb 120 #define LPC1768_PCONP_PCUART0 0x8
4180_1 0:02d7e850d7cb 121 // bit 4: PCUART1: UART 1 power/clock enable
4180_1 0:02d7e850d7cb 122 #define LPC1768_PCONP_PCUART1 0x10
4180_1 0:02d7e850d7cb 123 // bit 5: Reserved
4180_1 0:02d7e850d7cb 124 // bit 6: PCPWM1: PWM 1 power/clock enable
4180_1 0:02d7e850d7cb 125 #define LPC1768_PCONP_PCPWM1 0x40
4180_1 0:02d7e850d7cb 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
4180_1 0:02d7e850d7cb 127 #define LPC1768_PCONP_PCI2C0 0x80
4180_1 0:02d7e850d7cb 128 // bit 8: PCSPI: SPI interface power/clock enable
4180_1 0:02d7e850d7cb 129 #define LPC1768_PCONP_PCSPI 0x100
4180_1 0:02d7e850d7cb 130 // bit 9: PCRTC: RTC power/clock enable
4180_1 0:02d7e850d7cb 131 #define LPC1768_PCONP_PCRTC 0x200
4180_1 0:02d7e850d7cb 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
4180_1 0:02d7e850d7cb 133 #define LPC1768_PCONP_PCSSP1 0x400
4180_1 0:02d7e850d7cb 134 // bit 11: Reserved
4180_1 0:02d7e850d7cb 135 // bit 12: PCADC: A/D converter power/clock enable
4180_1 0:02d7e850d7cb 136 #define LPC1768_PCONP_PCADC 0x1000
4180_1 0:02d7e850d7cb 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
4180_1 0:02d7e850d7cb 138 #define LPC1768_PCONP_PCCAN1 0x2000
4180_1 0:02d7e850d7cb 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
4180_1 0:02d7e850d7cb 140 #define LPC1768_PCONP_PCCAN2 0x4000
4180_1 0:02d7e850d7cb 141 // bit 15: PCGPIO: GPIOs power/clock enable
4180_1 0:02d7e850d7cb 142 #define LPC1768_PCONP_PCGPIO 0x8000
4180_1 0:02d7e850d7cb 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
4180_1 0:02d7e850d7cb 144 #define LPC1768_PCONP_PCRIT 0x10000
4180_1 0:02d7e850d7cb 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
4180_1 0:02d7e850d7cb 146 #define LPC1768_PCONP_PCMCPWM 0x20000
4180_1 0:02d7e850d7cb 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
4180_1 0:02d7e850d7cb 148 #define LPC1768_PCONP_PCQEI 0x40000
4180_1 0:02d7e850d7cb 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
4180_1 0:02d7e850d7cb 150 #define LPC1768_PCONP_PCI2C1 0x80000
4180_1 0:02d7e850d7cb 151 // bit 20: Reserved
4180_1 0:02d7e850d7cb 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
4180_1 0:02d7e850d7cb 153 #define LPC1768_PCONP_PCSSP0 0x200000
4180_1 0:02d7e850d7cb 154 // bit 22: PCTIM2: Timer 2 power/clock enable
4180_1 0:02d7e850d7cb 155 #define LPC1768_PCONP_PCTIM2 0x400000
4180_1 0:02d7e850d7cb 156 // bit 23: PCTIM3: Timer 3 power/clock enable
4180_1 0:02d7e850d7cb 157 #define LPC1768_PCONP_PCQTIM3 0x800000
4180_1 0:02d7e850d7cb 158 // bit 24: PCUART2: UART 2 power/clock enable
4180_1 0:02d7e850d7cb 159 #define LPC1768_PCONP_PCUART2 0x1000000
4180_1 0:02d7e850d7cb 160 // bit 25: PCUART3: UART 3 power/clock enable
4180_1 0:02d7e850d7cb 161 #define LPC1768_PCONP_PCUART3 0x2000000
4180_1 0:02d7e850d7cb 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
4180_1 0:02d7e850d7cb 163 #define LPC1768_PCONP_PCI2C2 0x4000000
4180_1 0:02d7e850d7cb 164 // bit 27: PCI2S: I2S interface power/clock enable
4180_1 0:02d7e850d7cb 165 #define LPC1768_PCONP_PCI2S 0x8000000
4180_1 0:02d7e850d7cb 166 // bit 28: Reserved
4180_1 0:02d7e850d7cb 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
4180_1 0:02d7e850d7cb 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
4180_1 0:02d7e850d7cb 169 // bit 30: PCENET: Ethernet block power/clock enable
4180_1 0:02d7e850d7cb 170 #define LPC1768_PCONP_PCENET 0x40000000
4180_1 0:02d7e850d7cb 171 // bit 31: PCUSB: USB interface power/clock enable
4180_1 0:02d7e850d7cb 172 #define LPC1768_PCONP_PCUSB 0x80000000
4180_1 0:02d7e850d7cb 173
4180_1 0:02d7e850d7cb 174 //Powers Up specified Peripheral(s)
4180_1 0:02d7e850d7cb 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
4180_1 0:02d7e850d7cb 176 {
4180_1 0:02d7e850d7cb 177 return LPC_SC->PCONP |= bitMask;
4180_1 0:02d7e850d7cb 178 }
4180_1 0:02d7e850d7cb 179
4180_1 0:02d7e850d7cb 180 //Powers Down specified Peripheral(s)
4180_1 0:02d7e850d7cb 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
4180_1 0:02d7e850d7cb 182 {
4180_1 0:02d7e850d7cb 183 return LPC_SC->PCONP &= ~bitMask;
4180_1 0:02d7e850d7cb 184 }
4180_1 0:02d7e850d7cb 185
4180_1 0:02d7e850d7cb 186 //returns if the peripheral is on or off
4180_1 0:02d7e850d7cb 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
4180_1 0:02d7e850d7cb 188 {
4180_1 0:02d7e850d7cb 189 return (LPC_SC->PCONP & peripheral) ? true : false;
4180_1 0:02d7e850d7cb 190 }
4180_1 0:02d7e850d7cb 191
4180_1 0:02d7e850d7cb 192 #endif