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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_fsmc.h@106:ced8cbb51063, 2014-02-26 (annotated)

Committer:
mbed_official
Date:
Wed Feb 26 09:45:12 2014 +0000
Revision:
106:ced8cbb51063
Parent:
80:66393a7b209d 
Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd



Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/



[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license

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UserRevisionLine numberNew contents of line
mbed_official 76:aeb1df146756 1 /**
mbed_official 76:aeb1df146756 2 ******************************************************************************
mbed_official 76:aeb1df146756 3 * @file stm32l1xx_fsmc.h
mbed_official 76:aeb1df146756 4 * @author MCD Application Team
mbed_official 80:66393a7b209d 5 * @version V1.3.0
mbed_official 80:66393a7b209d 6 * @date 31-January-2014
mbed_official 76:aeb1df146756 7 * @brief This file contains all the functions prototypes for the FSMC firmware
mbed_official 76:aeb1df146756 8 * library.
mbed_official 76:aeb1df146756 9 ******************************************************************************
mbed_official 76:aeb1df146756 10 * @attention
mbed_official 76:aeb1df146756 11 *
mbed_official 106:ced8cbb51063 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 76:aeb1df146756 13 *
mbed_official 106:ced8cbb51063 14 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 106:ced8cbb51063 15 * are permitted provided that the following conditions are met:
mbed_official 106:ced8cbb51063 16 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 106:ced8cbb51063 17 * this list of conditions and the following disclaimer.
mbed_official 106:ced8cbb51063 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 106:ced8cbb51063 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 106:ced8cbb51063 20 * and/or other materials provided with the distribution.
mbed_official 106:ced8cbb51063 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 106:ced8cbb51063 22 * may be used to endorse or promote products derived from this software
mbed_official 106:ced8cbb51063 23 * without specific prior written permission.
mbed_official 76:aeb1df146756 24 *
mbed_official 106:ced8cbb51063 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 106:ced8cbb51063 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 106:ced8cbb51063 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 106:ced8cbb51063 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 106:ced8cbb51063 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 106:ced8cbb51063 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 106:ced8cbb51063 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 106:ced8cbb51063 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 106:ced8cbb51063 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 106:ced8cbb51063 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 76:aeb1df146756 35 *
mbed_official 76:aeb1df146756 36 ******************************************************************************
mbed_official 76:aeb1df146756 37 */
mbed_official 76:aeb1df146756 38
mbed_official 76:aeb1df146756 39 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 76:aeb1df146756 40 #ifndef __STM32L1xx_FSMC_H
mbed_official 76:aeb1df146756 41 #define __STM32L1xx_FSMC_H
mbed_official 76:aeb1df146756 42
mbed_official 76:aeb1df146756 43 #ifdef __cplusplus
mbed_official 76:aeb1df146756 44 extern "C" {
mbed_official 76:aeb1df146756 45 #endif
mbed_official 76:aeb1df146756 46
mbed_official 76:aeb1df146756 47 /* Includes ------------------------------------------------------------------*/
mbed_official 76:aeb1df146756 48 #include "stm32l1xx.h"
mbed_official 76:aeb1df146756 49
mbed_official 76:aeb1df146756 50 /** @addtogroup STM32L1xx_StdPeriph_Driver
mbed_official 76:aeb1df146756 51 * @{
mbed_official 76:aeb1df146756 52 */
mbed_official 76:aeb1df146756 53
mbed_official 76:aeb1df146756 54 /** @addtogroup FSMC
mbed_official 76:aeb1df146756 55 * @{
mbed_official 76:aeb1df146756 56 */
mbed_official 76:aeb1df146756 57
mbed_official 76:aeb1df146756 58 /* Exported types ------------------------------------------------------------*/
mbed_official 76:aeb1df146756 59
mbed_official 76:aeb1df146756 60 /**
mbed_official 76:aeb1df146756 61 * @brief Timing parameters For NOR/SRAM Banks
mbed_official 76:aeb1df146756 62 */
mbed_official 76:aeb1df146756 63
mbed_official 76:aeb1df146756 64 typedef struct
mbed_official 76:aeb1df146756 65 {
mbed_official 76:aeb1df146756 66 uint32_t FSMC_AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
mbed_official 76:aeb1df146756 67 the duration of the address setup time.
mbed_official 76:aeb1df146756 68 This parameter can be a value between 0 and 0xF.
mbed_official 76:aeb1df146756 69 @note It is not used with synchronous NOR Flash memories. */
mbed_official 76:aeb1df146756 70
mbed_official 76:aeb1df146756 71 uint32_t FSMC_AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
mbed_official 76:aeb1df146756 72 the duration of the address hold time.
mbed_official 76:aeb1df146756 73 This parameter can be a value between 0 and 0xF.
mbed_official 76:aeb1df146756 74 @note It is not used with synchronous NOR Flash memories.*/
mbed_official 76:aeb1df146756 75
mbed_official 76:aeb1df146756 76 uint32_t FSMC_DataSetupTime; /*!< Defines the number of HCLK cycles to configure
mbed_official 76:aeb1df146756 77 the duration of the data setup time.
mbed_official 76:aeb1df146756 78 This parameter can be a value between 0 and 0xFF.
mbed_official 76:aeb1df146756 79 @note It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */
mbed_official 76:aeb1df146756 80
mbed_official 76:aeb1df146756 81 uint32_t FSMC_BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
mbed_official 76:aeb1df146756 82 the duration of the bus turnaround.
mbed_official 76:aeb1df146756 83 This parameter can be a value between 0 and 0xF.
mbed_official 76:aeb1df146756 84 @note It is only used for multiplexed NOR Flash memories. */
mbed_official 76:aeb1df146756 85
mbed_official 76:aeb1df146756 86 uint32_t FSMC_CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
mbed_official 76:aeb1df146756 87 This parameter can be a value between 1 and 0xF.
mbed_official 76:aeb1df146756 88 @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses. */
mbed_official 76:aeb1df146756 89
mbed_official 76:aeb1df146756 90 uint32_t FSMC_DataLatency; /*!< Defines the number of memory clock cycles to issue
mbed_official 76:aeb1df146756 91 to the memory before getting the first data.
mbed_official 76:aeb1df146756 92 The parameter value depends on the memory type as shown below:
mbed_official 76:aeb1df146756 93 - It must be set to 0 in case of a CRAM
mbed_official 76:aeb1df146756 94 - It is don't care in asynchronous NOR, SRAM or ROM accesses
mbed_official 76:aeb1df146756 95 - It may assume a value between 0 and 0xF in NOR Flash memories
mbed_official 76:aeb1df146756 96 with synchronous burst mode enable */
mbed_official 76:aeb1df146756 97
mbed_official 76:aeb1df146756 98 uint32_t FSMC_AccessMode; /*!< Specifies the asynchronous access mode.
mbed_official 76:aeb1df146756 99 This parameter can be a value of @ref FSMC_Access_Mode */
mbed_official 76:aeb1df146756 100 }FSMC_NORSRAMTimingInitTypeDef;
mbed_official 76:aeb1df146756 101
mbed_official 76:aeb1df146756 102 /**
mbed_official 76:aeb1df146756 103 * @brief FSMC NOR/SRAM Init structure definition
mbed_official 76:aeb1df146756 104 */
mbed_official 76:aeb1df146756 105
mbed_official 76:aeb1df146756 106 typedef struct
mbed_official 76:aeb1df146756 107 {
mbed_official 76:aeb1df146756 108 uint32_t FSMC_Bank; /*!< Specifies the NOR/SRAM memory bank that will be used.
mbed_official 76:aeb1df146756 109 This parameter can be a value of @ref FSMC_NORSRAM_Bank */
mbed_official 76:aeb1df146756 110
mbed_official 76:aeb1df146756 111 uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are
mbed_official 76:aeb1df146756 112 multiplexed on the databus or not.
mbed_official 76:aeb1df146756 113 This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */
mbed_official 76:aeb1df146756 114
mbed_official 76:aeb1df146756 115 uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to
mbed_official 76:aeb1df146756 116 the corresponding memory bank.
mbed_official 76:aeb1df146756 117 This parameter can be a value of @ref FSMC_Memory_Type */
mbed_official 76:aeb1df146756 118
mbed_official 76:aeb1df146756 119 uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width.
mbed_official 76:aeb1df146756 120 This parameter can be a value of @ref FSMC_Data_Width */
mbed_official 76:aeb1df146756 121
mbed_official 76:aeb1df146756 122 uint32_t FSMC_BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
mbed_official 76:aeb1df146756 123 valid only with synchronous burst Flash memories.
mbed_official 76:aeb1df146756 124 This parameter can be a value of @ref FSMC_Burst_Access_Mode */
mbed_official 76:aeb1df146756 125
mbed_official 76:aeb1df146756 126 uint32_t FSMC_AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
mbed_official 76:aeb1df146756 127 valid only with asynchronous Flash memories.
mbed_official 76:aeb1df146756 128 This parameter can be a value of @ref FSMC_AsynchronousWait */
mbed_official 76:aeb1df146756 129
mbed_official 76:aeb1df146756 130 uint32_t FSMC_WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
mbed_official 76:aeb1df146756 131 the Flash memory in burst mode.
mbed_official 76:aeb1df146756 132 This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */
mbed_official 76:aeb1df146756 133
mbed_official 76:aeb1df146756 134 uint32_t FSMC_WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
mbed_official 76:aeb1df146756 135 memory, valid only when accessing Flash memories in burst mode.
mbed_official 76:aeb1df146756 136 This parameter can be a value of @ref FSMC_Wrap_Mode */
mbed_official 76:aeb1df146756 137
mbed_official 76:aeb1df146756 138 uint32_t FSMC_WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
mbed_official 76:aeb1df146756 139 clock cycle before the wait state or during the wait state,
mbed_official 76:aeb1df146756 140 valid only when accessing memories in burst mode.
mbed_official 76:aeb1df146756 141 This parameter can be a value of @ref FSMC_Wait_Timing */
mbed_official 76:aeb1df146756 142
mbed_official 76:aeb1df146756 143 uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC.
mbed_official 76:aeb1df146756 144 This parameter can be a value of @ref FSMC_Write_Operation */
mbed_official 76:aeb1df146756 145
mbed_official 76:aeb1df146756 146 uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait
mbed_official 76:aeb1df146756 147 signal, valid for Flash memory access in burst mode.
mbed_official 76:aeb1df146756 148 This parameter can be a value of @ref FSMC_Wait_Signal */
mbed_official 76:aeb1df146756 149
mbed_official 76:aeb1df146756 150 uint32_t FSMC_ExtendedMode; /*!< Enables or disables the extended mode.
mbed_official 76:aeb1df146756 151 This parameter can be a value of @ref FSMC_Extended_Mode */
mbed_official 76:aeb1df146756 152
mbed_official 76:aeb1df146756 153 uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation.
mbed_official 76:aeb1df146756 154 This parameter can be a value of @ref FSMC_Write_Burst */
mbed_official 76:aeb1df146756 155
mbed_official 76:aeb1df146756 156 FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/
mbed_official 76:aeb1df146756 157
mbed_official 76:aeb1df146756 158 FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/
mbed_official 76:aeb1df146756 159 }FSMC_NORSRAMInitTypeDef;
mbed_official 76:aeb1df146756 160
mbed_official 76:aeb1df146756 161 /* Exported constants --------------------------------------------------------*/
mbed_official 76:aeb1df146756 162
mbed_official 76:aeb1df146756 163 /** @defgroup FSMC_Exported_Constants
mbed_official 76:aeb1df146756 164 * @{
mbed_official 76:aeb1df146756 165 */
mbed_official 76:aeb1df146756 166
mbed_official 76:aeb1df146756 167 /** @defgroup FSMC_NORSRAM_Bank
mbed_official 76:aeb1df146756 168 * @{
mbed_official 76:aeb1df146756 169 */
mbed_official 76:aeb1df146756 170 #define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 171 #define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002)
mbed_official 76:aeb1df146756 172 #define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004)
mbed_official 76:aeb1df146756 173 #define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006)
mbed_official 76:aeb1df146756 174
mbed_official 76:aeb1df146756 175 #define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \
mbed_official 76:aeb1df146756 176 ((BANK) == FSMC_Bank1_NORSRAM2) || \
mbed_official 76:aeb1df146756 177 ((BANK) == FSMC_Bank1_NORSRAM3) || \
mbed_official 76:aeb1df146756 178 ((BANK) == FSMC_Bank1_NORSRAM4))
mbed_official 76:aeb1df146756 179 /**
mbed_official 76:aeb1df146756 180 * @}
mbed_official 76:aeb1df146756 181 */
mbed_official 76:aeb1df146756 182
mbed_official 76:aeb1df146756 183 /** @defgroup NOR_SRAM_Controller
mbed_official 76:aeb1df146756 184 * @{
mbed_official 76:aeb1df146756 185 */
mbed_official 76:aeb1df146756 186
mbed_official 76:aeb1df146756 187 /** @defgroup FSMC_Data_Address_Bus_Multiplexing
mbed_official 76:aeb1df146756 188 * @{
mbed_official 76:aeb1df146756 189 */
mbed_official 76:aeb1df146756 190
mbed_official 76:aeb1df146756 191 #define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 192 #define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002)
mbed_official 76:aeb1df146756 193 #define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \
mbed_official 76:aeb1df146756 194 ((MUX) == FSMC_DataAddressMux_Enable))
mbed_official 76:aeb1df146756 195
mbed_official 76:aeb1df146756 196 /**
mbed_official 76:aeb1df146756 197 * @}
mbed_official 76:aeb1df146756 198 */
mbed_official 76:aeb1df146756 199
mbed_official 76:aeb1df146756 200 /** @defgroup FSMC_Memory_Type
mbed_official 76:aeb1df146756 201 * @{
mbed_official 76:aeb1df146756 202 */
mbed_official 76:aeb1df146756 203
mbed_official 76:aeb1df146756 204 #define FSMC_MemoryType_SRAM ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 205 #define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004)
mbed_official 76:aeb1df146756 206 #define FSMC_MemoryType_NOR ((uint32_t)0x00000008)
mbed_official 76:aeb1df146756 207 #define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \
mbed_official 76:aeb1df146756 208 ((MEMORY) == FSMC_MemoryType_PSRAM)|| \
mbed_official 76:aeb1df146756 209 ((MEMORY) == FSMC_MemoryType_NOR))
mbed_official 76:aeb1df146756 210
mbed_official 76:aeb1df146756 211 /**
mbed_official 76:aeb1df146756 212 * @}
mbed_official 76:aeb1df146756 213 */
mbed_official 76:aeb1df146756 214
mbed_official 76:aeb1df146756 215 /** @defgroup FSMC_Data_Width
mbed_official 76:aeb1df146756 216 * @{
mbed_official 76:aeb1df146756 217 */
mbed_official 76:aeb1df146756 218
mbed_official 76:aeb1df146756 219 #define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 220 #define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010)
mbed_official 76:aeb1df146756 221 #define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \
mbed_official 76:aeb1df146756 222 ((WIDTH) == FSMC_MemoryDataWidth_16b))
mbed_official 76:aeb1df146756 223
mbed_official 76:aeb1df146756 224 /**
mbed_official 76:aeb1df146756 225 * @}
mbed_official 76:aeb1df146756 226 */
mbed_official 76:aeb1df146756 227
mbed_official 76:aeb1df146756 228 /** @defgroup FSMC_Burst_Access_Mode
mbed_official 76:aeb1df146756 229 * @{
mbed_official 76:aeb1df146756 230 */
mbed_official 76:aeb1df146756 231
mbed_official 76:aeb1df146756 232 #define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 233 #define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100)
mbed_official 76:aeb1df146756 234 #define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \
mbed_official 76:aeb1df146756 235 ((STATE) == FSMC_BurstAccessMode_Enable))
mbed_official 76:aeb1df146756 236 /**
mbed_official 76:aeb1df146756 237 * @}
mbed_official 76:aeb1df146756 238 */
mbed_official 76:aeb1df146756 239
mbed_official 76:aeb1df146756 240 /** @defgroup FSMC_AsynchronousWait
mbed_official 76:aeb1df146756 241 * @{
mbed_official 76:aeb1df146756 242 */
mbed_official 76:aeb1df146756 243 #define FSMC_AsynchronousWait_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 244 #define FSMC_AsynchronousWait_Enable ((uint32_t)0x00008000)
mbed_official 76:aeb1df146756 245 #define IS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || \
mbed_official 76:aeb1df146756 246 ((STATE) == FSMC_AsynchronousWait_Enable))
mbed_official 76:aeb1df146756 247
mbed_official 76:aeb1df146756 248 /**
mbed_official 76:aeb1df146756 249 * @}
mbed_official 76:aeb1df146756 250 */
mbed_official 76:aeb1df146756 251
mbed_official 76:aeb1df146756 252 /** @defgroup FSMC_Wait_Signal_Polarity
mbed_official 76:aeb1df146756 253 * @{
mbed_official 76:aeb1df146756 254 */
mbed_official 76:aeb1df146756 255
mbed_official 76:aeb1df146756 256 #define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 257 #define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200)
mbed_official 76:aeb1df146756 258 #define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \
mbed_official 76:aeb1df146756 259 ((POLARITY) == FSMC_WaitSignalPolarity_High))
mbed_official 76:aeb1df146756 260
mbed_official 76:aeb1df146756 261 /**
mbed_official 76:aeb1df146756 262 * @}
mbed_official 76:aeb1df146756 263 */
mbed_official 76:aeb1df146756 264
mbed_official 76:aeb1df146756 265 /** @defgroup FSMC_Wrap_Mode
mbed_official 76:aeb1df146756 266 * @{
mbed_official 76:aeb1df146756 267 */
mbed_official 76:aeb1df146756 268
mbed_official 76:aeb1df146756 269 #define FSMC_WrapMode_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 270 #define FSMC_WrapMode_Enable ((uint32_t)0x00000400)
mbed_official 76:aeb1df146756 271 #define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \
mbed_official 76:aeb1df146756 272 ((MODE) == FSMC_WrapMode_Enable))
mbed_official 76:aeb1df146756 273
mbed_official 76:aeb1df146756 274 /**
mbed_official 76:aeb1df146756 275 * @}
mbed_official 76:aeb1df146756 276 */
mbed_official 76:aeb1df146756 277
mbed_official 76:aeb1df146756 278 /** @defgroup FSMC_Wait_Timing
mbed_official 76:aeb1df146756 279 * @{
mbed_official 76:aeb1df146756 280 */
mbed_official 76:aeb1df146756 281
mbed_official 76:aeb1df146756 282 #define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 283 #define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800)
mbed_official 76:aeb1df146756 284 #define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \
mbed_official 76:aeb1df146756 285 ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState))
mbed_official 76:aeb1df146756 286
mbed_official 76:aeb1df146756 287 /**
mbed_official 76:aeb1df146756 288 * @}
mbed_official 76:aeb1df146756 289 */
mbed_official 76:aeb1df146756 290
mbed_official 76:aeb1df146756 291 /** @defgroup FSMC_Write_Operation
mbed_official 76:aeb1df146756 292 * @{
mbed_official 76:aeb1df146756 293 */
mbed_official 76:aeb1df146756 294
mbed_official 76:aeb1df146756 295 #define FSMC_WriteOperation_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 296 #define FSMC_WriteOperation_Enable ((uint32_t)0x00001000)
mbed_official 76:aeb1df146756 297 #define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \
mbed_official 76:aeb1df146756 298 ((OPERATION) == FSMC_WriteOperation_Enable))
mbed_official 76:aeb1df146756 299
mbed_official 76:aeb1df146756 300 /**
mbed_official 76:aeb1df146756 301 * @}
mbed_official 76:aeb1df146756 302 */
mbed_official 76:aeb1df146756 303
mbed_official 76:aeb1df146756 304 /** @defgroup FSMC_Wait_Signal
mbed_official 76:aeb1df146756 305 * @{
mbed_official 76:aeb1df146756 306 */
mbed_official 76:aeb1df146756 307
mbed_official 76:aeb1df146756 308 #define FSMC_WaitSignal_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 309 #define FSMC_WaitSignal_Enable ((uint32_t)0x00002000)
mbed_official 76:aeb1df146756 310 #define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \
mbed_official 76:aeb1df146756 311 ((SIGNAL) == FSMC_WaitSignal_Enable))
mbed_official 76:aeb1df146756 312 /**
mbed_official 76:aeb1df146756 313 * @}
mbed_official 76:aeb1df146756 314 */
mbed_official 76:aeb1df146756 315
mbed_official 76:aeb1df146756 316 /** @defgroup FSMC_Extended_Mode
mbed_official 76:aeb1df146756 317 * @{
mbed_official 76:aeb1df146756 318 */
mbed_official 76:aeb1df146756 319
mbed_official 76:aeb1df146756 320 #define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 321 #define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000)
mbed_official 76:aeb1df146756 322
mbed_official 76:aeb1df146756 323 #define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \
mbed_official 76:aeb1df146756 324 ((MODE) == FSMC_ExtendedMode_Enable))
mbed_official 76:aeb1df146756 325
mbed_official 76:aeb1df146756 326 /**
mbed_official 76:aeb1df146756 327 * @}
mbed_official 76:aeb1df146756 328 */
mbed_official 76:aeb1df146756 329
mbed_official 76:aeb1df146756 330 /** @defgroup FSMC_Write_Burst
mbed_official 76:aeb1df146756 331 * @{
mbed_official 76:aeb1df146756 332 */
mbed_official 76:aeb1df146756 333
mbed_official 76:aeb1df146756 334 #define FSMC_WriteBurst_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 335 #define FSMC_WriteBurst_Enable ((uint32_t)0x00080000)
mbed_official 76:aeb1df146756 336 #define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \
mbed_official 76:aeb1df146756 337 ((BURST) == FSMC_WriteBurst_Enable))
mbed_official 76:aeb1df146756 338 /**
mbed_official 76:aeb1df146756 339 * @}
mbed_official 76:aeb1df146756 340 */
mbed_official 76:aeb1df146756 341
mbed_official 76:aeb1df146756 342 /** @defgroup FSMC_Address_Setup_Time
mbed_official 76:aeb1df146756 343 * @{
mbed_official 76:aeb1df146756 344 */
mbed_official 76:aeb1df146756 345
mbed_official 76:aeb1df146756 346 #define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF)
mbed_official 76:aeb1df146756 347
mbed_official 76:aeb1df146756 348 /**
mbed_official 76:aeb1df146756 349 * @}
mbed_official 76:aeb1df146756 350 */
mbed_official 76:aeb1df146756 351
mbed_official 76:aeb1df146756 352 /** @defgroup FSMC_Address_Hold_Time
mbed_official 76:aeb1df146756 353 * @{
mbed_official 76:aeb1df146756 354 */
mbed_official 76:aeb1df146756 355
mbed_official 76:aeb1df146756 356 #define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF)
mbed_official 76:aeb1df146756 357
mbed_official 76:aeb1df146756 358 /**
mbed_official 76:aeb1df146756 359 * @}
mbed_official 76:aeb1df146756 360 */
mbed_official 76:aeb1df146756 361
mbed_official 76:aeb1df146756 362 /** @defgroup FSMC_Data_Setup_Time
mbed_official 76:aeb1df146756 363 * @{
mbed_official 76:aeb1df146756 364 */
mbed_official 76:aeb1df146756 365
mbed_official 76:aeb1df146756 366 #define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF))
mbed_official 76:aeb1df146756 367
mbed_official 76:aeb1df146756 368 /**
mbed_official 76:aeb1df146756 369 * @}
mbed_official 76:aeb1df146756 370 */
mbed_official 76:aeb1df146756 371
mbed_official 76:aeb1df146756 372 /** @defgroup FSMC_Bus_Turn_around_Duration
mbed_official 76:aeb1df146756 373 * @{
mbed_official 76:aeb1df146756 374 */
mbed_official 76:aeb1df146756 375
mbed_official 76:aeb1df146756 376 #define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF)
mbed_official 76:aeb1df146756 377
mbed_official 76:aeb1df146756 378 /**
mbed_official 76:aeb1df146756 379 * @}
mbed_official 76:aeb1df146756 380 */
mbed_official 76:aeb1df146756 381
mbed_official 76:aeb1df146756 382 /** @defgroup FSMC_CLK_Division
mbed_official 76:aeb1df146756 383 * @{
mbed_official 76:aeb1df146756 384 */
mbed_official 76:aeb1df146756 385
mbed_official 76:aeb1df146756 386 #define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF)
mbed_official 76:aeb1df146756 387
mbed_official 76:aeb1df146756 388 /**
mbed_official 76:aeb1df146756 389 * @}
mbed_official 76:aeb1df146756 390 */
mbed_official 76:aeb1df146756 391
mbed_official 76:aeb1df146756 392 /** @defgroup FSMC_Data_Latency
mbed_official 76:aeb1df146756 393 * @{
mbed_official 76:aeb1df146756 394 */
mbed_official 76:aeb1df146756 395
mbed_official 76:aeb1df146756 396 #define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF)
mbed_official 76:aeb1df146756 397
mbed_official 76:aeb1df146756 398 /**
mbed_official 76:aeb1df146756 399 * @}
mbed_official 76:aeb1df146756 400 */
mbed_official 76:aeb1df146756 401
mbed_official 76:aeb1df146756 402 /** @defgroup FSMC_Access_Mode
mbed_official 76:aeb1df146756 403 * @{
mbed_official 76:aeb1df146756 404 */
mbed_official 76:aeb1df146756 405
mbed_official 76:aeb1df146756 406 #define FSMC_AccessMode_A ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 407 #define FSMC_AccessMode_B ((uint32_t)0x10000000)
mbed_official 76:aeb1df146756 408 #define FSMC_AccessMode_C ((uint32_t)0x20000000)
mbed_official 76:aeb1df146756 409 #define FSMC_AccessMode_D ((uint32_t)0x30000000)
mbed_official 76:aeb1df146756 410 #define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \
mbed_official 76:aeb1df146756 411 ((MODE) == FSMC_AccessMode_B) || \
mbed_official 76:aeb1df146756 412 ((MODE) == FSMC_AccessMode_C) || \
mbed_official 76:aeb1df146756 413 ((MODE) == FSMC_AccessMode_D))
mbed_official 76:aeb1df146756 414
mbed_official 76:aeb1df146756 415 /**
mbed_official 76:aeb1df146756 416 * @}
mbed_official 76:aeb1df146756 417 */
mbed_official 76:aeb1df146756 418
mbed_official 76:aeb1df146756 419 /**
mbed_official 76:aeb1df146756 420 * @}
mbed_official 76:aeb1df146756 421 */
mbed_official 76:aeb1df146756 422
mbed_official 76:aeb1df146756 423 /**
mbed_official 76:aeb1df146756 424 * @}
mbed_official 76:aeb1df146756 425 */
mbed_official 76:aeb1df146756 426
mbed_official 76:aeb1df146756 427 /* Exported macro ------------------------------------------------------------*/
mbed_official 76:aeb1df146756 428 /* Exported functions ------------------------------------------------------- */
mbed_official 76:aeb1df146756 429 /* NOR/SRAM Controller functions **********************************************/
mbed_official 76:aeb1df146756 430 void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank);
mbed_official 76:aeb1df146756 431 void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
mbed_official 76:aeb1df146756 432 void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
mbed_official 76:aeb1df146756 433 void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState);
mbed_official 76:aeb1df146756 434
mbed_official 76:aeb1df146756 435 #ifdef __cplusplus
mbed_official 76:aeb1df146756 436 }
mbed_official 76:aeb1df146756 437 #endif
mbed_official 76:aeb1df146756 438
mbed_official 76:aeb1df146756 439 #endif /*__STM32L1xx_FSMC_H */
mbed_official 76:aeb1df146756 440 /**
mbed_official 76:aeb1df146756 441 * @}
mbed_official 76:aeb1df146756 442 */
mbed_official 76:aeb1df146756 443
mbed_official 76:aeb1df146756 444 /**
mbed_official 76:aeb1df146756 445 * @}
mbed_official 76:aeb1df146756 446 */
mbed_official 76:aeb1df146756 447
mbed_official 76:aeb1df146756 448 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/