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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_sram.c@106:ced8cbb51063, 2014-02-26 (annotated)

Committer:
mbed_official
Date:
Wed Feb 26 09:45:12 2014 +0000
Revision:
106:ced8cbb51063
Parent:
87:085cde657901 
Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd



Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/



[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_sram.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 106:ced8cbb51063 5 * @version V1.0.0
mbed_official 106:ced8cbb51063 6 * @date 18-February-2014
mbed_official 87:085cde657901 7 * @brief SRAM HAL module driver.
mbed_official 87:085cde657901 8 * This file provides a generic firmware to drive SRAM memories
mbed_official 87:085cde657901 9 * mounted as external device.
mbed_official 87:085cde657901 10 *
mbed_official 87:085cde657901 11 @verbatim
mbed_official 87:085cde657901 12 ==============================================================================
mbed_official 87:085cde657901 13 ##### How to use this driver #####
mbed_official 87:085cde657901 14 ==============================================================================
mbed_official 87:085cde657901 15 [..]
mbed_official 87:085cde657901 16 This driver is a generic layered driver which contains a set of APIs used to
mbed_official 87:085cde657901 17 control SRAM memories. It uses the FMC layer functions to interface
mbed_official 87:085cde657901 18 with SRAM devices.
mbed_official 87:085cde657901 19 The following sequence should be followed to configure the FMC/FSMC to interface
mbed_official 87:085cde657901 20 with SRAM/PSRAM memories:
mbed_official 87:085cde657901 21
mbed_official 87:085cde657901 22 (#) Declare a SRAM_HandleTypeDef handle structure, for example:
mbed_official 87:085cde657901 23 SRAM_HandleTypeDef hsram; and:
mbed_official 87:085cde657901 24
mbed_official 87:085cde657901 25 (++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed
mbed_official 87:085cde657901 26 values of the structure member.
mbed_official 87:085cde657901 27
mbed_official 87:085cde657901 28 (++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined
mbed_official 87:085cde657901 29 base register instance for NOR or SRAM device
mbed_official 87:085cde657901 30
mbed_official 87:085cde657901 31 (++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined
mbed_official 87:085cde657901 32 base register instance for NOR or SRAM extended mode
mbed_official 87:085cde657901 33
mbed_official 87:085cde657901 34 (#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended
mbed_official 87:085cde657901 35 mode timings; for example:
mbed_official 87:085cde657901 36 FMC_NORSRAM_TimingTypeDef Timing and FMC_NORSRAM_TimingTypeDef ExTiming;
mbed_official 87:085cde657901 37 and fill its fields with the allowed values of the structure member.
mbed_official 87:085cde657901 38
mbed_official 87:085cde657901 39 (#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function
mbed_official 87:085cde657901 40 performs the following sequence:
mbed_official 87:085cde657901 41
mbed_official 87:085cde657901 42 (##) MSP hardware layer configuration using the function HAL_SRAM_MspInit()
mbed_official 87:085cde657901 43 (##) Control register configuration using the FMC NORSRAM interface function
mbed_official 87:085cde657901 44 FMC_NORSRAM_Init()
mbed_official 87:085cde657901 45 (##) Timing register configuration using the FMC NORSRAM interface function
mbed_official 87:085cde657901 46 FMC_NORSRAM_Timing_Init()
mbed_official 87:085cde657901 47 (##) Extended mode Timing register configuration using the FMC NORSRAM interface function
mbed_official 87:085cde657901 48 FMC_NORSRAM_Extended_Timing_Init()
mbed_official 87:085cde657901 49 (##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE()
mbed_official 87:085cde657901 50
mbed_official 87:085cde657901 51 (#) At this stage you can perform read/write accesses from/to the memory connected
mbed_official 87:085cde657901 52 to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the
mbed_official 87:085cde657901 53 following APIs:
mbed_official 87:085cde657901 54 (++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access
mbed_official 87:085cde657901 55 (++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer
mbed_official 87:085cde657901 56
mbed_official 87:085cde657901 57 (#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/
mbed_official 87:085cde657901 58 HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation
mbed_official 87:085cde657901 59
mbed_official 87:085cde657901 60 (#) You can continuously monitor the SRAM device HAL state by calling the function
mbed_official 87:085cde657901 61 HAL_SRAM_GetState()
mbed_official 87:085cde657901 62
mbed_official 87:085cde657901 63 @endverbatim
mbed_official 87:085cde657901 64 ******************************************************************************
mbed_official 87:085cde657901 65 * @attention
mbed_official 87:085cde657901 66 *
mbed_official 87:085cde657901 67 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 68 *
mbed_official 87:085cde657901 69 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 70 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 71 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 72 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 73 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 74 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 75 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 76 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 77 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 78 * without specific prior written permission.
mbed_official 87:085cde657901 79 *
mbed_official 87:085cde657901 80 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 81 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 82 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 83 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 84 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 85 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 86 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 87 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 88 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 89 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 90 *
mbed_official 87:085cde657901 91 ******************************************************************************
mbed_official 87:085cde657901 92 */
mbed_official 87:085cde657901 93
mbed_official 87:085cde657901 94 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 95 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 96
mbed_official 87:085cde657901 97 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 98 * @{
mbed_official 87:085cde657901 99 */
mbed_official 87:085cde657901 100
mbed_official 87:085cde657901 101 /** @defgroup SRAM
mbed_official 87:085cde657901 102 * @brief SRAM driver modules
mbed_official 87:085cde657901 103 * @{
mbed_official 87:085cde657901 104 */
mbed_official 87:085cde657901 105 #ifdef HAL_SRAM_MODULE_ENABLED
mbed_official 87:085cde657901 106
mbed_official 87:085cde657901 107 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 87:085cde657901 108
mbed_official 87:085cde657901 109 /* Private typedef -----------------------------------------------------------*/
mbed_official 87:085cde657901 110 /* Private define ------------------------------------------------------------*/
mbed_official 87:085cde657901 111 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 112 /* Private variables ---------------------------------------------------------*/
mbed_official 87:085cde657901 113 /* Private function prototypes -----------------------------------------------*/
mbed_official 87:085cde657901 114
mbed_official 87:085cde657901 115 /* Private functions ---------------------------------------------------------*/
mbed_official 87:085cde657901 116
mbed_official 87:085cde657901 117 /** @defgroup SRAM_Private_Functions
mbed_official 87:085cde657901 118 * @{
mbed_official 87:085cde657901 119 */
mbed_official 87:085cde657901 120
mbed_official 87:085cde657901 121 /** @defgroup SRAM_Group1 Initialization and de-initialization functions
mbed_official 87:085cde657901 122 * @brief Initialization and Configuration functions
mbed_official 87:085cde657901 123 *
mbed_official 87:085cde657901 124 @verbatim
mbed_official 87:085cde657901 125 ==============================================================================
mbed_official 87:085cde657901 126 ##### SRAM Initialization and de_initialization functions #####
mbed_official 87:085cde657901 127 ==============================================================================
mbed_official 87:085cde657901 128 [..] This section provides functions allowing to initialize/de-initialize
mbed_official 87:085cde657901 129 the SRAM memory
mbed_official 87:085cde657901 130
mbed_official 87:085cde657901 131 @endverbatim
mbed_official 87:085cde657901 132 * @{
mbed_official 87:085cde657901 133 */
mbed_official 87:085cde657901 134
mbed_official 87:085cde657901 135 /**
mbed_official 87:085cde657901 136 * @brief Performs the SRAM device initialization sequence
mbed_official 87:085cde657901 137 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 138 * @param Timing: Pointer to SRAM control timing structure
mbed_official 87:085cde657901 139 * @param ExtTiming: Pointer to SRAM extended mode timing structure
mbed_official 87:085cde657901 140 * @retval HAL status
mbed_official 87:085cde657901 141 */
mbed_official 87:085cde657901 142 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
mbed_official 87:085cde657901 143 {
mbed_official 87:085cde657901 144 /* Check the SRAM handle parameter */
mbed_official 87:085cde657901 145 if(hsram == NULL)
mbed_official 87:085cde657901 146 {
mbed_official 87:085cde657901 147 return HAL_ERROR;
mbed_official 87:085cde657901 148 }
mbed_official 87:085cde657901 149
mbed_official 87:085cde657901 150 if(hsram->State == HAL_SRAM_STATE_RESET)
mbed_official 87:085cde657901 151 {
mbed_official 87:085cde657901 152 /* Initialize the low level hardware (MSP) */
mbed_official 87:085cde657901 153 HAL_SRAM_MspInit(hsram);
mbed_official 87:085cde657901 154 }
mbed_official 87:085cde657901 155
mbed_official 87:085cde657901 156 /* Initialize SRAM control Interface */
mbed_official 87:085cde657901 157 FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
mbed_official 87:085cde657901 158
mbed_official 87:085cde657901 159 /* Initialize SRAM timing Interface */
mbed_official 87:085cde657901 160 FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
mbed_official 87:085cde657901 161
mbed_official 87:085cde657901 162 /* Initialize SRAM extended mode timing Interface */
mbed_official 87:085cde657901 163 FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, hsram->Init.ExtendedMode);
mbed_official 87:085cde657901 164
mbed_official 87:085cde657901 165 /* Enable the NORSRAM device */
mbed_official 87:085cde657901 166 __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
mbed_official 87:085cde657901 167
mbed_official 87:085cde657901 168 return HAL_OK;
mbed_official 87:085cde657901 169 }
mbed_official 87:085cde657901 170
mbed_official 87:085cde657901 171 /**
mbed_official 87:085cde657901 172 * @brief Performs the SRAM device De-initialization sequence.
mbed_official 87:085cde657901 173 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 174 * @retval HAL status
mbed_official 87:085cde657901 175 */
mbed_official 87:085cde657901 176 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 177 {
mbed_official 87:085cde657901 178 /* De-Initialize the low level hardware (MSP) */
mbed_official 87:085cde657901 179 HAL_SRAM_MspDeInit(hsram);
mbed_official 87:085cde657901 180
mbed_official 87:085cde657901 181 /* Configure the SRAM registers with their reset values */
mbed_official 87:085cde657901 182 FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank);
mbed_official 106:ced8cbb51063 183
mbed_official 106:ced8cbb51063 184 hsram->State = HAL_SRAM_STATE_RESET;
mbed_official 106:ced8cbb51063 185
mbed_official 106:ced8cbb51063 186 /* Release Lock */
mbed_official 106:ced8cbb51063 187 __HAL_UNLOCK(hsram);
mbed_official 106:ced8cbb51063 188
mbed_official 87:085cde657901 189 return HAL_OK;
mbed_official 87:085cde657901 190 }
mbed_official 87:085cde657901 191
mbed_official 87:085cde657901 192 /**
mbed_official 87:085cde657901 193 * @brief SRAM MSP Init.
mbed_official 87:085cde657901 194 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 195 * @retval None
mbed_official 87:085cde657901 196 */
mbed_official 87:085cde657901 197 __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 198 {
mbed_official 87:085cde657901 199 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 200 the HAL_SRAM_MspInit could be implemented in the user file
mbed_official 87:085cde657901 201 */
mbed_official 87:085cde657901 202 }
mbed_official 87:085cde657901 203
mbed_official 87:085cde657901 204 /**
mbed_official 87:085cde657901 205 * @brief SRAM MSP DeInit.
mbed_official 87:085cde657901 206 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 207 * @retval None
mbed_official 87:085cde657901 208 */
mbed_official 87:085cde657901 209 __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 210 {
mbed_official 87:085cde657901 211 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 212 the HAL_SRAM_MspDeInit could be implemented in the user file
mbed_official 87:085cde657901 213 */
mbed_official 87:085cde657901 214 }
mbed_official 87:085cde657901 215
mbed_official 87:085cde657901 216 /**
mbed_official 87:085cde657901 217 * @brief DMA transfer complete callback.
mbed_official 87:085cde657901 218 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 219 * @retval none
mbed_official 87:085cde657901 220 */
mbed_official 87:085cde657901 221 __weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 222 {
mbed_official 87:085cde657901 223 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 224 the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file
mbed_official 87:085cde657901 225 */
mbed_official 87:085cde657901 226 }
mbed_official 87:085cde657901 227
mbed_official 87:085cde657901 228 /**
mbed_official 87:085cde657901 229 * @brief DMA transfer complete error callback.
mbed_official 87:085cde657901 230 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 231 * @retval none
mbed_official 87:085cde657901 232 */
mbed_official 87:085cde657901 233 __weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 234 {
mbed_official 87:085cde657901 235 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 236 the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file
mbed_official 87:085cde657901 237 */
mbed_official 87:085cde657901 238 }
mbed_official 87:085cde657901 239
mbed_official 87:085cde657901 240 /**
mbed_official 87:085cde657901 241 * @}
mbed_official 87:085cde657901 242 */
mbed_official 87:085cde657901 243
mbed_official 87:085cde657901 244 /** @defgroup SRAM_Group2 Input and Output functions
mbed_official 87:085cde657901 245 * @brief Input Output and memory control functions
mbed_official 87:085cde657901 246 *
mbed_official 87:085cde657901 247 @verbatim
mbed_official 87:085cde657901 248 ==============================================================================
mbed_official 87:085cde657901 249 ##### SRAM Input and Output functions #####
mbed_official 87:085cde657901 250 ==============================================================================
mbed_official 87:085cde657901 251 [..]
mbed_official 87:085cde657901 252 This section provides functions allowing to use and control the SRAM memory
mbed_official 87:085cde657901 253
mbed_official 87:085cde657901 254 @endverbatim
mbed_official 87:085cde657901 255 * @{
mbed_official 87:085cde657901 256 */
mbed_official 87:085cde657901 257
mbed_official 87:085cde657901 258 /**
mbed_official 87:085cde657901 259 * @brief Reads 8-bit buffer from SRAM memory.
mbed_official 87:085cde657901 260 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 261 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 262 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 263 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 264 * @retval HAL status
mbed_official 87:085cde657901 265 */
mbed_official 87:085cde657901 266 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 267 {
mbed_official 87:085cde657901 268 __IO uint8_t * pSramAddress = (uint8_t *)pAddress;
mbed_official 87:085cde657901 269
mbed_official 87:085cde657901 270 /* Process Locked */
mbed_official 87:085cde657901 271 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 272
mbed_official 87:085cde657901 273 /* Update the SRAM controller state */
mbed_official 87:085cde657901 274 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 275
mbed_official 87:085cde657901 276 /* Read data from memory */
mbed_official 87:085cde657901 277 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 278 {
mbed_official 87:085cde657901 279 *pDstBuffer = *(__IO uint8_t *)pSramAddress;
mbed_official 87:085cde657901 280 pDstBuffer++;
mbed_official 87:085cde657901 281 pSramAddress++;
mbed_official 87:085cde657901 282 }
mbed_official 87:085cde657901 283
mbed_official 87:085cde657901 284 /* Update the SRAM controller state */
mbed_official 87:085cde657901 285 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 286
mbed_official 87:085cde657901 287 /* Process unlocked */
mbed_official 87:085cde657901 288 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 289
mbed_official 87:085cde657901 290 return HAL_OK;
mbed_official 87:085cde657901 291 }
mbed_official 87:085cde657901 292
mbed_official 87:085cde657901 293 /**
mbed_official 87:085cde657901 294 * @brief Writes 8-bit buffer to SRAM memory.
mbed_official 87:085cde657901 295 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 296 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 297 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 298 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 299 * @retval HAL status
mbed_official 87:085cde657901 300 */
mbed_official 87:085cde657901 301 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 302 {
mbed_official 87:085cde657901 303 __IO uint8_t * pSramAddress = (uint8_t *)pAddress;
mbed_official 87:085cde657901 304
mbed_official 87:085cde657901 305 /* Check the SRAM controller state */
mbed_official 87:085cde657901 306 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 87:085cde657901 307 {
mbed_official 87:085cde657901 308 return HAL_ERROR;
mbed_official 87:085cde657901 309 }
mbed_official 87:085cde657901 310
mbed_official 87:085cde657901 311 /* Process Locked */
mbed_official 87:085cde657901 312 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 313
mbed_official 87:085cde657901 314 /* Update the SRAM controller state */
mbed_official 87:085cde657901 315 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 316
mbed_official 87:085cde657901 317 /* Write data to memory */
mbed_official 87:085cde657901 318 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 319 {
mbed_official 87:085cde657901 320 *(__IO uint8_t *)pSramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 321 pSrcBuffer++;
mbed_official 87:085cde657901 322 pSramAddress++;
mbed_official 87:085cde657901 323 }
mbed_official 87:085cde657901 324
mbed_official 87:085cde657901 325 /* Update the SRAM controller state */
mbed_official 87:085cde657901 326 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 327
mbed_official 87:085cde657901 328 /* Process unlocked */
mbed_official 87:085cde657901 329 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 330
mbed_official 87:085cde657901 331 return HAL_OK;
mbed_official 87:085cde657901 332 }
mbed_official 87:085cde657901 333
mbed_official 87:085cde657901 334 /**
mbed_official 87:085cde657901 335 * @brief Reads 16-bit buffer from SRAM memory.
mbed_official 87:085cde657901 336 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 337 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 338 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 339 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 340 * @retval HAL status
mbed_official 87:085cde657901 341 */
mbed_official 87:085cde657901 342 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 343 {
mbed_official 87:085cde657901 344 __IO uint16_t * pSramAddress = (uint16_t *)pAddress;
mbed_official 87:085cde657901 345
mbed_official 87:085cde657901 346 /* Process Locked */
mbed_official 87:085cde657901 347 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 348
mbed_official 87:085cde657901 349 /* Update the SRAM controller state */
mbed_official 87:085cde657901 350 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 351
mbed_official 87:085cde657901 352 /* Read data from memory */
mbed_official 87:085cde657901 353 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 354 {
mbed_official 87:085cde657901 355 *pDstBuffer = *(__IO uint16_t *)pSramAddress;
mbed_official 87:085cde657901 356 pDstBuffer++;
mbed_official 87:085cde657901 357 pSramAddress++;
mbed_official 87:085cde657901 358 }
mbed_official 87:085cde657901 359
mbed_official 87:085cde657901 360 /* Update the SRAM controller state */
mbed_official 87:085cde657901 361 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 362
mbed_official 87:085cde657901 363 /* Process unlocked */
mbed_official 87:085cde657901 364 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 365
mbed_official 87:085cde657901 366 return HAL_OK;
mbed_official 87:085cde657901 367 }
mbed_official 87:085cde657901 368
mbed_official 87:085cde657901 369 /**
mbed_official 87:085cde657901 370 * @brief Writes 16-bit buffer to SRAM memory.
mbed_official 87:085cde657901 371 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 372 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 373 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 374 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 375 * @retval HAL status
mbed_official 87:085cde657901 376 */
mbed_official 87:085cde657901 377 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 378 {
mbed_official 87:085cde657901 379 __IO uint16_t * pSramAddress = (uint16_t *)pAddress;
mbed_official 87:085cde657901 380
mbed_official 87:085cde657901 381 /* Check the SRAM controller state */
mbed_official 87:085cde657901 382 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 87:085cde657901 383 {
mbed_official 87:085cde657901 384 return HAL_ERROR;
mbed_official 87:085cde657901 385 }
mbed_official 87:085cde657901 386
mbed_official 87:085cde657901 387 /* Process Locked */
mbed_official 87:085cde657901 388 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 389
mbed_official 87:085cde657901 390 /* Update the SRAM controller state */
mbed_official 87:085cde657901 391 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 392
mbed_official 87:085cde657901 393 /* Write data to memory */
mbed_official 87:085cde657901 394 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 395 {
mbed_official 87:085cde657901 396 *(__IO uint16_t *)pSramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 397 pSrcBuffer++;
mbed_official 87:085cde657901 398 pSramAddress++;
mbed_official 87:085cde657901 399 }
mbed_official 87:085cde657901 400
mbed_official 87:085cde657901 401 /* Update the SRAM controller state */
mbed_official 87:085cde657901 402 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 403
mbed_official 87:085cde657901 404 /* Process unlocked */
mbed_official 87:085cde657901 405 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 406
mbed_official 87:085cde657901 407 return HAL_OK;
mbed_official 87:085cde657901 408 }
mbed_official 87:085cde657901 409
mbed_official 87:085cde657901 410 /**
mbed_official 87:085cde657901 411 * @brief Reads 32-bit buffer from SRAM memory.
mbed_official 87:085cde657901 412 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 413 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 414 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 415 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 416 * @retval HAL status
mbed_official 87:085cde657901 417 */
mbed_official 87:085cde657901 418 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 419 {
mbed_official 87:085cde657901 420 /* Process Locked */
mbed_official 87:085cde657901 421 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 422
mbed_official 87:085cde657901 423 /* Update the SRAM controller state */
mbed_official 87:085cde657901 424 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 425
mbed_official 87:085cde657901 426 /* Read data from memory */
mbed_official 87:085cde657901 427 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 428 {
mbed_official 87:085cde657901 429 *pDstBuffer = *(__IO uint32_t *)pAddress;
mbed_official 87:085cde657901 430 pDstBuffer++;
mbed_official 87:085cde657901 431 pAddress++;
mbed_official 87:085cde657901 432 }
mbed_official 87:085cde657901 433
mbed_official 87:085cde657901 434 /* Update the SRAM controller state */
mbed_official 87:085cde657901 435 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 436
mbed_official 87:085cde657901 437 /* Process unlocked */
mbed_official 87:085cde657901 438 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 439
mbed_official 87:085cde657901 440 return HAL_OK;
mbed_official 87:085cde657901 441 }
mbed_official 87:085cde657901 442
mbed_official 87:085cde657901 443 /**
mbed_official 87:085cde657901 444 * @brief Writes 32-bit buffer to SRAM memory.
mbed_official 87:085cde657901 445 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 446 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 447 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 448 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 449 * @retval HAL status
mbed_official 87:085cde657901 450 */
mbed_official 87:085cde657901 451 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 452 {
mbed_official 87:085cde657901 453 /* Check the SRAM controller state */
mbed_official 87:085cde657901 454 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 87:085cde657901 455 {
mbed_official 87:085cde657901 456 return HAL_ERROR;
mbed_official 87:085cde657901 457 }
mbed_official 87:085cde657901 458
mbed_official 87:085cde657901 459 /* Process Locked */
mbed_official 87:085cde657901 460 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 461
mbed_official 87:085cde657901 462 /* Update the SRAM controller state */
mbed_official 87:085cde657901 463 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 464
mbed_official 87:085cde657901 465 /* Write data to memory */
mbed_official 87:085cde657901 466 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 467 {
mbed_official 87:085cde657901 468 *(__IO uint32_t *)pAddress = *pSrcBuffer;
mbed_official 87:085cde657901 469 pSrcBuffer++;
mbed_official 87:085cde657901 470 pAddress++;
mbed_official 87:085cde657901 471 }
mbed_official 87:085cde657901 472
mbed_official 87:085cde657901 473 /* Update the SRAM controller state */
mbed_official 87:085cde657901 474 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 475
mbed_official 87:085cde657901 476 /* Process unlocked */
mbed_official 87:085cde657901 477 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 478
mbed_official 87:085cde657901 479 return HAL_OK;
mbed_official 87:085cde657901 480 }
mbed_official 87:085cde657901 481
mbed_official 87:085cde657901 482 /**
mbed_official 87:085cde657901 483 * @brief Reads a Words data from the SRAM memory using DMA transfer.
mbed_official 87:085cde657901 484 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 485 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 486 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 487 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 488 * @retval HAL status
mbed_official 87:085cde657901 489 */
mbed_official 87:085cde657901 490 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 491 {
mbed_official 87:085cde657901 492 /* Process Locked */
mbed_official 87:085cde657901 493 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 494
mbed_official 87:085cde657901 495 /* Update the SRAM controller state */
mbed_official 87:085cde657901 496 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 497
mbed_official 87:085cde657901 498 /* Configure DMA user callbacks */
mbed_official 87:085cde657901 499 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
mbed_official 87:085cde657901 500 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
mbed_official 87:085cde657901 501
mbed_official 87:085cde657901 502 /* Enable the DMA Stream */
mbed_official 87:085cde657901 503 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
mbed_official 87:085cde657901 504
mbed_official 87:085cde657901 505 /* Update the SRAM controller state */
mbed_official 87:085cde657901 506 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 507
mbed_official 87:085cde657901 508 /* Process unlocked */
mbed_official 87:085cde657901 509 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 510
mbed_official 87:085cde657901 511 return HAL_OK;
mbed_official 87:085cde657901 512 }
mbed_official 87:085cde657901 513
mbed_official 87:085cde657901 514 /**
mbed_official 87:085cde657901 515 * @brief Writes a Words data buffer to SRAM memory using DMA transfer.
mbed_official 87:085cde657901 516 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 517 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 518 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 519 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 520 * @retval HAL status
mbed_official 87:085cde657901 521 */
mbed_official 87:085cde657901 522 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 523 {
mbed_official 87:085cde657901 524 /* Check the SRAM controller state */
mbed_official 87:085cde657901 525 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 87:085cde657901 526 {
mbed_official 87:085cde657901 527 return HAL_ERROR;
mbed_official 87:085cde657901 528 }
mbed_official 87:085cde657901 529
mbed_official 87:085cde657901 530 /* Process Locked */
mbed_official 87:085cde657901 531 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 532
mbed_official 87:085cde657901 533 /* Update the SRAM controller state */
mbed_official 87:085cde657901 534 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 535
mbed_official 87:085cde657901 536 /* Configure DMA user callbacks */
mbed_official 87:085cde657901 537 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
mbed_official 87:085cde657901 538 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
mbed_official 87:085cde657901 539
mbed_official 87:085cde657901 540 /* Enable the DMA Stream */
mbed_official 87:085cde657901 541 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
mbed_official 87:085cde657901 542
mbed_official 87:085cde657901 543 /* Update the SRAM controller state */
mbed_official 87:085cde657901 544 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 545
mbed_official 87:085cde657901 546 /* Process unlocked */
mbed_official 87:085cde657901 547 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 548
mbed_official 87:085cde657901 549 return HAL_OK;
mbed_official 87:085cde657901 550 }
mbed_official 87:085cde657901 551
mbed_official 87:085cde657901 552 /**
mbed_official 87:085cde657901 553 * @}
mbed_official 87:085cde657901 554 */
mbed_official 87:085cde657901 555
mbed_official 87:085cde657901 556 /** @defgroup SRAM_Group3 Control functions
mbed_official 87:085cde657901 557 * @brief management functions
mbed_official 87:085cde657901 558 *
mbed_official 87:085cde657901 559 @verbatim
mbed_official 87:085cde657901 560 ==============================================================================
mbed_official 87:085cde657901 561 ##### SRAM Control functions #####
mbed_official 87:085cde657901 562 ==============================================================================
mbed_official 87:085cde657901 563 [..]
mbed_official 87:085cde657901 564 This subsection provides a set of functions allowing to control dynamically
mbed_official 87:085cde657901 565 the SRAM interface.
mbed_official 87:085cde657901 566
mbed_official 87:085cde657901 567 @endverbatim
mbed_official 87:085cde657901 568 * @{
mbed_official 87:085cde657901 569 */
mbed_official 87:085cde657901 570
mbed_official 87:085cde657901 571 /**
mbed_official 87:085cde657901 572 * @brief Enables dynamically SRAM write operation.
mbed_official 87:085cde657901 573 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 574 * @retval HAL status
mbed_official 87:085cde657901 575 */
mbed_official 87:085cde657901 576 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 577 {
mbed_official 87:085cde657901 578 /* Process Locked */
mbed_official 87:085cde657901 579 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 580
mbed_official 87:085cde657901 581 /* Enable write operation */
mbed_official 87:085cde657901 582 FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank);
mbed_official 87:085cde657901 583
mbed_official 87:085cde657901 584 /* Update the SRAM controller state */
mbed_official 87:085cde657901 585 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 87:085cde657901 586
mbed_official 87:085cde657901 587 /* Process unlocked */
mbed_official 87:085cde657901 588 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 589
mbed_official 87:085cde657901 590 return HAL_OK;
mbed_official 87:085cde657901 591 }
mbed_official 87:085cde657901 592
mbed_official 87:085cde657901 593 /**
mbed_official 87:085cde657901 594 * @brief Disables dynamically SRAM write operation.
mbed_official 87:085cde657901 595 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 596 * @retval HAL status
mbed_official 87:085cde657901 597 */
mbed_official 87:085cde657901 598 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 599 {
mbed_official 87:085cde657901 600 /* Process Locked */
mbed_official 87:085cde657901 601 __HAL_LOCK(hsram);
mbed_official 87:085cde657901 602
mbed_official 87:085cde657901 603 /* Update the SRAM controller state */
mbed_official 87:085cde657901 604 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 87:085cde657901 605
mbed_official 87:085cde657901 606 /* Disable write operation */
mbed_official 87:085cde657901 607 FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank);
mbed_official 87:085cde657901 608
mbed_official 87:085cde657901 609 /* Update the SRAM controller state */
mbed_official 87:085cde657901 610 hsram->State = HAL_SRAM_STATE_PROTECTED;
mbed_official 87:085cde657901 611
mbed_official 87:085cde657901 612 /* Process unlocked */
mbed_official 87:085cde657901 613 __HAL_UNLOCK(hsram);
mbed_official 87:085cde657901 614
mbed_official 87:085cde657901 615 return HAL_OK;
mbed_official 87:085cde657901 616 }
mbed_official 87:085cde657901 617
mbed_official 87:085cde657901 618 /**
mbed_official 87:085cde657901 619 * @}
mbed_official 87:085cde657901 620 */
mbed_official 87:085cde657901 621
mbed_official 87:085cde657901 622 /** @defgroup SRAM_Group4 State functions
mbed_official 87:085cde657901 623 * @brief Peripheral State functions
mbed_official 87:085cde657901 624 *
mbed_official 87:085cde657901 625 @verbatim
mbed_official 87:085cde657901 626 ==============================================================================
mbed_official 87:085cde657901 627 ##### SRAM State functions #####
mbed_official 87:085cde657901 628 ==============================================================================
mbed_official 87:085cde657901 629 [..]
mbed_official 87:085cde657901 630 This subsection permits to get in run-time the status of the SRAM controller
mbed_official 87:085cde657901 631 and the data flow.
mbed_official 87:085cde657901 632
mbed_official 87:085cde657901 633 @endverbatim
mbed_official 87:085cde657901 634 * @{
mbed_official 87:085cde657901 635 */
mbed_official 87:085cde657901 636
mbed_official 87:085cde657901 637 /**
mbed_official 87:085cde657901 638 * @brief Returns the SRAM controller state
mbed_official 87:085cde657901 639 * @param hsram: pointer to SRAM handle
mbed_official 87:085cde657901 640 * @retval SRAM controller state
mbed_official 87:085cde657901 641 */
mbed_official 87:085cde657901 642 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
mbed_official 87:085cde657901 643 {
mbed_official 87:085cde657901 644 return hsram->State;
mbed_official 87:085cde657901 645 }
mbed_official 87:085cde657901 646
mbed_official 87:085cde657901 647 /**
mbed_official 87:085cde657901 648 * @}
mbed_official 87:085cde657901 649 */
mbed_official 87:085cde657901 650
mbed_official 87:085cde657901 651 /**
mbed_official 87:085cde657901 652 * @}
mbed_official 87:085cde657901 653 */
mbed_official 87:085cde657901 654 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 87:085cde657901 655 #endif /* HAL_SRAM_MODULE_ENABLED */
mbed_official 87:085cde657901 656 /**
mbed_official 87:085cde657901 657 * @}
mbed_official 87:085cde657901 658 */
mbed_official 87:085cde657901 659
mbed_official 87:085cde657901 660 /**
mbed_official 87:085cde657901 661 * @}
mbed_official 87:085cde657901 662 */
mbed_official 87:085cde657901 663
mbed_official 87:085cde657901 664 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/