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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_pwr.h@106:ced8cbb51063, 2014-02-26 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Feb 26 09:45:12 2014 +0000
- Revision:
- 106:ced8cbb51063
- Parent:
- 87:085cde657901
Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd
Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/
[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license
Who changed what in which revision?
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mbed_official | 87:085cde657901 | 1 | /** |
mbed_official | 87:085cde657901 | 2 | ****************************************************************************** |
mbed_official | 87:085cde657901 | 3 | * @file stm32f4xx_hal_pwr.h |
mbed_official | 87:085cde657901 | 4 | * @author MCD Application Team |
mbed_official | 106:ced8cbb51063 | 5 | * @version V1.0.0 |
mbed_official | 106:ced8cbb51063 | 6 | * @date 18-February-2014 |
mbed_official | 87:085cde657901 | 7 | * @brief Header file of PWR HAL module. |
mbed_official | 87:085cde657901 | 8 | ****************************************************************************** |
mbed_official | 87:085cde657901 | 9 | * @attention |
mbed_official | 87:085cde657901 | 10 | * |
mbed_official | 87:085cde657901 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 87:085cde657901 | 12 | * |
mbed_official | 87:085cde657901 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 87:085cde657901 | 14 | * are permitted provided that the following conditions are met: |
mbed_official | 87:085cde657901 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 87:085cde657901 | 16 | * this list of conditions and the following disclaimer. |
mbed_official | 87:085cde657901 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 87:085cde657901 | 18 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 87:085cde657901 | 19 | * and/or other materials provided with the distribution. |
mbed_official | 87:085cde657901 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 87:085cde657901 | 21 | * may be used to endorse or promote products derived from this software |
mbed_official | 87:085cde657901 | 22 | * without specific prior written permission. |
mbed_official | 87:085cde657901 | 23 | * |
mbed_official | 87:085cde657901 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 87:085cde657901 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 87:085cde657901 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 87:085cde657901 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 87:085cde657901 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 87:085cde657901 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 87:085cde657901 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 87:085cde657901 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 87:085cde657901 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 87:085cde657901 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 87:085cde657901 | 34 | * |
mbed_official | 87:085cde657901 | 35 | ****************************************************************************** |
mbed_official | 87:085cde657901 | 36 | */ |
mbed_official | 87:085cde657901 | 37 | |
mbed_official | 87:085cde657901 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
mbed_official | 87:085cde657901 | 39 | #ifndef __STM32F4xx_HAL_PWR_H |
mbed_official | 87:085cde657901 | 40 | #define __STM32F4xx_HAL_PWR_H |
mbed_official | 87:085cde657901 | 41 | |
mbed_official | 87:085cde657901 | 42 | #ifdef __cplusplus |
mbed_official | 87:085cde657901 | 43 | extern "C" { |
mbed_official | 87:085cde657901 | 44 | #endif |
mbed_official | 87:085cde657901 | 45 | |
mbed_official | 87:085cde657901 | 46 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 47 | #include "stm32f4xx_hal_def.h" |
mbed_official | 87:085cde657901 | 48 | |
mbed_official | 87:085cde657901 | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 87:085cde657901 | 50 | * @{ |
mbed_official | 87:085cde657901 | 51 | */ |
mbed_official | 87:085cde657901 | 52 | |
mbed_official | 87:085cde657901 | 53 | /** @addtogroup PWR |
mbed_official | 87:085cde657901 | 54 | * @{ |
mbed_official | 87:085cde657901 | 55 | */ |
mbed_official | 87:085cde657901 | 56 | |
mbed_official | 87:085cde657901 | 57 | /* Exported types ------------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 58 | /** |
mbed_official | 87:085cde657901 | 59 | * @brief PWR PVD configuration structure definition |
mbed_official | 87:085cde657901 | 60 | */ |
mbed_official | 87:085cde657901 | 61 | typedef struct |
mbed_official | 87:085cde657901 | 62 | { |
mbed_official | 87:085cde657901 | 63 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level |
mbed_official | 87:085cde657901 | 64 | This parameter can be a value of @ref PWR_PVD_detection_level */ |
mbed_official | 87:085cde657901 | 65 | |
mbed_official | 87:085cde657901 | 66 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
mbed_official | 87:085cde657901 | 67 | This parameter can be a value of @ref PWR_PVD_Mode */ |
mbed_official | 87:085cde657901 | 68 | }PWR_PVDTypeDef; |
mbed_official | 87:085cde657901 | 69 | |
mbed_official | 87:085cde657901 | 70 | /* Exported constants --------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 71 | /* ------------- PWR registers bit address in the alias region ---------------*/ |
mbed_official | 87:085cde657901 | 72 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) |
mbed_official | 87:085cde657901 | 73 | |
mbed_official | 87:085cde657901 | 74 | /* --- CR Register ---*/ |
mbed_official | 87:085cde657901 | 75 | /* Alias word address of DBP bit */ |
mbed_official | 87:085cde657901 | 76 | #define CR_OFFSET (PWR_OFFSET + 0x00) |
mbed_official | 87:085cde657901 | 77 | #define DBP_BitNumber 0x08 |
mbed_official | 87:085cde657901 | 78 | #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4)) |
mbed_official | 87:085cde657901 | 79 | |
mbed_official | 87:085cde657901 | 80 | /* Alias word address of PVDE bit */ |
mbed_official | 87:085cde657901 | 81 | #define PVDE_BitNumber 0x04 |
mbed_official | 87:085cde657901 | 82 | #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4)) |
mbed_official | 87:085cde657901 | 83 | |
mbed_official | 87:085cde657901 | 84 | /* Alias word address of FPDS bit */ |
mbed_official | 87:085cde657901 | 85 | #define FPDS_BitNumber 0x09 |
mbed_official | 87:085cde657901 | 86 | #define CR_FPDS_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (FPDS_BitNumber * 4)) |
mbed_official | 87:085cde657901 | 87 | |
mbed_official | 87:085cde657901 | 88 | /* Alias word address of PMODE bit */ |
mbed_official | 87:085cde657901 | 89 | #define PMODE_BitNumber 0x0E |
mbed_official | 87:085cde657901 | 90 | #define CR_PMODE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PMODE_BitNumber * 4)) |
mbed_official | 87:085cde657901 | 91 | |
mbed_official | 87:085cde657901 | 92 | /* --- CSR Register ---*/ |
mbed_official | 87:085cde657901 | 93 | /* Alias word address of EWUP bit */ |
mbed_official | 87:085cde657901 | 94 | #define CSR_OFFSET (PWR_OFFSET + 0x04) |
mbed_official | 87:085cde657901 | 95 | #define EWUP_BitNumber 0x08 |
mbed_official | 87:085cde657901 | 96 | #define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4)) |
mbed_official | 87:085cde657901 | 97 | |
mbed_official | 87:085cde657901 | 98 | /* Alias word address of BRE bit */ |
mbed_official | 87:085cde657901 | 99 | #define BRE_BitNumber 0x09 |
mbed_official | 87:085cde657901 | 100 | #define CSR_BRE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (BRE_BitNumber * 4)) |
mbed_official | 87:085cde657901 | 101 | |
mbed_official | 87:085cde657901 | 102 | /** @defgroup PWR_Exported_Constants |
mbed_official | 87:085cde657901 | 103 | * @{ |
mbed_official | 87:085cde657901 | 104 | */ |
mbed_official | 87:085cde657901 | 105 | |
mbed_official | 87:085cde657901 | 106 | /** @defgroup PWR_WakeUp_Pins |
mbed_official | 87:085cde657901 | 107 | * @{ |
mbed_official | 87:085cde657901 | 108 | */ |
mbed_official | 87:085cde657901 | 109 | |
mbed_official | 87:085cde657901 | 110 | #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP |
mbed_official | 87:085cde657901 | 111 | #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1) |
mbed_official | 87:085cde657901 | 112 | /** |
mbed_official | 87:085cde657901 | 113 | * @} |
mbed_official | 87:085cde657901 | 114 | */ |
mbed_official | 87:085cde657901 | 115 | |
mbed_official | 87:085cde657901 | 116 | /** @defgroup PWR_PVD_detection_level |
mbed_official | 87:085cde657901 | 117 | * @{ |
mbed_official | 87:085cde657901 | 118 | */ |
mbed_official | 87:085cde657901 | 119 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 |
mbed_official | 87:085cde657901 | 120 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 |
mbed_official | 87:085cde657901 | 121 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 |
mbed_official | 87:085cde657901 | 122 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 |
mbed_official | 87:085cde657901 | 123 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 |
mbed_official | 87:085cde657901 | 124 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 |
mbed_official | 87:085cde657901 | 125 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 |
mbed_official | 87:085cde657901 | 126 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 |
mbed_official | 87:085cde657901 | 127 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
mbed_official | 87:085cde657901 | 128 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
mbed_official | 87:085cde657901 | 129 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
mbed_official | 87:085cde657901 | 130 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
mbed_official | 87:085cde657901 | 131 | /** |
mbed_official | 87:085cde657901 | 132 | * @} |
mbed_official | 87:085cde657901 | 133 | */ |
mbed_official | 87:085cde657901 | 134 | |
mbed_official | 87:085cde657901 | 135 | /** @defgroup PWR_PVD_Mode |
mbed_official | 87:085cde657901 | 136 | * @{ |
mbed_official | 87:085cde657901 | 137 | */ |
mbed_official | 87:085cde657901 | 138 | #define PWR_MODE_EVT ((uint32_t)0x00000000) /*!< No Interrupt */ |
mbed_official | 87:085cde657901 | 139 | #define PWR_MODE_IT_RISING ((uint32_t)0x00000001) /*!< External Interrupt Mode with Rising edge trigger detection */ |
mbed_official | 87:085cde657901 | 140 | #define PWR_MODE_IT_FALLING ((uint32_t)0x00000002) /*!< External Interrupt Mode with Falling edge trigger detection */ |
mbed_official | 87:085cde657901 | 141 | #define PWR_MODE_IT_RISING_FALLING ((uint32_t)0x00000003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
mbed_official | 87:085cde657901 | 142 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_MODE_EVT) || ((MODE) == PWR_MODE_IT_RISING)|| \ |
mbed_official | 87:085cde657901 | 143 | ((MODE) == PWR_MODE_IT_FALLING) || ((MODE) == PWR_MODE_IT_RISING_FALLING)) |
mbed_official | 87:085cde657901 | 144 | /** |
mbed_official | 87:085cde657901 | 145 | * @} |
mbed_official | 87:085cde657901 | 146 | */ |
mbed_official | 87:085cde657901 | 147 | |
mbed_official | 87:085cde657901 | 148 | /** @defgroup PWR_Regulator_state_in_STOP_mode |
mbed_official | 87:085cde657901 | 149 | * @{ |
mbed_official | 87:085cde657901 | 150 | */ |
mbed_official | 87:085cde657901 | 151 | #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) |
mbed_official | 87:085cde657901 | 152 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS |
mbed_official | 87:085cde657901 | 153 | |
mbed_official | 87:085cde657901 | 154 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ |
mbed_official | 87:085cde657901 | 155 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) |
mbed_official | 87:085cde657901 | 156 | /** |
mbed_official | 87:085cde657901 | 157 | * @} |
mbed_official | 87:085cde657901 | 158 | */ |
mbed_official | 87:085cde657901 | 159 | |
mbed_official | 87:085cde657901 | 160 | /** @defgroup PWR_SLEEP_mode_entry |
mbed_official | 87:085cde657901 | 161 | * @{ |
mbed_official | 87:085cde657901 | 162 | */ |
mbed_official | 87:085cde657901 | 163 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) |
mbed_official | 87:085cde657901 | 164 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) |
mbed_official | 87:085cde657901 | 165 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) |
mbed_official | 87:085cde657901 | 166 | /** |
mbed_official | 87:085cde657901 | 167 | * @} |
mbed_official | 87:085cde657901 | 168 | */ |
mbed_official | 87:085cde657901 | 169 | |
mbed_official | 87:085cde657901 | 170 | /** @defgroup PWR_STOP_mode_entry |
mbed_official | 87:085cde657901 | 171 | * @{ |
mbed_official | 87:085cde657901 | 172 | */ |
mbed_official | 87:085cde657901 | 173 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01) |
mbed_official | 87:085cde657901 | 174 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02) |
mbed_official | 87:085cde657901 | 175 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) |
mbed_official | 87:085cde657901 | 176 | /** |
mbed_official | 87:085cde657901 | 177 | * @} |
mbed_official | 87:085cde657901 | 178 | */ |
mbed_official | 87:085cde657901 | 179 | |
mbed_official | 87:085cde657901 | 180 | /** @defgroup PWR_Regulator_Voltage_Scale |
mbed_official | 87:085cde657901 | 181 | * @{ |
mbed_official | 87:085cde657901 | 182 | */ |
mbed_official | 87:085cde657901 | 183 | #define PWR_REGULATOR_VOLTAGE_SCALE1 ((uint32_t)0x0000C000) |
mbed_official | 87:085cde657901 | 184 | #define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00008000) |
mbed_official | 87:085cde657901 | 185 | #define PWR_REGULATOR_VOLTAGE_SCALE3 ((uint32_t)0x00004000) |
mbed_official | 87:085cde657901 | 186 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ |
mbed_official | 87:085cde657901 | 187 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ |
mbed_official | 87:085cde657901 | 188 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) |
mbed_official | 87:085cde657901 | 189 | /** |
mbed_official | 87:085cde657901 | 190 | * @} |
mbed_official | 87:085cde657901 | 191 | */ |
mbed_official | 87:085cde657901 | 192 | |
mbed_official | 87:085cde657901 | 193 | /** @defgroup PWR_Flag |
mbed_official | 87:085cde657901 | 194 | * @{ |
mbed_official | 87:085cde657901 | 195 | */ |
mbed_official | 87:085cde657901 | 196 | #define PWR_FLAG_WU PWR_CSR_WUF |
mbed_official | 87:085cde657901 | 197 | #define PWR_FLAG_SB PWR_CSR_SBF |
mbed_official | 87:085cde657901 | 198 | #define PWR_FLAG_PVDO PWR_CSR_PVDO |
mbed_official | 87:085cde657901 | 199 | #define PWR_FLAG_BRR PWR_CSR_BRR |
mbed_official | 87:085cde657901 | 200 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY |
mbed_official | 87:085cde657901 | 201 | |
mbed_official | 87:085cde657901 | 202 | /** |
mbed_official | 87:085cde657901 | 203 | * @} |
mbed_official | 87:085cde657901 | 204 | */ |
mbed_official | 87:085cde657901 | 205 | |
mbed_official | 87:085cde657901 | 206 | /** |
mbed_official | 87:085cde657901 | 207 | * @} |
mbed_official | 87:085cde657901 | 208 | */ |
mbed_official | 87:085cde657901 | 209 | |
mbed_official | 87:085cde657901 | 210 | /* Exported macro ------------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 211 | |
mbed_official | 87:085cde657901 | 212 | /** @brief macros configure the main internal regulator output voltage. |
mbed_official | 87:085cde657901 | 213 | * @param __REGULATOR__: specifies the regulator output voltage to achieve |
mbed_official | 87:085cde657901 | 214 | * a tradeoff between performance and power consumption when the device does |
mbed_official | 87:085cde657901 | 215 | * not operate at the maximum frequency (refer to the datasheets for more details). |
mbed_official | 87:085cde657901 | 216 | * This parameter can be one of the following values: |
mbed_official | 87:085cde657901 | 217 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode |
mbed_official | 87:085cde657901 | 218 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode |
mbed_official | 87:085cde657901 | 219 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode |
mbed_official | 87:085cde657901 | 220 | * @retval None |
mbed_official | 87:085cde657901 | 221 | */ |
mbed_official | 87:085cde657901 | 222 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__))) |
mbed_official | 87:085cde657901 | 223 | |
mbed_official | 87:085cde657901 | 224 | /** @brief Check PWR flag is set or not. |
mbed_official | 87:085cde657901 | 225 | * @param __FLAG__: specifies the flag to check. |
mbed_official | 87:085cde657901 | 226 | * This parameter can be one of the following values: |
mbed_official | 87:085cde657901 | 227 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
mbed_official | 87:085cde657901 | 228 | * was received from the WKUP pin or from the RTC alarm (Alarm A |
mbed_official | 87:085cde657901 | 229 | * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
mbed_official | 87:085cde657901 | 230 | * An additional wakeup event is detected if the WKUP pin is enabled |
mbed_official | 87:085cde657901 | 231 | * (by setting the EWUP bit) when the WKUP pin level is already high. |
mbed_official | 87:085cde657901 | 232 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
mbed_official | 87:085cde657901 | 233 | * resumed from StandBy mode. |
mbed_official | 87:085cde657901 | 234 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
mbed_official | 87:085cde657901 | 235 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
mbed_official | 87:085cde657901 | 236 | * For this reason, this bit is equal to 0 after Standby or reset |
mbed_official | 87:085cde657901 | 237 | * until the PVDE bit is set. |
mbed_official | 87:085cde657901 | 238 | * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset |
mbed_official | 87:085cde657901 | 239 | * when the device wakes up from Standby mode or by a system reset |
mbed_official | 87:085cde657901 | 240 | * or power reset. |
mbed_official | 87:085cde657901 | 241 | * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage |
mbed_official | 87:085cde657901 | 242 | * scaling output selection is ready. |
mbed_official | 87:085cde657901 | 243 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
mbed_official | 87:085cde657901 | 244 | */ |
mbed_official | 87:085cde657901 | 245 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) |
mbed_official | 87:085cde657901 | 246 | |
mbed_official | 87:085cde657901 | 247 | /** @brief Clear the PWR's pending flags. |
mbed_official | 87:085cde657901 | 248 | * @param __FLAG__: specifies the flag to clear. |
mbed_official | 87:085cde657901 | 249 | * This parameter can be one of the following values: |
mbed_official | 87:085cde657901 | 250 | * @arg PWR_FLAG_WU: Wake Up flag |
mbed_official | 87:085cde657901 | 251 | * @arg PWR_FLAG_SB: StandBy flag |
mbed_official | 87:085cde657901 | 252 | */ |
mbed_official | 87:085cde657901 | 253 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2) |
mbed_official | 87:085cde657901 | 254 | |
mbed_official | 87:085cde657901 | 255 | #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
mbed_official | 87:085cde657901 | 256 | /** |
mbed_official | 87:085cde657901 | 257 | * @brief Enable the PVD Exti Line. |
mbed_official | 87:085cde657901 | 258 | * @param __EXTILINE__: specifies the PVD Exti sources to be enabled. |
mbed_official | 87:085cde657901 | 259 | * This parameter can be: |
mbed_official | 87:085cde657901 | 260 | * @arg PWR_EXTI_LINE_PVD |
mbed_official | 87:085cde657901 | 261 | * @retval None. |
mbed_official | 87:085cde657901 | 262 | */ |
mbed_official | 87:085cde657901 | 263 | #define __HAL_PVD_EXTI_ENABLE_IT(__EXTILINE__) (EXTI->IMR |= (__EXTILINE__)) |
mbed_official | 87:085cde657901 | 264 | |
mbed_official | 87:085cde657901 | 265 | /** |
mbed_official | 87:085cde657901 | 266 | * @brief Disable the PVD EXTI Line. |
mbed_official | 87:085cde657901 | 267 | * @param __EXTILINE__: specifies the PVD EXTI sources to be disabled. |
mbed_official | 87:085cde657901 | 268 | * This parameter can be: |
mbed_official | 87:085cde657901 | 269 | * @arg PWR_EXTI_LINE_PVD |
mbed_official | 87:085cde657901 | 270 | * @retval None. |
mbed_official | 87:085cde657901 | 271 | */ |
mbed_official | 87:085cde657901 | 272 | #define __HAL_PVD_EXTI_DISABLE_IT(__EXTILINE__) (EXTI->IMR &= ~(__EXTILINE__)) |
mbed_official | 87:085cde657901 | 273 | |
mbed_official | 87:085cde657901 | 274 | /** |
mbed_official | 87:085cde657901 | 275 | * @brief checks whether the specified PVD Exti interrupt flag is set or not. |
mbed_official | 87:085cde657901 | 276 | * @param __EXTILINE__: specifies the PVD Exti sources to be cleared. |
mbed_official | 87:085cde657901 | 277 | * This parameter can be: |
mbed_official | 87:085cde657901 | 278 | * @arg PWR_EXTI_LINE_PVD |
mbed_official | 87:085cde657901 | 279 | * @retval EXTI PVD Line Status. |
mbed_official | 87:085cde657901 | 280 | */ |
mbed_official | 87:085cde657901 | 281 | #define __HAL_PVD_EXTI_GET_FLAG(__EXTILINE__) (EXTI->PR & (__EXTILINE__)) |
mbed_official | 87:085cde657901 | 282 | |
mbed_official | 87:085cde657901 | 283 | /** |
mbed_official | 87:085cde657901 | 284 | * @brief Clear the PVD Exti flag. |
mbed_official | 87:085cde657901 | 285 | * @param __EXTILINE__: specifies the PVD Exti sources to be cleared. |
mbed_official | 87:085cde657901 | 286 | * This parameter can be: |
mbed_official | 87:085cde657901 | 287 | * @arg PWR_EXTI_LINE_PVD |
mbed_official | 87:085cde657901 | 288 | * @retval None. |
mbed_official | 87:085cde657901 | 289 | */ |
mbed_official | 87:085cde657901 | 290 | #define __HAL_PVD_EXTI_CLEAR_FLAG(__EXTILINE__) (EXTI->PR = (__EXTILINE__)) |
mbed_official | 87:085cde657901 | 291 | |
mbed_official | 87:085cde657901 | 292 | |
mbed_official | 87:085cde657901 | 293 | /* Include PWR HAL Extension module */ |
mbed_official | 87:085cde657901 | 294 | #include "stm32f4xx_hal_pwr_ex.h" |
mbed_official | 87:085cde657901 | 295 | |
mbed_official | 87:085cde657901 | 296 | /* Exported functions --------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 297 | |
mbed_official | 87:085cde657901 | 298 | /* Initialization and de-initialization functions *******************************/ |
mbed_official | 87:085cde657901 | 299 | void HAL_PWR_DeInit(void); |
mbed_official | 87:085cde657901 | 300 | void HAL_PWR_EnableBkUpAccess(void); |
mbed_official | 87:085cde657901 | 301 | void HAL_PWR_DisableBkUpAccess(void); |
mbed_official | 87:085cde657901 | 302 | |
mbed_official | 87:085cde657901 | 303 | /* Peripheral Control functions ************************************************/ |
mbed_official | 87:085cde657901 | 304 | void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD); |
mbed_official | 87:085cde657901 | 305 | void HAL_PWR_EnablePVD(void); |
mbed_official | 87:085cde657901 | 306 | void HAL_PWR_DisablePVD(void); |
mbed_official | 87:085cde657901 | 307 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); |
mbed_official | 87:085cde657901 | 308 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); |
mbed_official | 87:085cde657901 | 309 | |
mbed_official | 87:085cde657901 | 310 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
mbed_official | 87:085cde657901 | 311 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); |
mbed_official | 87:085cde657901 | 312 | void HAL_PWR_EnterSTANDBYMode(void); |
mbed_official | 87:085cde657901 | 313 | |
mbed_official | 87:085cde657901 | 314 | void HAL_PWR_PVD_IRQHandler(void); |
mbed_official | 106:ced8cbb51063 | 315 | void HAL_PWR_PVDCallback(void); |
mbed_official | 87:085cde657901 | 316 | |
mbed_official | 87:085cde657901 | 317 | |
mbed_official | 87:085cde657901 | 318 | /** |
mbed_official | 87:085cde657901 | 319 | * @} |
mbed_official | 87:085cde657901 | 320 | */ |
mbed_official | 87:085cde657901 | 321 | |
mbed_official | 87:085cde657901 | 322 | /** |
mbed_official | 87:085cde657901 | 323 | * @} |
mbed_official | 87:085cde657901 | 324 | */ |
mbed_official | 87:085cde657901 | 325 | |
mbed_official | 87:085cde657901 | 326 | #ifdef __cplusplus |
mbed_official | 87:085cde657901 | 327 | } |
mbed_official | 87:085cde657901 | 328 | #endif |
mbed_official | 87:085cde657901 | 329 | |
mbed_official | 87:085cde657901 | 330 | |
mbed_official | 87:085cde657901 | 331 | #endif /* __STM32F4xx_HAL_PWR_H */ |
mbed_official | 87:085cde657901 | 332 | |
mbed_official | 87:085cde657901 | 333 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |