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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_dma2d.c@106:ced8cbb51063, 2014-02-26 (annotated)

Committer:
mbed_official
Date:
Wed Feb 26 09:45:12 2014 +0000
Revision:
106:ced8cbb51063
Parent:
87:085cde657901 
Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd



Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/



[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_dma2d.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 106:ced8cbb51063 5 * @version V1.0.0
mbed_official 106:ced8cbb51063 6 * @date 18-February-2014
mbed_official 87:085cde657901 7 * @brief DMA2D HAL module driver.
mbed_official 87:085cde657901 8 * This file provides firmware functions to manage the following
mbed_official 87:085cde657901 9 * functionalities of the DMA2D peripheral:
mbed_official 87:085cde657901 10 * + Initialization and de-initialization functions
mbed_official 87:085cde657901 11 * + IO operation functions
mbed_official 87:085cde657901 12 * + Peripheral Control functions
mbed_official 87:085cde657901 13 * + Peripheral State and Errors functions
mbed_official 87:085cde657901 14 *
mbed_official 87:085cde657901 15 @verbatim
mbed_official 87:085cde657901 16 ==============================================================================
mbed_official 87:085cde657901 17 ##### How to use this driver #####
mbed_official 87:085cde657901 18 ==============================================================================
mbed_official 87:085cde657901 19 [..]
mbed_official 87:085cde657901 20 (#) Program the required configuration through following parameters:
mbed_official 87:085cde657901 21 the Transfer Mode, the output color mode and the output offset using
mbed_official 87:085cde657901 22 HAL_DMA2D_Init() function.
mbed_official 87:085cde657901 23
mbed_official 87:085cde657901 24 (#) Program the required configuration through following parameters:
mbed_official 87:085cde657901 25 the input color mode, the input color, input alpha value, alpha mode
mbed_official 87:085cde657901 26 and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
mbed_official 87:085cde657901 27 or/and background layer.
mbed_official 87:085cde657901 28
mbed_official 87:085cde657901 29 *** Polling mode IO operation ***
mbed_official 87:085cde657901 30 =================================
mbed_official 87:085cde657901 31 [..]
mbed_official 87:085cde657901 32 (+) Configure the pdata, Destination and data length and Enable
mbed_official 87:085cde657901 33 the transfer using HAL_DMA2D_Start()
mbed_official 87:085cde657901 34 (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
mbed_official 87:085cde657901 35 user can specify the value of timeout according to his end application.
mbed_official 87:085cde657901 36
mbed_official 87:085cde657901 37 *** Interrupt mode IO operation ***
mbed_official 87:085cde657901 38 ===================================
mbed_official 87:085cde657901 39 [..]
mbed_official 87:085cde657901 40 (#) Configure the pdata, Destination and data length and Enable
mbed_official 87:085cde657901 41 the transfer using HAL_DMA2D_Start_IT()
mbed_official 87:085cde657901 42 (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
mbed_official 87:085cde657901 43 (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
mbed_official 87:085cde657901 44 add his own function by customization of function pointer XferCpltCallback and
mbed_official 87:085cde657901 45 XferErrorCallback (i.e a member of DMA2D handle structure).
mbed_official 87:085cde657901 46
mbed_official 87:085cde657901 47 -@- In Register-to-Memory transfer mode, the pdata parameter is the register
mbed_official 87:085cde657901 48 color, in Memory-to-memory or memory-to-memory with pixel format
mbed_official 87:085cde657901 49 conversion the pdata is the source address and it is the color value
mbed_official 87:085cde657901 50 for the A4 or A8 mode.
mbed_official 87:085cde657901 51
mbed_official 87:085cde657901 52 -@- Configure the foreground source address, the background source address,
mbed_official 87:085cde657901 53 the Destination and data length and Enable the transfer using
mbed_official 87:085cde657901 54 HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
mbed_official 87:085cde657901 55 in interrupt mode.
mbed_official 87:085cde657901 56
mbed_official 87:085cde657901 57 -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
mbed_official 87:085cde657901 58 are used if the memory to memory with blending transfer mode is selected.
mbed_official 87:085cde657901 59
mbed_official 87:085cde657901 60 (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
mbed_official 87:085cde657901 61 HAL_DMA2D_EnableCLUT() functions.
mbed_official 87:085cde657901 62
mbed_official 87:085cde657901 63 (#) Optionally, configure and enable LineInterrupt using the following function:
mbed_official 87:085cde657901 64 HAL_DMA2D_ProgramLineEvent().
mbed_official 87:085cde657901 65
mbed_official 87:085cde657901 66 (#) The transfer can be suspended, continued and aborted using the following
mbed_official 87:085cde657901 67 functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
mbed_official 87:085cde657901 68
mbed_official 87:085cde657901 69 (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
mbed_official 87:085cde657901 70
mbed_official 87:085cde657901 71 *** DMA2D HAL driver macros list ***
mbed_official 87:085cde657901 72 =============================================
mbed_official 87:085cde657901 73 [..]
mbed_official 87:085cde657901 74 Below the list of most used macros in DMA2D HAL driver.
mbed_official 87:085cde657901 75
mbed_official 87:085cde657901 76 (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
mbed_official 87:085cde657901 77 (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
mbed_official 87:085cde657901 78 (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
mbed_official 87:085cde657901 79 (+) __HAL_DMA2D_CLEAR_FLAG: Clears the DMA2D pending flags.
mbed_official 87:085cde657901 80 (+) __HAL_DMA2D_ENABLE_IT: Enables the specified DMA2D interrupts.
mbed_official 87:085cde657901 81 (+) __HAL_DMA2D_DISABLE_IT: Disables the specified DMA2D interrupts.
mbed_official 106:ced8cbb51063 82 (+) __HAL_DMA2D_GET_IT_SOURCE: Checks whether the specified DMA2D interrupt has occurred or not.
mbed_official 87:085cde657901 83
mbed_official 87:085cde657901 84 [..]
mbed_official 87:085cde657901 85 (@) You can refer to the DMA2D HAL driver header file for more useful macros
mbed_official 87:085cde657901 86
mbed_official 87:085cde657901 87 @endverbatim
mbed_official 87:085cde657901 88 ******************************************************************************
mbed_official 87:085cde657901 89 * @attention
mbed_official 87:085cde657901 90 *
mbed_official 87:085cde657901 91 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 92 *
mbed_official 87:085cde657901 93 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 94 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 95 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 96 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 97 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 98 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 99 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 100 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 101 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 102 * without specific prior written permission.
mbed_official 87:085cde657901 103 *
mbed_official 87:085cde657901 104 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 105 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 106 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 107 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 108 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 109 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 110 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 111 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 112 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 113 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 114 *
mbed_official 87:085cde657901 115 ******************************************************************************
mbed_official 87:085cde657901 116 */
mbed_official 87:085cde657901 117
mbed_official 87:085cde657901 118 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 119 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 120
mbed_official 87:085cde657901 121 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 122 * @{
mbed_official 87:085cde657901 123 */
mbed_official 87:085cde657901 124 /** @defgroup DMA2D
mbed_official 87:085cde657901 125 * @brief DMA2D HAL module driver
mbed_official 87:085cde657901 126 * @{
mbed_official 87:085cde657901 127 */
mbed_official 87:085cde657901 128
mbed_official 87:085cde657901 129 #ifdef HAL_DMA2D_MODULE_ENABLED
mbed_official 87:085cde657901 130
mbed_official 106:ced8cbb51063 131 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 87:085cde657901 132
mbed_official 87:085cde657901 133 /* Private typedef -----------------------------------------------------------*/
mbed_official 87:085cde657901 134 /* Private define ------------------------------------------------------------*/
mbed_official 87:085cde657901 135 #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
mbed_official 87:085cde657901 136 #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
mbed_official 87:085cde657901 137 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 138 /* Private variables ---------------------------------------------------------*/
mbed_official 87:085cde657901 139 /* Private function prototypes -----------------------------------------------*/
mbed_official 87:085cde657901 140 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
mbed_official 87:085cde657901 141
mbed_official 87:085cde657901 142 /* Private functions ---------------------------------------------------------*/
mbed_official 87:085cde657901 143
mbed_official 87:085cde657901 144 /** @defgroup DMA2D_Private_Functions
mbed_official 87:085cde657901 145 * @{
mbed_official 87:085cde657901 146 */
mbed_official 87:085cde657901 147
mbed_official 87:085cde657901 148 /** @defgroup DMA2D_Group1 Initialization and Configuration functions
mbed_official 87:085cde657901 149 * @brief Initialization and Configuration functions
mbed_official 87:085cde657901 150 *
mbed_official 87:085cde657901 151 @verbatim
mbed_official 87:085cde657901 152 ===============================================================================
mbed_official 87:085cde657901 153 ##### Initialization and Configuration functions #####
mbed_official 87:085cde657901 154 ===============================================================================
mbed_official 87:085cde657901 155 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 156 (+) Initialize and configure the DMA2D
mbed_official 87:085cde657901 157 (+) De-initialize the DMA2D
mbed_official 87:085cde657901 158
mbed_official 87:085cde657901 159 @endverbatim
mbed_official 87:085cde657901 160 * @{
mbed_official 87:085cde657901 161 */
mbed_official 87:085cde657901 162
mbed_official 87:085cde657901 163 /**
mbed_official 87:085cde657901 164 * @brief Initializes the DMA2D according to the specified
mbed_official 87:085cde657901 165 * parameters in the DMA2D_InitTypeDef and create the associated handle.
mbed_official 87:085cde657901 166 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 167 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 168 * @retval HAL status
mbed_official 87:085cde657901 169 */
mbed_official 87:085cde657901 170 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 171 {
mbed_official 87:085cde657901 172 uint32_t tmp = 0;
mbed_official 87:085cde657901 173
mbed_official 87:085cde657901 174 /* Check the DMA2D peripheral state */
mbed_official 87:085cde657901 175 if(hdma2d == NULL)
mbed_official 87:085cde657901 176 {
mbed_official 87:085cde657901 177 return HAL_ERROR;
mbed_official 87:085cde657901 178 }
mbed_official 87:085cde657901 179
mbed_official 87:085cde657901 180 /* Check the parameters */
mbed_official 87:085cde657901 181 assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
mbed_official 87:085cde657901 182 assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
mbed_official 87:085cde657901 183 assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
mbed_official 87:085cde657901 184 assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
mbed_official 87:085cde657901 185
mbed_official 87:085cde657901 186 if(hdma2d->State == HAL_DMA2D_STATE_RESET)
mbed_official 87:085cde657901 187 {
mbed_official 87:085cde657901 188 /* Init the low level hardware */
mbed_official 87:085cde657901 189 HAL_DMA2D_MspInit(hdma2d);
mbed_official 87:085cde657901 190 }
mbed_official 87:085cde657901 191
mbed_official 87:085cde657901 192 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 193 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 194
mbed_official 87:085cde657901 195 /* DMA2D CR register configuration -------------------------------------------*/
mbed_official 87:085cde657901 196 /* Get the CR register value */
mbed_official 87:085cde657901 197 tmp = hdma2d->Instance->CR;
mbed_official 87:085cde657901 198
mbed_official 87:085cde657901 199 /* Clear Mode bits */
mbed_official 87:085cde657901 200 tmp &= (uint32_t)~DMA2D_CR_MODE;
mbed_official 87:085cde657901 201
mbed_official 87:085cde657901 202 /* Prepare the value to be wrote to the CR register */
mbed_official 87:085cde657901 203 tmp |= hdma2d->Init.Mode;
mbed_official 87:085cde657901 204
mbed_official 87:085cde657901 205 /* Write to DMA2D CR register */
mbed_official 87:085cde657901 206 hdma2d->Instance->CR = tmp;
mbed_official 87:085cde657901 207
mbed_official 87:085cde657901 208 /* DMA2D OPFCCR register configuration ---------------------------------------*/
mbed_official 87:085cde657901 209 /* Get the OPFCCR register value */
mbed_official 87:085cde657901 210 tmp = hdma2d->Instance->OPFCCR;
mbed_official 87:085cde657901 211
mbed_official 87:085cde657901 212 /* Clear Color Mode bits */
mbed_official 87:085cde657901 213 tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
mbed_official 87:085cde657901 214
mbed_official 87:085cde657901 215 /* Prepare the value to be wrote to the OPFCCR register */
mbed_official 87:085cde657901 216 tmp |= hdma2d->Init.ColorMode;
mbed_official 87:085cde657901 217
mbed_official 87:085cde657901 218 /* Write to DMA2D OPFCCR register */
mbed_official 87:085cde657901 219 hdma2d->Instance->OPFCCR = tmp;
mbed_official 87:085cde657901 220
mbed_official 87:085cde657901 221 /* DMA2D OOR register configuration ------------------------------------------*/
mbed_official 87:085cde657901 222 /* Get the OOR register value */
mbed_official 87:085cde657901 223 tmp = hdma2d->Instance->OOR;
mbed_official 87:085cde657901 224
mbed_official 87:085cde657901 225 /* Clear Offset bits */
mbed_official 87:085cde657901 226 tmp &= (uint32_t)~DMA2D_OOR_LO;
mbed_official 87:085cde657901 227
mbed_official 87:085cde657901 228 /* Prepare the value to be wrote to the OOR register */
mbed_official 87:085cde657901 229 tmp |= hdma2d->Init.OutputOffset;
mbed_official 87:085cde657901 230
mbed_official 87:085cde657901 231 /* Write to DMA2D OOR register */
mbed_official 87:085cde657901 232 hdma2d->Instance->OOR = tmp;
mbed_official 87:085cde657901 233
mbed_official 87:085cde657901 234 /* Update error code */
mbed_official 87:085cde657901 235 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
mbed_official 87:085cde657901 236
mbed_official 87:085cde657901 237 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 238 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 239
mbed_official 87:085cde657901 240 return HAL_OK;
mbed_official 87:085cde657901 241 }
mbed_official 87:085cde657901 242
mbed_official 87:085cde657901 243 /**
mbed_official 87:085cde657901 244 * @brief Deinitializes the DMA2D peripheral registers to their default reset
mbed_official 87:085cde657901 245 * values.
mbed_official 87:085cde657901 246 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 247 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 248 * @retval None
mbed_official 87:085cde657901 249 */
mbed_official 87:085cde657901 250
mbed_official 87:085cde657901 251 HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 252 {
mbed_official 87:085cde657901 253 /* Check the DMA2D peripheral state */
mbed_official 87:085cde657901 254 if(hdma2d == NULL)
mbed_official 87:085cde657901 255 {
mbed_official 87:085cde657901 256 return HAL_ERROR;
mbed_official 87:085cde657901 257 }
mbed_official 87:085cde657901 258
mbed_official 87:085cde657901 259 /* DeInit the low level hardware */
mbed_official 87:085cde657901 260 HAL_DMA2D_MspDeInit(hdma2d);
mbed_official 87:085cde657901 261
mbed_official 87:085cde657901 262 /* Update error code */
mbed_official 87:085cde657901 263 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
mbed_official 87:085cde657901 264
mbed_official 87:085cde657901 265 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 266 hdma2d->State = HAL_DMA2D_STATE_RESET;
mbed_official 87:085cde657901 267
mbed_official 106:ced8cbb51063 268 /* Release Lock */
mbed_official 106:ced8cbb51063 269 __HAL_UNLOCK(hdma2d);
mbed_official 106:ced8cbb51063 270
mbed_official 87:085cde657901 271 return HAL_OK;
mbed_official 87:085cde657901 272 }
mbed_official 87:085cde657901 273
mbed_official 87:085cde657901 274 /**
mbed_official 87:085cde657901 275 * @brief Initializes the DMA2D MSP.
mbed_official 87:085cde657901 276 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 277 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 278 * @retval None
mbed_official 87:085cde657901 279 */
mbed_official 87:085cde657901 280 __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
mbed_official 87:085cde657901 281 {
mbed_official 87:085cde657901 282 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 283 the HAL_DMA2D_MspInit could be implemented in the user file
mbed_official 87:085cde657901 284 */
mbed_official 87:085cde657901 285 }
mbed_official 87:085cde657901 286
mbed_official 87:085cde657901 287 /**
mbed_official 87:085cde657901 288 * @brief DeInitializes the DMA2D MSP.
mbed_official 87:085cde657901 289 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 290 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 291 * @retval None
mbed_official 87:085cde657901 292 */
mbed_official 87:085cde657901 293 __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
mbed_official 87:085cde657901 294 {
mbed_official 87:085cde657901 295 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 296 the HAL_DMA2D_MspDeInit could be implemented in the user file
mbed_official 87:085cde657901 297 */
mbed_official 87:085cde657901 298 }
mbed_official 87:085cde657901 299
mbed_official 87:085cde657901 300 /**
mbed_official 87:085cde657901 301 * @}
mbed_official 87:085cde657901 302 */
mbed_official 87:085cde657901 303
mbed_official 87:085cde657901 304 /** @defgroup DMA2D_Group2 IO operation functions
mbed_official 87:085cde657901 305 * @brief IO operation functions
mbed_official 87:085cde657901 306 *
mbed_official 87:085cde657901 307 @verbatim
mbed_official 87:085cde657901 308 ===============================================================================
mbed_official 87:085cde657901 309 ##### IO operation functions #####
mbed_official 87:085cde657901 310 ===============================================================================
mbed_official 87:085cde657901 311 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 312 (+) Configure the pdata, destination address and data size and
mbed_official 87:085cde657901 313 Start DMA2D transfer.
mbed_official 87:085cde657901 314 (+) Configure the source for foreground and background, destination address
mbed_official 87:085cde657901 315 and data size and Start MultiBuffer DMA2D transfer.
mbed_official 87:085cde657901 316 (+) Configure the pdata, destination address and data size and
mbed_official 87:085cde657901 317 Start DMA2D transfer with interrupt.
mbed_official 87:085cde657901 318 (+) Configure the source for foreground and background, destination address
mbed_official 87:085cde657901 319 and data size and Start MultiBuffer DMA2D transfer with interrupt.
mbed_official 87:085cde657901 320 (+) Abort DMA2D transfer.
mbed_official 87:085cde657901 321 (+) Suspend DMA2D transfer.
mbed_official 87:085cde657901 322 (+) Continue DMA2D transfer.
mbed_official 87:085cde657901 323 (+) polling for transfer complete.
mbed_official 87:085cde657901 324 (+) handles DMA2D interrupt request.
mbed_official 87:085cde657901 325
mbed_official 87:085cde657901 326 @endverbatim
mbed_official 87:085cde657901 327 * @{
mbed_official 87:085cde657901 328 */
mbed_official 87:085cde657901 329
mbed_official 87:085cde657901 330 /**
mbed_official 87:085cde657901 331 * @brief Start the DMA2D Transfer.
mbed_official 87:085cde657901 332 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 333 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 334 * @param pdata: Configure the source memory Buffer address if
mbed_official 87:085cde657901 335 * the memory to memory or memory to memory with pixel format
mbed_official 87:085cde657901 336 * conversion DMA2D mode is selected, and configure
mbed_official 87:085cde657901 337 * the color value if register to memory DMA2D mode is selected
mbed_official 87:085cde657901 338 * or the color value for the A4 or A8 mode.
mbed_official 87:085cde657901 339 * @param DstAddress: The destination memory Buffer address.
mbed_official 87:085cde657901 340 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 341 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 342 * @retval HAL status
mbed_official 87:085cde657901 343 */
mbed_official 87:085cde657901 344 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 345 {
mbed_official 87:085cde657901 346 /* Process locked */
mbed_official 87:085cde657901 347 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 348
mbed_official 87:085cde657901 349 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 350 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 351
mbed_official 87:085cde657901 352 /* Check the parameters */
mbed_official 87:085cde657901 353 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 87:085cde657901 354 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 355
mbed_official 87:085cde657901 356 /* Disable the Peripheral */
mbed_official 87:085cde657901 357 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 358
mbed_official 87:085cde657901 359 /* Configure the source, destination address and the data size */
mbed_official 87:085cde657901 360 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Heigh);
mbed_official 87:085cde657901 361
mbed_official 87:085cde657901 362 /* Enable the Peripheral */
mbed_official 87:085cde657901 363 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 364
mbed_official 87:085cde657901 365 return HAL_OK;
mbed_official 87:085cde657901 366 }
mbed_official 87:085cde657901 367
mbed_official 87:085cde657901 368 /**
mbed_official 87:085cde657901 369 * @brief Start the DMA2D Transfer with interrupt enabled.
mbed_official 87:085cde657901 370 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 371 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 372 * @param pdata: Configure the source memory Buffer address if
mbed_official 87:085cde657901 373 * the memory to memory or memory to memory with pixel format
mbed_official 87:085cde657901 374 * conversion DMA2D mode is selected, and configure
mbed_official 87:085cde657901 375 * the color value if register to memory DMA2D mode is selected
mbed_official 87:085cde657901 376 * or the color value for the A4 or A8 mode.
mbed_official 87:085cde657901 377 * @param DstAddress: The destination memory Buffer address.
mbed_official 87:085cde657901 378 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 379 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 380 * @retval HAL status
mbed_official 87:085cde657901 381 */
mbed_official 87:085cde657901 382 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 383 {
mbed_official 87:085cde657901 384 /* Process locked */
mbed_official 87:085cde657901 385 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 386
mbed_official 87:085cde657901 387 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 388 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 389
mbed_official 87:085cde657901 390 /* Check the parameters */
mbed_official 87:085cde657901 391 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 87:085cde657901 392 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 393
mbed_official 87:085cde657901 394 /* Disable the Peripheral */
mbed_official 87:085cde657901 395 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 396
mbed_official 87:085cde657901 397 /* Configure the source, destination address and the data size */
mbed_official 87:085cde657901 398 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Heigh);
mbed_official 87:085cde657901 399
mbed_official 87:085cde657901 400 /* Enable the transfer complete interrupt */
mbed_official 87:085cde657901 401 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 87:085cde657901 402
mbed_official 87:085cde657901 403 /* Enable the transfer Error interrupt */
mbed_official 87:085cde657901 404 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 87:085cde657901 405
mbed_official 87:085cde657901 406 /* Enable the Peripheral */
mbed_official 87:085cde657901 407 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 408
mbed_official 87:085cde657901 409 /* Enable the configuration error interrupt */
mbed_official 87:085cde657901 410 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 87:085cde657901 411
mbed_official 87:085cde657901 412 return HAL_OK;
mbed_official 87:085cde657901 413 }
mbed_official 87:085cde657901 414
mbed_official 87:085cde657901 415 /**
mbed_official 87:085cde657901 416 * @brief Start the multi-source DMA2D Transfer.
mbed_official 87:085cde657901 417 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 418 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 419 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
mbed_official 87:085cde657901 420 * @param SrcAddress2: The source memory Buffer address of the background layer
mbed_official 87:085cde657901 421 * or the color value for the A4 or A8 mode.
mbed_official 87:085cde657901 422 * @param DstAddress: The destination memory Buffer address
mbed_official 87:085cde657901 423 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 424 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 425 * @retval HAL status
mbed_official 87:085cde657901 426 */
mbed_official 87:085cde657901 427 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 428 {
mbed_official 87:085cde657901 429 /* Process locked */
mbed_official 87:085cde657901 430 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 431
mbed_official 87:085cde657901 432 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 433 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 434
mbed_official 87:085cde657901 435 /* Check the parameters */
mbed_official 87:085cde657901 436 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 87:085cde657901 437 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 438
mbed_official 87:085cde657901 439 /* Disable the Peripheral */
mbed_official 87:085cde657901 440 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 441
mbed_official 87:085cde657901 442 if((hdma2d->LayerCfg[0].InputColorMode == CM_A4) || (hdma2d->LayerCfg[0].InputColorMode == CM_A8))
mbed_official 87:085cde657901 443 {
mbed_official 87:085cde657901 444 hdma2d->Instance->BGCOLR = SrcAddress2;
mbed_official 87:085cde657901 445 }
mbed_official 87:085cde657901 446 else
mbed_official 87:085cde657901 447 {
mbed_official 87:085cde657901 448 /* Configure DMA2D Stream source2 address */
mbed_official 87:085cde657901 449 hdma2d->Instance->BGMAR = SrcAddress2;
mbed_official 87:085cde657901 450 }
mbed_official 87:085cde657901 451
mbed_official 87:085cde657901 452 /* Configure the source, destination address and the data size */
mbed_official 87:085cde657901 453 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Heigh);
mbed_official 87:085cde657901 454
mbed_official 87:085cde657901 455 /* Enable the Peripheral */
mbed_official 87:085cde657901 456 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 457
mbed_official 87:085cde657901 458 return HAL_OK;
mbed_official 87:085cde657901 459 }
mbed_official 87:085cde657901 460
mbed_official 87:085cde657901 461 /**
mbed_official 87:085cde657901 462 * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
mbed_official 87:085cde657901 463 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 464 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 465 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
mbed_official 87:085cde657901 466 * @param SrcAddress2: The source memory Buffer address of the background layer
mbed_official 87:085cde657901 467 * or the color value for the A4 or A8 mode.
mbed_official 87:085cde657901 468 * @param DstAddress: The destination memory Buffer address.
mbed_official 87:085cde657901 469 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 470 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 471 * @retval HAL status
mbed_official 87:085cde657901 472 */
mbed_official 87:085cde657901 473 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 474 {
mbed_official 87:085cde657901 475 /* Process locked */
mbed_official 87:085cde657901 476 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 477
mbed_official 87:085cde657901 478 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 479 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 480
mbed_official 87:085cde657901 481 /* Check the parameters */
mbed_official 87:085cde657901 482 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 87:085cde657901 483 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 484
mbed_official 87:085cde657901 485 /* Disable the Peripheral */
mbed_official 87:085cde657901 486 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 487
mbed_official 87:085cde657901 488 if ((hdma2d->LayerCfg[0].InputColorMode == CM_A4) || (hdma2d->LayerCfg[0].InputColorMode == CM_A8))
mbed_official 87:085cde657901 489 {
mbed_official 87:085cde657901 490 hdma2d->Instance->BGCOLR = SrcAddress2;
mbed_official 87:085cde657901 491 }
mbed_official 87:085cde657901 492 else
mbed_official 87:085cde657901 493 {
mbed_official 87:085cde657901 494 /* Configure DMA2D Stream source2 address */
mbed_official 87:085cde657901 495 hdma2d->Instance->BGMAR = SrcAddress2;
mbed_official 87:085cde657901 496 }
mbed_official 87:085cde657901 497
mbed_official 87:085cde657901 498 /* Configure the source, destination address and the data size */
mbed_official 87:085cde657901 499 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Heigh);
mbed_official 87:085cde657901 500
mbed_official 87:085cde657901 501 /* Enable the configuration error interrupt */
mbed_official 87:085cde657901 502 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 87:085cde657901 503
mbed_official 87:085cde657901 504 /* Enable the transfer complete interrupt */
mbed_official 87:085cde657901 505 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 87:085cde657901 506
mbed_official 87:085cde657901 507 /* Enable the transfer Error interrupt */
mbed_official 87:085cde657901 508 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 87:085cde657901 509
mbed_official 87:085cde657901 510 /* Enable the Peripheral */
mbed_official 87:085cde657901 511 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 512
mbed_official 87:085cde657901 513 return HAL_OK;
mbed_official 87:085cde657901 514 }
mbed_official 87:085cde657901 515
mbed_official 87:085cde657901 516 /**
mbed_official 87:085cde657901 517 * @brief Abort the DMA2D Transfer.
mbed_official 87:085cde657901 518 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 519 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 520 * @retval HAL status
mbed_official 87:085cde657901 521 */
mbed_official 87:085cde657901 522 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 523 {
mbed_official 87:085cde657901 524 uint32_t timeout = 0x00;
mbed_official 87:085cde657901 525
mbed_official 87:085cde657901 526 /* Disable the DMA2D */
mbed_official 87:085cde657901 527 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 528
mbed_official 87:085cde657901 529 /* Get timeout */
mbed_official 87:085cde657901 530 timeout = HAL_GetTick() + HAL_TIMEOUT_DMA2D_ABORT;
mbed_official 87:085cde657901 531
mbed_official 87:085cde657901 532 /* Check if the DMA2D is effectively disabled */
mbed_official 87:085cde657901 533 while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
mbed_official 87:085cde657901 534 {
mbed_official 87:085cde657901 535 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 536 {
mbed_official 87:085cde657901 537 /* Update error code */
mbed_official 87:085cde657901 538 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 539
mbed_official 87:085cde657901 540 /* Change the DMA2D state */
mbed_official 87:085cde657901 541 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 542
mbed_official 87:085cde657901 543 /* Process Unlocked */
mbed_official 87:085cde657901 544 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 545
mbed_official 87:085cde657901 546 return HAL_TIMEOUT;
mbed_official 87:085cde657901 547 }
mbed_official 87:085cde657901 548 }
mbed_official 87:085cde657901 549 /* Process Unlocked */
mbed_official 87:085cde657901 550 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 551
mbed_official 87:085cde657901 552 /* Change the DMA2D state*/
mbed_official 87:085cde657901 553 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 554
mbed_official 87:085cde657901 555 return HAL_OK;
mbed_official 87:085cde657901 556 }
mbed_official 87:085cde657901 557
mbed_official 87:085cde657901 558 /**
mbed_official 87:085cde657901 559 * @brief Suspend the DMA2D Transfer.
mbed_official 87:085cde657901 560 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 561 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 562 * @retval HAL status
mbed_official 87:085cde657901 563 */
mbed_official 87:085cde657901 564 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 565 {
mbed_official 87:085cde657901 566 uint32_t timeout = 0x00;
mbed_official 87:085cde657901 567
mbed_official 87:085cde657901 568 /* Suspend the DMA2D transfer */
mbed_official 87:085cde657901 569 hdma2d->Instance->CR |= DMA2D_CR_SUSP;
mbed_official 87:085cde657901 570
mbed_official 87:085cde657901 571 /* Get timeout */
mbed_official 87:085cde657901 572 timeout = HAL_GetTick() + HAL_TIMEOUT_DMA2D_SUSPEND;
mbed_official 87:085cde657901 573
mbed_official 87:085cde657901 574 /* Check if the DMA2D is effectively suspended */
mbed_official 87:085cde657901 575 while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
mbed_official 87:085cde657901 576 {
mbed_official 87:085cde657901 577 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 578 {
mbed_official 87:085cde657901 579 /* Update error code */
mbed_official 87:085cde657901 580 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 581
mbed_official 87:085cde657901 582 /* Change the DMA2D state */
mbed_official 87:085cde657901 583 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 584
mbed_official 87:085cde657901 585 return HAL_TIMEOUT;
mbed_official 87:085cde657901 586 }
mbed_official 87:085cde657901 587 }
mbed_official 87:085cde657901 588 /* Change the DMA2D state*/
mbed_official 87:085cde657901 589 hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
mbed_official 87:085cde657901 590
mbed_official 87:085cde657901 591 return HAL_OK;
mbed_official 87:085cde657901 592 }
mbed_official 87:085cde657901 593
mbed_official 87:085cde657901 594 /**
mbed_official 87:085cde657901 595 * @brief Resume the DMA2D Transfer.
mbed_official 87:085cde657901 596 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 597 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 598 * @retval HAL status
mbed_official 87:085cde657901 599 */
mbed_official 87:085cde657901 600 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 601 {
mbed_official 87:085cde657901 602 /* Resume the DMA2D transfer */
mbed_official 87:085cde657901 603 hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
mbed_official 87:085cde657901 604
mbed_official 87:085cde657901 605 /* Change the DMA2D state*/
mbed_official 87:085cde657901 606 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 607
mbed_official 87:085cde657901 608 return HAL_OK;
mbed_official 87:085cde657901 609 }
mbed_official 87:085cde657901 610
mbed_official 87:085cde657901 611 /**
mbed_official 87:085cde657901 612 * @brief Polling for transfer complete or CLUT loading.
mbed_official 87:085cde657901 613 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 614 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 615 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 616 * @retval HAL status
mbed_official 87:085cde657901 617 */
mbed_official 87:085cde657901 618 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
mbed_official 87:085cde657901 619 {
mbed_official 87:085cde657901 620 uint32_t tmp, tmp1;
mbed_official 87:085cde657901 621 uint32_t timeout = 0x00;
mbed_official 87:085cde657901 622
mbed_official 87:085cde657901 623 /* Polling for DMA2D transfer */
mbed_official 87:085cde657901 624 if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
mbed_official 87:085cde657901 625 {
mbed_official 87:085cde657901 626 /* Get timeout */
mbed_official 87:085cde657901 627 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 628
mbed_official 87:085cde657901 629 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
mbed_official 87:085cde657901 630 {
mbed_official 87:085cde657901 631 tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 87:085cde657901 632 tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 87:085cde657901 633
mbed_official 87:085cde657901 634 if((tmp != RESET) || (tmp1 != RESET))
mbed_official 87:085cde657901 635 {
mbed_official 87:085cde657901 636 /* Clear the transfer and configuration error flags */
mbed_official 87:085cde657901 637 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 87:085cde657901 638 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 87:085cde657901 639
mbed_official 87:085cde657901 640 /* Change DMA2D state */
mbed_official 87:085cde657901 641 hdma2d->State= HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 642
mbed_official 87:085cde657901 643 /* Process unlocked */
mbed_official 87:085cde657901 644 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 645
mbed_official 87:085cde657901 646 return HAL_ERROR;
mbed_official 87:085cde657901 647 }
mbed_official 87:085cde657901 648 /* Check for the Timeout */
mbed_official 87:085cde657901 649 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 650 {
mbed_official 87:085cde657901 651 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 652 {
mbed_official 87:085cde657901 653 /* Process unlocked */
mbed_official 87:085cde657901 654 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 655
mbed_official 87:085cde657901 656 /* Update error code */
mbed_official 87:085cde657901 657 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 658
mbed_official 87:085cde657901 659 /* Change the DMA2D state */
mbed_official 87:085cde657901 660 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 661
mbed_official 87:085cde657901 662 return HAL_TIMEOUT;
mbed_official 87:085cde657901 663 }
mbed_official 87:085cde657901 664 }
mbed_official 87:085cde657901 665 }
mbed_official 87:085cde657901 666 }
mbed_official 87:085cde657901 667 /* Polling for CLUT loading */
mbed_official 87:085cde657901 668 if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
mbed_official 87:085cde657901 669 {
mbed_official 87:085cde657901 670 /* Get timeout */
mbed_official 87:085cde657901 671 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 672
mbed_official 87:085cde657901 673 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
mbed_official 87:085cde657901 674 {
mbed_official 87:085cde657901 675 if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
mbed_official 87:085cde657901 676 {
mbed_official 87:085cde657901 677 /* Clear the transfer and configuration error flags */
mbed_official 87:085cde657901 678 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
mbed_official 87:085cde657901 679
mbed_official 87:085cde657901 680 /* Change DMA2D state */
mbed_official 87:085cde657901 681 hdma2d->State= HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 682
mbed_official 87:085cde657901 683 return HAL_ERROR;
mbed_official 87:085cde657901 684 }
mbed_official 87:085cde657901 685 /* Check for the Timeout */
mbed_official 87:085cde657901 686 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 687 {
mbed_official 87:085cde657901 688 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 689 {
mbed_official 87:085cde657901 690 /* Update error code */
mbed_official 87:085cde657901 691 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 692
mbed_official 87:085cde657901 693 /* Change the DMA2D state */
mbed_official 87:085cde657901 694 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 695
mbed_official 87:085cde657901 696 return HAL_TIMEOUT;
mbed_official 87:085cde657901 697 }
mbed_official 87:085cde657901 698 }
mbed_official 87:085cde657901 699 }
mbed_official 87:085cde657901 700 }
mbed_official 87:085cde657901 701 /* Clear the transfer complete flag */
mbed_official 87:085cde657901 702 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
mbed_official 87:085cde657901 703
mbed_official 87:085cde657901 704 /* Clear the CLUT loading flag */
mbed_official 87:085cde657901 705 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
mbed_official 87:085cde657901 706
mbed_official 87:085cde657901 707 /* Change DMA2D state */
mbed_official 87:085cde657901 708 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 709
mbed_official 87:085cde657901 710 /* Process unlocked */
mbed_official 87:085cde657901 711 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 712
mbed_official 87:085cde657901 713 return HAL_OK;
mbed_official 87:085cde657901 714 }
mbed_official 87:085cde657901 715 /**
mbed_official 87:085cde657901 716 * @brief Handles DMA2D interrupt request.
mbed_official 87:085cde657901 717 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 718 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 719 * @retval HAL status
mbed_official 87:085cde657901 720 */
mbed_official 87:085cde657901 721 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 722 {
mbed_official 87:085cde657901 723 /* Transfer Error Interrupt management ***************************************/
mbed_official 87:085cde657901 724 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
mbed_official 87:085cde657901 725 {
mbed_official 106:ced8cbb51063 726 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
mbed_official 87:085cde657901 727 {
mbed_official 87:085cde657901 728 /* Disable the transfer Error interrupt */
mbed_official 87:085cde657901 729 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 87:085cde657901 730
mbed_official 87:085cde657901 731 /* Update error code */
mbed_official 87:085cde657901 732 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
mbed_official 87:085cde657901 733
mbed_official 87:085cde657901 734 /* Clear the transfer error flag */
mbed_official 87:085cde657901 735 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 87:085cde657901 736
mbed_official 87:085cde657901 737 /* Change DMA2D state */
mbed_official 87:085cde657901 738 hdma2d->State = HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 739
mbed_official 87:085cde657901 740 /* Process Unlocked */
mbed_official 87:085cde657901 741 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 742
mbed_official 87:085cde657901 743 if(hdma2d->XferErrorCallback != NULL)
mbed_official 87:085cde657901 744 {
mbed_official 87:085cde657901 745 /* Transfer error Callback */
mbed_official 87:085cde657901 746 hdma2d->XferErrorCallback(hdma2d);
mbed_official 87:085cde657901 747 }
mbed_official 87:085cde657901 748 }
mbed_official 87:085cde657901 749 }
mbed_official 87:085cde657901 750 /* Configuration Error Interrupt management **********************************/
mbed_official 87:085cde657901 751 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
mbed_official 87:085cde657901 752 {
mbed_official 106:ced8cbb51063 753 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
mbed_official 87:085cde657901 754 {
mbed_official 87:085cde657901 755 /* Disable the Configuration Error interrupt */
mbed_official 87:085cde657901 756 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 87:085cde657901 757
mbed_official 87:085cde657901 758 /* Clear the Configuration error flag */
mbed_official 87:085cde657901 759 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 87:085cde657901 760
mbed_official 87:085cde657901 761 /* Update error code */
mbed_official 87:085cde657901 762 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
mbed_official 87:085cde657901 763
mbed_official 87:085cde657901 764 /* Change DMA2D state */
mbed_official 87:085cde657901 765 hdma2d->State = HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 766
mbed_official 87:085cde657901 767 /* Process Unlocked */
mbed_official 87:085cde657901 768 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 769
mbed_official 87:085cde657901 770 if(hdma2d->XferErrorCallback != NULL)
mbed_official 87:085cde657901 771 {
mbed_official 87:085cde657901 772 /* Transfer error Callback */
mbed_official 87:085cde657901 773 hdma2d->XferErrorCallback(hdma2d);
mbed_official 87:085cde657901 774 }
mbed_official 87:085cde657901 775 }
mbed_official 87:085cde657901 776 }
mbed_official 87:085cde657901 777 /* Transfer Complete Interrupt management ************************************/
mbed_official 87:085cde657901 778 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
mbed_official 87:085cde657901 779 {
mbed_official 106:ced8cbb51063 780 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
mbed_official 87:085cde657901 781 {
mbed_official 87:085cde657901 782 /* Disable the transfer complete interrupt */
mbed_official 87:085cde657901 783 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 87:085cde657901 784
mbed_official 87:085cde657901 785 /* Clear the transfer complete flag */
mbed_official 87:085cde657901 786 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
mbed_official 87:085cde657901 787
mbed_official 87:085cde657901 788 /* Update error code */
mbed_official 87:085cde657901 789 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
mbed_official 87:085cde657901 790
mbed_official 87:085cde657901 791 /* Change DMA2D state */
mbed_official 87:085cde657901 792 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 793
mbed_official 87:085cde657901 794 /* Process Unlocked */
mbed_official 87:085cde657901 795 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 796
mbed_official 87:085cde657901 797 if(hdma2d->XferCpltCallback != NULL)
mbed_official 87:085cde657901 798 {
mbed_official 87:085cde657901 799 /* Transfer complete Callback */
mbed_official 87:085cde657901 800 hdma2d->XferCpltCallback(hdma2d);
mbed_official 87:085cde657901 801 }
mbed_official 87:085cde657901 802 }
mbed_official 87:085cde657901 803 }
mbed_official 87:085cde657901 804 }
mbed_official 87:085cde657901 805
mbed_official 87:085cde657901 806 /**
mbed_official 87:085cde657901 807 * @}
mbed_official 87:085cde657901 808 */
mbed_official 87:085cde657901 809
mbed_official 87:085cde657901 810 /** @defgroup DMA2D_Group3 Peripheral Control functions
mbed_official 87:085cde657901 811 * @brief Peripheral Control functions
mbed_official 87:085cde657901 812 *
mbed_official 87:085cde657901 813 @verbatim
mbed_official 87:085cde657901 814 ===============================================================================
mbed_official 87:085cde657901 815 ##### Peripheral Control functions #####
mbed_official 87:085cde657901 816 ===============================================================================
mbed_official 87:085cde657901 817 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 818 (+) Configure the DMA2D foreground or/and background parameters.
mbed_official 87:085cde657901 819 (+) Configure the DMA2D CLUT transfer.
mbed_official 87:085cde657901 820 (+) Enable DMA2D CLUT.
mbed_official 87:085cde657901 821 (+) Disable DMA2D CLUT.
mbed_official 87:085cde657901 822 (+) Configure the line watermark
mbed_official 87:085cde657901 823
mbed_official 87:085cde657901 824 @endverbatim
mbed_official 87:085cde657901 825 * @{
mbed_official 87:085cde657901 826 */
mbed_official 87:085cde657901 827 /**
mbed_official 87:085cde657901 828 * @brief Configure the DMA2D Layer according to the specified
mbed_official 87:085cde657901 829 * parameters in the DMA2D_InitTypeDef and create the associated handle.
mbed_official 87:085cde657901 830 * @param hdma2d: DMA2D handle
mbed_official 87:085cde657901 831 * @param LayerIdx: DMA2D Layer index
mbed_official 87:085cde657901 832 * This parameter can be one of the following values:
mbed_official 87:085cde657901 833 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 834 * @retval HAL status
mbed_official 87:085cde657901 835 */
mbed_official 87:085cde657901 836 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 87:085cde657901 837 {
mbed_official 87:085cde657901 838 DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
mbed_official 87:085cde657901 839
mbed_official 87:085cde657901 840 uint32_t tmp = 0;
mbed_official 87:085cde657901 841
mbed_official 87:085cde657901 842 /* Process locked */
mbed_official 87:085cde657901 843 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 844
mbed_official 87:085cde657901 845 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 846 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 847
mbed_official 87:085cde657901 848 /* Check the parameters */
mbed_official 87:085cde657901 849 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 850 assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
mbed_official 87:085cde657901 851 if(hdma2d->Init.Mode != DMA2D_R2M)
mbed_official 87:085cde657901 852 {
mbed_official 87:085cde657901 853 assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
mbed_official 87:085cde657901 854 if(hdma2d->Init.Mode != DMA2D_M2M)
mbed_official 87:085cde657901 855 {
mbed_official 87:085cde657901 856 assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
mbed_official 87:085cde657901 857 assert_param(IS_DMA2D_ALPHA_VALUE(pLayerCfg->InputAlpha));
mbed_official 87:085cde657901 858 }
mbed_official 87:085cde657901 859 }
mbed_official 87:085cde657901 860
mbed_official 87:085cde657901 861 /* Configure the background DMA2D layer */
mbed_official 87:085cde657901 862 if(LayerIdx == 0)
mbed_official 87:085cde657901 863 {
mbed_official 87:085cde657901 864 /* DMA2D BGPFCR register configuration -----------------------------------*/
mbed_official 87:085cde657901 865 /* Get the BGPFCCR register value */
mbed_official 87:085cde657901 866 tmp = hdma2d->Instance->BGPFCCR;
mbed_official 87:085cde657901 867
mbed_official 87:085cde657901 868 /* Clear Input color mode, alpha value and alpha mode bits */
mbed_official 87:085cde657901 869 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
mbed_official 87:085cde657901 870
mbed_official 87:085cde657901 871 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 87:085cde657901 872 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
mbed_official 87:085cde657901 873
mbed_official 87:085cde657901 874 /* Write to DMA2D BGPFCCR register */
mbed_official 87:085cde657901 875 hdma2d->Instance->BGPFCCR = tmp;
mbed_official 87:085cde657901 876
mbed_official 87:085cde657901 877 /* DMA2D BGOR register configuration -------------------------------------*/
mbed_official 87:085cde657901 878 /* Get the BGOR register value */
mbed_official 87:085cde657901 879 tmp = hdma2d->Instance->BGOR;
mbed_official 87:085cde657901 880
mbed_official 87:085cde657901 881 /* Clear colors bits */
mbed_official 87:085cde657901 882 tmp &= (uint32_t)~DMA2D_BGOR_LO;
mbed_official 87:085cde657901 883
mbed_official 87:085cde657901 884 /* Prepare the value to be wrote to the BGOR register */
mbed_official 87:085cde657901 885 tmp |= pLayerCfg->InputOffset;
mbed_official 87:085cde657901 886
mbed_official 87:085cde657901 887 /* Write to DMA2D BGOR register */
mbed_official 87:085cde657901 888 hdma2d->Instance->BGOR = tmp;
mbed_official 87:085cde657901 889 }
mbed_official 87:085cde657901 890 /* Configure the foreground DMA2D layer */
mbed_official 87:085cde657901 891 else
mbed_official 87:085cde657901 892 {
mbed_official 87:085cde657901 893 /* DMA2D FGPFCR register configuration -----------------------------------*/
mbed_official 87:085cde657901 894 /* Get the FGPFCCR register value */
mbed_official 87:085cde657901 895 tmp = hdma2d->Instance->FGPFCCR;
mbed_official 87:085cde657901 896
mbed_official 87:085cde657901 897 /* Clear Input color mode, alpha value and alpha mode bits */
mbed_official 87:085cde657901 898 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
mbed_official 87:085cde657901 899
mbed_official 87:085cde657901 900 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 87:085cde657901 901 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
mbed_official 87:085cde657901 902
mbed_official 87:085cde657901 903 /* Write to DMA2D FGPFCCR register */
mbed_official 87:085cde657901 904 hdma2d->Instance->FGPFCCR = tmp;
mbed_official 87:085cde657901 905
mbed_official 87:085cde657901 906 /* DMA2D FGOR register configuration -------------------------------------*/
mbed_official 87:085cde657901 907 /* Get the FGOR register value */
mbed_official 87:085cde657901 908 tmp = hdma2d->Instance->FGOR;
mbed_official 87:085cde657901 909
mbed_official 87:085cde657901 910 /* Clear colors bits */
mbed_official 87:085cde657901 911 tmp &= (uint32_t)~DMA2D_FGOR_LO;
mbed_official 87:085cde657901 912
mbed_official 87:085cde657901 913 /* Prepare the value to be wrote to the FGOR register */
mbed_official 87:085cde657901 914 tmp |= pLayerCfg->InputOffset;
mbed_official 87:085cde657901 915
mbed_official 87:085cde657901 916 /* Write to DMA2D FGOR register */
mbed_official 87:085cde657901 917 hdma2d->Instance->FGOR = tmp;
mbed_official 87:085cde657901 918 }
mbed_official 87:085cde657901 919 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 920 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 921
mbed_official 87:085cde657901 922 /* Process unlocked */
mbed_official 87:085cde657901 923 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 924
mbed_official 87:085cde657901 925 return HAL_OK;
mbed_official 87:085cde657901 926 }
mbed_official 87:085cde657901 927
mbed_official 87:085cde657901 928 /**
mbed_official 87:085cde657901 929 * @brief Configure the DMA2D CLUT Transfer.
mbed_official 87:085cde657901 930 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 931 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 932 * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
mbed_official 87:085cde657901 933 * the configuration information for the color look up table.
mbed_official 87:085cde657901 934 * @param LayerIdx: DMA2D Layer index
mbed_official 87:085cde657901 935 * This parameter can be one of the following values:
mbed_official 87:085cde657901 936 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 937 * @retval HAL status
mbed_official 87:085cde657901 938 */
mbed_official 87:085cde657901 939 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
mbed_official 87:085cde657901 940 {
mbed_official 87:085cde657901 941 uint32_t tmp = 0, tmp1 = 0;
mbed_official 87:085cde657901 942
mbed_official 87:085cde657901 943 /* Check the parameters */
mbed_official 87:085cde657901 944 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 945 assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
mbed_official 87:085cde657901 946 assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
mbed_official 87:085cde657901 947
mbed_official 87:085cde657901 948 /* Configure the CLUT of the background DMA2D layer */
mbed_official 87:085cde657901 949 if(LayerIdx == 0)
mbed_official 87:085cde657901 950 {
mbed_official 87:085cde657901 951 /* Get the BGCMAR register value */
mbed_official 87:085cde657901 952 tmp = hdma2d->Instance->BGCMAR;
mbed_official 87:085cde657901 953
mbed_official 87:085cde657901 954 /* Clear CLUT address bits */
mbed_official 87:085cde657901 955 tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
mbed_official 87:085cde657901 956
mbed_official 87:085cde657901 957 /* Prepare the value to be wrote to the BGCMAR register */
mbed_official 87:085cde657901 958 tmp |= (uint32_t)CLUTCfg.pCLUT;
mbed_official 87:085cde657901 959
mbed_official 87:085cde657901 960 /* Write to DMA2D BGCMAR register */
mbed_official 87:085cde657901 961 hdma2d->Instance->BGCMAR = tmp;
mbed_official 87:085cde657901 962
mbed_official 87:085cde657901 963 /* Get the BGPFCCR register value */
mbed_official 87:085cde657901 964 tmp = hdma2d->Instance->BGPFCCR;
mbed_official 87:085cde657901 965
mbed_official 87:085cde657901 966 /* Clear CLUT size and CLUT address bits */
mbed_official 87:085cde657901 967 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
mbed_official 87:085cde657901 968
mbed_official 87:085cde657901 969 /* Get the CLUT size */
mbed_official 87:085cde657901 970 tmp1 = CLUTCfg.Size << 16;
mbed_official 87:085cde657901 971
mbed_official 87:085cde657901 972 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 87:085cde657901 973 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
mbed_official 87:085cde657901 974
mbed_official 87:085cde657901 975 /* Write to DMA2D BGPFCCR register */
mbed_official 87:085cde657901 976 hdma2d->Instance->BGPFCCR = tmp;
mbed_official 87:085cde657901 977 }
mbed_official 87:085cde657901 978 /* Configure the CLUT of the foreground DMA2D layer */
mbed_official 87:085cde657901 979 else
mbed_official 87:085cde657901 980 {
mbed_official 87:085cde657901 981 /* Get the FGCMAR register value */
mbed_official 87:085cde657901 982 tmp = hdma2d->Instance->FGCMAR;
mbed_official 87:085cde657901 983
mbed_official 87:085cde657901 984 /* Clear CLUT address bits */
mbed_official 87:085cde657901 985 tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
mbed_official 87:085cde657901 986
mbed_official 87:085cde657901 987 /* Prepare the value to be wrote to the FGCMAR register */
mbed_official 87:085cde657901 988 tmp |= (uint32_t)CLUTCfg.pCLUT;
mbed_official 87:085cde657901 989
mbed_official 87:085cde657901 990 /* Write to DMA2D FGCMAR register */
mbed_official 87:085cde657901 991 hdma2d->Instance->FGCMAR = tmp;
mbed_official 87:085cde657901 992
mbed_official 87:085cde657901 993 /* Get the FGPFCCR register value */
mbed_official 87:085cde657901 994 tmp = hdma2d->Instance->FGPFCCR;
mbed_official 87:085cde657901 995
mbed_official 87:085cde657901 996 /* Clear CLUT size and CLUT address bits */
mbed_official 87:085cde657901 997 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
mbed_official 87:085cde657901 998
mbed_official 87:085cde657901 999 /* Get the CLUT size */
mbed_official 87:085cde657901 1000 tmp1 = CLUTCfg.Size << 8;
mbed_official 87:085cde657901 1001
mbed_official 87:085cde657901 1002 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 87:085cde657901 1003 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
mbed_official 87:085cde657901 1004
mbed_official 87:085cde657901 1005 /* Write to DMA2D FGPFCCR register */
mbed_official 87:085cde657901 1006 hdma2d->Instance->FGPFCCR = tmp;
mbed_official 87:085cde657901 1007 }
mbed_official 87:085cde657901 1008
mbed_official 87:085cde657901 1009 return HAL_OK;
mbed_official 87:085cde657901 1010 }
mbed_official 87:085cde657901 1011
mbed_official 87:085cde657901 1012 /**
mbed_official 87:085cde657901 1013 * @brief Enable the DMA2D CLUT Transfer.
mbed_official 87:085cde657901 1014 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1015 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1016 * @param LayerIdx: DMA2D Layer index
mbed_official 87:085cde657901 1017 * This parameter can be one of the following values:
mbed_official 87:085cde657901 1018 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 1019 * @retval HAL status
mbed_official 87:085cde657901 1020 */
mbed_official 87:085cde657901 1021 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 87:085cde657901 1022 {
mbed_official 87:085cde657901 1023 /* Check the parameters */
mbed_official 87:085cde657901 1024 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 1025
mbed_official 87:085cde657901 1026 if(LayerIdx == 0)
mbed_official 87:085cde657901 1027 {
mbed_official 87:085cde657901 1028 /* Enable the CLUT loading for the background */
mbed_official 87:085cde657901 1029 hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
mbed_official 87:085cde657901 1030 }
mbed_official 87:085cde657901 1031 else
mbed_official 87:085cde657901 1032 {
mbed_official 87:085cde657901 1033 /* Enable the CLUT loading for the foreground */
mbed_official 87:085cde657901 1034 hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
mbed_official 87:085cde657901 1035 }
mbed_official 87:085cde657901 1036
mbed_official 87:085cde657901 1037 return HAL_OK;
mbed_official 87:085cde657901 1038 }
mbed_official 87:085cde657901 1039
mbed_official 87:085cde657901 1040 /**
mbed_official 87:085cde657901 1041 * @brief Disable the DMA2D CLUT Transfer.
mbed_official 87:085cde657901 1042 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1043 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1044 * @param LayerIdx: DMA2D Layer index
mbed_official 87:085cde657901 1045 * This parameter can be one of the following values:
mbed_official 87:085cde657901 1046 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 1047 * @retval HAL status
mbed_official 87:085cde657901 1048 */
mbed_official 87:085cde657901 1049 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 87:085cde657901 1050 {
mbed_official 87:085cde657901 1051 /* Check the parameters */
mbed_official 87:085cde657901 1052 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 1053
mbed_official 87:085cde657901 1054 if(LayerIdx == 0)
mbed_official 87:085cde657901 1055 {
mbed_official 87:085cde657901 1056 /* Disable the CLUT loading for the background */
mbed_official 87:085cde657901 1057 hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
mbed_official 87:085cde657901 1058 }
mbed_official 87:085cde657901 1059 else
mbed_official 87:085cde657901 1060 {
mbed_official 87:085cde657901 1061 /* Disable the CLUT loading for the foreground */
mbed_official 87:085cde657901 1062 hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
mbed_official 87:085cde657901 1063 }
mbed_official 87:085cde657901 1064
mbed_official 87:085cde657901 1065 return HAL_OK;
mbed_official 87:085cde657901 1066 }
mbed_official 87:085cde657901 1067
mbed_official 87:085cde657901 1068 /**
mbed_official 87:085cde657901 1069 * @brief Define the configuration of the line watermark .
mbed_official 87:085cde657901 1070 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1071 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1072 * @param Line: Line Watermark configuration.
mbed_official 87:085cde657901 1073 * @retval None
mbed_official 87:085cde657901 1074 */
mbed_official 87:085cde657901 1075
mbed_official 87:085cde657901 1076 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
mbed_official 87:085cde657901 1077 {
mbed_official 87:085cde657901 1078 /* Process locked */
mbed_official 87:085cde657901 1079 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 1080
mbed_official 87:085cde657901 1081 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 1082 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 1083
mbed_official 87:085cde657901 1084 /* Check the parameters */
mbed_official 87:085cde657901 1085 assert_param(IS_DMA2D_LineWatermark(Line));
mbed_official 87:085cde657901 1086
mbed_official 87:085cde657901 1087 /* Sets the Line watermark configuration */
mbed_official 87:085cde657901 1088 DMA2D->LWR = (uint32_t)Line;
mbed_official 87:085cde657901 1089
mbed_official 87:085cde657901 1090 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 1091 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 1092
mbed_official 87:085cde657901 1093 /* Process unlocked */
mbed_official 87:085cde657901 1094 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 1095
mbed_official 87:085cde657901 1096 return HAL_OK;
mbed_official 87:085cde657901 1097 }
mbed_official 87:085cde657901 1098
mbed_official 87:085cde657901 1099 /**
mbed_official 87:085cde657901 1100 * @}
mbed_official 87:085cde657901 1101 */
mbed_official 87:085cde657901 1102
mbed_official 87:085cde657901 1103 /** @defgroup DMA2D_Group4 Peripheral State functions
mbed_official 87:085cde657901 1104 * @brief Peripheral State functions
mbed_official 87:085cde657901 1105 *
mbed_official 87:085cde657901 1106 @verbatim
mbed_official 87:085cde657901 1107 ===============================================================================
mbed_official 87:085cde657901 1108 ##### Peripheral State and Errors functions #####
mbed_official 87:085cde657901 1109 ===============================================================================
mbed_official 87:085cde657901 1110 [..]
mbed_official 87:085cde657901 1111 This subsection provides functions allowing to
mbed_official 87:085cde657901 1112 (+) Check the DMA2D state
mbed_official 87:085cde657901 1113 (+) Get error code
mbed_official 87:085cde657901 1114
mbed_official 87:085cde657901 1115 @endverbatim
mbed_official 87:085cde657901 1116 * @{
mbed_official 87:085cde657901 1117 */
mbed_official 87:085cde657901 1118
mbed_official 87:085cde657901 1119 /**
mbed_official 87:085cde657901 1120 * @brief Return the DMA2D state
mbed_official 87:085cde657901 1121 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1122 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1123 * @retval HAL state
mbed_official 87:085cde657901 1124 */
mbed_official 87:085cde657901 1125 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 1126 {
mbed_official 87:085cde657901 1127 return hdma2d->State;
mbed_official 87:085cde657901 1128 }
mbed_official 87:085cde657901 1129
mbed_official 87:085cde657901 1130 /**
mbed_official 87:085cde657901 1131 * @brief Return the DMA2D error code
mbed_official 87:085cde657901 1132 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1133 * the configuration information for DMA2D.
mbed_official 87:085cde657901 1134 * @retval DMA2D Error Code
mbed_official 87:085cde657901 1135 */
mbed_official 87:085cde657901 1136 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 1137 {
mbed_official 87:085cde657901 1138 return hdma2d->ErrorCode;
mbed_official 87:085cde657901 1139 }
mbed_official 87:085cde657901 1140
mbed_official 87:085cde657901 1141 /**
mbed_official 87:085cde657901 1142 * @}
mbed_official 87:085cde657901 1143 */
mbed_official 87:085cde657901 1144
mbed_official 87:085cde657901 1145
mbed_official 87:085cde657901 1146 /**
mbed_official 87:085cde657901 1147 * @brief Set the DMA2D Transfer parameter.
mbed_official 87:085cde657901 1148 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1149 * the configuration information for the specified DMA2D.
mbed_official 87:085cde657901 1150 * @param pdata: The source memory Buffer address
mbed_official 87:085cde657901 1151 * @param DstAddress: The destination memory Buffer address
mbed_official 87:085cde657901 1152 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 1153 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 1154 * @retval HAL status
mbed_official 87:085cde657901 1155 */
mbed_official 87:085cde657901 1156 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 1157 {
mbed_official 87:085cde657901 1158 uint32_t tmp = 0;
mbed_official 87:085cde657901 1159 uint32_t tmp1 = 0;
mbed_official 87:085cde657901 1160 uint32_t tmp2 = 0;
mbed_official 87:085cde657901 1161 uint32_t tmp3 = 0;
mbed_official 87:085cde657901 1162 uint32_t tmp4 = 0;
mbed_official 87:085cde657901 1163
mbed_official 87:085cde657901 1164 tmp = Width << 16;
mbed_official 87:085cde657901 1165
mbed_official 87:085cde657901 1166 /* Configure DMA2D data size */
mbed_official 87:085cde657901 1167 hdma2d->Instance->NLR = (Heigh | tmp);
mbed_official 87:085cde657901 1168
mbed_official 87:085cde657901 1169 /* Configure DMA2D destination address */
mbed_official 87:085cde657901 1170 hdma2d->Instance->OMAR = DstAddress;
mbed_official 87:085cde657901 1171
mbed_official 87:085cde657901 1172 /* Register to memory DMA2D mode selected */
mbed_official 87:085cde657901 1173 if (hdma2d->Init.Mode == DMA2D_R2M)
mbed_official 87:085cde657901 1174 {
mbed_official 87:085cde657901 1175 tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
mbed_official 87:085cde657901 1176 tmp2 = pdata & DMA2D_OCOLR_RED_1;
mbed_official 87:085cde657901 1177 tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
mbed_official 87:085cde657901 1178 tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
mbed_official 87:085cde657901 1179
mbed_official 87:085cde657901 1180 /* Prepare the value to be wrote to the OCOLR register according to the color mode */
mbed_official 87:085cde657901 1181 if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
mbed_official 87:085cde657901 1182 {
mbed_official 87:085cde657901 1183 tmp = (tmp3 | tmp2 | tmp1| tmp4);
mbed_official 87:085cde657901 1184 }
mbed_official 87:085cde657901 1185 else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
mbed_official 87:085cde657901 1186 {
mbed_official 87:085cde657901 1187 tmp = (tmp3 | tmp2 | tmp4);
mbed_official 87:085cde657901 1188 }
mbed_official 87:085cde657901 1189 else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
mbed_official 87:085cde657901 1190 {
mbed_official 87:085cde657901 1191 tmp2 = (tmp2 >> 19);
mbed_official 87:085cde657901 1192 tmp3 = (tmp3 >> 10);
mbed_official 87:085cde657901 1193 tmp4 = (tmp4 >> 3 );
mbed_official 87:085cde657901 1194 tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
mbed_official 87:085cde657901 1195 }
mbed_official 87:085cde657901 1196 else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
mbed_official 87:085cde657901 1197 {
mbed_official 87:085cde657901 1198 tmp1 = (tmp1 >> 31);
mbed_official 87:085cde657901 1199 tmp2 = (tmp2 >> 19);
mbed_official 87:085cde657901 1200 tmp3 = (tmp3 >> 11);
mbed_official 87:085cde657901 1201 tmp4 = (tmp4 >> 3 );
mbed_official 87:085cde657901 1202 tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
mbed_official 87:085cde657901 1203 }
mbed_official 87:085cde657901 1204 else /* DMA2D_CMode = DMA2D_ARGB4444 */
mbed_official 87:085cde657901 1205 {
mbed_official 87:085cde657901 1206 tmp1 = (tmp1 >> 28);
mbed_official 87:085cde657901 1207 tmp2 = (tmp2 >> 20);
mbed_official 87:085cde657901 1208 tmp3 = (tmp3 >> 12);
mbed_official 87:085cde657901 1209 tmp4 = (tmp4 >> 4 );
mbed_official 87:085cde657901 1210 tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
mbed_official 87:085cde657901 1211 }
mbed_official 87:085cde657901 1212 /* Write to DMA2D OCOLR register */
mbed_official 87:085cde657901 1213 hdma2d->Instance->OCOLR = tmp;
mbed_official 87:085cde657901 1214 }
mbed_official 87:085cde657901 1215 else if ((hdma2d->LayerCfg[1].InputColorMode == CM_A4) || (hdma2d->LayerCfg[1].InputColorMode == CM_A8))
mbed_official 87:085cde657901 1216 {
mbed_official 87:085cde657901 1217 hdma2d->Instance->FGCOLR = pdata;
mbed_official 87:085cde657901 1218 }
mbed_official 87:085cde657901 1219 else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
mbed_official 87:085cde657901 1220 {
mbed_official 87:085cde657901 1221 /* Configure DMA2D source address */
mbed_official 87:085cde657901 1222 hdma2d->Instance->FGMAR = pdata;
mbed_official 87:085cde657901 1223 }
mbed_official 87:085cde657901 1224 }
mbed_official 87:085cde657901 1225
mbed_official 87:085cde657901 1226 /**
mbed_official 87:085cde657901 1227 * @}
mbed_official 87:085cde657901 1228 */
mbed_official 106:ced8cbb51063 1229 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 87:085cde657901 1230 #endif /* HAL_DMA2D_MODULE_ENABLED */
mbed_official 87:085cde657901 1231 /**
mbed_official 87:085cde657901 1232 * @}
mbed_official 87:085cde657901 1233 */
mbed_official 87:085cde657901 1234
mbed_official 87:085cde657901 1235 /**
mbed_official 87:085cde657901 1236 * @}
mbed_official 87:085cde657901 1237 */
mbed_official 87:085cde657901 1238
mbed_official 87:085cde657901 1239 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/