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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_tim.c@76:aeb1df146756, 2014-01-27 (annotated)

Committer:
mbed_official
Date:
Mon Jan 27 14:30:07 2014 +0000
Revision:
76:aeb1df146756
Child:
80:66393a7b209d
Synchronized with git revision a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd



Full URL: https://github.com/mbedmicro/mbed/commit/a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd/



Add NUCLEO_L152RE

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mbed_official 76:aeb1df146756 1 /**
mbed_official 76:aeb1df146756 2 ******************************************************************************
mbed_official 76:aeb1df146756 3 * @file stm32l1xx_tim.c
mbed_official 76:aeb1df146756 4 * @author MCD Application Team
mbed_official 76:aeb1df146756 5 * @version V1.2.0
mbed_official 76:aeb1df146756 6 * @date 22-February-2013
mbed_official 76:aeb1df146756 7 * @brief This file provides firmware functions to manage the following
mbed_official 76:aeb1df146756 8 * functionalities of the TIM peripheral:
mbed_official 76:aeb1df146756 9 * + TimeBase management
mbed_official 76:aeb1df146756 10 * + Output Compare management
mbed_official 76:aeb1df146756 11 * + Input Capture management
mbed_official 76:aeb1df146756 12 * + Interrupts, DMA and flags management
mbed_official 76:aeb1df146756 13 * + Clocks management
mbed_official 76:aeb1df146756 14 * + Synchronization management
mbed_official 76:aeb1df146756 15 * + Specific interface management
mbed_official 76:aeb1df146756 16 * + Specific remapping management
mbed_official 76:aeb1df146756 17 *
mbed_official 76:aeb1df146756 18 * @verbatim
mbed_official 76:aeb1df146756 19
mbed_official 76:aeb1df146756 20 ===============================================================================
mbed_official 76:aeb1df146756 21 ##### How to use this driver #####
mbed_official 76:aeb1df146756 22 ===============================================================================
mbed_official 76:aeb1df146756 23 [..] This driver provides functions to configure and program the TIM
mbed_official 76:aeb1df146756 24 of all STM32L1xx devices These functions are split in 8 groups:
mbed_official 76:aeb1df146756 25 (#) TIM TimeBase management: this group includes all needed functions
mbed_official 76:aeb1df146756 26 to configure the TM Timebase unit:
mbed_official 76:aeb1df146756 27 (++) Set/Get Prescaler.
mbed_official 76:aeb1df146756 28 (++) Set/Get Autoreload.
mbed_official 76:aeb1df146756 29 (++) Counter modes configuration.
mbed_official 76:aeb1df146756 30 (++) Set Clock division.
mbed_official 76:aeb1df146756 31 (++) Select the One Pulse mode.
mbed_official 76:aeb1df146756 32 (++) Update Request Configuration.
mbed_official 76:aeb1df146756 33 (++) Update Disable Configuration.
mbed_official 76:aeb1df146756 34 (++) Auto-Preload Configuration.
mbed_official 76:aeb1df146756 35 (++) Enable/Disable the counter.
mbed_official 76:aeb1df146756 36
mbed_official 76:aeb1df146756 37 (#) TIM Output Compare management: this group includes all needed
mbed_official 76:aeb1df146756 38 functions to configure the Capture/Compare unit used in Output
mbed_official 76:aeb1df146756 39 compare mode:
mbed_official 76:aeb1df146756 40 (++) Configure each channel, independently, in Output Compare mode.
mbed_official 76:aeb1df146756 41 (++) Select the output compare modes.
mbed_official 76:aeb1df146756 42 (++) Select the Polarities of each channel.
mbed_official 76:aeb1df146756 43 (++) Set/Get the Capture/Compare register values.
mbed_official 76:aeb1df146756 44 (++) Select the Output Compare Fast mode.
mbed_official 76:aeb1df146756 45 (++) Select the Output Compare Forced mode.
mbed_official 76:aeb1df146756 46 (++) Output Compare-Preload Configuration.
mbed_official 76:aeb1df146756 47 (++) Clear Output Compare Reference.
mbed_official 76:aeb1df146756 48 (++) Select the OCREF Clear signal.
mbed_official 76:aeb1df146756 49 (++) Enable/Disable the Capture/Compare Channels.
mbed_official 76:aeb1df146756 50
mbed_official 76:aeb1df146756 51 (#) TIM Input Capture management: this group includes all needed
mbed_official 76:aeb1df146756 52 functions to configure the Capture/Compare unit used in
mbed_official 76:aeb1df146756 53 Input Capture mode:
mbed_official 76:aeb1df146756 54 (++) Configure each channel in input capture mode.
mbed_official 76:aeb1df146756 55 (++) Configure Channel1/2 in PWM Input mode.
mbed_official 76:aeb1df146756 56 (++) Set the Input Capture Prescaler.
mbed_official 76:aeb1df146756 57 (++) Get the Capture/Compare values.
mbed_official 76:aeb1df146756 58
mbed_official 76:aeb1df146756 59 (#) TIM interrupts, DMA and flags management.
mbed_official 76:aeb1df146756 60 (++) Enable/Disable interrupt sources.
mbed_official 76:aeb1df146756 61 (++) Get flags status.
mbed_official 76:aeb1df146756 62 (++) Clear flags/ Pending bits.
mbed_official 76:aeb1df146756 63 (++) Enable/Disable DMA requests.
mbed_official 76:aeb1df146756 64 (++) Configure DMA burst mode.
mbed_official 76:aeb1df146756 65 (++) Select CaptureCompare DMA request.
mbed_official 76:aeb1df146756 66
mbed_official 76:aeb1df146756 67 (#) TIM clocks management: this group includes all needed functions
mbed_official 76:aeb1df146756 68 to configure the clock controller unit:
mbed_official 76:aeb1df146756 69 (++) Select internal/External clock.
mbed_official 76:aeb1df146756 70 (++) Select the external clock mode: ETR(Mode1/Mode2), TIx or ITRx.
mbed_official 76:aeb1df146756 71
mbed_official 76:aeb1df146756 72 (#) TIM synchronization management: this group includes all needed.
mbed_official 76:aeb1df146756 73 functions to configure the Synchronization unit:
mbed_official 76:aeb1df146756 74 (++) Select Input Trigger.
mbed_official 76:aeb1df146756 75 (++) Select Output Trigger.
mbed_official 76:aeb1df146756 76 (++) Select Master Slave Mode.
mbed_official 76:aeb1df146756 77 (++) ETR Configuration when used as external trigger.
mbed_official 76:aeb1df146756 78
mbed_official 76:aeb1df146756 79 (#) TIM specific interface management, this group includes all
mbed_official 76:aeb1df146756 80 needed functions to use the specific TIM interface:
mbed_official 76:aeb1df146756 81 (++) Encoder Interface Configuration.
mbed_official 76:aeb1df146756 82 (++) Select Hall Sensor.
mbed_official 76:aeb1df146756 83
mbed_official 76:aeb1df146756 84 (#) TIM specific remapping management includes the Remapping
mbed_official 76:aeb1df146756 85 configuration of specific timers
mbed_official 76:aeb1df146756 86
mbed_official 76:aeb1df146756 87 @endverbatim
mbed_official 76:aeb1df146756 88
mbed_official 76:aeb1df146756 89 ******************************************************************************
mbed_official 76:aeb1df146756 90 * @attention
mbed_official 76:aeb1df146756 91 *
mbed_official 76:aeb1df146756 92 * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
mbed_official 76:aeb1df146756 93 *
mbed_official 76:aeb1df146756 94 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
mbed_official 76:aeb1df146756 95 * You may not use this file except in compliance with the License.
mbed_official 76:aeb1df146756 96 * You may obtain a copy of the License at:
mbed_official 76:aeb1df146756 97 *
mbed_official 76:aeb1df146756 98 * http://www.st.com/software_license_agreement_liberty_v2
mbed_official 76:aeb1df146756 99 *
mbed_official 76:aeb1df146756 100 * Unless required by applicable law or agreed to in writing, software
mbed_official 76:aeb1df146756 101 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 76:aeb1df146756 102 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 76:aeb1df146756 103 * See the License for the specific language governing permissions and
mbed_official 76:aeb1df146756 104 * limitations under the License.
mbed_official 76:aeb1df146756 105 *
mbed_official 76:aeb1df146756 106 ******************************************************************************
mbed_official 76:aeb1df146756 107 */
mbed_official 76:aeb1df146756 108
mbed_official 76:aeb1df146756 109 /* Includes ------------------------------------------------------------------*/
mbed_official 76:aeb1df146756 110 #include "stm32l1xx_tim.h"
mbed_official 76:aeb1df146756 111 #include "stm32l1xx_rcc.h"
mbed_official 76:aeb1df146756 112
mbed_official 76:aeb1df146756 113 /** @addtogroup STM32L1xx_StdPeriph_Driver
mbed_official 76:aeb1df146756 114 * @{
mbed_official 76:aeb1df146756 115 */
mbed_official 76:aeb1df146756 116
mbed_official 76:aeb1df146756 117 /** @defgroup TIM
mbed_official 76:aeb1df146756 118 * @brief TIM driver modules
mbed_official 76:aeb1df146756 119 * @{
mbed_official 76:aeb1df146756 120 */
mbed_official 76:aeb1df146756 121
mbed_official 76:aeb1df146756 122 /* Private typedef -----------------------------------------------------------*/
mbed_official 76:aeb1df146756 123 /* Private define ------------------------------------------------------------*/
mbed_official 76:aeb1df146756 124
mbed_official 76:aeb1df146756 125 /* ---------------------- TIM registers bit mask ------------------------ */
mbed_official 76:aeb1df146756 126 #define SMCR_ETR_MASK ((uint16_t)0x00FF)
mbed_official 76:aeb1df146756 127 #define CCMR_OFFSET ((uint16_t)0x0018)
mbed_official 76:aeb1df146756 128 #define CCER_CCE_SET ((uint16_t)0x0001)
mbed_official 76:aeb1df146756 129
mbed_official 76:aeb1df146756 130 /* Private macro -------------------------------------------------------------*/
mbed_official 76:aeb1df146756 131 /* Private variables ---------------------------------------------------------*/
mbed_official 76:aeb1df146756 132 /* Private function prototypes -----------------------------------------------*/
mbed_official 76:aeb1df146756 133
mbed_official 76:aeb1df146756 134 static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official 76:aeb1df146756 135 uint16_t TIM_ICFilter);
mbed_official 76:aeb1df146756 136 static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official 76:aeb1df146756 137 uint16_t TIM_ICFilter);
mbed_official 76:aeb1df146756 138 static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official 76:aeb1df146756 139 uint16_t TIM_ICFilter);
mbed_official 76:aeb1df146756 140 static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official 76:aeb1df146756 141 uint16_t TIM_ICFilter);
mbed_official 76:aeb1df146756 142 /* Private functions ---------------------------------------------------------*/
mbed_official 76:aeb1df146756 143
mbed_official 76:aeb1df146756 144 /** @defgroup TIM_Private_Functions
mbed_official 76:aeb1df146756 145 * @{
mbed_official 76:aeb1df146756 146 */
mbed_official 76:aeb1df146756 147
mbed_official 76:aeb1df146756 148 /** @defgroup TIM_Group1 TimeBase management functions
mbed_official 76:aeb1df146756 149 * @brief TimeBase management functions
mbed_official 76:aeb1df146756 150 *
mbed_official 76:aeb1df146756 151 @verbatim
mbed_official 76:aeb1df146756 152 ===============================================================================
mbed_official 76:aeb1df146756 153 ##### TimeBase management functions #####
mbed_official 76:aeb1df146756 154 ===============================================================================
mbed_official 76:aeb1df146756 155
mbed_official 76:aeb1df146756 156 *** TIM Driver: how to use it in Timing(Time base) Mode ***
mbed_official 76:aeb1df146756 157 ===============================================================================
mbed_official 76:aeb1df146756 158 [..] To use the Timer in Timing(Time base) mode, the following steps are
mbed_official 76:aeb1df146756 159 mandatory:
mbed_official 76:aeb1df146756 160 (#) Enable TIM clock using
mbed_official 76:aeb1df146756 161 RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE) function.
mbed_official 76:aeb1df146756 162 (#) Fill the TIM_TimeBaseInitStruct with the desired parameters.
mbed_official 76:aeb1df146756 163 (#) Call TIM_TimeBaseInit(TIMx, &TIM_TimeBaseInitStruct) to configure
mbed_official 76:aeb1df146756 164 the Time Base unit with the corresponding configuration.
mbed_official 76:aeb1df146756 165 (#) Enable the NVIC if you need to generate the update interrupt.
mbed_official 76:aeb1df146756 166 (#) Enable the corresponding interrupt using the function
mbed_official 76:aeb1df146756 167 TIM_ITConfig(TIMx, TIM_IT_Update).
mbed_official 76:aeb1df146756 168 (#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official 76:aeb1df146756 169 [..]
mbed_official 76:aeb1df146756 170 (@) All other functions can be used seperatly to modify, if needed,
mbed_official 76:aeb1df146756 171 a specific feature of the Timer.
mbed_official 76:aeb1df146756 172
mbed_official 76:aeb1df146756 173 @endverbatim
mbed_official 76:aeb1df146756 174 * @{
mbed_official 76:aeb1df146756 175 */
mbed_official 76:aeb1df146756 176
mbed_official 76:aeb1df146756 177 /**
mbed_official 76:aeb1df146756 178 * @brief Deinitializes the TIMx peripheral registers to their default reset values.
mbed_official 76:aeb1df146756 179 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 180 * @retval None
mbed_official 76:aeb1df146756 181 *
mbed_official 76:aeb1df146756 182 */
mbed_official 76:aeb1df146756 183 void TIM_DeInit(TIM_TypeDef* TIMx)
mbed_official 76:aeb1df146756 184 {
mbed_official 76:aeb1df146756 185 /* Check the parameters */
mbed_official 76:aeb1df146756 186 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 187
mbed_official 76:aeb1df146756 188 if (TIMx == TIM2)
mbed_official 76:aeb1df146756 189 {
mbed_official 76:aeb1df146756 190 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE);
mbed_official 76:aeb1df146756 191 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE);
mbed_official 76:aeb1df146756 192 }
mbed_official 76:aeb1df146756 193 else if (TIMx == TIM3)
mbed_official 76:aeb1df146756 194 {
mbed_official 76:aeb1df146756 195 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE);
mbed_official 76:aeb1df146756 196 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE);
mbed_official 76:aeb1df146756 197 }
mbed_official 76:aeb1df146756 198 else if (TIMx == TIM4)
mbed_official 76:aeb1df146756 199 {
mbed_official 76:aeb1df146756 200 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE);
mbed_official 76:aeb1df146756 201 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE);
mbed_official 76:aeb1df146756 202 }
mbed_official 76:aeb1df146756 203 else if (TIMx == TIM5)
mbed_official 76:aeb1df146756 204 {
mbed_official 76:aeb1df146756 205 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE);
mbed_official 76:aeb1df146756 206 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE);
mbed_official 76:aeb1df146756 207 }
mbed_official 76:aeb1df146756 208 else if (TIMx == TIM6)
mbed_official 76:aeb1df146756 209 {
mbed_official 76:aeb1df146756 210 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE);
mbed_official 76:aeb1df146756 211 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE);
mbed_official 76:aeb1df146756 212 }
mbed_official 76:aeb1df146756 213 else if (TIMx == TIM7)
mbed_official 76:aeb1df146756 214 {
mbed_official 76:aeb1df146756 215 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE);
mbed_official 76:aeb1df146756 216 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE);
mbed_official 76:aeb1df146756 217 }
mbed_official 76:aeb1df146756 218
mbed_official 76:aeb1df146756 219 else if (TIMx == TIM9)
mbed_official 76:aeb1df146756 220 {
mbed_official 76:aeb1df146756 221 RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, ENABLE);
mbed_official 76:aeb1df146756 222 RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, DISABLE);
mbed_official 76:aeb1df146756 223 }
mbed_official 76:aeb1df146756 224 else if (TIMx == TIM10)
mbed_official 76:aeb1df146756 225 {
mbed_official 76:aeb1df146756 226 RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, ENABLE);
mbed_official 76:aeb1df146756 227 RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, DISABLE);
mbed_official 76:aeb1df146756 228 }
mbed_official 76:aeb1df146756 229 else
mbed_official 76:aeb1df146756 230 {
mbed_official 76:aeb1df146756 231 if (TIMx == TIM11)
mbed_official 76:aeb1df146756 232 {
mbed_official 76:aeb1df146756 233 RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, ENABLE);
mbed_official 76:aeb1df146756 234 RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, DISABLE);
mbed_official 76:aeb1df146756 235 }
mbed_official 76:aeb1df146756 236 }
mbed_official 76:aeb1df146756 237
mbed_official 76:aeb1df146756 238 }
mbed_official 76:aeb1df146756 239
mbed_official 76:aeb1df146756 240 /**
mbed_official 76:aeb1df146756 241 * @brief Initializes the TIMx Time Base Unit peripheral according to
mbed_official 76:aeb1df146756 242 * the specified parameters in the TIM_TimeBaseInitStruct.
mbed_official 76:aeb1df146756 243 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 244 * @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef
mbed_official 76:aeb1df146756 245 * structure that contains the configuration information for
mbed_official 76:aeb1df146756 246 * the specified TIM peripheral.
mbed_official 76:aeb1df146756 247 * @retval None
mbed_official 76:aeb1df146756 248 */
mbed_official 76:aeb1df146756 249 void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
mbed_official 76:aeb1df146756 250 {
mbed_official 76:aeb1df146756 251 uint16_t tmpcr1 = 0;
mbed_official 76:aeb1df146756 252
mbed_official 76:aeb1df146756 253 /* Check the parameters */
mbed_official 76:aeb1df146756 254 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 255 assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode));
mbed_official 76:aeb1df146756 256 assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision));
mbed_official 76:aeb1df146756 257
mbed_official 76:aeb1df146756 258 tmpcr1 = TIMx->CR1;
mbed_official 76:aeb1df146756 259
mbed_official 76:aeb1df146756 260 if(((TIMx) == TIM2) || ((TIMx) == TIM3) || ((TIMx) == TIM4) || ((TIMx) == TIM5))
mbed_official 76:aeb1df146756 261 {
mbed_official 76:aeb1df146756 262 /* Select the Counter Mode */
mbed_official 76:aeb1df146756 263 tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS)));
mbed_official 76:aeb1df146756 264 tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode;
mbed_official 76:aeb1df146756 265 }
mbed_official 76:aeb1df146756 266
mbed_official 76:aeb1df146756 267 if(((TIMx) != TIM6) && ((TIMx) != TIM7))
mbed_official 76:aeb1df146756 268 {
mbed_official 76:aeb1df146756 269 /* Set the clock division */
mbed_official 76:aeb1df146756 270 tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CR1_CKD));
mbed_official 76:aeb1df146756 271 tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision;
mbed_official 76:aeb1df146756 272 }
mbed_official 76:aeb1df146756 273
mbed_official 76:aeb1df146756 274 TIMx->CR1 = tmpcr1;
mbed_official 76:aeb1df146756 275
mbed_official 76:aeb1df146756 276 /* Set the Autoreload value */
mbed_official 76:aeb1df146756 277 TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ;
mbed_official 76:aeb1df146756 278
mbed_official 76:aeb1df146756 279 /* Set the Prescaler value */
mbed_official 76:aeb1df146756 280 TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;
mbed_official 76:aeb1df146756 281
mbed_official 76:aeb1df146756 282 /* Generate an update event to reload the Prescaler value immediatly */
mbed_official 76:aeb1df146756 283 TIMx->EGR = TIM_PSCReloadMode_Immediate;
mbed_official 76:aeb1df146756 284 }
mbed_official 76:aeb1df146756 285
mbed_official 76:aeb1df146756 286 /**
mbed_official 76:aeb1df146756 287 * @brief Fills each TIM_TimeBaseInitStruct member with its default value.
mbed_official 76:aeb1df146756 288 * @param TIM_TimeBaseInitStruct : pointer to a TIM_TimeBaseInitTypeDef
mbed_official 76:aeb1df146756 289 * structure which will be initialized.
mbed_official 76:aeb1df146756 290 * @retval None
mbed_official 76:aeb1df146756 291 */
mbed_official 76:aeb1df146756 292 void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
mbed_official 76:aeb1df146756 293 {
mbed_official 76:aeb1df146756 294 /* Set the default configuration */
mbed_official 76:aeb1df146756 295 TIM_TimeBaseInitStruct->TIM_Period = 0xFFFFFFFF;
mbed_official 76:aeb1df146756 296 TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000;
mbed_official 76:aeb1df146756 297 TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1;
mbed_official 76:aeb1df146756 298 TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up;
mbed_official 76:aeb1df146756 299 }
mbed_official 76:aeb1df146756 300
mbed_official 76:aeb1df146756 301 /**
mbed_official 76:aeb1df146756 302 * @brief Configures the TIMx Prescaler.
mbed_official 76:aeb1df146756 303 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 304 * @param Prescaler: specifies the Prescaler Register value.
mbed_official 76:aeb1df146756 305 * @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode
mbed_official 76:aeb1df146756 306 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 307 * @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event.
mbed_official 76:aeb1df146756 308 * @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediatly.
mbed_official 76:aeb1df146756 309 * @retval None
mbed_official 76:aeb1df146756 310 */
mbed_official 76:aeb1df146756 311 void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode)
mbed_official 76:aeb1df146756 312 {
mbed_official 76:aeb1df146756 313 /* Check the parameters */
mbed_official 76:aeb1df146756 314 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 315 assert_param(IS_TIM_PRESCALER_RELOAD(TIM_PSCReloadMode));
mbed_official 76:aeb1df146756 316
mbed_official 76:aeb1df146756 317 /* Set the Prescaler value */
mbed_official 76:aeb1df146756 318 TIMx->PSC = Prescaler;
mbed_official 76:aeb1df146756 319 /* Set or reset the UG Bit */
mbed_official 76:aeb1df146756 320 TIMx->EGR = TIM_PSCReloadMode;
mbed_official 76:aeb1df146756 321 }
mbed_official 76:aeb1df146756 322
mbed_official 76:aeb1df146756 323 /**
mbed_official 76:aeb1df146756 324 * @brief Specifies the TIMx Counter Mode to be used.
mbed_official 76:aeb1df146756 325 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 326 * @param TIM_CounterMode: specifies the Counter Mode to be used
mbed_official 76:aeb1df146756 327 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 328 * @arg TIM_CounterMode_Up: TIM Up Counting Mode.
mbed_official 76:aeb1df146756 329 * @arg TIM_CounterMode_Down: TIM Down Counting Mode.
mbed_official 76:aeb1df146756 330 * @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1.
mbed_official 76:aeb1df146756 331 * @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2.
mbed_official 76:aeb1df146756 332 * @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3.
mbed_official 76:aeb1df146756 333 * @retval None
mbed_official 76:aeb1df146756 334 */
mbed_official 76:aeb1df146756 335 void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode)
mbed_official 76:aeb1df146756 336 {
mbed_official 76:aeb1df146756 337 uint16_t tmpcr1 = 0;
mbed_official 76:aeb1df146756 338
mbed_official 76:aeb1df146756 339 /* Check the parameters */
mbed_official 76:aeb1df146756 340 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 341 assert_param(IS_TIM_COUNTER_MODE(TIM_CounterMode));
mbed_official 76:aeb1df146756 342
mbed_official 76:aeb1df146756 343 tmpcr1 = TIMx->CR1;
mbed_official 76:aeb1df146756 344 /* Reset the CMS and DIR Bits */
mbed_official 76:aeb1df146756 345 tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS)));
mbed_official 76:aeb1df146756 346 /* Set the Counter Mode */
mbed_official 76:aeb1df146756 347 tmpcr1 |= TIM_CounterMode;
mbed_official 76:aeb1df146756 348 /* Write to TIMx CR1 register */
mbed_official 76:aeb1df146756 349 TIMx->CR1 = tmpcr1;
mbed_official 76:aeb1df146756 350 }
mbed_official 76:aeb1df146756 351
mbed_official 76:aeb1df146756 352 /**
mbed_official 76:aeb1df146756 353 * @brief Sets the TIMx Counter Register value
mbed_official 76:aeb1df146756 354 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 355 * @param Counter: specifies the Counter register new value.
mbed_official 76:aeb1df146756 356 * @retval None
mbed_official 76:aeb1df146756 357 */
mbed_official 76:aeb1df146756 358 void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter)
mbed_official 76:aeb1df146756 359 {
mbed_official 76:aeb1df146756 360 /* Check the parameters */
mbed_official 76:aeb1df146756 361 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 362
mbed_official 76:aeb1df146756 363 /* Set the Counter Register value */
mbed_official 76:aeb1df146756 364 TIMx->CNT = Counter;
mbed_official 76:aeb1df146756 365 }
mbed_official 76:aeb1df146756 366
mbed_official 76:aeb1df146756 367 /**
mbed_official 76:aeb1df146756 368 * @brief Sets the TIMx Autoreload Register value
mbed_official 76:aeb1df146756 369 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 370 * @param Autoreload: specifies the Autoreload register new value.
mbed_official 76:aeb1df146756 371 * @retval None
mbed_official 76:aeb1df146756 372 */
mbed_official 76:aeb1df146756 373 void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload)
mbed_official 76:aeb1df146756 374 {
mbed_official 76:aeb1df146756 375 /* Check the parameters */
mbed_official 76:aeb1df146756 376 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 377
mbed_official 76:aeb1df146756 378 /* Set the Autoreload Register value */
mbed_official 76:aeb1df146756 379 TIMx->ARR = Autoreload;
mbed_official 76:aeb1df146756 380 }
mbed_official 76:aeb1df146756 381
mbed_official 76:aeb1df146756 382 /**
mbed_official 76:aeb1df146756 383 * @brief Gets the TIMx Counter value.
mbed_official 76:aeb1df146756 384 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 385 * @retval Counter Register value.
mbed_official 76:aeb1df146756 386 */
mbed_official 76:aeb1df146756 387 uint32_t TIM_GetCounter(TIM_TypeDef* TIMx)
mbed_official 76:aeb1df146756 388 {
mbed_official 76:aeb1df146756 389 /* Check the parameters */
mbed_official 76:aeb1df146756 390 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 391
mbed_official 76:aeb1df146756 392 /* Get the Counter Register value */
mbed_official 76:aeb1df146756 393 return TIMx->CNT;
mbed_official 76:aeb1df146756 394 }
mbed_official 76:aeb1df146756 395
mbed_official 76:aeb1df146756 396 /**
mbed_official 76:aeb1df146756 397 * @brief Gets the TIMx Prescaler value.
mbed_official 76:aeb1df146756 398 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 399 * @retval Prescaler Register value.
mbed_official 76:aeb1df146756 400 */
mbed_official 76:aeb1df146756 401 uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx)
mbed_official 76:aeb1df146756 402 {
mbed_official 76:aeb1df146756 403 /* Check the parameters */
mbed_official 76:aeb1df146756 404 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 405
mbed_official 76:aeb1df146756 406 /* Get the Prescaler Register value */
mbed_official 76:aeb1df146756 407 return TIMx->PSC;
mbed_official 76:aeb1df146756 408 }
mbed_official 76:aeb1df146756 409
mbed_official 76:aeb1df146756 410 /**
mbed_official 76:aeb1df146756 411 * @brief Enables or Disables the TIMx Update event.
mbed_official 76:aeb1df146756 412 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 413 * @param NewState: new state of the TIMx UDIS bit
mbed_official 76:aeb1df146756 414 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 415 * @retval None
mbed_official 76:aeb1df146756 416 */
mbed_official 76:aeb1df146756 417 void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official 76:aeb1df146756 418 {
mbed_official 76:aeb1df146756 419 /* Check the parameters */
mbed_official 76:aeb1df146756 420 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 421 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 422
mbed_official 76:aeb1df146756 423 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 424 {
mbed_official 76:aeb1df146756 425 /* Set the Update Disable Bit */
mbed_official 76:aeb1df146756 426 TIMx->CR1 |= TIM_CR1_UDIS;
mbed_official 76:aeb1df146756 427 }
mbed_official 76:aeb1df146756 428 else
mbed_official 76:aeb1df146756 429 {
mbed_official 76:aeb1df146756 430 /* Reset the Update Disable Bit */
mbed_official 76:aeb1df146756 431 TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_UDIS);
mbed_official 76:aeb1df146756 432 }
mbed_official 76:aeb1df146756 433 }
mbed_official 76:aeb1df146756 434
mbed_official 76:aeb1df146756 435 /**
mbed_official 76:aeb1df146756 436 * @brief Configures the TIMx Update Request Interrupt source.
mbed_official 76:aeb1df146756 437 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 438 * @param TIM_UpdateSource: specifies the Update source.
mbed_official 76:aeb1df146756 439 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 440 * @arg TIM_UpdateSource_Global: Source of update is the counter overflow/underflow
mbed_official 76:aeb1df146756 441 or the setting of UG bit, or an update generation
mbed_official 76:aeb1df146756 442 through the slave mode controller.
mbed_official 76:aeb1df146756 443 * @arg TIM_UpdateSource_Regular: Source of update is counter overflow/underflow.
mbed_official 76:aeb1df146756 444 * @retval None
mbed_official 76:aeb1df146756 445 */
mbed_official 76:aeb1df146756 446 void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource)
mbed_official 76:aeb1df146756 447 {
mbed_official 76:aeb1df146756 448 /* Check the parameters */
mbed_official 76:aeb1df146756 449 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 450 assert_param(IS_TIM_UPDATE_SOURCE(TIM_UpdateSource));
mbed_official 76:aeb1df146756 451
mbed_official 76:aeb1df146756 452 if (TIM_UpdateSource != TIM_UpdateSource_Global)
mbed_official 76:aeb1df146756 453 {
mbed_official 76:aeb1df146756 454 /* Set the URS Bit */
mbed_official 76:aeb1df146756 455 TIMx->CR1 |= TIM_CR1_URS;
mbed_official 76:aeb1df146756 456 }
mbed_official 76:aeb1df146756 457 else
mbed_official 76:aeb1df146756 458 {
mbed_official 76:aeb1df146756 459 /* Reset the URS Bit */
mbed_official 76:aeb1df146756 460 TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_URS);
mbed_official 76:aeb1df146756 461 }
mbed_official 76:aeb1df146756 462 }
mbed_official 76:aeb1df146756 463
mbed_official 76:aeb1df146756 464 /**
mbed_official 76:aeb1df146756 465 * @brief Enables or disables TIMx peripheral Preload register on ARR.
mbed_official 76:aeb1df146756 466 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 467 * @param NewState: new state of the TIMx peripheral Preload register
mbed_official 76:aeb1df146756 468 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 469 * @retval None
mbed_official 76:aeb1df146756 470 */
mbed_official 76:aeb1df146756 471 void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official 76:aeb1df146756 472 {
mbed_official 76:aeb1df146756 473 /* Check the parameters */
mbed_official 76:aeb1df146756 474 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 475 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 476
mbed_official 76:aeb1df146756 477 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 478 {
mbed_official 76:aeb1df146756 479 /* Set the ARR Preload Bit */
mbed_official 76:aeb1df146756 480 TIMx->CR1 |= TIM_CR1_ARPE;
mbed_official 76:aeb1df146756 481 }
mbed_official 76:aeb1df146756 482 else
mbed_official 76:aeb1df146756 483 {
mbed_official 76:aeb1df146756 484 /* Reset the ARR Preload Bit */
mbed_official 76:aeb1df146756 485 TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_ARPE);
mbed_official 76:aeb1df146756 486 }
mbed_official 76:aeb1df146756 487 }
mbed_official 76:aeb1df146756 488
mbed_official 76:aeb1df146756 489 /**
mbed_official 76:aeb1df146756 490 * @brief Selects the TIMx's One Pulse Mode.
mbed_official 76:aeb1df146756 491 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 492 * @param TIM_OPMode: specifies the OPM Mode to be used.
mbed_official 76:aeb1df146756 493 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 494 * @arg TIM_OPMode_Single:: TIM One Pulse Single Mode (Counter stops counting
mbed_official 76:aeb1df146756 495 * at the next update event (clearing the bit CEN)).
mbed_official 76:aeb1df146756 496 * @arg TIM_OPMode_Repetitive: TIM One Pulse Repetitive Mode
mbed_official 76:aeb1df146756 497 * (Counter is not stopped at update event).
mbed_official 76:aeb1df146756 498 * @retval None
mbed_official 76:aeb1df146756 499 */
mbed_official 76:aeb1df146756 500 void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode)
mbed_official 76:aeb1df146756 501 {
mbed_official 76:aeb1df146756 502 /* Check the parameters */
mbed_official 76:aeb1df146756 503 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 504 assert_param(IS_TIM_OPM_MODE(TIM_OPMode));
mbed_official 76:aeb1df146756 505
mbed_official 76:aeb1df146756 506 /* Reset the OPM Bit */
mbed_official 76:aeb1df146756 507 TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_OPM);
mbed_official 76:aeb1df146756 508 /* Configure the OPM Mode */
mbed_official 76:aeb1df146756 509 TIMx->CR1 |= TIM_OPMode;
mbed_official 76:aeb1df146756 510 }
mbed_official 76:aeb1df146756 511
mbed_official 76:aeb1df146756 512 /**
mbed_official 76:aeb1df146756 513 * @brief Sets the TIMx Clock Division value.
mbed_official 76:aeb1df146756 514 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 515 * @param TIM_CKD: specifies the clock division value.
mbed_official 76:aeb1df146756 516 * This parameter can be one of the following value:
mbed_official 76:aeb1df146756 517 * @arg TIM_CKD_DIV1: TDTS = Tck_tim.
mbed_official 76:aeb1df146756 518 * @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim.
mbed_official 76:aeb1df146756 519 * @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim.
mbed_official 76:aeb1df146756 520 * @retval None
mbed_official 76:aeb1df146756 521 */
mbed_official 76:aeb1df146756 522 void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD)
mbed_official 76:aeb1df146756 523 {
mbed_official 76:aeb1df146756 524 /* Check the parameters */
mbed_official 76:aeb1df146756 525 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 526 assert_param(IS_TIM_CKD_DIV(TIM_CKD));
mbed_official 76:aeb1df146756 527
mbed_official 76:aeb1df146756 528 /* Reset the CKD Bits */
mbed_official 76:aeb1df146756 529 TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_CKD);
mbed_official 76:aeb1df146756 530 /* Set the CKD value */
mbed_official 76:aeb1df146756 531 TIMx->CR1 |= TIM_CKD;
mbed_official 76:aeb1df146756 532 }
mbed_official 76:aeb1df146756 533
mbed_official 76:aeb1df146756 534 /**
mbed_official 76:aeb1df146756 535 * @brief Enables or disables the specified TIM peripheral.
mbed_official 76:aeb1df146756 536 * @param TIMx: where x can be 2 to 11 to select the TIMx peripheral.
mbed_official 76:aeb1df146756 537 * @param NewState: new state of the TIMx peripheral.
mbed_official 76:aeb1df146756 538 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 539 * @retval None
mbed_official 76:aeb1df146756 540 */
mbed_official 76:aeb1df146756 541 void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official 76:aeb1df146756 542 {
mbed_official 76:aeb1df146756 543 /* Check the parameters */
mbed_official 76:aeb1df146756 544 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 545 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 546
mbed_official 76:aeb1df146756 547 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 548 {
mbed_official 76:aeb1df146756 549 /* Enable the TIM Counter */
mbed_official 76:aeb1df146756 550 TIMx->CR1 |= TIM_CR1_CEN;
mbed_official 76:aeb1df146756 551 }
mbed_official 76:aeb1df146756 552 else
mbed_official 76:aeb1df146756 553 {
mbed_official 76:aeb1df146756 554 /* Disable the TIM Counter */
mbed_official 76:aeb1df146756 555 TIMx->CR1 &= (uint16_t)(~((uint16_t)TIM_CR1_CEN));
mbed_official 76:aeb1df146756 556 }
mbed_official 76:aeb1df146756 557 }
mbed_official 76:aeb1df146756 558
mbed_official 76:aeb1df146756 559 /**
mbed_official 76:aeb1df146756 560 * @}
mbed_official 76:aeb1df146756 561 */
mbed_official 76:aeb1df146756 562
mbed_official 76:aeb1df146756 563 /** @defgroup TIM_Group2 Output Compare management functions
mbed_official 76:aeb1df146756 564 * @brief Output Compare management functions
mbed_official 76:aeb1df146756 565 *
mbed_official 76:aeb1df146756 566 @verbatim
mbed_official 76:aeb1df146756 567 ===============================================================================
mbed_official 76:aeb1df146756 568 ##### Output Compare management functions #####
mbed_official 76:aeb1df146756 569 ===============================================================================
mbed_official 76:aeb1df146756 570 *** TIM Driver: how to use it in Output Compare Mode ***
mbed_official 76:aeb1df146756 571 ===============================================================================
mbed_official 76:aeb1df146756 572 [..] To use the Timer in Output Compare mode, the following steps are mandatory:
mbed_official 76:aeb1df146756 573 (#) Enable TIM clock using
mbed_official 76:aeb1df146756 574 RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE) function.
mbed_official 76:aeb1df146756 575 (#) Configure the TIM pins by configuring the corresponding GPIO pins
mbed_official 76:aeb1df146756 576 (#) Configure the Time base unit as described in the first part of this
mbed_official 76:aeb1df146756 577 driver, if needed, else the Timer will run with the default
mbed_official 76:aeb1df146756 578 configuration:
mbed_official 76:aeb1df146756 579 (++) Autoreload value = 0xFFFF.
mbed_official 76:aeb1df146756 580 (++) Prescaler value = 0x0000.
mbed_official 76:aeb1df146756 581 (++) Counter mode = Up counting.
mbed_official 76:aeb1df146756 582 (++) Clock Division = TIM_CKD_DIV1.
mbed_official 76:aeb1df146756 583 (#) Fill the TIM_OCInitStruct with the desired parameters including:
mbed_official 76:aeb1df146756 584 (++) The TIM Output Compare mode: TIM_OCMode.
mbed_official 76:aeb1df146756 585 (++) TIM Output State: TIM_OutputState.
mbed_official 76:aeb1df146756 586 (++) TIM Pulse value: TIM_Pulse.
mbed_official 76:aeb1df146756 587 (++) TIM Output Compare Polarity : TIM_OCPolarity.
mbed_official 76:aeb1df146756 588 (#) Call TIM_OCxInit(TIMx, &TIM_OCInitStruct) to configure the desired
mbed_official 76:aeb1df146756 589 channel with the corresponding configuration.
mbed_official 76:aeb1df146756 590 (#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official 76:aeb1df146756 591 [..]
mbed_official 76:aeb1df146756 592 (@) All other functions can be used separately to modify, if needed,
mbed_official 76:aeb1df146756 593 a specific feature of the Timer.
mbed_official 76:aeb1df146756 594 (@) In case of PWM mode, this function is mandatory:
mbed_official 76:aeb1df146756 595 TIM_OCxPreloadConfig(TIMx, TIM_OCPreload_ENABLE).
mbed_official 76:aeb1df146756 596 (@) If the corresponding interrupt or DMA request are needed, the user should:
mbed_official 76:aeb1df146756 597 (#@) Enable the NVIC (or the DMA) to use the TIM interrupts (or DMA requests).
mbed_official 76:aeb1df146756 598 (#@) Enable the corresponding interrupt (or DMA request) using the function
mbed_official 76:aeb1df146756 599 TIM_ITConfig(TIMx, TIM_IT_CCx) (or TIM_DMA_Cmd(TIMx, TIM_DMA_CCx)).
mbed_official 76:aeb1df146756 600
mbed_official 76:aeb1df146756 601 @endverbatim
mbed_official 76:aeb1df146756 602 * @{
mbed_official 76:aeb1df146756 603 */
mbed_official 76:aeb1df146756 604
mbed_official 76:aeb1df146756 605 /**
mbed_official 76:aeb1df146756 606 * @brief Initializes the TIMx Channel1 according to the specified
mbed_official 76:aeb1df146756 607 * parameters in the TIM_OCInitStruct.
mbed_official 76:aeb1df146756 608 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 609 * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official 76:aeb1df146756 610 * that contains the configuration information for the specified TIM
mbed_official 76:aeb1df146756 611 * peripheral.
mbed_official 76:aeb1df146756 612 * @retval None
mbed_official 76:aeb1df146756 613 */
mbed_official 76:aeb1df146756 614 void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official 76:aeb1df146756 615 {
mbed_official 76:aeb1df146756 616 uint16_t tmpccmrx = 0, tmpccer = 0;
mbed_official 76:aeb1df146756 617
mbed_official 76:aeb1df146756 618 /* Check the parameters */
mbed_official 76:aeb1df146756 619 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 620 assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official 76:aeb1df146756 621 assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official 76:aeb1df146756 622 assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official 76:aeb1df146756 623 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 76:aeb1df146756 624 TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E);
mbed_official 76:aeb1df146756 625
mbed_official 76:aeb1df146756 626 /* Get the TIMx CCER register value */
mbed_official 76:aeb1df146756 627 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 628
mbed_official 76:aeb1df146756 629 /* Get the TIMx CCMR1 register value */
mbed_official 76:aeb1df146756 630 tmpccmrx = TIMx->CCMR1;
mbed_official 76:aeb1df146756 631
mbed_official 76:aeb1df146756 632 /* Reset the Output Compare Mode Bits */
mbed_official 76:aeb1df146756 633 tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC1M));
mbed_official 76:aeb1df146756 634 tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC1S));
mbed_official 76:aeb1df146756 635
mbed_official 76:aeb1df146756 636 /* Select the Output Compare Mode */
mbed_official 76:aeb1df146756 637 tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;
mbed_official 76:aeb1df146756 638
mbed_official 76:aeb1df146756 639 /* Reset the Output Polarity level */
mbed_official 76:aeb1df146756 640 tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P));
mbed_official 76:aeb1df146756 641 /* Set the Output Compare Polarity */
mbed_official 76:aeb1df146756 642 tmpccer |= TIM_OCInitStruct->TIM_OCPolarity;
mbed_official 76:aeb1df146756 643
mbed_official 76:aeb1df146756 644 /* Set the Output State */
mbed_official 76:aeb1df146756 645 tmpccer |= TIM_OCInitStruct->TIM_OutputState;
mbed_official 76:aeb1df146756 646
mbed_official 76:aeb1df146756 647 /* Set the Capture Compare Register value */
mbed_official 76:aeb1df146756 648 TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse;
mbed_official 76:aeb1df146756 649
mbed_official 76:aeb1df146756 650 /* Write to TIMx CCMR1 */
mbed_official 76:aeb1df146756 651 TIMx->CCMR1 = tmpccmrx;
mbed_official 76:aeb1df146756 652
mbed_official 76:aeb1df146756 653 /* Write to TIMx CCER */
mbed_official 76:aeb1df146756 654 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 655 }
mbed_official 76:aeb1df146756 656
mbed_official 76:aeb1df146756 657 /**
mbed_official 76:aeb1df146756 658 * @brief Initializes the TIMx Channel2 according to the specified
mbed_official 76:aeb1df146756 659 * parameters in the TIM_OCInitStruct.
mbed_official 76:aeb1df146756 660 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 661 * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official 76:aeb1df146756 662 * that contains the configuration information for the specified TIM
mbed_official 76:aeb1df146756 663 * peripheral.
mbed_official 76:aeb1df146756 664 * @retval None
mbed_official 76:aeb1df146756 665 */
mbed_official 76:aeb1df146756 666 void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official 76:aeb1df146756 667 {
mbed_official 76:aeb1df146756 668 uint16_t tmpccmrx = 0, tmpccer = 0;
mbed_official 76:aeb1df146756 669
mbed_official 76:aeb1df146756 670 /* Check the parameters */
mbed_official 76:aeb1df146756 671 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 672 assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official 76:aeb1df146756 673 assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official 76:aeb1df146756 674 assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official 76:aeb1df146756 675 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 76:aeb1df146756 676 TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC2E));
mbed_official 76:aeb1df146756 677
mbed_official 76:aeb1df146756 678 /* Get the TIMx CCER register value */
mbed_official 76:aeb1df146756 679 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 680
mbed_official 76:aeb1df146756 681 /* Get the TIMx CCMR1 register value */
mbed_official 76:aeb1df146756 682 tmpccmrx = TIMx->CCMR1;
mbed_official 76:aeb1df146756 683
mbed_official 76:aeb1df146756 684 /* Reset the Output Compare Mode Bits */
mbed_official 76:aeb1df146756 685 tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC2M));
mbed_official 76:aeb1df146756 686
mbed_official 76:aeb1df146756 687 /* Select the Output Compare Mode */
mbed_official 76:aeb1df146756 688 tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
mbed_official 76:aeb1df146756 689
mbed_official 76:aeb1df146756 690 /* Reset the Output Polarity level */
mbed_official 76:aeb1df146756 691 tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2P));
mbed_official 76:aeb1df146756 692 /* Set the Output Compare Polarity */
mbed_official 76:aeb1df146756 693 tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 4);
mbed_official 76:aeb1df146756 694
mbed_official 76:aeb1df146756 695 /* Set the Output State */
mbed_official 76:aeb1df146756 696 tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4);
mbed_official 76:aeb1df146756 697
mbed_official 76:aeb1df146756 698 /* Set the Capture Compare Register value */
mbed_official 76:aeb1df146756 699 TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse;
mbed_official 76:aeb1df146756 700
mbed_official 76:aeb1df146756 701 /* Write to TIMx CCMR1 */
mbed_official 76:aeb1df146756 702 TIMx->CCMR1 = tmpccmrx;
mbed_official 76:aeb1df146756 703
mbed_official 76:aeb1df146756 704 /* Write to TIMx CCER */
mbed_official 76:aeb1df146756 705 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 706 }
mbed_official 76:aeb1df146756 707
mbed_official 76:aeb1df146756 708 /**
mbed_official 76:aeb1df146756 709 * @brief Initializes the TIMx Channel3 according to the specified
mbed_official 76:aeb1df146756 710 * parameters in the TIM_OCInitStruct.
mbed_official 76:aeb1df146756 711 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 712 * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official 76:aeb1df146756 713 * that contains the configuration information for the specified TIM
mbed_official 76:aeb1df146756 714 * peripheral.
mbed_official 76:aeb1df146756 715 * @retval None
mbed_official 76:aeb1df146756 716 */
mbed_official 76:aeb1df146756 717 void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official 76:aeb1df146756 718 {
mbed_official 76:aeb1df146756 719 uint16_t tmpccmrx = 0, tmpccer = 0;
mbed_official 76:aeb1df146756 720
mbed_official 76:aeb1df146756 721 /* Check the parameters */
mbed_official 76:aeb1df146756 722 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 723 assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official 76:aeb1df146756 724 assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official 76:aeb1df146756 725 assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official 76:aeb1df146756 726
mbed_official 76:aeb1df146756 727 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 76:aeb1df146756 728 TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC3E));
mbed_official 76:aeb1df146756 729
mbed_official 76:aeb1df146756 730 /* Get the TIMx CCER register value */
mbed_official 76:aeb1df146756 731 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 732
mbed_official 76:aeb1df146756 733 /* Get the TIMx CCMR2 register value */
mbed_official 76:aeb1df146756 734 tmpccmrx = TIMx->CCMR2;
mbed_official 76:aeb1df146756 735
mbed_official 76:aeb1df146756 736 /* Reset the Output Compare Mode Bits */
mbed_official 76:aeb1df146756 737 tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC3M));
mbed_official 76:aeb1df146756 738
mbed_official 76:aeb1df146756 739 /* Select the Output Compare Mode */
mbed_official 76:aeb1df146756 740 tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;
mbed_official 76:aeb1df146756 741
mbed_official 76:aeb1df146756 742 /* Reset the Output Polarity level */
mbed_official 76:aeb1df146756 743 tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3P));
mbed_official 76:aeb1df146756 744 /* Set the Output Compare Polarity */
mbed_official 76:aeb1df146756 745 tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 8);
mbed_official 76:aeb1df146756 746
mbed_official 76:aeb1df146756 747 /* Set the Output State */
mbed_official 76:aeb1df146756 748 tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8);
mbed_official 76:aeb1df146756 749
mbed_official 76:aeb1df146756 750 /* Set the Capture Compare Register value */
mbed_official 76:aeb1df146756 751 TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse;
mbed_official 76:aeb1df146756 752
mbed_official 76:aeb1df146756 753 /* Write to TIMx CCMR2 */
mbed_official 76:aeb1df146756 754 TIMx->CCMR2 = tmpccmrx;
mbed_official 76:aeb1df146756 755
mbed_official 76:aeb1df146756 756 /* Write to TIMx CCER */
mbed_official 76:aeb1df146756 757 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 758 }
mbed_official 76:aeb1df146756 759
mbed_official 76:aeb1df146756 760 /**
mbed_official 76:aeb1df146756 761 * @brief Initializes the TIMx Channel4 according to the specified
mbed_official 76:aeb1df146756 762 * parameters in the TIM_OCInitStruct.
mbed_official 76:aeb1df146756 763 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 764 * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official 76:aeb1df146756 765 * that contains the configuration information for the specified TIM
mbed_official 76:aeb1df146756 766 * peripheral.
mbed_official 76:aeb1df146756 767 * @retval None
mbed_official 76:aeb1df146756 768 */
mbed_official 76:aeb1df146756 769 void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official 76:aeb1df146756 770 {
mbed_official 76:aeb1df146756 771 uint16_t tmpccmrx = 0, tmpccer = 0;
mbed_official 76:aeb1df146756 772
mbed_official 76:aeb1df146756 773 /* Check the parameters */
mbed_official 76:aeb1df146756 774 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 775 assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official 76:aeb1df146756 776 assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official 76:aeb1df146756 777 assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official 76:aeb1df146756 778
mbed_official 76:aeb1df146756 779 /* Disable the Channel 2: Reset the CC4E Bit */
mbed_official 76:aeb1df146756 780 TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC4E));
mbed_official 76:aeb1df146756 781
mbed_official 76:aeb1df146756 782 /* Get the TIMx CCER register value */
mbed_official 76:aeb1df146756 783 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 784
mbed_official 76:aeb1df146756 785 /* Get the TIMx CCMR2 register value */
mbed_official 76:aeb1df146756 786 tmpccmrx = TIMx->CCMR2;
mbed_official 76:aeb1df146756 787
mbed_official 76:aeb1df146756 788 /* Reset the Output Compare Mode Bits */
mbed_official 76:aeb1df146756 789 tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC4M));
mbed_official 76:aeb1df146756 790
mbed_official 76:aeb1df146756 791 /* Select the Output Compare Mode */
mbed_official 76:aeb1df146756 792 tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
mbed_official 76:aeb1df146756 793
mbed_official 76:aeb1df146756 794 /* Reset the Output Polarity level */
mbed_official 76:aeb1df146756 795 tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC4P));
mbed_official 76:aeb1df146756 796 /* Set the Output Compare Polarity */
mbed_official 76:aeb1df146756 797 tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 12);
mbed_official 76:aeb1df146756 798
mbed_official 76:aeb1df146756 799 /* Set the Output State */
mbed_official 76:aeb1df146756 800 tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12);
mbed_official 76:aeb1df146756 801
mbed_official 76:aeb1df146756 802 /* Set the Capture Compare Register value */
mbed_official 76:aeb1df146756 803 TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse;
mbed_official 76:aeb1df146756 804
mbed_official 76:aeb1df146756 805 /* Write to TIMx CCMR2 */
mbed_official 76:aeb1df146756 806 TIMx->CCMR2 = tmpccmrx;
mbed_official 76:aeb1df146756 807
mbed_official 76:aeb1df146756 808 /* Write to TIMx CCER */
mbed_official 76:aeb1df146756 809 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 810 }
mbed_official 76:aeb1df146756 811
mbed_official 76:aeb1df146756 812 /**
mbed_official 76:aeb1df146756 813 * @brief Fills each TIM_OCInitStruct member with its default value.
mbed_official 76:aeb1df146756 814 * @param TIM_OCInitStruct : pointer to a TIM_OCInitTypeDef structure which will
mbed_official 76:aeb1df146756 815 * be initialized.
mbed_official 76:aeb1df146756 816 * @retval None
mbed_official 76:aeb1df146756 817 */
mbed_official 76:aeb1df146756 818 void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official 76:aeb1df146756 819 {
mbed_official 76:aeb1df146756 820 /* Set the default configuration */
mbed_official 76:aeb1df146756 821 TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing;
mbed_official 76:aeb1df146756 822 TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable;
mbed_official 76:aeb1df146756 823 TIM_OCInitStruct->TIM_Pulse = 0x0000;
mbed_official 76:aeb1df146756 824 TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High;
mbed_official 76:aeb1df146756 825 }
mbed_official 76:aeb1df146756 826
mbed_official 76:aeb1df146756 827 /**
mbed_official 76:aeb1df146756 828 * @brief Selects the TIM Output Compare Mode.
mbed_official 76:aeb1df146756 829 * @note This function disables the selected channel before changing the Output
mbed_official 76:aeb1df146756 830 * Compare Mode.
mbed_official 76:aeb1df146756 831 * User has to enable this channel using TIM_CCxCmd and TIM_CCxNCmd functions.
mbed_official 76:aeb1df146756 832 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 833 * @param TIM_Channel: specifies the TIM Channel.
mbed_official 76:aeb1df146756 834 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 835 * @arg TIM_Channel_1: TIM Channel 1.
mbed_official 76:aeb1df146756 836 * @arg TIM_Channel_2: TIM Channel 2.
mbed_official 76:aeb1df146756 837 * @arg TIM_Channel_3: TIM Channel 3.
mbed_official 76:aeb1df146756 838 * @arg TIM_Channel_4: TIM Channel 4.
mbed_official 76:aeb1df146756 839 * @param TIM_OCMode: specifies the TIM Output Compare Mode.
mbed_official 76:aeb1df146756 840 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 841 * @arg TIM_OCMode_Timing: TIM Output Compare Timing mode.
mbed_official 76:aeb1df146756 842 * @arg TIM_OCMode_Active: TIM Output Compare Active mode.
mbed_official 76:aeb1df146756 843 * @arg TIM_OCMode_Inactive: TIM Output Compare Inactive mode.
mbed_official 76:aeb1df146756 844 * @arg TIM_OCMode_Toggle: TIM Output Compare Toggle mode.
mbed_official 76:aeb1df146756 845 * @arg TIM_OCMode_PWM1: TIM Output Compare PWM1 mode.
mbed_official 76:aeb1df146756 846 * @arg TIM_OCMode_PWM2: TIM Output Compare PWM2 mode.
mbed_official 76:aeb1df146756 847 * @arg TIM_ForcedAction_Active: TIM Forced Action Active mode.
mbed_official 76:aeb1df146756 848 * @arg TIM_ForcedAction_InActive: TIM Forced Action Inactive mode.
mbed_official 76:aeb1df146756 849 * @retval None
mbed_official 76:aeb1df146756 850 */
mbed_official 76:aeb1df146756 851 void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode)
mbed_official 76:aeb1df146756 852 {
mbed_official 76:aeb1df146756 853 uint32_t tmp = 0;
mbed_official 76:aeb1df146756 854 uint16_t tmp1 = 0;
mbed_official 76:aeb1df146756 855
mbed_official 76:aeb1df146756 856 /* Check the parameters */
mbed_official 76:aeb1df146756 857 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 858 assert_param(IS_TIM_OCM(TIM_OCMode));
mbed_official 76:aeb1df146756 859
mbed_official 76:aeb1df146756 860 tmp = (uint32_t) TIMx;
mbed_official 76:aeb1df146756 861 tmp += CCMR_OFFSET;
mbed_official 76:aeb1df146756 862
mbed_official 76:aeb1df146756 863 tmp1 = CCER_CCE_SET << (uint16_t)TIM_Channel;
mbed_official 76:aeb1df146756 864
mbed_official 76:aeb1df146756 865 /* Disable the Channel: Reset the CCxE Bit */
mbed_official 76:aeb1df146756 866 TIMx->CCER &= (uint16_t) ~tmp1;
mbed_official 76:aeb1df146756 867
mbed_official 76:aeb1df146756 868 if((TIM_Channel == TIM_Channel_1) ||(TIM_Channel == TIM_Channel_3))
mbed_official 76:aeb1df146756 869 {
mbed_official 76:aeb1df146756 870 tmp += (TIM_Channel>>1);
mbed_official 76:aeb1df146756 871
mbed_official 76:aeb1df146756 872 /* Reset the OCxM bits in the CCMRx register */
mbed_official 76:aeb1df146756 873 *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC1M);
mbed_official 76:aeb1df146756 874
mbed_official 76:aeb1df146756 875 /* Configure the OCxM bits in the CCMRx register */
mbed_official 76:aeb1df146756 876 *(__IO uint32_t *) tmp |= TIM_OCMode;
mbed_official 76:aeb1df146756 877 }
mbed_official 76:aeb1df146756 878 else
mbed_official 76:aeb1df146756 879 {
mbed_official 76:aeb1df146756 880 tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1;
mbed_official 76:aeb1df146756 881
mbed_official 76:aeb1df146756 882 /* Reset the OCxM bits in the CCMRx register */
mbed_official 76:aeb1df146756 883 *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC2M);
mbed_official 76:aeb1df146756 884
mbed_official 76:aeb1df146756 885 /* Configure the OCxM bits in the CCMRx register */
mbed_official 76:aeb1df146756 886 *(__IO uint32_t *) tmp |= (uint16_t)(TIM_OCMode << 8);
mbed_official 76:aeb1df146756 887 }
mbed_official 76:aeb1df146756 888 }
mbed_official 76:aeb1df146756 889
mbed_official 76:aeb1df146756 890 /**
mbed_official 76:aeb1df146756 891 * @brief Sets the TIMx Capture Compare1 Register value
mbed_official 76:aeb1df146756 892 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 893 * @param Compare1: specifies the Capture Compare1 register new value.
mbed_official 76:aeb1df146756 894 * @retval None
mbed_official 76:aeb1df146756 895 */
mbed_official 76:aeb1df146756 896 void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1)
mbed_official 76:aeb1df146756 897 {
mbed_official 76:aeb1df146756 898 /* Check the parameters */
mbed_official 76:aeb1df146756 899 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 900
mbed_official 76:aeb1df146756 901 /* Set the Capture Compare1 Register value */
mbed_official 76:aeb1df146756 902 TIMx->CCR1 = Compare1;
mbed_official 76:aeb1df146756 903 }
mbed_official 76:aeb1df146756 904
mbed_official 76:aeb1df146756 905 /**
mbed_official 76:aeb1df146756 906 * @brief Sets the TIMx Capture Compare2 Register value.
mbed_official 76:aeb1df146756 907 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 908 * @param Compare2: specifies the Capture Compare2 register new value.
mbed_official 76:aeb1df146756 909 * @retval None
mbed_official 76:aeb1df146756 910 */
mbed_official 76:aeb1df146756 911 void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2)
mbed_official 76:aeb1df146756 912 {
mbed_official 76:aeb1df146756 913 /* Check the parameters */
mbed_official 76:aeb1df146756 914 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 915
mbed_official 76:aeb1df146756 916 /* Set the Capture Compare2 Register value */
mbed_official 76:aeb1df146756 917 TIMx->CCR2 = Compare2;
mbed_official 76:aeb1df146756 918 }
mbed_official 76:aeb1df146756 919
mbed_official 76:aeb1df146756 920 /**
mbed_official 76:aeb1df146756 921 * @brief Sets the TIMx Capture Compare3 Register value.
mbed_official 76:aeb1df146756 922 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 923 * @param Compare3: specifies the Capture Compare3 register new value.
mbed_official 76:aeb1df146756 924 * @retval None
mbed_official 76:aeb1df146756 925 */
mbed_official 76:aeb1df146756 926 void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3)
mbed_official 76:aeb1df146756 927 {
mbed_official 76:aeb1df146756 928 /* Check the parameters */
mbed_official 76:aeb1df146756 929 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 930
mbed_official 76:aeb1df146756 931 /* Set the Capture Compare3 Register value */
mbed_official 76:aeb1df146756 932 TIMx->CCR3 = Compare3;
mbed_official 76:aeb1df146756 933 }
mbed_official 76:aeb1df146756 934
mbed_official 76:aeb1df146756 935 /**
mbed_official 76:aeb1df146756 936 * @brief Sets the TIMx Capture Compare4 Register value.
mbed_official 76:aeb1df146756 937 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 938 * @param Compare4: specifies the Capture Compare4 register new value.
mbed_official 76:aeb1df146756 939 * @retval None
mbed_official 76:aeb1df146756 940 */
mbed_official 76:aeb1df146756 941 void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4)
mbed_official 76:aeb1df146756 942 {
mbed_official 76:aeb1df146756 943 /* Check the parameters */
mbed_official 76:aeb1df146756 944 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 945
mbed_official 76:aeb1df146756 946 /* Set the Capture Compare4 Register value */
mbed_official 76:aeb1df146756 947 TIMx->CCR4 = Compare4;
mbed_official 76:aeb1df146756 948 }
mbed_official 76:aeb1df146756 949
mbed_official 76:aeb1df146756 950 /**
mbed_official 76:aeb1df146756 951 * @brief Forces the TIMx output 1 waveform to active or inactive level.
mbed_official 76:aeb1df146756 952 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 953 * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official 76:aeb1df146756 954 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 955 * @arg TIM_ForcedAction_Active: Force active level on OC1REF.
mbed_official 76:aeb1df146756 956 * @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF.
mbed_official 76:aeb1df146756 957 * @retval None
mbed_official 76:aeb1df146756 958 */
mbed_official 76:aeb1df146756 959 void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official 76:aeb1df146756 960 {
mbed_official 76:aeb1df146756 961 uint16_t tmpccmr1 = 0;
mbed_official 76:aeb1df146756 962 /* Check the parameters */
mbed_official 76:aeb1df146756 963 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 964 assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official 76:aeb1df146756 965 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 966 /* Reset the OC1M Bits */
mbed_official 76:aeb1df146756 967 tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1M);
mbed_official 76:aeb1df146756 968 /* Configure The Forced output Mode */
mbed_official 76:aeb1df146756 969 tmpccmr1 |= TIM_ForcedAction;
mbed_official 76:aeb1df146756 970 /* Write to TIMx CCMR1 register */
mbed_official 76:aeb1df146756 971 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 972 }
mbed_official 76:aeb1df146756 973
mbed_official 76:aeb1df146756 974 /**
mbed_official 76:aeb1df146756 975 * @brief Forces the TIMx output 2 waveform to active or inactive level.
mbed_official 76:aeb1df146756 976 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM
mbed_official 76:aeb1df146756 977 * peripheral.
mbed_official 76:aeb1df146756 978 * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official 76:aeb1df146756 979 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 980 * @arg TIM_ForcedAction_Active: Force active level on OC2REF.
mbed_official 76:aeb1df146756 981 * @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF.
mbed_official 76:aeb1df146756 982 * @retval None
mbed_official 76:aeb1df146756 983 */
mbed_official 76:aeb1df146756 984 void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official 76:aeb1df146756 985 {
mbed_official 76:aeb1df146756 986 uint16_t tmpccmr1 = 0;
mbed_official 76:aeb1df146756 987
mbed_official 76:aeb1df146756 988 /* Check the parameters */
mbed_official 76:aeb1df146756 989 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 990 assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official 76:aeb1df146756 991
mbed_official 76:aeb1df146756 992 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 993 /* Reset the OC2M Bits */
mbed_official 76:aeb1df146756 994 tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2M);
mbed_official 76:aeb1df146756 995 /* Configure The Forced output Mode */
mbed_official 76:aeb1df146756 996 tmpccmr1 |= (uint16_t)(TIM_ForcedAction << 8);
mbed_official 76:aeb1df146756 997 /* Write to TIMx CCMR1 register */
mbed_official 76:aeb1df146756 998 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 999 }
mbed_official 76:aeb1df146756 1000
mbed_official 76:aeb1df146756 1001 /**
mbed_official 76:aeb1df146756 1002 * @brief Forces the TIMx output 3 waveform to active or inactive level.
mbed_official 76:aeb1df146756 1003 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1004 * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official 76:aeb1df146756 1005 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1006 * @arg TIM_ForcedAction_Active: Force active level on OC3REF.
mbed_official 76:aeb1df146756 1007 * @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF.
mbed_official 76:aeb1df146756 1008 * @retval None
mbed_official 76:aeb1df146756 1009 */
mbed_official 76:aeb1df146756 1010 void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official 76:aeb1df146756 1011 {
mbed_official 76:aeb1df146756 1012 uint16_t tmpccmr2 = 0;
mbed_official 76:aeb1df146756 1013
mbed_official 76:aeb1df146756 1014 /* Check the parameters */
mbed_official 76:aeb1df146756 1015 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1016 assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official 76:aeb1df146756 1017
mbed_official 76:aeb1df146756 1018 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 1019 /* Reset the OC1M Bits */
mbed_official 76:aeb1df146756 1020 tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3M);
mbed_official 76:aeb1df146756 1021 /* Configure The Forced output Mode */
mbed_official 76:aeb1df146756 1022 tmpccmr2 |= TIM_ForcedAction;
mbed_official 76:aeb1df146756 1023 /* Write to TIMx CCMR2 register */
mbed_official 76:aeb1df146756 1024 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 1025 }
mbed_official 76:aeb1df146756 1026
mbed_official 76:aeb1df146756 1027 /**
mbed_official 76:aeb1df146756 1028 * @brief Forces the TIMx output 4 waveform to active or inactive level.
mbed_official 76:aeb1df146756 1029 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1030 * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official 76:aeb1df146756 1031 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1032 * @arg TIM_ForcedAction_Active: Force active level on OC4REF.
mbed_official 76:aeb1df146756 1033 * @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF.
mbed_official 76:aeb1df146756 1034 * @retval None
mbed_official 76:aeb1df146756 1035 */
mbed_official 76:aeb1df146756 1036 void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official 76:aeb1df146756 1037 {
mbed_official 76:aeb1df146756 1038 uint16_t tmpccmr2 = 0;
mbed_official 76:aeb1df146756 1039 /* Check the parameters */
mbed_official 76:aeb1df146756 1040 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1041 assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official 76:aeb1df146756 1042
mbed_official 76:aeb1df146756 1043 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 1044 /* Reset the OC2M Bits */
mbed_official 76:aeb1df146756 1045 tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4M);
mbed_official 76:aeb1df146756 1046 /* Configure The Forced output Mode */
mbed_official 76:aeb1df146756 1047 tmpccmr2 |= (uint16_t)(TIM_ForcedAction << 8);
mbed_official 76:aeb1df146756 1048 /* Write to TIMx CCMR2 register */
mbed_official 76:aeb1df146756 1049 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 1050 }
mbed_official 76:aeb1df146756 1051
mbed_official 76:aeb1df146756 1052 /**
mbed_official 76:aeb1df146756 1053 * @brief Enables or disables the TIMx peripheral Preload register on CCR1.
mbed_official 76:aeb1df146756 1054 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1055 * @param TIM_OCPreload: new state of the TIMx peripheral Preload register.
mbed_official 76:aeb1df146756 1056 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1057 * @arg TIM_OCPreload_Enable: Enable TIM output compare Preload
mbed_official 76:aeb1df146756 1058 * @arg TIM_OCPreload_Disable: Disable TIM output compare Preload
mbed_official 76:aeb1df146756 1059 * @retval None
mbed_official 76:aeb1df146756 1060 */
mbed_official 76:aeb1df146756 1061 void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official 76:aeb1df146756 1062 {
mbed_official 76:aeb1df146756 1063 uint16_t tmpccmr1 = 0;
mbed_official 76:aeb1df146756 1064 /* Check the parameters */
mbed_official 76:aeb1df146756 1065 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1066 assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official 76:aeb1df146756 1067
mbed_official 76:aeb1df146756 1068 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 1069 /* Reset the OC1PE Bit */
mbed_official 76:aeb1df146756 1070 tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1PE);
mbed_official 76:aeb1df146756 1071 /* Enable or Disable the Output Compare Preload feature */
mbed_official 76:aeb1df146756 1072 tmpccmr1 |= TIM_OCPreload;
mbed_official 76:aeb1df146756 1073 /* Write to TIMx CCMR1 register */
mbed_official 76:aeb1df146756 1074 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 1075 }
mbed_official 76:aeb1df146756 1076
mbed_official 76:aeb1df146756 1077 /**
mbed_official 76:aeb1df146756 1078 * @brief Enables or disables the TIMx peripheral Preload register on CCR2.
mbed_official 76:aeb1df146756 1079 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1080 * @param TIM_OCPreload: new state of the TIMx peripheral Preload register.
mbed_official 76:aeb1df146756 1081 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1082 * @arg TIM_OCPreload_Enable: Enable TIM output compare Preload
mbed_official 76:aeb1df146756 1083 * @arg TIM_OCPreload_Disable: Disable TIM output compare Preload
mbed_official 76:aeb1df146756 1084 * @retval None
mbed_official 76:aeb1df146756 1085 */
mbed_official 76:aeb1df146756 1086 void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official 76:aeb1df146756 1087 {
mbed_official 76:aeb1df146756 1088 uint16_t tmpccmr1 = 0;
mbed_official 76:aeb1df146756 1089 /* Check the parameters */
mbed_official 76:aeb1df146756 1090 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1091 assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official 76:aeb1df146756 1092
mbed_official 76:aeb1df146756 1093 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 1094 /* Reset the OC2PE Bit */
mbed_official 76:aeb1df146756 1095 tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2PE);
mbed_official 76:aeb1df146756 1096 /* Enable or Disable the Output Compare Preload feature */
mbed_official 76:aeb1df146756 1097 tmpccmr1 |= (uint16_t)(TIM_OCPreload << 8);
mbed_official 76:aeb1df146756 1098 /* Write to TIMx CCMR1 register */
mbed_official 76:aeb1df146756 1099 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 1100 }
mbed_official 76:aeb1df146756 1101
mbed_official 76:aeb1df146756 1102 /**
mbed_official 76:aeb1df146756 1103 * @brief Enables or disables the TIMx peripheral Preload register on CCR3.
mbed_official 76:aeb1df146756 1104 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1105 * @param TIM_OCPreload: new state of the TIMx peripheral Preload register.
mbed_official 76:aeb1df146756 1106 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1107 * @arg TIM_OCPreload_Enable: Enable TIM output compare Preload
mbed_official 76:aeb1df146756 1108 * @arg TIM_OCPreload_Disable: Disable TIM output compare Preload
mbed_official 76:aeb1df146756 1109 * @retval None
mbed_official 76:aeb1df146756 1110 */
mbed_official 76:aeb1df146756 1111 void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official 76:aeb1df146756 1112 {
mbed_official 76:aeb1df146756 1113 uint16_t tmpccmr2 = 0;
mbed_official 76:aeb1df146756 1114
mbed_official 76:aeb1df146756 1115 /* Check the parameters */
mbed_official 76:aeb1df146756 1116 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1117 assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official 76:aeb1df146756 1118
mbed_official 76:aeb1df146756 1119 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 1120 /* Reset the OC3PE Bit */
mbed_official 76:aeb1df146756 1121 tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3PE);
mbed_official 76:aeb1df146756 1122 /* Enable or Disable the Output Compare Preload feature */
mbed_official 76:aeb1df146756 1123 tmpccmr2 |= TIM_OCPreload;
mbed_official 76:aeb1df146756 1124 /* Write to TIMx CCMR2 register */
mbed_official 76:aeb1df146756 1125 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 1126 }
mbed_official 76:aeb1df146756 1127
mbed_official 76:aeb1df146756 1128 /**
mbed_official 76:aeb1df146756 1129 * @brief Enables or disables the TIMx peripheral Preload register on CCR4.
mbed_official 76:aeb1df146756 1130 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1131 * @param TIM_OCPreload: new state of the TIMx peripheral Preload register.
mbed_official 76:aeb1df146756 1132 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1133 * @arg TIM_OCPreload_Enable: Enable TIM output compare Preload
mbed_official 76:aeb1df146756 1134 * @arg TIM_OCPreload_Disable: Disable TIM output compare Preload
mbed_official 76:aeb1df146756 1135 * @retval None
mbed_official 76:aeb1df146756 1136 */
mbed_official 76:aeb1df146756 1137 void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official 76:aeb1df146756 1138 {
mbed_official 76:aeb1df146756 1139 uint16_t tmpccmr2 = 0;
mbed_official 76:aeb1df146756 1140
mbed_official 76:aeb1df146756 1141 /* Check the parameters */
mbed_official 76:aeb1df146756 1142 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1143 assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official 76:aeb1df146756 1144
mbed_official 76:aeb1df146756 1145 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 1146 /* Reset the OC4PE Bit */
mbed_official 76:aeb1df146756 1147 tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4PE);
mbed_official 76:aeb1df146756 1148 /* Enable or Disable the Output Compare Preload feature */
mbed_official 76:aeb1df146756 1149 tmpccmr2 |= (uint16_t)(TIM_OCPreload << 8);
mbed_official 76:aeb1df146756 1150 /* Write to TIMx CCMR2 register */
mbed_official 76:aeb1df146756 1151 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 1152 }
mbed_official 76:aeb1df146756 1153
mbed_official 76:aeb1df146756 1154 /**
mbed_official 76:aeb1df146756 1155 * @brief Configures the TIMx Output Compare 1 Fast feature.
mbed_official 76:aeb1df146756 1156 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1157 * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official 76:aeb1df146756 1158 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1159 * @arg TIM_OCFast_Enable: TIM output compare fast enable.
mbed_official 76:aeb1df146756 1160 * @arg TIM_OCFast_Disable: TIM output compare fast disable.
mbed_official 76:aeb1df146756 1161 * @retval None
mbed_official 76:aeb1df146756 1162 */
mbed_official 76:aeb1df146756 1163 void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official 76:aeb1df146756 1164 {
mbed_official 76:aeb1df146756 1165 uint16_t tmpccmr1 = 0;
mbed_official 76:aeb1df146756 1166
mbed_official 76:aeb1df146756 1167 /* Check the parameters */
mbed_official 76:aeb1df146756 1168 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1169 assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official 76:aeb1df146756 1170
mbed_official 76:aeb1df146756 1171 /* Get the TIMx CCMR1 register value */
mbed_official 76:aeb1df146756 1172 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 1173 /* Reset the OC1FE Bit */
mbed_official 76:aeb1df146756 1174 tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1FE);
mbed_official 76:aeb1df146756 1175 /* Enable or Disable the Output Compare Fast Bit */
mbed_official 76:aeb1df146756 1176 tmpccmr1 |= TIM_OCFast;
mbed_official 76:aeb1df146756 1177 /* Write to TIMx CCMR1 */
mbed_official 76:aeb1df146756 1178 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 1179 }
mbed_official 76:aeb1df146756 1180
mbed_official 76:aeb1df146756 1181 /**
mbed_official 76:aeb1df146756 1182 * @brief Configures the TIMx Output Compare 2 Fast feature.
mbed_official 76:aeb1df146756 1183 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1184 * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official 76:aeb1df146756 1185 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1186 * @arg TIM_OCFast_Enable: TIM output compare fast enable.
mbed_official 76:aeb1df146756 1187 * @arg TIM_OCFast_Disable: TIM output compare fast disable.
mbed_official 76:aeb1df146756 1188 * @retval None
mbed_official 76:aeb1df146756 1189 */
mbed_official 76:aeb1df146756 1190 void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official 76:aeb1df146756 1191 {
mbed_official 76:aeb1df146756 1192 uint16_t tmpccmr1 = 0;
mbed_official 76:aeb1df146756 1193
mbed_official 76:aeb1df146756 1194 /* Check the parameters */
mbed_official 76:aeb1df146756 1195 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1196 assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official 76:aeb1df146756 1197
mbed_official 76:aeb1df146756 1198 /* Get the TIMx CCMR1 register value */
mbed_official 76:aeb1df146756 1199 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 1200 /* Reset the OC2FE Bit */
mbed_official 76:aeb1df146756 1201 tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2FE);
mbed_official 76:aeb1df146756 1202 /* Enable or Disable the Output Compare Fast Bit */
mbed_official 76:aeb1df146756 1203 tmpccmr1 |= (uint16_t)(TIM_OCFast << 8);
mbed_official 76:aeb1df146756 1204 /* Write to TIMx CCMR1 */
mbed_official 76:aeb1df146756 1205 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 1206 }
mbed_official 76:aeb1df146756 1207
mbed_official 76:aeb1df146756 1208 /**
mbed_official 76:aeb1df146756 1209 * @brief Configures the TIMx Output Compare 3 Fast feature.
mbed_official 76:aeb1df146756 1210 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1211 * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official 76:aeb1df146756 1212 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1213 * @arg TIM_OCFast_Enable: TIM output compare fast enable.
mbed_official 76:aeb1df146756 1214 * @arg TIM_OCFast_Disable: TIM output compare fast disable.
mbed_official 76:aeb1df146756 1215 * @retval None
mbed_official 76:aeb1df146756 1216 */
mbed_official 76:aeb1df146756 1217 void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official 76:aeb1df146756 1218 {
mbed_official 76:aeb1df146756 1219 uint16_t tmpccmr2 = 0;
mbed_official 76:aeb1df146756 1220
mbed_official 76:aeb1df146756 1221 /* Check the parameters */
mbed_official 76:aeb1df146756 1222 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1223 assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official 76:aeb1df146756 1224
mbed_official 76:aeb1df146756 1225 /* Get the TIMx CCMR2 register value */
mbed_official 76:aeb1df146756 1226 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 1227 /* Reset the OC3FE Bit */
mbed_official 76:aeb1df146756 1228 tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3FE);
mbed_official 76:aeb1df146756 1229 /* Enable or Disable the Output Compare Fast Bit */
mbed_official 76:aeb1df146756 1230 tmpccmr2 |= TIM_OCFast;
mbed_official 76:aeb1df146756 1231 /* Write to TIMx CCMR2 */
mbed_official 76:aeb1df146756 1232 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 1233 }
mbed_official 76:aeb1df146756 1234
mbed_official 76:aeb1df146756 1235 /**
mbed_official 76:aeb1df146756 1236 * @brief Configures the TIMx Output Compare 4 Fast feature.
mbed_official 76:aeb1df146756 1237 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1238 * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official 76:aeb1df146756 1239 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1240 * @arg TIM_OCFast_Enable: TIM output compare fast enable.
mbed_official 76:aeb1df146756 1241 * @arg TIM_OCFast_Disable: TIM output compare fast disable.
mbed_official 76:aeb1df146756 1242 * @retval None
mbed_official 76:aeb1df146756 1243 */
mbed_official 76:aeb1df146756 1244 void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official 76:aeb1df146756 1245 {
mbed_official 76:aeb1df146756 1246 uint16_t tmpccmr2 = 0;
mbed_official 76:aeb1df146756 1247
mbed_official 76:aeb1df146756 1248 /* Check the parameters */
mbed_official 76:aeb1df146756 1249 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1250 assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official 76:aeb1df146756 1251
mbed_official 76:aeb1df146756 1252 /* Get the TIMx CCMR2 register value */
mbed_official 76:aeb1df146756 1253 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 1254 /* Reset the OC4FE Bit */
mbed_official 76:aeb1df146756 1255 tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4FE);
mbed_official 76:aeb1df146756 1256 /* Enable or Disable the Output Compare Fast Bit */
mbed_official 76:aeb1df146756 1257 tmpccmr2 |= (uint16_t)(TIM_OCFast << 8);
mbed_official 76:aeb1df146756 1258 /* Write to TIMx CCMR2 */
mbed_official 76:aeb1df146756 1259 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 1260 }
mbed_official 76:aeb1df146756 1261
mbed_official 76:aeb1df146756 1262 /**
mbed_official 76:aeb1df146756 1263 * @brief Clears or safeguards the OCREF1 signal on an external event
mbed_official 76:aeb1df146756 1264 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1265 * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official 76:aeb1df146756 1266 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1267 * @arg TIM_OCClear_Enable: TIM Output clear enable.
mbed_official 76:aeb1df146756 1268 * @arg TIM_OCClear_Disable: TIM Output clear disable.
mbed_official 76:aeb1df146756 1269 * @retval None
mbed_official 76:aeb1df146756 1270 */
mbed_official 76:aeb1df146756 1271 void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official 76:aeb1df146756 1272 {
mbed_official 76:aeb1df146756 1273 uint16_t tmpccmr1 = 0;
mbed_official 76:aeb1df146756 1274
mbed_official 76:aeb1df146756 1275 /* Check the parameters */
mbed_official 76:aeb1df146756 1276 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1277 assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official 76:aeb1df146756 1278
mbed_official 76:aeb1df146756 1279 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 1280 /* Reset the OC1CE Bit */
mbed_official 76:aeb1df146756 1281 tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1CE);
mbed_official 76:aeb1df146756 1282 /* Enable or Disable the Output Compare Clear Bit */
mbed_official 76:aeb1df146756 1283 tmpccmr1 |= TIM_OCClear;
mbed_official 76:aeb1df146756 1284 /* Write to TIMx CCMR1 register */
mbed_official 76:aeb1df146756 1285 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 1286 }
mbed_official 76:aeb1df146756 1287
mbed_official 76:aeb1df146756 1288 /**
mbed_official 76:aeb1df146756 1289 * @brief Clears or safeguards the OCREF2 signal on an external event
mbed_official 76:aeb1df146756 1290 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1291 * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official 76:aeb1df146756 1292
mbed_official 76:aeb1df146756 1293 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1294 * @arg TIM_OCClear_Enable: TIM Output clear enable.
mbed_official 76:aeb1df146756 1295 * @arg TIM_OCClear_Disable: TIM Output clear disable .
mbed_official 76:aeb1df146756 1296 * @retval None
mbed_official 76:aeb1df146756 1297 */
mbed_official 76:aeb1df146756 1298 void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official 76:aeb1df146756 1299 {
mbed_official 76:aeb1df146756 1300 uint16_t tmpccmr1 = 0;
mbed_official 76:aeb1df146756 1301
mbed_official 76:aeb1df146756 1302 /* Check the parameters */
mbed_official 76:aeb1df146756 1303 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1304 assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official 76:aeb1df146756 1305
mbed_official 76:aeb1df146756 1306 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 1307 /* Reset the OC2CE Bit */
mbed_official 76:aeb1df146756 1308 tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2CE);
mbed_official 76:aeb1df146756 1309 /* Enable or Disable the Output Compare Clear Bit */
mbed_official 76:aeb1df146756 1310 tmpccmr1 |= (uint16_t)(TIM_OCClear << 8);
mbed_official 76:aeb1df146756 1311 /* Write to TIMx CCMR1 register */
mbed_official 76:aeb1df146756 1312 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 1313 }
mbed_official 76:aeb1df146756 1314
mbed_official 76:aeb1df146756 1315 /**
mbed_official 76:aeb1df146756 1316 * @brief Clears or safeguards the OCREF3 signal on an external event
mbed_official 76:aeb1df146756 1317 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1318 * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official 76:aeb1df146756 1319 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1320 * @arg TIM_OCClear_Enable: TIM Output clear enable.
mbed_official 76:aeb1df146756 1321 * @arg TIM_OCClear_Disable: TIM Output clear disable.
mbed_official 76:aeb1df146756 1322 * @retval None
mbed_official 76:aeb1df146756 1323 */
mbed_official 76:aeb1df146756 1324 void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official 76:aeb1df146756 1325 {
mbed_official 76:aeb1df146756 1326 uint16_t tmpccmr2 = 0;
mbed_official 76:aeb1df146756 1327
mbed_official 76:aeb1df146756 1328 /* Check the parameters */
mbed_official 76:aeb1df146756 1329 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1330 assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official 76:aeb1df146756 1331
mbed_official 76:aeb1df146756 1332 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 1333 /* Reset the OC3CE Bit */
mbed_official 76:aeb1df146756 1334 tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3CE);
mbed_official 76:aeb1df146756 1335 /* Enable or Disable the Output Compare Clear Bit */
mbed_official 76:aeb1df146756 1336 tmpccmr2 |= TIM_OCClear;
mbed_official 76:aeb1df146756 1337 /* Write to TIMx CCMR2 register */
mbed_official 76:aeb1df146756 1338 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 1339 }
mbed_official 76:aeb1df146756 1340
mbed_official 76:aeb1df146756 1341 /**
mbed_official 76:aeb1df146756 1342 * @brief Clears or safeguards the OCREF4 signal on an external event
mbed_official 76:aeb1df146756 1343 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1344 * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official 76:aeb1df146756 1345 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1346 * @arg TIM_OCClear_Enable: TIM Output clear enable.
mbed_official 76:aeb1df146756 1347 * @arg TIM_OCClear_Disable: TIM Output clear disable.
mbed_official 76:aeb1df146756 1348 * @retval None
mbed_official 76:aeb1df146756 1349 */
mbed_official 76:aeb1df146756 1350 void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official 76:aeb1df146756 1351 {
mbed_official 76:aeb1df146756 1352 uint16_t tmpccmr2 = 0;
mbed_official 76:aeb1df146756 1353
mbed_official 76:aeb1df146756 1354 /* Check the parameters */
mbed_official 76:aeb1df146756 1355 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1356 assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official 76:aeb1df146756 1357
mbed_official 76:aeb1df146756 1358 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 1359 /* Reset the OC4CE Bit */
mbed_official 76:aeb1df146756 1360 tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4CE);
mbed_official 76:aeb1df146756 1361 /* Enable or Disable the Output Compare Clear Bit */
mbed_official 76:aeb1df146756 1362 tmpccmr2 |= (uint16_t)(TIM_OCClear << 8);
mbed_official 76:aeb1df146756 1363 /* Write to TIMx CCMR2 register */
mbed_official 76:aeb1df146756 1364 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 1365 }
mbed_official 76:aeb1df146756 1366
mbed_official 76:aeb1df146756 1367 /**
mbed_official 76:aeb1df146756 1368 * @brief Configures the TIMx channel 1 polarity.
mbed_official 76:aeb1df146756 1369 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1370 * @param TIM_OCPolarity: specifies the OC1 Polarity.
mbed_official 76:aeb1df146756 1371 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1372 * @arg TIM_OCPolarity_High: Output Compare active high.
mbed_official 76:aeb1df146756 1373 * @arg TIM_OCPolarity_Low: Output Compare active low.
mbed_official 76:aeb1df146756 1374 * @retval None
mbed_official 76:aeb1df146756 1375 */
mbed_official 76:aeb1df146756 1376 void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official 76:aeb1df146756 1377 {
mbed_official 76:aeb1df146756 1378 uint16_t tmpccer = 0;
mbed_official 76:aeb1df146756 1379
mbed_official 76:aeb1df146756 1380 /* Check the parameters */
mbed_official 76:aeb1df146756 1381 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1382 assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official 76:aeb1df146756 1383
mbed_official 76:aeb1df146756 1384 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 1385 /* Set or Reset the CC1P Bit */
mbed_official 76:aeb1df146756 1386 tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P);
mbed_official 76:aeb1df146756 1387 tmpccer |= TIM_OCPolarity;
mbed_official 76:aeb1df146756 1388 /* Write to TIMx CCER register */
mbed_official 76:aeb1df146756 1389 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 1390 }
mbed_official 76:aeb1df146756 1391
mbed_official 76:aeb1df146756 1392 /**
mbed_official 76:aeb1df146756 1393 * @brief Configures the TIMx channel 2 polarity.
mbed_official 76:aeb1df146756 1394 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1395 * @param TIM_OCPolarity: specifies the OC2 Polarity.
mbed_official 76:aeb1df146756 1396 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1397 * @arg TIM_OCPolarity_High: Output Compare active high.
mbed_official 76:aeb1df146756 1398 * @arg TIM_OCPolarity_Low: Output Compare active low.
mbed_official 76:aeb1df146756 1399 * @retval None
mbed_official 76:aeb1df146756 1400 */
mbed_official 76:aeb1df146756 1401 void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official 76:aeb1df146756 1402 {
mbed_official 76:aeb1df146756 1403 uint16_t tmpccer = 0;
mbed_official 76:aeb1df146756 1404
mbed_official 76:aeb1df146756 1405 /* Check the parameters */
mbed_official 76:aeb1df146756 1406 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1407 assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official 76:aeb1df146756 1408
mbed_official 76:aeb1df146756 1409 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 1410 /* Set or Reset the CC2P Bit */
mbed_official 76:aeb1df146756 1411 tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2P);
mbed_official 76:aeb1df146756 1412 tmpccer |= (uint16_t)(TIM_OCPolarity << 4);
mbed_official 76:aeb1df146756 1413 /* Write to TIMx CCER register */
mbed_official 76:aeb1df146756 1414 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 1415 }
mbed_official 76:aeb1df146756 1416
mbed_official 76:aeb1df146756 1417 /**
mbed_official 76:aeb1df146756 1418 * @brief Configures the TIMx channel 3 polarity.
mbed_official 76:aeb1df146756 1419 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1420 * @param TIM_OCPolarity: specifies the OC3 Polarity.
mbed_official 76:aeb1df146756 1421 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1422 * @arg TIM_OCPolarity_High: Output Compare active high.
mbed_official 76:aeb1df146756 1423 * @arg TIM_OCPolarity_Low: Output Compare active low.
mbed_official 76:aeb1df146756 1424 * @retval None
mbed_official 76:aeb1df146756 1425 */
mbed_official 76:aeb1df146756 1426 void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official 76:aeb1df146756 1427 {
mbed_official 76:aeb1df146756 1428 uint16_t tmpccer = 0;
mbed_official 76:aeb1df146756 1429
mbed_official 76:aeb1df146756 1430 /* Check the parameters */
mbed_official 76:aeb1df146756 1431 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1432 assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official 76:aeb1df146756 1433
mbed_official 76:aeb1df146756 1434 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 1435 /* Set or Reset the CC3P Bit */
mbed_official 76:aeb1df146756 1436 tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3P);
mbed_official 76:aeb1df146756 1437 tmpccer |= (uint16_t)(TIM_OCPolarity << 8);
mbed_official 76:aeb1df146756 1438 /* Write to TIMx CCER register */
mbed_official 76:aeb1df146756 1439 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 1440 }
mbed_official 76:aeb1df146756 1441
mbed_official 76:aeb1df146756 1442 /**
mbed_official 76:aeb1df146756 1443 * @brief Configures the TIMx channel 4 polarity.
mbed_official 76:aeb1df146756 1444 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1445 * @param TIM_OCPolarity: specifies the OC4 Polarity.
mbed_official 76:aeb1df146756 1446 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1447 * @arg TIM_OCPolarity_High: Output Compare active high.
mbed_official 76:aeb1df146756 1448 * @arg TIM_OCPolarity_Low: Output Compare active low.
mbed_official 76:aeb1df146756 1449 * @retval None
mbed_official 76:aeb1df146756 1450 */
mbed_official 76:aeb1df146756 1451 void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official 76:aeb1df146756 1452 {
mbed_official 76:aeb1df146756 1453 uint16_t tmpccer = 0;
mbed_official 76:aeb1df146756 1454
mbed_official 76:aeb1df146756 1455 /* Check the parameters */
mbed_official 76:aeb1df146756 1456 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1457 assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official 76:aeb1df146756 1458
mbed_official 76:aeb1df146756 1459 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 1460 /* Set or Reset the CC4P Bit */
mbed_official 76:aeb1df146756 1461 tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC4P);
mbed_official 76:aeb1df146756 1462 tmpccer |= (uint16_t)(TIM_OCPolarity << 12);
mbed_official 76:aeb1df146756 1463 /* Write to TIMx CCER register */
mbed_official 76:aeb1df146756 1464 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 1465 }
mbed_official 76:aeb1df146756 1466
mbed_official 76:aeb1df146756 1467 /**
mbed_official 76:aeb1df146756 1468 * @brief Selects the OCReference Clear source.
mbed_official 76:aeb1df146756 1469 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1470 * @param TIM_OCReferenceClear: specifies the OCReference Clear source.
mbed_official 76:aeb1df146756 1471 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1472 * @arg TIM_OCReferenceClear_ETRF: The internal OCreference clear input is connected to ETRF.
mbed_official 76:aeb1df146756 1473 * @arg TIM_OCReferenceClear_OCREFCLR: The internal OCreference clear input is connected to OCREF_CLR input.
mbed_official 76:aeb1df146756 1474 * @retval None
mbed_official 76:aeb1df146756 1475 */
mbed_official 76:aeb1df146756 1476 void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear)
mbed_official 76:aeb1df146756 1477 {
mbed_official 76:aeb1df146756 1478 /* Check the parameters */
mbed_official 76:aeb1df146756 1479 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1480 assert_param(TIM_OCREFERENCECECLEAR_SOURCE(TIM_OCReferenceClear));
mbed_official 76:aeb1df146756 1481
mbed_official 76:aeb1df146756 1482 /* Set the TIM_OCReferenceClear source */
mbed_official 76:aeb1df146756 1483 TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_OCCS);
mbed_official 76:aeb1df146756 1484 TIMx->SMCR |= TIM_OCReferenceClear;
mbed_official 76:aeb1df146756 1485 }
mbed_official 76:aeb1df146756 1486
mbed_official 76:aeb1df146756 1487 /**
mbed_official 76:aeb1df146756 1488 * @brief Enables or disables the TIM Capture Compare Channel x.
mbed_official 76:aeb1df146756 1489 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1490 * @param TIM_Channel: specifies the TIM Channel.
mbed_official 76:aeb1df146756 1491 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1492 * @arg TIM_Channel_1: TIM Channel 1.
mbed_official 76:aeb1df146756 1493 * @arg TIM_Channel_2: TIM Channel 2.
mbed_official 76:aeb1df146756 1494 * @arg TIM_Channel_3: TIM Channel 3.
mbed_official 76:aeb1df146756 1495 * @arg TIM_Channel_4: TIM Channel 4.
mbed_official 76:aeb1df146756 1496 * @param TIM_CCx: specifies the TIM Channel CCxE bit new state.
mbed_official 76:aeb1df146756 1497 * This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable.
mbed_official 76:aeb1df146756 1498 * @retval None
mbed_official 76:aeb1df146756 1499 */
mbed_official 76:aeb1df146756 1500 void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx)
mbed_official 76:aeb1df146756 1501 {
mbed_official 76:aeb1df146756 1502 uint16_t tmp = 0;
mbed_official 76:aeb1df146756 1503
mbed_official 76:aeb1df146756 1504 /* Check the parameters */
mbed_official 76:aeb1df146756 1505 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1506 assert_param(IS_TIM_CCX(TIM_CCx));
mbed_official 76:aeb1df146756 1507
mbed_official 76:aeb1df146756 1508 tmp = CCER_CCE_SET << TIM_Channel;
mbed_official 76:aeb1df146756 1509
mbed_official 76:aeb1df146756 1510 /* Reset the CCxE Bit */
mbed_official 76:aeb1df146756 1511 TIMx->CCER &= (uint16_t)~ tmp;
mbed_official 76:aeb1df146756 1512
mbed_official 76:aeb1df146756 1513 /* Set or reset the CCxE Bit */
mbed_official 76:aeb1df146756 1514 TIMx->CCER |= (uint16_t)(TIM_CCx << TIM_Channel);
mbed_official 76:aeb1df146756 1515 }
mbed_official 76:aeb1df146756 1516
mbed_official 76:aeb1df146756 1517 /**
mbed_official 76:aeb1df146756 1518 * @}
mbed_official 76:aeb1df146756 1519 */
mbed_official 76:aeb1df146756 1520
mbed_official 76:aeb1df146756 1521 /** @defgroup TIM_Group3 Input Capture management functions
mbed_official 76:aeb1df146756 1522 * @brief Input Capture management functions
mbed_official 76:aeb1df146756 1523 *
mbed_official 76:aeb1df146756 1524 @verbatim
mbed_official 76:aeb1df146756 1525 ===============================================================================
mbed_official 76:aeb1df146756 1526 ##### Input Capture management functions #####
mbed_official 76:aeb1df146756 1527 ===============================================================================
mbed_official 76:aeb1df146756 1528
mbed_official 76:aeb1df146756 1529 *** TIM Driver: how to use it in Input Capture Mode ***
mbed_official 76:aeb1df146756 1530 ===============================================================================
mbed_official 76:aeb1df146756 1531 [..] To use the Timer in Input Capture mode, the following steps are mandatory:
mbed_official 76:aeb1df146756 1532 (#) Enable TIM clock using RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE)
mbed_official 76:aeb1df146756 1533 function.
mbed_official 76:aeb1df146756 1534 (#) Configure the TIM pins by configuring the corresponding GPIO pins.
mbed_official 76:aeb1df146756 1535 (#) Configure the Time base unit as described in the first part of this
mbed_official 76:aeb1df146756 1536 driver, if needed, else the Timer will run with the default configuration:
mbed_official 76:aeb1df146756 1537 (++) Autoreload value = 0xFFFF.
mbed_official 76:aeb1df146756 1538 (++) Prescaler value = 0x0000.
mbed_official 76:aeb1df146756 1539 (++) Counter mode = Up counting.
mbed_official 76:aeb1df146756 1540 (++) Clock Division = TIM_CKD_DIV1.
mbed_official 76:aeb1df146756 1541 (#) Fill the TIM_ICInitStruct with the desired parameters including:
mbed_official 76:aeb1df146756 1542 (++) TIM Channel: TIM_Channel.
mbed_official 76:aeb1df146756 1543 (++) TIM Input Capture polarity: TIM_ICPolarity.
mbed_official 76:aeb1df146756 1544 (++) TIM Input Capture selection: TIM_ICSelection.
mbed_official 76:aeb1df146756 1545 (++) TIM Input Capture Prescaler: TIM_ICPrescaler.
mbed_official 76:aeb1df146756 1546 (++) TIM Input CApture filter value: TIM_ICFilter.
mbed_official 76:aeb1df146756 1547 (#) Call TIM_ICInit(TIMx, &TIM_ICInitStruct) to configure the desired
mbed_official 76:aeb1df146756 1548 channel with the corresponding configuration and to measure only
mbed_official 76:aeb1df146756 1549 frequency or duty cycle of the input signal,or, Call
mbed_official 76:aeb1df146756 1550 TIM_PWMIConfig(TIMx, &TIM_ICInitStruct) to configure the desired
mbed_official 76:aeb1df146756 1551 channels with the corresponding configuration and to measure the
mbed_official 76:aeb1df146756 1552 frequency and the duty cycle of the input signal.
mbed_official 76:aeb1df146756 1553 (#) Enable the NVIC or the DMA to read the measured frequency.
mbed_official 76:aeb1df146756 1554 (#) Enable the corresponding interrupt (or DMA request) to read
mbed_official 76:aeb1df146756 1555 the Captured value, using the function TIM_ITConfig(TIMx, TIM_IT_CCx)
mbed_official 76:aeb1df146756 1556 (or TIM_DMA_Cmd(TIMx, TIM_DMA_CCx)).
mbed_official 76:aeb1df146756 1557 (#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official 76:aeb1df146756 1558 (#) Use TIM_GetCapturex(TIMx); to read the captured value.
mbed_official 76:aeb1df146756 1559 [..]
mbed_official 76:aeb1df146756 1560 (@) All other functions can be used separately to modify, if needed,
mbed_official 76:aeb1df146756 1561 a specific feature of the Timer.
mbed_official 76:aeb1df146756 1562
mbed_official 76:aeb1df146756 1563 @endverbatim
mbed_official 76:aeb1df146756 1564 * @{
mbed_official 76:aeb1df146756 1565 */
mbed_official 76:aeb1df146756 1566
mbed_official 76:aeb1df146756 1567 /**
mbed_official 76:aeb1df146756 1568 * @brief Initializes the TIM peripheral according to the specified
mbed_official 76:aeb1df146756 1569 * parameters in the TIM_ICInitStruct.
mbed_official 76:aeb1df146756 1570 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1571 * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
mbed_official 76:aeb1df146756 1572 * that contains the configuration information for the specified TIM
mbed_official 76:aeb1df146756 1573 * peripheral.
mbed_official 76:aeb1df146756 1574 * @retval None
mbed_official 76:aeb1df146756 1575 */
mbed_official 76:aeb1df146756 1576 void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official 76:aeb1df146756 1577 {
mbed_official 76:aeb1df146756 1578 /* Check the parameters */
mbed_official 76:aeb1df146756 1579 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1580 assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity));
mbed_official 76:aeb1df146756 1581 assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection));
mbed_official 76:aeb1df146756 1582 assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler));
mbed_official 76:aeb1df146756 1583 assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter));
mbed_official 76:aeb1df146756 1584
mbed_official 76:aeb1df146756 1585 if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
mbed_official 76:aeb1df146756 1586 {
mbed_official 76:aeb1df146756 1587 /* TI1 Configuration */
mbed_official 76:aeb1df146756 1588 TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official 76:aeb1df146756 1589 TIM_ICInitStruct->TIM_ICSelection,
mbed_official 76:aeb1df146756 1590 TIM_ICInitStruct->TIM_ICFilter);
mbed_official 76:aeb1df146756 1591 /* Set the Input Capture Prescaler value */
mbed_official 76:aeb1df146756 1592 TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official 76:aeb1df146756 1593 }
mbed_official 76:aeb1df146756 1594 else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2)
mbed_official 76:aeb1df146756 1595 {
mbed_official 76:aeb1df146756 1596 /* TI2 Configuration */
mbed_official 76:aeb1df146756 1597 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1598 TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official 76:aeb1df146756 1599 TIM_ICInitStruct->TIM_ICSelection,
mbed_official 76:aeb1df146756 1600 TIM_ICInitStruct->TIM_ICFilter);
mbed_official 76:aeb1df146756 1601 /* Set the Input Capture Prescaler value */
mbed_official 76:aeb1df146756 1602 TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official 76:aeb1df146756 1603 }
mbed_official 76:aeb1df146756 1604 else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3)
mbed_official 76:aeb1df146756 1605 {
mbed_official 76:aeb1df146756 1606 /* TI3 Configuration */
mbed_official 76:aeb1df146756 1607 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1608 TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official 76:aeb1df146756 1609 TIM_ICInitStruct->TIM_ICSelection,
mbed_official 76:aeb1df146756 1610 TIM_ICInitStruct->TIM_ICFilter);
mbed_official 76:aeb1df146756 1611 /* Set the Input Capture Prescaler value */
mbed_official 76:aeb1df146756 1612 TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official 76:aeb1df146756 1613 }
mbed_official 76:aeb1df146756 1614 else
mbed_official 76:aeb1df146756 1615 {
mbed_official 76:aeb1df146756 1616 /* TI4 Configuration */
mbed_official 76:aeb1df146756 1617 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1618 TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official 76:aeb1df146756 1619 TIM_ICInitStruct->TIM_ICSelection,
mbed_official 76:aeb1df146756 1620 TIM_ICInitStruct->TIM_ICFilter);
mbed_official 76:aeb1df146756 1621 /* Set the Input Capture Prescaler value */
mbed_official 76:aeb1df146756 1622 TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official 76:aeb1df146756 1623 }
mbed_official 76:aeb1df146756 1624 }
mbed_official 76:aeb1df146756 1625
mbed_official 76:aeb1df146756 1626 /**
mbed_official 76:aeb1df146756 1627 * @brief Fills each TIM_ICInitStruct member with its default value.
mbed_official 76:aeb1df146756 1628 * @param TIM_ICInitStruct : pointer to a TIM_ICInitTypeDef structure which will
mbed_official 76:aeb1df146756 1629 * be initialized.
mbed_official 76:aeb1df146756 1630 * @retval None
mbed_official 76:aeb1df146756 1631 */
mbed_official 76:aeb1df146756 1632 void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official 76:aeb1df146756 1633 {
mbed_official 76:aeb1df146756 1634 /* Set the default configuration */
mbed_official 76:aeb1df146756 1635 TIM_ICInitStruct->TIM_Channel = TIM_Channel_1;
mbed_official 76:aeb1df146756 1636 TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
mbed_official 76:aeb1df146756 1637 TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI;
mbed_official 76:aeb1df146756 1638 TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
mbed_official 76:aeb1df146756 1639 TIM_ICInitStruct->TIM_ICFilter = 0x00;
mbed_official 76:aeb1df146756 1640 }
mbed_official 76:aeb1df146756 1641
mbed_official 76:aeb1df146756 1642 /**
mbed_official 76:aeb1df146756 1643 * @brief Configures the TIM peripheral according to the specified
mbed_official 76:aeb1df146756 1644 * parameters in the TIM_ICInitStruct to measure an external PWM signal.
mbed_official 76:aeb1df146756 1645 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1646 * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
mbed_official 76:aeb1df146756 1647 * that contains the configuration information for the specified TIM
mbed_official 76:aeb1df146756 1648 * peripheral.
mbed_official 76:aeb1df146756 1649 * @retval None
mbed_official 76:aeb1df146756 1650 */
mbed_official 76:aeb1df146756 1651 void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official 76:aeb1df146756 1652 {
mbed_official 76:aeb1df146756 1653 uint16_t icoppositepolarity = TIM_ICPolarity_Rising;
mbed_official 76:aeb1df146756 1654 uint16_t icoppositeselection = TIM_ICSelection_DirectTI;
mbed_official 76:aeb1df146756 1655 /* Check the parameters */
mbed_official 76:aeb1df146756 1656 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1657 /* Select the Opposite Input Polarity */
mbed_official 76:aeb1df146756 1658 if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising)
mbed_official 76:aeb1df146756 1659 {
mbed_official 76:aeb1df146756 1660 icoppositepolarity = TIM_ICPolarity_Falling;
mbed_official 76:aeb1df146756 1661 }
mbed_official 76:aeb1df146756 1662 else
mbed_official 76:aeb1df146756 1663 {
mbed_official 76:aeb1df146756 1664 icoppositepolarity = TIM_ICPolarity_Rising;
mbed_official 76:aeb1df146756 1665 }
mbed_official 76:aeb1df146756 1666 /* Select the Opposite Input */
mbed_official 76:aeb1df146756 1667 if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI)
mbed_official 76:aeb1df146756 1668 {
mbed_official 76:aeb1df146756 1669 icoppositeselection = TIM_ICSelection_IndirectTI;
mbed_official 76:aeb1df146756 1670 }
mbed_official 76:aeb1df146756 1671 else
mbed_official 76:aeb1df146756 1672 {
mbed_official 76:aeb1df146756 1673 icoppositeselection = TIM_ICSelection_DirectTI;
mbed_official 76:aeb1df146756 1674 }
mbed_official 76:aeb1df146756 1675 if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
mbed_official 76:aeb1df146756 1676 {
mbed_official 76:aeb1df146756 1677 /* TI1 Configuration */
mbed_official 76:aeb1df146756 1678 TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
mbed_official 76:aeb1df146756 1679 TIM_ICInitStruct->TIM_ICFilter);
mbed_official 76:aeb1df146756 1680 /* Set the Input Capture Prescaler value */
mbed_official 76:aeb1df146756 1681 TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official 76:aeb1df146756 1682 /* TI2 Configuration */
mbed_official 76:aeb1df146756 1683 TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
mbed_official 76:aeb1df146756 1684 /* Set the Input Capture Prescaler value */
mbed_official 76:aeb1df146756 1685 TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official 76:aeb1df146756 1686 }
mbed_official 76:aeb1df146756 1687 else
mbed_official 76:aeb1df146756 1688 {
mbed_official 76:aeb1df146756 1689 /* TI2 Configuration */
mbed_official 76:aeb1df146756 1690 TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
mbed_official 76:aeb1df146756 1691 TIM_ICInitStruct->TIM_ICFilter);
mbed_official 76:aeb1df146756 1692 /* Set the Input Capture Prescaler value */
mbed_official 76:aeb1df146756 1693 TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official 76:aeb1df146756 1694 /* TI1 Configuration */
mbed_official 76:aeb1df146756 1695 TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
mbed_official 76:aeb1df146756 1696 /* Set the Input Capture Prescaler value */
mbed_official 76:aeb1df146756 1697 TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official 76:aeb1df146756 1698 }
mbed_official 76:aeb1df146756 1699 }
mbed_official 76:aeb1df146756 1700
mbed_official 76:aeb1df146756 1701 /**
mbed_official 76:aeb1df146756 1702 * @brief Gets the TIMx Input Capture 1 value.
mbed_official 76:aeb1df146756 1703 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1704 * @retval Capture Compare 1 Register value.
mbed_official 76:aeb1df146756 1705 */
mbed_official 76:aeb1df146756 1706 uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx)
mbed_official 76:aeb1df146756 1707 {
mbed_official 76:aeb1df146756 1708 /* Check the parameters */
mbed_official 76:aeb1df146756 1709 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1710
mbed_official 76:aeb1df146756 1711 /* Get the Capture 1 Register value */
mbed_official 76:aeb1df146756 1712 return TIMx->CCR1;
mbed_official 76:aeb1df146756 1713 }
mbed_official 76:aeb1df146756 1714
mbed_official 76:aeb1df146756 1715 /**
mbed_official 76:aeb1df146756 1716 * @brief Gets the TIMx Input Capture 2 value.
mbed_official 76:aeb1df146756 1717 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1718 * @retval Capture Compare 2 Register value.
mbed_official 76:aeb1df146756 1719 */
mbed_official 76:aeb1df146756 1720 uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx)
mbed_official 76:aeb1df146756 1721 {
mbed_official 76:aeb1df146756 1722 /* Check the parameters */
mbed_official 76:aeb1df146756 1723 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1724
mbed_official 76:aeb1df146756 1725 /* Get the Capture 2 Register value */
mbed_official 76:aeb1df146756 1726 return TIMx->CCR2;
mbed_official 76:aeb1df146756 1727 }
mbed_official 76:aeb1df146756 1728
mbed_official 76:aeb1df146756 1729 /**
mbed_official 76:aeb1df146756 1730 * @brief Gets the TIMx Input Capture 3 value.
mbed_official 76:aeb1df146756 1731 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1732 * @retval Capture Compare 3 Register value.
mbed_official 76:aeb1df146756 1733 */
mbed_official 76:aeb1df146756 1734 uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx)
mbed_official 76:aeb1df146756 1735 {
mbed_official 76:aeb1df146756 1736 /* Check the parameters */
mbed_official 76:aeb1df146756 1737 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1738
mbed_official 76:aeb1df146756 1739 /* Get the Capture 3 Register value */
mbed_official 76:aeb1df146756 1740 return TIMx->CCR3;
mbed_official 76:aeb1df146756 1741 }
mbed_official 76:aeb1df146756 1742
mbed_official 76:aeb1df146756 1743 /**
mbed_official 76:aeb1df146756 1744 * @brief Gets the TIMx Input Capture 4 value.
mbed_official 76:aeb1df146756 1745 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1746 * @retval Capture Compare 4 Register value.
mbed_official 76:aeb1df146756 1747 */
mbed_official 76:aeb1df146756 1748 uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx)
mbed_official 76:aeb1df146756 1749 {
mbed_official 76:aeb1df146756 1750 /* Check the parameters */
mbed_official 76:aeb1df146756 1751 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1752
mbed_official 76:aeb1df146756 1753 /* Get the Capture 4 Register value */
mbed_official 76:aeb1df146756 1754 return TIMx->CCR4;
mbed_official 76:aeb1df146756 1755 }
mbed_official 76:aeb1df146756 1756
mbed_official 76:aeb1df146756 1757 /**
mbed_official 76:aeb1df146756 1758 * @brief Sets the TIMx Input Capture 1 prescaler.
mbed_official 76:aeb1df146756 1759 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1760 * @param TIM_ICPSC: specifies the Input Capture1 prescaler new value.
mbed_official 76:aeb1df146756 1761 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1762 * @arg TIM_ICPSC_DIV1: no prescaler.
mbed_official 76:aeb1df146756 1763 * @arg TIM_ICPSC_DIV2: capture is done once every 2 events.
mbed_official 76:aeb1df146756 1764 * @arg TIM_ICPSC_DIV4: capture is done once every 4 events.
mbed_official 76:aeb1df146756 1765 * @arg TIM_ICPSC_DIV8: capture is done once every 8 events.
mbed_official 76:aeb1df146756 1766 * @retval None
mbed_official 76:aeb1df146756 1767 */
mbed_official 76:aeb1df146756 1768 void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official 76:aeb1df146756 1769 {
mbed_official 76:aeb1df146756 1770 /* Check the parameters */
mbed_official 76:aeb1df146756 1771 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1772 assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official 76:aeb1df146756 1773
mbed_official 76:aeb1df146756 1774 /* Reset the IC1PSC Bits */
mbed_official 76:aeb1df146756 1775 TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC1PSC);
mbed_official 76:aeb1df146756 1776 /* Set the IC1PSC value */
mbed_official 76:aeb1df146756 1777 TIMx->CCMR1 |= TIM_ICPSC;
mbed_official 76:aeb1df146756 1778 }
mbed_official 76:aeb1df146756 1779
mbed_official 76:aeb1df146756 1780 /**
mbed_official 76:aeb1df146756 1781 * @brief Sets the TIMx Input Capture 2 prescaler.
mbed_official 76:aeb1df146756 1782 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1783 * @param TIM_ICPSC: specifies the Input Capture2 prescaler new value.
mbed_official 76:aeb1df146756 1784 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1785 * @arg TIM_ICPSC_DIV1: no prescaler.
mbed_official 76:aeb1df146756 1786 * @arg TIM_ICPSC_DIV2: capture is done once every 2 events.
mbed_official 76:aeb1df146756 1787 * @arg TIM_ICPSC_DIV4: capture is done once every 4 events.
mbed_official 76:aeb1df146756 1788 * @arg TIM_ICPSC_DIV8: capture is done once every 8 events.
mbed_official 76:aeb1df146756 1789 * @retval None
mbed_official 76:aeb1df146756 1790 */
mbed_official 76:aeb1df146756 1791 void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official 76:aeb1df146756 1792 {
mbed_official 76:aeb1df146756 1793 /* Check the parameters */
mbed_official 76:aeb1df146756 1794 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1795 assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official 76:aeb1df146756 1796
mbed_official 76:aeb1df146756 1797 /* Reset the IC2PSC Bits */
mbed_official 76:aeb1df146756 1798 TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC2PSC);
mbed_official 76:aeb1df146756 1799 /* Set the IC2PSC value */
mbed_official 76:aeb1df146756 1800 TIMx->CCMR1 |= (uint16_t)(TIM_ICPSC << 8);
mbed_official 76:aeb1df146756 1801 }
mbed_official 76:aeb1df146756 1802
mbed_official 76:aeb1df146756 1803 /**
mbed_official 76:aeb1df146756 1804 * @brief Sets the TIMx Input Capture 3 prescaler.
mbed_official 76:aeb1df146756 1805 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1806 * @param TIM_ICPSC: specifies the Input Capture3 prescaler new value.
mbed_official 76:aeb1df146756 1807 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1808 * @arg TIM_ICPSC_DIV1: no prescaler.
mbed_official 76:aeb1df146756 1809 * @arg TIM_ICPSC_DIV2: capture is done once every 2 events.
mbed_official 76:aeb1df146756 1810 * @arg TIM_ICPSC_DIV4: capture is done once every 4 events.
mbed_official 76:aeb1df146756 1811 * @arg TIM_ICPSC_DIV8: capture is done once every 8 events.
mbed_official 76:aeb1df146756 1812 * @retval None
mbed_official 76:aeb1df146756 1813 */
mbed_official 76:aeb1df146756 1814 void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official 76:aeb1df146756 1815 {
mbed_official 76:aeb1df146756 1816 /* Check the parameters */
mbed_official 76:aeb1df146756 1817 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1818 assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official 76:aeb1df146756 1819
mbed_official 76:aeb1df146756 1820 /* Reset the IC3PSC Bits */
mbed_official 76:aeb1df146756 1821 TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC3PSC);
mbed_official 76:aeb1df146756 1822 /* Set the IC3PSC value */
mbed_official 76:aeb1df146756 1823 TIMx->CCMR2 |= TIM_ICPSC;
mbed_official 76:aeb1df146756 1824 }
mbed_official 76:aeb1df146756 1825
mbed_official 76:aeb1df146756 1826 /**
mbed_official 76:aeb1df146756 1827 * @brief Sets the TIMx Input Capture 4 prescaler.
mbed_official 76:aeb1df146756 1828 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1829 * @param TIM_ICPSC: specifies the Input Capture4 prescaler new value.
mbed_official 76:aeb1df146756 1830 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1831 * @arg TIM_ICPSC_DIV1: no prescaler.
mbed_official 76:aeb1df146756 1832 * @arg TIM_ICPSC_DIV2: capture is done once every 2 events.
mbed_official 76:aeb1df146756 1833 * @arg TIM_ICPSC_DIV4: capture is done once every 4 events.
mbed_official 76:aeb1df146756 1834 * @arg TIM_ICPSC_DIV8: capture is done once every 8 events.
mbed_official 76:aeb1df146756 1835 * @retval None
mbed_official 76:aeb1df146756 1836 */
mbed_official 76:aeb1df146756 1837 void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official 76:aeb1df146756 1838 {
mbed_official 76:aeb1df146756 1839 /* Check the parameters */
mbed_official 76:aeb1df146756 1840 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1841 assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official 76:aeb1df146756 1842
mbed_official 76:aeb1df146756 1843 /* Reset the IC4PSC Bits */
mbed_official 76:aeb1df146756 1844 TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC4PSC);
mbed_official 76:aeb1df146756 1845 /* Set the IC4PSC value */
mbed_official 76:aeb1df146756 1846 TIMx->CCMR2 |= (uint16_t)(TIM_ICPSC << 8);
mbed_official 76:aeb1df146756 1847 }
mbed_official 76:aeb1df146756 1848
mbed_official 76:aeb1df146756 1849 /**
mbed_official 76:aeb1df146756 1850 * @}
mbed_official 76:aeb1df146756 1851 */
mbed_official 76:aeb1df146756 1852
mbed_official 76:aeb1df146756 1853 /** @defgroup TIM_Group4 Interrupts DMA and flags management functions
mbed_official 76:aeb1df146756 1854 * @brief Interrupts, DMA and flags management functions
mbed_official 76:aeb1df146756 1855 *
mbed_official 76:aeb1df146756 1856 @verbatim
mbed_official 76:aeb1df146756 1857 ===============================================================================
mbed_official 76:aeb1df146756 1858 ##### Interrupts, DMA and flags management functions #####
mbed_official 76:aeb1df146756 1859 ===============================================================================
mbed_official 76:aeb1df146756 1860
mbed_official 76:aeb1df146756 1861 @endverbatim
mbed_official 76:aeb1df146756 1862 * @{
mbed_official 76:aeb1df146756 1863 */
mbed_official 76:aeb1df146756 1864
mbed_official 76:aeb1df146756 1865 /**
mbed_official 76:aeb1df146756 1866 * @brief Enables or disables the specified TIM interrupts.
mbed_official 76:aeb1df146756 1867 * @param TIMx: where x can be 2 to 11 to select the TIMx peripheral.
mbed_official 76:aeb1df146756 1868 * @param TIM_IT: specifies the TIM interrupts sources to be enabled or disabled.
mbed_official 76:aeb1df146756 1869 * This parameter can be any combination of the following values:
mbed_official 76:aeb1df146756 1870 * @arg TIM_IT_Update: TIM update Interrupt source.
mbed_official 76:aeb1df146756 1871 * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source.
mbed_official 76:aeb1df146756 1872 * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source.
mbed_official 76:aeb1df146756 1873 * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source.
mbed_official 76:aeb1df146756 1874 * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source.
mbed_official 76:aeb1df146756 1875 * @arg TIM_IT_Trigger: TIM Trigger Interrupt source.
mbed_official 76:aeb1df146756 1876 * @note TIM6 and TIM7 can only generate an update interrupt.
mbed_official 76:aeb1df146756 1877 * @note TIM_IT_CC2, TIM_IT_CC3, TIM_IT_CC4 and TIM_IT_Trigger can not be used with TIM10 and TIM11.
mbed_official 76:aeb1df146756 1878 * @note TIM_IT_CC3, TIM_IT_CC4 can not be used with TIM9.
mbed_official 76:aeb1df146756 1879 * @param NewState: new state of the TIM interrupts.
mbed_official 76:aeb1df146756 1880 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 1881 * @retval None
mbed_official 76:aeb1df146756 1882 */
mbed_official 76:aeb1df146756 1883 void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState)
mbed_official 76:aeb1df146756 1884 {
mbed_official 76:aeb1df146756 1885 /* Check the parameters */
mbed_official 76:aeb1df146756 1886 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1887 assert_param(IS_TIM_IT(TIM_IT));
mbed_official 76:aeb1df146756 1888 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 1889
mbed_official 76:aeb1df146756 1890 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 1891 {
mbed_official 76:aeb1df146756 1892 /* Enable the Interrupt sources */
mbed_official 76:aeb1df146756 1893 TIMx->DIER |= TIM_IT;
mbed_official 76:aeb1df146756 1894 }
mbed_official 76:aeb1df146756 1895 else
mbed_official 76:aeb1df146756 1896 {
mbed_official 76:aeb1df146756 1897 /* Disable the Interrupt sources */
mbed_official 76:aeb1df146756 1898 TIMx->DIER &= (uint16_t)~TIM_IT;
mbed_official 76:aeb1df146756 1899 }
mbed_official 76:aeb1df146756 1900 }
mbed_official 76:aeb1df146756 1901
mbed_official 76:aeb1df146756 1902 /**
mbed_official 76:aeb1df146756 1903 * @brief Configures the TIMx event to be generate by software.
mbed_official 76:aeb1df146756 1904 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1905 * @param TIM_EventSource: specifies the event source.
mbed_official 76:aeb1df146756 1906 * This parameter can be one or more of the following values:
mbed_official 76:aeb1df146756 1907 * @arg TIM_EventSource_Update: Timer update Event source.
mbed_official 76:aeb1df146756 1908 * @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source.
mbed_official 76:aeb1df146756 1909 * @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source.
mbed_official 76:aeb1df146756 1910 * @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source.
mbed_official 76:aeb1df146756 1911 * @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source.
mbed_official 76:aeb1df146756 1912 * @arg TIM_EventSource_Trigger: Timer Trigger Event source.
mbed_official 76:aeb1df146756 1913 * @note TIM6 and TIM7 can only generate an update event.
mbed_official 76:aeb1df146756 1914 * @note TIM9 can only generate an update event, Capture Compare 1 event,
mbed_official 76:aeb1df146756 1915 * Capture Compare 2 event and TIM_EventSource_Trigger.
mbed_official 76:aeb1df146756 1916 * @note TIM10 and TIM11 can only generate an update event and Capture Compare 1 event.
mbed_official 76:aeb1df146756 1917 * @retval None
mbed_official 76:aeb1df146756 1918 */
mbed_official 76:aeb1df146756 1919 void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource)
mbed_official 76:aeb1df146756 1920 {
mbed_official 76:aeb1df146756 1921 /* Check the parameters */
mbed_official 76:aeb1df146756 1922 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1923 assert_param(IS_TIM_EVENT_SOURCE(TIM_EventSource));
mbed_official 76:aeb1df146756 1924 /* Set the event sources */
mbed_official 76:aeb1df146756 1925 TIMx->EGR = TIM_EventSource;
mbed_official 76:aeb1df146756 1926 }
mbed_official 76:aeb1df146756 1927
mbed_official 76:aeb1df146756 1928 /**
mbed_official 76:aeb1df146756 1929 * @brief Checks whether the specified TIM flag is set or not.
mbed_official 76:aeb1df146756 1930 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1931 * @param TIM_FLAG: specifies the flag to check.
mbed_official 76:aeb1df146756 1932 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1933 * @arg TIM_FLAG_Update: TIM update Flag.
mbed_official 76:aeb1df146756 1934 * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag.
mbed_official 76:aeb1df146756 1935 * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag.
mbed_official 76:aeb1df146756 1936 * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag.
mbed_official 76:aeb1df146756 1937 * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag.
mbed_official 76:aeb1df146756 1938 * @arg TIM_FLAG_Trigger: TIM Trigger Flag.
mbed_official 76:aeb1df146756 1939 * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag.
mbed_official 76:aeb1df146756 1940 * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag.
mbed_official 76:aeb1df146756 1941 * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag.
mbed_official 76:aeb1df146756 1942 * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag.
mbed_official 76:aeb1df146756 1943 *
mbed_official 76:aeb1df146756 1944 * @note TIM6 and TIM7 can have only one update flag.
mbed_official 76:aeb1df146756 1945 * @note TIM9 can have only update flag, TIM_FLAG_CC1, TIM_FLAG_CC2 and TIM_FLAG_Trigger,
mbed_official 76:aeb1df146756 1946 * TIM_FLAG_CC1OF or TIM_FLAG_CC2OF flags.
mbed_official 76:aeb1df146756 1947 * @note TIM10 and TIM11 can have only update flag, TIM_FLAG_CC1 or TIM_FLAG_CC1OF flags
mbed_official 76:aeb1df146756 1948 * @retval The new state of TIM_FLAG (SET or RESET).
mbed_official 76:aeb1df146756 1949 */
mbed_official 76:aeb1df146756 1950 FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG)
mbed_official 76:aeb1df146756 1951 {
mbed_official 76:aeb1df146756 1952 ITStatus bitstatus = RESET;
mbed_official 76:aeb1df146756 1953
mbed_official 76:aeb1df146756 1954 /* Check the parameters */
mbed_official 76:aeb1df146756 1955 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1956 assert_param(IS_TIM_GET_FLAG(TIM_FLAG));
mbed_official 76:aeb1df146756 1957
mbed_official 76:aeb1df146756 1958 if ((TIMx->SR & TIM_FLAG) != (uint16_t)RESET)
mbed_official 76:aeb1df146756 1959 {
mbed_official 76:aeb1df146756 1960 bitstatus = SET;
mbed_official 76:aeb1df146756 1961 }
mbed_official 76:aeb1df146756 1962 else
mbed_official 76:aeb1df146756 1963 {
mbed_official 76:aeb1df146756 1964 bitstatus = RESET;
mbed_official 76:aeb1df146756 1965 }
mbed_official 76:aeb1df146756 1966 return bitstatus;
mbed_official 76:aeb1df146756 1967 }
mbed_official 76:aeb1df146756 1968
mbed_official 76:aeb1df146756 1969 /**
mbed_official 76:aeb1df146756 1970 * @brief Clears the TIMx's pending flags.
mbed_official 76:aeb1df146756 1971 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 1972 * @param TIM_FLAG: specifies the flag bit to clear.
mbed_official 76:aeb1df146756 1973 * This parameter can be any combination of the following values:
mbed_official 76:aeb1df146756 1974 * @arg TIM_FLAG_Update: TIM update Flag.
mbed_official 76:aeb1df146756 1975 * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag.
mbed_official 76:aeb1df146756 1976 * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag.
mbed_official 76:aeb1df146756 1977 * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag.
mbed_official 76:aeb1df146756 1978 * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag.
mbed_official 76:aeb1df146756 1979 * @arg TIM_FLAG_Trigger: TIM Trigger Flag.
mbed_official 76:aeb1df146756 1980 * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag.
mbed_official 76:aeb1df146756 1981 * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag.
mbed_official 76:aeb1df146756 1982 * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag.
mbed_official 76:aeb1df146756 1983 * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag.
mbed_official 76:aeb1df146756 1984 * @note TIM6 and TIM7 can have only one update flag.
mbed_official 76:aeb1df146756 1985 * @note TIM9 can have only update flag, TIM_FLAG_CC1, TIM_FLAG_CC2 and TIM_FLAG_Trigger flags
mbed_official 76:aeb1df146756 1986 * TIM_FLAG_CC1OF or TIM_FLAG_CC2OF flags.
mbed_official 76:aeb1df146756 1987 * @note TIM10 and TIM11 can have only update flag, TIM_FLAG_CC1
mbed_official 76:aeb1df146756 1988 * or TIM_FLAG_CC1OF flags
mbed_official 76:aeb1df146756 1989 * @retval None
mbed_official 76:aeb1df146756 1990 */
mbed_official 76:aeb1df146756 1991 void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG)
mbed_official 76:aeb1df146756 1992 {
mbed_official 76:aeb1df146756 1993 /* Check the parameters */
mbed_official 76:aeb1df146756 1994 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 1995 assert_param(IS_TIM_CLEAR_FLAG(TIM_FLAG));
mbed_official 76:aeb1df146756 1996
mbed_official 76:aeb1df146756 1997 /* Clear the flags */
mbed_official 76:aeb1df146756 1998 TIMx->SR = (uint16_t)~TIM_FLAG;
mbed_official 76:aeb1df146756 1999 }
mbed_official 76:aeb1df146756 2000
mbed_official 76:aeb1df146756 2001 /**
mbed_official 76:aeb1df146756 2002 * @brief Checks whether the TIM interrupt has occurred or not.
mbed_official 76:aeb1df146756 2003 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2004 * @param TIM_IT: specifies the TIM interrupt source to check.
mbed_official 76:aeb1df146756 2005 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2006 * @arg TIM_IT_Update: TIM update Interrupt source.
mbed_official 76:aeb1df146756 2007 * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source.
mbed_official 76:aeb1df146756 2008 * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source.
mbed_official 76:aeb1df146756 2009 * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source.
mbed_official 76:aeb1df146756 2010 * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source.
mbed_official 76:aeb1df146756 2011 * @arg TIM_IT_Trigger: TIM Trigger Interrupt source.
mbed_official 76:aeb1df146756 2012 *
mbed_official 76:aeb1df146756 2013 * @note TIM6 and TIM7 can generate only an update interrupt.
mbed_official 76:aeb1df146756 2014 * @note TIM9 can have only update interrupt, TIM_FLAG_CC1 or TIM_FLAG_CC2,
mbed_official 76:aeb1df146756 2015 * interrupt and TIM_IT_Trigger interrupt.
mbed_official 76:aeb1df146756 2016 * @note TIM10 and TIM11 can have only update interrupt or TIM_FLAG_CC1
mbed_official 76:aeb1df146756 2017 * interrupt
mbed_official 76:aeb1df146756 2018 * @retval The new state of the TIM_IT(SET or RESET).
mbed_official 76:aeb1df146756 2019 */
mbed_official 76:aeb1df146756 2020 ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT)
mbed_official 76:aeb1df146756 2021 {
mbed_official 76:aeb1df146756 2022 ITStatus bitstatus = RESET;
mbed_official 76:aeb1df146756 2023 uint16_t itstatus = 0x0, itenable = 0x0;
mbed_official 76:aeb1df146756 2024
mbed_official 76:aeb1df146756 2025 /* Check the parameters */
mbed_official 76:aeb1df146756 2026 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2027 assert_param(IS_TIM_GET_IT(TIM_IT));
mbed_official 76:aeb1df146756 2028
mbed_official 76:aeb1df146756 2029 itstatus = TIMx->SR & TIM_IT;
mbed_official 76:aeb1df146756 2030
mbed_official 76:aeb1df146756 2031 itenable = TIMx->DIER & TIM_IT;
mbed_official 76:aeb1df146756 2032 if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET))
mbed_official 76:aeb1df146756 2033 {
mbed_official 76:aeb1df146756 2034 bitstatus = SET;
mbed_official 76:aeb1df146756 2035 }
mbed_official 76:aeb1df146756 2036 else
mbed_official 76:aeb1df146756 2037 {
mbed_official 76:aeb1df146756 2038 bitstatus = RESET;
mbed_official 76:aeb1df146756 2039 }
mbed_official 76:aeb1df146756 2040 return bitstatus;
mbed_official 76:aeb1df146756 2041 }
mbed_official 76:aeb1df146756 2042
mbed_official 76:aeb1df146756 2043 /**
mbed_official 76:aeb1df146756 2044 * @brief Clears the TIMx's interrupt pending bits.
mbed_official 76:aeb1df146756 2045 * @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2046 * @param TIM_IT: specifies the pending bit to clear.
mbed_official 76:aeb1df146756 2047 * This parameter can be any combination of the following values:
mbed_official 76:aeb1df146756 2048 * @arg TIM_IT_Update: TIM update Interrupt source.
mbed_official 76:aeb1df146756 2049 * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source.
mbed_official 76:aeb1df146756 2050 * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source.
mbed_official 76:aeb1df146756 2051 * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source.
mbed_official 76:aeb1df146756 2052 * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source.
mbed_official 76:aeb1df146756 2053 * @arg TIM_IT_Trigger: TIM Trigger Interrupt source.
mbed_official 76:aeb1df146756 2054 * @note
mbed_official 76:aeb1df146756 2055 * @note TIM6 and TIM7 can generate only an update interrupt.
mbed_official 76:aeb1df146756 2056 * @note TIM9 can have only update interrupt, TIM_IT_CC1 or TIM_IT_CC2,
mbed_official 76:aeb1df146756 2057 * and TIM_IT_Trigger interrupt.
mbed_official 76:aeb1df146756 2058 * @note TIM10 and TIM11 can have only update interrupt or TIM_IT_CC1
mbed_official 76:aeb1df146756 2059 * interrupt
mbed_official 76:aeb1df146756 2060 * @retval None
mbed_official 76:aeb1df146756 2061 */
mbed_official 76:aeb1df146756 2062 void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT)
mbed_official 76:aeb1df146756 2063 {
mbed_official 76:aeb1df146756 2064 /* Check the parameters */
mbed_official 76:aeb1df146756 2065 assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2066 assert_param(IS_TIM_IT(TIM_IT));
mbed_official 76:aeb1df146756 2067
mbed_official 76:aeb1df146756 2068 /* Clear the IT pending Bit */
mbed_official 76:aeb1df146756 2069 TIMx->SR = (uint16_t)~TIM_IT;
mbed_official 76:aeb1df146756 2070 }
mbed_official 76:aeb1df146756 2071
mbed_official 76:aeb1df146756 2072 /**
mbed_official 76:aeb1df146756 2073 * @brief Configures the TIMx's DMA interface.
mbed_official 76:aeb1df146756 2074 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2075 * @param TIM_DMABase: DMA Base address.
mbed_official 76:aeb1df146756 2076 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2077 * @arg TIM_DMABase_CR1: TIM CR1 register as TIM DMA Base.
mbed_official 76:aeb1df146756 2078 * @arg TIM_DMABase_CR2: TIM CR2 register as TIM DMA Base.
mbed_official 76:aeb1df146756 2079 * @arg TIM_DMABase_SMCR: TIM SMCR register as TIM DMA Base.
mbed_official 76:aeb1df146756 2080 * @arg TIM_DMABase_DIER: TIM DIER register as TIM DMA Base.
mbed_official 76:aeb1df146756 2081 * @arg TIM_DMABase_SR: TIM SR register as TIM DMA Base.
mbed_official 76:aeb1df146756 2082 * @arg TIM_DMABase_EGR: TIM EGR register as TIM DMA Base.
mbed_official 76:aeb1df146756 2083 * @arg TIM_DMABase_CCMR1: TIM CCMR1 register as TIM DMA Base.
mbed_official 76:aeb1df146756 2084 * @arg TIM_DMABase_CCMR2: TIM CCMR2 register as TIM DMA Base.
mbed_official 76:aeb1df146756 2085 * @arg TIM_DMABase_CCER: TIM CCER register as TIM DMA Base.
mbed_official 76:aeb1df146756 2086 * @arg TIM_DMABase_CNT: TIM CNT register as TIM DMA Base.
mbed_official 76:aeb1df146756 2087 * @arg TIM_DMABase_PSC: TIM PSC register as TIM DMA Base.
mbed_official 76:aeb1df146756 2088 * @arg TIM_DMABase_ARR: TIM ARR register as TIM DMA Base.
mbed_official 76:aeb1df146756 2089 * @arg TIM_DMABase_CCR1: TIM CCR1 register as TIM DMA Base.
mbed_official 76:aeb1df146756 2090 * @arg TIM_DMABase_CCR2: TIM CCR2 register as TIM DMA Base.
mbed_official 76:aeb1df146756 2091 * @arg TIM_DMABase_CCR3: TIM CCR3 register as TIM DMA Base.
mbed_official 76:aeb1df146756 2092 * @arg TIM_DMABase_CCR4: TIM CCR4 register as TIM DMA Base.
mbed_official 76:aeb1df146756 2093 * @arg TIM_DMABase_DCR: TIM DCR register as TIM DMA Base.
mbed_official 76:aeb1df146756 2094 * @arg TIM_DMABase_OR: TIM OR register as TIM DMA Base.
mbed_official 76:aeb1df146756 2095 * @param TIM_DMABurstLength: DMA Burst length.
mbed_official 76:aeb1df146756 2096 * This parameter can be one value between:
mbed_official 76:aeb1df146756 2097 * TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official 76:aeb1df146756 2098 * @retval None
mbed_official 76:aeb1df146756 2099 */
mbed_official 76:aeb1df146756 2100 void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength)
mbed_official 76:aeb1df146756 2101 {
mbed_official 76:aeb1df146756 2102 /* Check the parameters */
mbed_official 76:aeb1df146756 2103 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2104 assert_param(IS_TIM_DMA_BASE(TIM_DMABase));
mbed_official 76:aeb1df146756 2105 assert_param(IS_TIM_DMA_LENGTH(TIM_DMABurstLength));
mbed_official 76:aeb1df146756 2106 /* Set the DMA Base and the DMA Burst Length */
mbed_official 76:aeb1df146756 2107 TIMx->DCR = TIM_DMABase | TIM_DMABurstLength;
mbed_official 76:aeb1df146756 2108 }
mbed_official 76:aeb1df146756 2109
mbed_official 76:aeb1df146756 2110 /**
mbed_official 76:aeb1df146756 2111 * @brief Enables or disables the TIMx's DMA Requests.
mbed_official 76:aeb1df146756 2112 * @param TIMx: where x can be 2, 3, 4, 5, 6 or 7 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2113 * @param TIM_DMASource: specifies the DMA Request sources.
mbed_official 76:aeb1df146756 2114 * This parameter can be any combination of the following values:
mbed_official 76:aeb1df146756 2115 * @arg TIM_DMA_Update: TIM update Interrupt source.
mbed_official 76:aeb1df146756 2116 * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source.
mbed_official 76:aeb1df146756 2117 * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source.
mbed_official 76:aeb1df146756 2118 * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source.
mbed_official 76:aeb1df146756 2119 * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source.
mbed_official 76:aeb1df146756 2120 * @arg TIM_DMA_Trigger: TIM Trigger DMA source.
mbed_official 76:aeb1df146756 2121 * @param NewState: new state of the DMA Request sources.
mbed_official 76:aeb1df146756 2122 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 2123 * @retval None
mbed_official 76:aeb1df146756 2124 */
mbed_official 76:aeb1df146756 2125 void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState)
mbed_official 76:aeb1df146756 2126 {
mbed_official 76:aeb1df146756 2127 /* Check the parameters */
mbed_official 76:aeb1df146756 2128 assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2129 assert_param(IS_TIM_DMA_SOURCE(TIM_DMASource));
mbed_official 76:aeb1df146756 2130 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 2131
mbed_official 76:aeb1df146756 2132 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 2133 {
mbed_official 76:aeb1df146756 2134 /* Enable the DMA sources */
mbed_official 76:aeb1df146756 2135 TIMx->DIER |= TIM_DMASource;
mbed_official 76:aeb1df146756 2136 }
mbed_official 76:aeb1df146756 2137 else
mbed_official 76:aeb1df146756 2138 {
mbed_official 76:aeb1df146756 2139 /* Disable the DMA sources */
mbed_official 76:aeb1df146756 2140 TIMx->DIER &= (uint16_t)~TIM_DMASource;
mbed_official 76:aeb1df146756 2141 }
mbed_official 76:aeb1df146756 2142 }
mbed_official 76:aeb1df146756 2143
mbed_official 76:aeb1df146756 2144 /**
mbed_official 76:aeb1df146756 2145 * @brief Selects the TIMx peripheral Capture Compare DMA source.
mbed_official 76:aeb1df146756 2146 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2147 * @param NewState: new state of the Capture Compare DMA source
mbed_official 76:aeb1df146756 2148 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 2149 * @retval None
mbed_official 76:aeb1df146756 2150 */
mbed_official 76:aeb1df146756 2151 void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official 76:aeb1df146756 2152 {
mbed_official 76:aeb1df146756 2153 /* Check the parameters */
mbed_official 76:aeb1df146756 2154 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2155 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 2156
mbed_official 76:aeb1df146756 2157 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 2158 {
mbed_official 76:aeb1df146756 2159 /* Set the CCDS Bit */
mbed_official 76:aeb1df146756 2160 TIMx->CR2 |= TIM_CR2_CCDS;
mbed_official 76:aeb1df146756 2161 }
mbed_official 76:aeb1df146756 2162 else
mbed_official 76:aeb1df146756 2163 {
mbed_official 76:aeb1df146756 2164 /* Reset the CCDS Bit */
mbed_official 76:aeb1df146756 2165 TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCDS);
mbed_official 76:aeb1df146756 2166 }
mbed_official 76:aeb1df146756 2167 }
mbed_official 76:aeb1df146756 2168
mbed_official 76:aeb1df146756 2169 /**
mbed_official 76:aeb1df146756 2170 * @}
mbed_official 76:aeb1df146756 2171 */
mbed_official 76:aeb1df146756 2172
mbed_official 76:aeb1df146756 2173 /** @defgroup TIM_Group5 Clocks management functions
mbed_official 76:aeb1df146756 2174 * @brief Clocks management functions
mbed_official 76:aeb1df146756 2175 *
mbed_official 76:aeb1df146756 2176 @verbatim
mbed_official 76:aeb1df146756 2177 ===============================================================================
mbed_official 76:aeb1df146756 2178 ##### Clocks management functions #####
mbed_official 76:aeb1df146756 2179 ===============================================================================
mbed_official 76:aeb1df146756 2180
mbed_official 76:aeb1df146756 2181 @endverbatim
mbed_official 76:aeb1df146756 2182 * @{
mbed_official 76:aeb1df146756 2183 */
mbed_official 76:aeb1df146756 2184
mbed_official 76:aeb1df146756 2185 /**
mbed_official 76:aeb1df146756 2186 * @brief Configures the TIMx internal Clock
mbed_official 76:aeb1df146756 2187 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2188 * @retval None
mbed_official 76:aeb1df146756 2189 */
mbed_official 76:aeb1df146756 2190 void TIM_InternalClockConfig(TIM_TypeDef* TIMx)
mbed_official 76:aeb1df146756 2191 {
mbed_official 76:aeb1df146756 2192 /* Check the parameters */
mbed_official 76:aeb1df146756 2193 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2194 /* Disable slave mode to clock the prescaler directly with the internal clock */
mbed_official 76:aeb1df146756 2195 TIMx->SMCR &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official 76:aeb1df146756 2196 }
mbed_official 76:aeb1df146756 2197
mbed_official 76:aeb1df146756 2198 /**
mbed_official 76:aeb1df146756 2199 * @brief Configures the TIMx Internal Trigger as External Clock
mbed_official 76:aeb1df146756 2200 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2201 * @param TIM_ITRSource: Trigger source.
mbed_official 76:aeb1df146756 2202 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2203 * @param TIM_TS_ITR0: Internal Trigger 0.
mbed_official 76:aeb1df146756 2204 * @param TIM_TS_ITR1: Internal Trigger 1.
mbed_official 76:aeb1df146756 2205 * @param TIM_TS_ITR2: Internal Trigger 2.
mbed_official 76:aeb1df146756 2206 * @param TIM_TS_ITR3: Internal Trigger 3.
mbed_official 76:aeb1df146756 2207 * @retval None
mbed_official 76:aeb1df146756 2208 */
mbed_official 76:aeb1df146756 2209 void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource)
mbed_official 76:aeb1df146756 2210 {
mbed_official 76:aeb1df146756 2211 /* Check the parameters */
mbed_official 76:aeb1df146756 2212 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2213 assert_param(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource));
mbed_official 76:aeb1df146756 2214 /* Select the Internal Trigger */
mbed_official 76:aeb1df146756 2215 TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource);
mbed_official 76:aeb1df146756 2216 /* Select the External clock mode1 */
mbed_official 76:aeb1df146756 2217 TIMx->SMCR |= TIM_SlaveMode_External1;
mbed_official 76:aeb1df146756 2218 }
mbed_official 76:aeb1df146756 2219
mbed_official 76:aeb1df146756 2220 /**
mbed_official 76:aeb1df146756 2221 * @brief Configures the TIMx Trigger as External Clock
mbed_official 76:aeb1df146756 2222 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2223 * @param TIM_TIxExternalCLKSource: Trigger source.
mbed_official 76:aeb1df146756 2224 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2225 * @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector.
mbed_official 76:aeb1df146756 2226 * @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1.
mbed_official 76:aeb1df146756 2227 * @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2.
mbed_official 76:aeb1df146756 2228 * @param TIM_ICPolarity: specifies the TIx Polarity.
mbed_official 76:aeb1df146756 2229 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2230 * @arg TIM_ICPolarity_Rising:
mbed_official 76:aeb1df146756 2231 * @arg TIM_ICPolarity_Falling:
mbed_official 76:aeb1df146756 2232 * @param ICFilter : specifies the filter value.
mbed_official 76:aeb1df146756 2233 * This parameter must be a value between 0x0 and 0xF.
mbed_official 76:aeb1df146756 2234 * @retval None
mbed_official 76:aeb1df146756 2235 */
mbed_official 76:aeb1df146756 2236 void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
mbed_official 76:aeb1df146756 2237 uint16_t TIM_ICPolarity, uint16_t ICFilter)
mbed_official 76:aeb1df146756 2238 {
mbed_official 76:aeb1df146756 2239 /* Check the parameters */
mbed_official 76:aeb1df146756 2240 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2241 assert_param(IS_TIM_IC_POLARITY(TIM_ICPolarity));
mbed_official 76:aeb1df146756 2242 assert_param(IS_TIM_IC_FILTER(ICFilter));
mbed_official 76:aeb1df146756 2243
mbed_official 76:aeb1df146756 2244 /* Configure the Timer Input Clock Source */
mbed_official 76:aeb1df146756 2245 if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2)
mbed_official 76:aeb1df146756 2246 {
mbed_official 76:aeb1df146756 2247 TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
mbed_official 76:aeb1df146756 2248 }
mbed_official 76:aeb1df146756 2249 else
mbed_official 76:aeb1df146756 2250 {
mbed_official 76:aeb1df146756 2251 TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
mbed_official 76:aeb1df146756 2252 }
mbed_official 76:aeb1df146756 2253 /* Select the Trigger source */
mbed_official 76:aeb1df146756 2254 TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource);
mbed_official 76:aeb1df146756 2255 /* Select the External clock mode1 */
mbed_official 76:aeb1df146756 2256 TIMx->SMCR |= TIM_SlaveMode_External1;
mbed_official 76:aeb1df146756 2257 }
mbed_official 76:aeb1df146756 2258
mbed_official 76:aeb1df146756 2259 /**
mbed_official 76:aeb1df146756 2260 * @brief Configures the External clock Mode1
mbed_official 76:aeb1df146756 2261 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2262 * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official 76:aeb1df146756 2263 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2264 * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official 76:aeb1df146756 2265 * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official 76:aeb1df146756 2266 * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official 76:aeb1df146756 2267 * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official 76:aeb1df146756 2268 * @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official 76:aeb1df146756 2269 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2270 * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official 76:aeb1df146756 2271 * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official 76:aeb1df146756 2272 * @param ExtTRGFilter: External Trigger Filter.
mbed_official 76:aeb1df146756 2273 * This parameter must be a value between 0x00 and 0x0F
mbed_official 76:aeb1df146756 2274 * @retval None
mbed_official 76:aeb1df146756 2275 */
mbed_official 76:aeb1df146756 2276 void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official 76:aeb1df146756 2277 uint16_t ExtTRGFilter)
mbed_official 76:aeb1df146756 2278 {
mbed_official 76:aeb1df146756 2279 uint16_t tmpsmcr = 0;
mbed_official 76:aeb1df146756 2280
mbed_official 76:aeb1df146756 2281 /* Check the parameters */
mbed_official 76:aeb1df146756 2282 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2283 assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official 76:aeb1df146756 2284 assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official 76:aeb1df146756 2285 assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official 76:aeb1df146756 2286
mbed_official 76:aeb1df146756 2287 /* Configure the ETR Clock source */
mbed_official 76:aeb1df146756 2288 TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
mbed_official 76:aeb1df146756 2289
mbed_official 76:aeb1df146756 2290 /* Get the TIMx SMCR register value */
mbed_official 76:aeb1df146756 2291 tmpsmcr = TIMx->SMCR;
mbed_official 76:aeb1df146756 2292 /* Reset the SMS Bits */
mbed_official 76:aeb1df146756 2293 tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official 76:aeb1df146756 2294 /* Select the External clock mode1 */
mbed_official 76:aeb1df146756 2295 tmpsmcr |= TIM_SlaveMode_External1;
mbed_official 76:aeb1df146756 2296 /* Select the Trigger selection : ETRF */
mbed_official 76:aeb1df146756 2297 tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS));
mbed_official 76:aeb1df146756 2298 tmpsmcr |= TIM_TS_ETRF;
mbed_official 76:aeb1df146756 2299 /* Write to TIMx SMCR */
mbed_official 76:aeb1df146756 2300 TIMx->SMCR = tmpsmcr;
mbed_official 76:aeb1df146756 2301 }
mbed_official 76:aeb1df146756 2302
mbed_official 76:aeb1df146756 2303 /**
mbed_official 76:aeb1df146756 2304 * @brief Configures the External clock Mode2
mbed_official 76:aeb1df146756 2305 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2306 * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official 76:aeb1df146756 2307 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2308 * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official 76:aeb1df146756 2309 * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official 76:aeb1df146756 2310 * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official 76:aeb1df146756 2311 * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official 76:aeb1df146756 2312 * @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official 76:aeb1df146756 2313 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2314 * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official 76:aeb1df146756 2315 * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official 76:aeb1df146756 2316 * @param ExtTRGFilter: External Trigger Filter.
mbed_official 76:aeb1df146756 2317 * This parameter must be a value between 0x00 and 0x0F
mbed_official 76:aeb1df146756 2318 * @retval None
mbed_official 76:aeb1df146756 2319 */
mbed_official 76:aeb1df146756 2320 void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official 76:aeb1df146756 2321 uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)
mbed_official 76:aeb1df146756 2322 {
mbed_official 76:aeb1df146756 2323 /* Check the parameters */
mbed_official 76:aeb1df146756 2324 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2325 assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official 76:aeb1df146756 2326 assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official 76:aeb1df146756 2327 assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official 76:aeb1df146756 2328
mbed_official 76:aeb1df146756 2329 /* Configure the ETR Clock source */
mbed_official 76:aeb1df146756 2330 TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
mbed_official 76:aeb1df146756 2331 /* Enable the External clock mode2 */
mbed_official 76:aeb1df146756 2332 TIMx->SMCR |= TIM_SMCR_ECE;
mbed_official 76:aeb1df146756 2333 }
mbed_official 76:aeb1df146756 2334
mbed_official 76:aeb1df146756 2335 /**
mbed_official 76:aeb1df146756 2336 * @}
mbed_official 76:aeb1df146756 2337 */
mbed_official 76:aeb1df146756 2338
mbed_official 76:aeb1df146756 2339 /** @defgroup TIM_Group6 Synchronization management functions
mbed_official 76:aeb1df146756 2340 * @brief Synchronization management functions
mbed_official 76:aeb1df146756 2341 *
mbed_official 76:aeb1df146756 2342 @verbatim
mbed_official 76:aeb1df146756 2343 ===============================================================================
mbed_official 76:aeb1df146756 2344 ##### Synchronization management functions #####
mbed_official 76:aeb1df146756 2345 ===============================================================================
mbed_official 76:aeb1df146756 2346 *** TIM Driver: how to use it in synchronization Mode ***
mbed_official 76:aeb1df146756 2347 ===============================================================================
mbed_official 76:aeb1df146756 2348 [..] Case of two/several Timers
mbed_official 76:aeb1df146756 2349 (#) Configure the Master Timers using the following functions:
mbed_official 76:aeb1df146756 2350 (++) void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx,
mbed_official 76:aeb1df146756 2351 uint16_t TIM_TRGOSource).
mbed_official 76:aeb1df146756 2352 (++) void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx,
mbed_official 76:aeb1df146756 2353 uint16_t TIM_MasterSlaveMode);
mbed_official 76:aeb1df146756 2354 (#) Configure the Slave Timers using the following functions:
mbed_official 76:aeb1df146756 2355 (++) void TIM_SelectInputTrigger(TIM_TypeDef* TIMx,
mbed_official 76:aeb1df146756 2356 uint16_t TIM_InputTriggerSource);
mbed_official 76:aeb1df146756 2357 (++) void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official 76:aeb1df146756 2358 [..] Case of Timers and external trigger(ETR pin)
mbed_official 76:aeb1df146756 2359 (#) Configure the Etrenal trigger using this function:
mbed_official 76:aeb1df146756 2360 (++) void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official 76:aeb1df146756 2361 uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
mbed_official 76:aeb1df146756 2362 (#) Configure the Slave Timers using the following functions:
mbed_official 76:aeb1df146756 2363 (++) void TIM_SelectInputTrigger(TIM_TypeDef* TIMx,
mbed_official 76:aeb1df146756 2364 uint16_t TIM_InputTriggerSource);
mbed_official 76:aeb1df146756 2365 (++) void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official 76:aeb1df146756 2366
mbed_official 76:aeb1df146756 2367 @endverbatim
mbed_official 76:aeb1df146756 2368 * @{
mbed_official 76:aeb1df146756 2369 */
mbed_official 76:aeb1df146756 2370
mbed_official 76:aeb1df146756 2371 /**
mbed_official 76:aeb1df146756 2372 * @brief Selects the Input Trigger source
mbed_official 76:aeb1df146756 2373 * @param TIMx: where x can be 2, 3, 4, 5, or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2374 * @param TIM_InputTriggerSource: The Input Trigger source.
mbed_official 76:aeb1df146756 2375 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2376 * @arg TIM_TS_ITR0: Internal Trigger 0.
mbed_official 76:aeb1df146756 2377 * @arg TIM_TS_ITR1: Internal Trigger 1.
mbed_official 76:aeb1df146756 2378 * @arg TIM_TS_ITR2: Internal Trigger 2.
mbed_official 76:aeb1df146756 2379 * @arg TIM_TS_ITR3: Internal Trigger 3.
mbed_official 76:aeb1df146756 2380 * @arg TIM_TS_TI1F_ED: TI1 Edge Detector.
mbed_official 76:aeb1df146756 2381 * @arg TIM_TS_TI1FP1: Filtered Timer Input 1.
mbed_official 76:aeb1df146756 2382 * @arg TIM_TS_TI2FP2: Filtered Timer Input 2.
mbed_official 76:aeb1df146756 2383 * @arg TIM_TS_ETRF: External Trigger input.
mbed_official 76:aeb1df146756 2384 * @retval None
mbed_official 76:aeb1df146756 2385 */
mbed_official 76:aeb1df146756 2386 void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource)
mbed_official 76:aeb1df146756 2387 {
mbed_official 76:aeb1df146756 2388 uint16_t tmpsmcr = 0;
mbed_official 76:aeb1df146756 2389
mbed_official 76:aeb1df146756 2390 /* Check the parameters */
mbed_official 76:aeb1df146756 2391 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2392 assert_param(IS_TIM_TRIGGER_SELECTION(TIM_InputTriggerSource));
mbed_official 76:aeb1df146756 2393
mbed_official 76:aeb1df146756 2394 /* Get the TIMx SMCR register value */
mbed_official 76:aeb1df146756 2395 tmpsmcr = TIMx->SMCR;
mbed_official 76:aeb1df146756 2396 /* Reset the TS Bits */
mbed_official 76:aeb1df146756 2397 tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS));
mbed_official 76:aeb1df146756 2398 /* Set the Input Trigger source */
mbed_official 76:aeb1df146756 2399 tmpsmcr |= TIM_InputTriggerSource;
mbed_official 76:aeb1df146756 2400 /* Write to TIMx SMCR */
mbed_official 76:aeb1df146756 2401 TIMx->SMCR = tmpsmcr;
mbed_official 76:aeb1df146756 2402 }
mbed_official 76:aeb1df146756 2403
mbed_official 76:aeb1df146756 2404 /**
mbed_official 76:aeb1df146756 2405 * @brief Selects the TIMx Trigger Output Mode.
mbed_official 76:aeb1df146756 2406 * @param TIMx: where x can be 2, 3, 4, 5, 6, 7 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2407 * @param TIM_TRGOSource: specifies the Trigger Output source.
mbed_official 76:aeb1df146756 2408 * This paramter can be one of the following values:
mbed_official 76:aeb1df146756 2409 *
mbed_official 76:aeb1df146756 2410 * @param For all TIMx
mbed_official 76:aeb1df146756 2411 * @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO).
mbed_official 76:aeb1df146756 2412 * @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO).
mbed_official 76:aeb1df146756 2413 * @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO).
mbed_official 76:aeb1df146756 2414 *
mbed_official 76:aeb1df146756 2415 * @param For all TIMx except TIM6 and TIM7
mbed_official 76:aeb1df146756 2416 * @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag
mbed_official 76:aeb1df146756 2417 * is to be set, as soon as a capture or compare match occurs (TRGO).
mbed_official 76:aeb1df146756 2418 * @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO).
mbed_official 76:aeb1df146756 2419
mbed_official 76:aeb1df146756 2420 * @param For all TIMx except TIM6, TIM7, TIM10 and TIM11
mbed_official 76:aeb1df146756 2421 * @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO).
mbed_official 76:aeb1df146756 2422
mbed_official 76:aeb1df146756 2423 * @param For TIM2, TIM3 and TIM4
mbed_official 76:aeb1df146756 2424 * @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO).
mbed_official 76:aeb1df146756 2425 * @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO).
mbed_official 76:aeb1df146756 2426 *
mbed_official 76:aeb1df146756 2427 * @retval None
mbed_official 76:aeb1df146756 2428 */
mbed_official 76:aeb1df146756 2429 void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource)
mbed_official 76:aeb1df146756 2430 {
mbed_official 76:aeb1df146756 2431 /* Check the parameters */
mbed_official 76:aeb1df146756 2432 assert_param(IS_TIM_LIST5_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2433 assert_param(IS_TIM_TRGO_SOURCE(TIM_TRGOSource));
mbed_official 76:aeb1df146756 2434
mbed_official 76:aeb1df146756 2435 /* Reset the MMS Bits */
mbed_official 76:aeb1df146756 2436 TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_MMS);
mbed_official 76:aeb1df146756 2437 /* Select the TRGO source */
mbed_official 76:aeb1df146756 2438 TIMx->CR2 |= TIM_TRGOSource;
mbed_official 76:aeb1df146756 2439 }
mbed_official 76:aeb1df146756 2440
mbed_official 76:aeb1df146756 2441 /**
mbed_official 76:aeb1df146756 2442 * @brief Selects the TIMx Slave Mode.
mbed_official 76:aeb1df146756 2443 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2444 * @param TIM_SlaveMode: specifies the Timer Slave Mode.
mbed_official 76:aeb1df146756 2445 * This paramter can be one of the following values:
mbed_official 76:aeb1df146756 2446 * @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes
mbed_official 76:aeb1df146756 2447 * the counter and triggers an update of the registers.
mbed_official 76:aeb1df146756 2448 * @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high.
mbed_official 76:aeb1df146756 2449 * @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI.
mbed_official 76:aeb1df146756 2450 * @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter.
mbed_official 76:aeb1df146756 2451 * @retval None
mbed_official 76:aeb1df146756 2452 */
mbed_official 76:aeb1df146756 2453 void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode)
mbed_official 76:aeb1df146756 2454 {
mbed_official 76:aeb1df146756 2455 /* Check the parameters */
mbed_official 76:aeb1df146756 2456 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2457 assert_param(IS_TIM_SLAVE_MODE(TIM_SlaveMode));
mbed_official 76:aeb1df146756 2458
mbed_official 76:aeb1df146756 2459 /* Reset the SMS Bits */
mbed_official 76:aeb1df146756 2460 TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_SMS);
mbed_official 76:aeb1df146756 2461 /* Select the Slave Mode */
mbed_official 76:aeb1df146756 2462 TIMx->SMCR |= TIM_SlaveMode;
mbed_official 76:aeb1df146756 2463 }
mbed_official 76:aeb1df146756 2464
mbed_official 76:aeb1df146756 2465 /**
mbed_official 76:aeb1df146756 2466 * @brief Sets or Resets the TIMx Master/Slave Mode.
mbed_official 76:aeb1df146756 2467 * @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2468 * @param TIM_MasterSlaveMode: specifies the Timer Master Slave Mode.
mbed_official 76:aeb1df146756 2469 * This paramter can be one of the following values:
mbed_official 76:aeb1df146756 2470 * @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer
mbed_official 76:aeb1df146756 2471 * and its slaves (through TRGO).
mbed_official 76:aeb1df146756 2472 * @arg TIM_MasterSlaveMode_Disable: No action
mbed_official 76:aeb1df146756 2473 * @retval None
mbed_official 76:aeb1df146756 2474 */
mbed_official 76:aeb1df146756 2475 void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode)
mbed_official 76:aeb1df146756 2476 {
mbed_official 76:aeb1df146756 2477 /* Check the parameters */
mbed_official 76:aeb1df146756 2478 assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2479 assert_param(IS_TIM_MSM_STATE(TIM_MasterSlaveMode));
mbed_official 76:aeb1df146756 2480
mbed_official 76:aeb1df146756 2481 /* Reset the MSM Bit */
mbed_official 76:aeb1df146756 2482 TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_MSM);
mbed_official 76:aeb1df146756 2483
mbed_official 76:aeb1df146756 2484 /* Set or Reset the MSM Bit */
mbed_official 76:aeb1df146756 2485 TIMx->SMCR |= TIM_MasterSlaveMode;
mbed_official 76:aeb1df146756 2486 }
mbed_official 76:aeb1df146756 2487
mbed_official 76:aeb1df146756 2488 /**
mbed_official 76:aeb1df146756 2489 * @brief Configures the TIMx External Trigger (ETR).
mbed_official 76:aeb1df146756 2490 * @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2491 * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official 76:aeb1df146756 2492 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2493 * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official 76:aeb1df146756 2494 * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official 76:aeb1df146756 2495 * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official 76:aeb1df146756 2496 * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official 76:aeb1df146756 2497 * @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official 76:aeb1df146756 2498 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2499 * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official 76:aeb1df146756 2500 * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official 76:aeb1df146756 2501 * @param ExtTRGFilter: External Trigger Filter.
mbed_official 76:aeb1df146756 2502 * This parameter must be a value between 0x00 and 0x0F
mbed_official 76:aeb1df146756 2503 * @retval None
mbed_official 76:aeb1df146756 2504 */
mbed_official 76:aeb1df146756 2505 void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official 76:aeb1df146756 2506 uint16_t ExtTRGFilter)
mbed_official 76:aeb1df146756 2507 {
mbed_official 76:aeb1df146756 2508 uint16_t tmpsmcr = 0;
mbed_official 76:aeb1df146756 2509
mbed_official 76:aeb1df146756 2510 /* Check the parameters */
mbed_official 76:aeb1df146756 2511 assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2512 assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official 76:aeb1df146756 2513 assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official 76:aeb1df146756 2514 assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official 76:aeb1df146756 2515
mbed_official 76:aeb1df146756 2516 tmpsmcr = TIMx->SMCR;
mbed_official 76:aeb1df146756 2517 /* Reset the ETR Bits */
mbed_official 76:aeb1df146756 2518 tmpsmcr &= SMCR_ETR_MASK;
mbed_official 76:aeb1df146756 2519 /* Set the Prescaler, the Filter value and the Polarity */
mbed_official 76:aeb1df146756 2520 tmpsmcr |= (uint16_t)(TIM_ExtTRGPrescaler | (uint16_t)(TIM_ExtTRGPolarity | (uint16_t)(ExtTRGFilter << (uint16_t)8)));
mbed_official 76:aeb1df146756 2521 /* Write to TIMx SMCR */
mbed_official 76:aeb1df146756 2522 TIMx->SMCR = tmpsmcr;
mbed_official 76:aeb1df146756 2523 }
mbed_official 76:aeb1df146756 2524
mbed_official 76:aeb1df146756 2525 /**
mbed_official 76:aeb1df146756 2526 * @}
mbed_official 76:aeb1df146756 2527 */
mbed_official 76:aeb1df146756 2528
mbed_official 76:aeb1df146756 2529 /** @defgroup TIM_Group7 Specific interface management functions
mbed_official 76:aeb1df146756 2530 * @brief Specific interface management functions
mbed_official 76:aeb1df146756 2531 *
mbed_official 76:aeb1df146756 2532 @verbatim
mbed_official 76:aeb1df146756 2533 ===============================================================================
mbed_official 76:aeb1df146756 2534 ##### Specific interface management functions #####
mbed_official 76:aeb1df146756 2535 ===============================================================================
mbed_official 76:aeb1df146756 2536
mbed_official 76:aeb1df146756 2537 @endverbatim
mbed_official 76:aeb1df146756 2538 * @{
mbed_official 76:aeb1df146756 2539 */
mbed_official 76:aeb1df146756 2540
mbed_official 76:aeb1df146756 2541 /**
mbed_official 76:aeb1df146756 2542 * @brief Configures the TIMx Encoder Interface.
mbed_official 76:aeb1df146756 2543 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2544 * @param TIM_EncoderMode: specifies the TIMx Encoder Mode.
mbed_official 76:aeb1df146756 2545 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2546 * @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level.
mbed_official 76:aeb1df146756 2547 * @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level.
mbed_official 76:aeb1df146756 2548 * @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending
mbed_official 76:aeb1df146756 2549 * on the level of the other input.
mbed_official 76:aeb1df146756 2550 * @param TIM_IC1Polarity: specifies the IC1 Polarity.
mbed_official 76:aeb1df146756 2551 * This parmeter can be one of the following values:
mbed_official 76:aeb1df146756 2552 * @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official 76:aeb1df146756 2553 * @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official 76:aeb1df146756 2554 * @param TIM_IC2Polarity: specifies the IC2 Polarity
mbed_official 76:aeb1df146756 2555 * This parmeter can be one of the following values:
mbed_official 76:aeb1df146756 2556 * @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official 76:aeb1df146756 2557 * @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official 76:aeb1df146756 2558 * @retval None
mbed_official 76:aeb1df146756 2559 */
mbed_official 76:aeb1df146756 2560 void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
mbed_official 76:aeb1df146756 2561 uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity)
mbed_official 76:aeb1df146756 2562 {
mbed_official 76:aeb1df146756 2563 uint16_t tmpsmcr = 0;
mbed_official 76:aeb1df146756 2564 uint16_t tmpccmr1 = 0;
mbed_official 76:aeb1df146756 2565 uint16_t tmpccer = 0;
mbed_official 76:aeb1df146756 2566
mbed_official 76:aeb1df146756 2567 /* Check the parameters */
mbed_official 76:aeb1df146756 2568 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2569 assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode));
mbed_official 76:aeb1df146756 2570 assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity));
mbed_official 76:aeb1df146756 2571 assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity));
mbed_official 76:aeb1df146756 2572
mbed_official 76:aeb1df146756 2573 /* Get the TIMx SMCR register value */
mbed_official 76:aeb1df146756 2574 tmpsmcr = TIMx->SMCR;
mbed_official 76:aeb1df146756 2575 /* Get the TIMx CCMR1 register value */
mbed_official 76:aeb1df146756 2576 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 2577 /* Get the TIMx CCER register value */
mbed_official 76:aeb1df146756 2578 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 2579 /* Set the encoder Mode */
mbed_official 76:aeb1df146756 2580 tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official 76:aeb1df146756 2581 tmpsmcr |= TIM_EncoderMode;
mbed_official 76:aeb1df146756 2582 /* Select the Capture Compare 1 and the Capture Compare 2 as input */
mbed_official 76:aeb1df146756 2583 tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S)));
mbed_official 76:aeb1df146756 2584 tmpccmr1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0;
mbed_official 76:aeb1df146756 2585 /* Set the TI1 and the TI2 Polarities */
mbed_official 76:aeb1df146756 2586 tmpccer &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCER_CC1P)) & ((uint16_t)~((uint16_t)TIM_CCER_CC2P)));
mbed_official 76:aeb1df146756 2587 tmpccer |= (uint16_t)(TIM_IC1Polarity | (uint16_t)(TIM_IC2Polarity << (uint16_t)4));
mbed_official 76:aeb1df146756 2588 /* Write to TIMx SMCR */
mbed_official 76:aeb1df146756 2589 TIMx->SMCR = tmpsmcr;
mbed_official 76:aeb1df146756 2590 /* Write to TIMx CCMR1 */
mbed_official 76:aeb1df146756 2591 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 2592 /* Write to TIMx CCER */
mbed_official 76:aeb1df146756 2593 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 2594 }
mbed_official 76:aeb1df146756 2595
mbed_official 76:aeb1df146756 2596 /**
mbed_official 76:aeb1df146756 2597 * @brief Enables or disables the TIMx's Hall sensor interface.
mbed_official 76:aeb1df146756 2598 * @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2599 * @param NewState: new state of the TIMx Hall sensor interface.
mbed_official 76:aeb1df146756 2600 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 2601 * @retval None
mbed_official 76:aeb1df146756 2602 */
mbed_official 76:aeb1df146756 2603 void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official 76:aeb1df146756 2604 {
mbed_official 76:aeb1df146756 2605 /* Check the parameters */
mbed_official 76:aeb1df146756 2606 assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2607 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 2608
mbed_official 76:aeb1df146756 2609 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 2610 {
mbed_official 76:aeb1df146756 2611 /* Set the TI1S Bit */
mbed_official 76:aeb1df146756 2612 TIMx->CR2 |= TIM_CR2_TI1S;
mbed_official 76:aeb1df146756 2613 }
mbed_official 76:aeb1df146756 2614 else
mbed_official 76:aeb1df146756 2615 {
mbed_official 76:aeb1df146756 2616 /* Reset the TI1S Bit */
mbed_official 76:aeb1df146756 2617 TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_TI1S);
mbed_official 76:aeb1df146756 2618 }
mbed_official 76:aeb1df146756 2619 }
mbed_official 76:aeb1df146756 2620
mbed_official 76:aeb1df146756 2621 /**
mbed_official 76:aeb1df146756 2622 * @}
mbed_official 76:aeb1df146756 2623 */
mbed_official 76:aeb1df146756 2624
mbed_official 76:aeb1df146756 2625 /** @defgroup TIM_Group8 Specific remapping management function
mbed_official 76:aeb1df146756 2626 * @brief Specific remapping management function
mbed_official 76:aeb1df146756 2627 *
mbed_official 76:aeb1df146756 2628 @verbatim
mbed_official 76:aeb1df146756 2629 ===============================================================================
mbed_official 76:aeb1df146756 2630 ##### Specific remapping management function #####
mbed_official 76:aeb1df146756 2631 ===============================================================================
mbed_official 76:aeb1df146756 2632
mbed_official 76:aeb1df146756 2633 @endverbatim
mbed_official 76:aeb1df146756 2634 * @{
mbed_official 76:aeb1df146756 2635 */
mbed_official 76:aeb1df146756 2636
mbed_official 76:aeb1df146756 2637 /**
mbed_official 76:aeb1df146756 2638 * @brief Configures the TIM2, TIM3, TIM9, TIM10 and TIM11 Remapping input
mbed_official 76:aeb1df146756 2639 * Capabilities.
mbed_official 76:aeb1df146756 2640 * @param TIMx: where x can be 2, 3, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2641 * @param TIM_Remap: specifies the TIM input remapping source.
mbed_official 76:aeb1df146756 2642 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2643 * @arg TIM2_TIM10_OC: TIM2 ITR1 is connected to TIM10 output compare(default).
mbed_official 76:aeb1df146756 2644 * @arg TIM2_TIM5_TRGO: TIM2 ITR1 is connected to TIM5 Trigger output.
mbed_official 76:aeb1df146756 2645 * @arg TIM3_TIM11_OC: TIM3 ITR2 is connected to TIM11 output compare(default).
mbed_official 76:aeb1df146756 2646 * @arg TIM3_TIM5_TRGO: TIM3 ITR2 is connected to TIM5 Trigger output.
mbed_official 76:aeb1df146756 2647 * @arg TIM9_GPIO: TIM9 Channel 1 is connected to dedicated Timer pin(default).
mbed_official 76:aeb1df146756 2648 * @arg TIM9_LSE: TIM9 Channel 1 is connected to LSE clock.
mbed_official 76:aeb1df146756 2649 * @arg TIM9_TIM3_TRGO: TIM9 ITR1 is connected to TIM3 TRGO.
mbed_official 76:aeb1df146756 2650 * @arg TIM9_TS_IO: TIM9 ITR1 is connected to Touch Sense IO.
mbed_official 76:aeb1df146756 2651 * @arg TIM10_GPIO: TIM10 Channel 1 is connected to dedicated Timer pin(default).
mbed_official 76:aeb1df146756 2652 * @arg TIM10_LSI: TIM10 Channel 1 is connected to LSI clock.
mbed_official 76:aeb1df146756 2653 * @arg TIM10_LSE: TIM10 Channel 1 is connected to LSE clock.
mbed_official 76:aeb1df146756 2654 * @arg TIM10_RTC: TIM10 Channel 1 is connected to RTC Output event.
mbed_official 76:aeb1df146756 2655 * @arg TIM10_RI: TIM10 Channel 1 is connected to Routing Interface (RI).
mbed_official 76:aeb1df146756 2656 * @arg TIM10_ETR_LSE: TIM10 ETR input is connected to LSE Clock.
mbed_official 76:aeb1df146756 2657 * @arg TIM10_ETR_TIM9_TRGO: TIM10 ETR input is connected to TIM9 Trigger Output.
mbed_official 76:aeb1df146756 2658 * @arg TIM11_GPIO: TIM11 Channel 1 is connected to dedicated Timer pin(default).
mbed_official 76:aeb1df146756 2659 * @arg TIM11_MSI: TIM11 Channel 1 is connected to MSI clock.
mbed_official 76:aeb1df146756 2660 * @arg TIM11_HSE_RTC: TIM11 Channel 1 is connected to HSE_RTC clock.
mbed_official 76:aeb1df146756 2661 * @arg TIM11_RI: TIM11 Channel 1 is connected to Routing Interface (RI).
mbed_official 76:aeb1df146756 2662 * @arg TIM11_ETR_LSE: TIM11 ETR input is connected to LSE Clock.
mbed_official 76:aeb1df146756 2663 * @arg TIM11_ETR_TIM9_TRGO: TIM11 ETR input is connected to TIM9 Trigger Output.
mbed_official 76:aeb1df146756 2664 * @retval None
mbed_official 76:aeb1df146756 2665 */
mbed_official 76:aeb1df146756 2666 void TIM_RemapConfig(TIM_TypeDef* TIMx, uint32_t TIM_Remap)
mbed_official 76:aeb1df146756 2667 {
mbed_official 76:aeb1df146756 2668 /* Check the parameters */
mbed_official 76:aeb1df146756 2669 assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official 76:aeb1df146756 2670 assert_param(IS_TIM_REMAP(TIM_Remap));
mbed_official 76:aeb1df146756 2671
mbed_official 76:aeb1df146756 2672 /* Set the Timer remapping configuration */
mbed_official 76:aeb1df146756 2673 TIMx->OR &= (uint16_t)(TIM_Remap >> 16);
mbed_official 76:aeb1df146756 2674 TIMx->OR |= (uint16_t)TIM_Remap;
mbed_official 76:aeb1df146756 2675 }
mbed_official 76:aeb1df146756 2676
mbed_official 76:aeb1df146756 2677 /**
mbed_official 76:aeb1df146756 2678 * @}
mbed_official 76:aeb1df146756 2679 */
mbed_official 76:aeb1df146756 2680
mbed_official 76:aeb1df146756 2681 /**
mbed_official 76:aeb1df146756 2682 * @brief Configure the TI1 as Input.
mbed_official 76:aeb1df146756 2683 * @param TIMx: where x can be 2, 3, 4, 9, 10 or 11 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2684 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 76:aeb1df146756 2685 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2686 * @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official 76:aeb1df146756 2687 * @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official 76:aeb1df146756 2688 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 76:aeb1df146756 2689 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2690 * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
mbed_official 76:aeb1df146756 2691 * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
mbed_official 76:aeb1df146756 2692 * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
mbed_official 76:aeb1df146756 2693 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 76:aeb1df146756 2694 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 76:aeb1df146756 2695 * @retval None
mbed_official 76:aeb1df146756 2696 */
mbed_official 76:aeb1df146756 2697 static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official 76:aeb1df146756 2698 uint16_t TIM_ICFilter)
mbed_official 76:aeb1df146756 2699 {
mbed_official 76:aeb1df146756 2700 uint16_t tmpccmr1 = 0, tmpccer = 0;
mbed_official 76:aeb1df146756 2701
mbed_official 76:aeb1df146756 2702 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 76:aeb1df146756 2703 TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E);
mbed_official 76:aeb1df146756 2704 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 2705 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 2706 /* Select the Input and set the filter */
mbed_official 76:aeb1df146756 2707 tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC1F)));
mbed_official 76:aeb1df146756 2708 tmpccmr1 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4));
mbed_official 76:aeb1df146756 2709 /* Select the Polarity and set the CC1E Bit */
mbed_official 76:aeb1df146756 2710 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP));
mbed_official 76:aeb1df146756 2711 tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E);
mbed_official 76:aeb1df146756 2712 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 76:aeb1df146756 2713 TIMx->CCMR1 = tmpccmr1;
mbed_official 76:aeb1df146756 2714 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 2715 }
mbed_official 76:aeb1df146756 2716
mbed_official 76:aeb1df146756 2717 /**
mbed_official 76:aeb1df146756 2718 * @brief Configure the TI2 as Input.
mbed_official 76:aeb1df146756 2719 * @param TIMx: where x can be 2, 3, 4 or 9 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2720 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 76:aeb1df146756 2721 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2722 * @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official 76:aeb1df146756 2723 * @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official 76:aeb1df146756 2724 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 76:aeb1df146756 2725 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2726 * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
mbed_official 76:aeb1df146756 2727 * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
mbed_official 76:aeb1df146756 2728 * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
mbed_official 76:aeb1df146756 2729 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 76:aeb1df146756 2730 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 76:aeb1df146756 2731 * @retval None
mbed_official 76:aeb1df146756 2732 */
mbed_official 76:aeb1df146756 2733 static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official 76:aeb1df146756 2734 uint16_t TIM_ICFilter)
mbed_official 76:aeb1df146756 2735 {
mbed_official 76:aeb1df146756 2736 uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0;
mbed_official 76:aeb1df146756 2737
mbed_official 76:aeb1df146756 2738 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 76:aeb1df146756 2739 TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC2E);
mbed_official 76:aeb1df146756 2740 tmpccmr1 = TIMx->CCMR1;
mbed_official 76:aeb1df146756 2741 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 2742 tmp = (uint16_t)(TIM_ICPolarity << 4);
mbed_official 76:aeb1df146756 2743 /* Select the Input and set the filter */
mbed_official 76:aeb1df146756 2744 tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC2S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC2F)));
mbed_official 76:aeb1df146756 2745 tmpccmr1 |= (uint16_t)(TIM_ICFilter << 12);
mbed_official 76:aeb1df146756 2746 tmpccmr1 |= (uint16_t)(TIM_ICSelection << 8);
mbed_official 76:aeb1df146756 2747 /* Select the Polarity and set the CC2E Bit */
mbed_official 76:aeb1df146756 2748 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P | TIM_CCER_CC2NP));
mbed_official 76:aeb1df146756 2749 tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC2E);
mbed_official 76:aeb1df146756 2750 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 76:aeb1df146756 2751 TIMx->CCMR1 = tmpccmr1 ;
mbed_official 76:aeb1df146756 2752 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 2753 }
mbed_official 76:aeb1df146756 2754
mbed_official 76:aeb1df146756 2755 /**
mbed_official 76:aeb1df146756 2756 * @brief Configure the TI3 as Input.
mbed_official 76:aeb1df146756 2757 * @param TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2758 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 76:aeb1df146756 2759 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2760 * @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official 76:aeb1df146756 2761 * @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official 76:aeb1df146756 2762 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 76:aeb1df146756 2763 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2764 * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
mbed_official 76:aeb1df146756 2765 * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
mbed_official 76:aeb1df146756 2766 * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
mbed_official 76:aeb1df146756 2767 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 76:aeb1df146756 2768 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 76:aeb1df146756 2769 * @retval None
mbed_official 76:aeb1df146756 2770 */
mbed_official 76:aeb1df146756 2771 static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official 76:aeb1df146756 2772 uint16_t TIM_ICFilter)
mbed_official 76:aeb1df146756 2773 {
mbed_official 76:aeb1df146756 2774 uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
mbed_official 76:aeb1df146756 2775
mbed_official 76:aeb1df146756 2776 /* Disable the Channel 3: Reset the CC3E Bit */
mbed_official 76:aeb1df146756 2777 TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC3E);
mbed_official 76:aeb1df146756 2778 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 2779 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 2780 tmp = (uint16_t)(TIM_ICPolarity << 8);
mbed_official 76:aeb1df146756 2781 /* Select the Input and set the filter */
mbed_official 76:aeb1df146756 2782 tmpccmr2 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR2_CC3S)) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC3F)));
mbed_official 76:aeb1df146756 2783 tmpccmr2 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4));
mbed_official 76:aeb1df146756 2784 /* Select the Polarity and set the CC3E Bit */
mbed_official 76:aeb1df146756 2785 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P | TIM_CCER_CC3NP));
mbed_official 76:aeb1df146756 2786 tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC3E);
mbed_official 76:aeb1df146756 2787 /* Write to TIMx CCMR2 and CCER registers */
mbed_official 76:aeb1df146756 2788 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 2789 TIMx->CCER = tmpccer;
mbed_official 76:aeb1df146756 2790 }
mbed_official 76:aeb1df146756 2791
mbed_official 76:aeb1df146756 2792 /**
mbed_official 76:aeb1df146756 2793 * @brief Configure the TI4 as Input.
mbed_official 76:aeb1df146756 2794 * @param TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
mbed_official 76:aeb1df146756 2795 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 76:aeb1df146756 2796 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2797 * @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official 76:aeb1df146756 2798 * @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official 76:aeb1df146756 2799 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 76:aeb1df146756 2800 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 2801 * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
mbed_official 76:aeb1df146756 2802 * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
mbed_official 76:aeb1df146756 2803 * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
mbed_official 76:aeb1df146756 2804 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 76:aeb1df146756 2805 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 76:aeb1df146756 2806 * @retval None
mbed_official 76:aeb1df146756 2807 */
mbed_official 76:aeb1df146756 2808 static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official 76:aeb1df146756 2809 uint16_t TIM_ICFilter)
mbed_official 76:aeb1df146756 2810 {
mbed_official 76:aeb1df146756 2811 uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
mbed_official 76:aeb1df146756 2812
mbed_official 76:aeb1df146756 2813 /* Disable the Channel 4: Reset the CC4E Bit */
mbed_official 76:aeb1df146756 2814 TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC4E);
mbed_official 76:aeb1df146756 2815 tmpccmr2 = TIMx->CCMR2;
mbed_official 76:aeb1df146756 2816 tmpccer = TIMx->CCER;
mbed_official 76:aeb1df146756 2817 tmp = (uint16_t)(TIM_ICPolarity << 12);
mbed_official 76:aeb1df146756 2818 /* Select the Input and set the filter */
mbed_official 76:aeb1df146756 2819 tmpccmr2 &= (uint16_t)((uint16_t)(~(uint16_t)TIM_CCMR2_CC4S) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC4F)));
mbed_official 76:aeb1df146756 2820 tmpccmr2 |= (uint16_t)(TIM_ICSelection << 8);
mbed_official 76:aeb1df146756 2821 tmpccmr2 |= (uint16_t)(TIM_ICFilter << 12);
mbed_official 76:aeb1df146756 2822
mbed_official 76:aeb1df146756 2823 /* Select the Polarity and set the CC4E Bit */
mbed_official 76:aeb1df146756 2824 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC4P | TIM_CCER_CC4NP));
mbed_official 76:aeb1df146756 2825 tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC4E);
mbed_official 76:aeb1df146756 2826 /* Write to TIMx CCMR2 and CCER registers */
mbed_official 76:aeb1df146756 2827 TIMx->CCMR2 = tmpccmr2;
mbed_official 76:aeb1df146756 2828 TIMx->CCER = tmpccer ;
mbed_official 76:aeb1df146756 2829 }
mbed_official 76:aeb1df146756 2830
mbed_official 76:aeb1df146756 2831 /**
mbed_official 76:aeb1df146756 2832 * @}
mbed_official 76:aeb1df146756 2833 */
mbed_official 76:aeb1df146756 2834
mbed_official 76:aeb1df146756 2835 /**
mbed_official 76:aeb1df146756 2836 * @}
mbed_official 76:aeb1df146756 2837 */
mbed_official 76:aeb1df146756 2838
mbed_official 76:aeb1df146756 2839 /**
mbed_official 76:aeb1df146756 2840 * @}
mbed_official 76:aeb1df146756 2841 */
mbed_official 76:aeb1df146756 2842
mbed_official 76:aeb1df146756 2843 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/