mbed library sources
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_flash_ramfunc.c@76:aeb1df146756, 2014-01-27 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Jan 27 14:30:07 2014 +0000
- Revision:
- 76:aeb1df146756
- Child:
- 80:66393a7b209d
Synchronized with git revision a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd
Full URL: https://github.com/mbedmicro/mbed/commit/a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd/
Add NUCLEO_L152RE
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 76:aeb1df146756 | 1 | /** |
mbed_official | 76:aeb1df146756 | 2 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 3 | * @file stm32l1xx_flash_ramfunc.c |
mbed_official | 76:aeb1df146756 | 4 | * @author MCD Application Team |
mbed_official | 76:aeb1df146756 | 5 | * @version V1.2.0 |
mbed_official | 76:aeb1df146756 | 6 | * @date 22-February-2013 |
mbed_official | 76:aeb1df146756 | 7 | * @brief This file provides all the Flash firmware functions which should be |
mbed_official | 76:aeb1df146756 | 8 | * executed from the internal SRAM. This file should be placed in |
mbed_official | 76:aeb1df146756 | 9 | * internal SRAM. |
mbed_official | 76:aeb1df146756 | 10 | * Other FLASH memory functions that can be used from the FLASH are |
mbed_official | 76:aeb1df146756 | 11 | * defined in the "stm32l1xx_flash.c" file. |
mbed_official | 76:aeb1df146756 | 12 | @verbatim |
mbed_official | 76:aeb1df146756 | 13 | |
mbed_official | 76:aeb1df146756 | 14 | *** ARM Compiler *** |
mbed_official | 76:aeb1df146756 | 15 | -------------------- |
mbed_official | 76:aeb1df146756 | 16 | [..] RAM functions are defined using the toolchain options. |
mbed_official | 76:aeb1df146756 | 17 | Functions that are be executed in RAM should reside in a separate |
mbed_official | 76:aeb1df146756 | 18 | source module. Using the 'Options for File' dialog you can simply change |
mbed_official | 76:aeb1df146756 | 19 | the 'Code / Const' area of a module to a memory space in physical RAM. |
mbed_official | 76:aeb1df146756 | 20 | Available memory areas are declared in the 'Target' tab of the |
mbed_official | 76:aeb1df146756 | 21 | Options for Target' dialog. |
mbed_official | 76:aeb1df146756 | 22 | |
mbed_official | 76:aeb1df146756 | 23 | *** ICCARM Compiler *** |
mbed_official | 76:aeb1df146756 | 24 | ----------------------- |
mbed_official | 76:aeb1df146756 | 25 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". |
mbed_official | 76:aeb1df146756 | 26 | |
mbed_official | 76:aeb1df146756 | 27 | *** GNU Compiler *** |
mbed_official | 76:aeb1df146756 | 28 | -------------------- |
mbed_official | 76:aeb1df146756 | 29 | [..] RAM functions are defined using a specific toolchain attribute |
mbed_official | 76:aeb1df146756 | 30 | "__attribute__((section(".data")))". |
mbed_official | 76:aeb1df146756 | 31 | |
mbed_official | 76:aeb1df146756 | 32 | *** TASKING Compiler *** |
mbed_official | 76:aeb1df146756 | 33 | ------------------------ |
mbed_official | 76:aeb1df146756 | 34 | [..] RAM functions are defined using a specific toolchain pragma. This |
mbed_official | 76:aeb1df146756 | 35 | pragma is defined inside this file. |
mbed_official | 76:aeb1df146756 | 36 | |
mbed_official | 76:aeb1df146756 | 37 | @endverbatim |
mbed_official | 76:aeb1df146756 | 38 | * |
mbed_official | 76:aeb1df146756 | 39 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 40 | * @attention |
mbed_official | 76:aeb1df146756 | 41 | * |
mbed_official | 76:aeb1df146756 | 42 | * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> |
mbed_official | 76:aeb1df146756 | 43 | * |
mbed_official | 76:aeb1df146756 | 44 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
mbed_official | 76:aeb1df146756 | 45 | * You may not use this file except in compliance with the License. |
mbed_official | 76:aeb1df146756 | 46 | * You may obtain a copy of the License at: |
mbed_official | 76:aeb1df146756 | 47 | * |
mbed_official | 76:aeb1df146756 | 48 | * http://www.st.com/software_license_agreement_liberty_v2 |
mbed_official | 76:aeb1df146756 | 49 | * |
mbed_official | 76:aeb1df146756 | 50 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 76:aeb1df146756 | 51 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 76:aeb1df146756 | 52 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 76:aeb1df146756 | 53 | * See the License for the specific language governing permissions and |
mbed_official | 76:aeb1df146756 | 54 | * limitations under the License. |
mbed_official | 76:aeb1df146756 | 55 | * |
mbed_official | 76:aeb1df146756 | 56 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 57 | */ |
mbed_official | 76:aeb1df146756 | 58 | |
mbed_official | 76:aeb1df146756 | 59 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 60 | #include "stm32l1xx_flash.h" |
mbed_official | 76:aeb1df146756 | 61 | |
mbed_official | 76:aeb1df146756 | 62 | /** @addtogroup STM32L1xx_StdPeriph_Driver |
mbed_official | 76:aeb1df146756 | 63 | * @{ |
mbed_official | 76:aeb1df146756 | 64 | */ |
mbed_official | 76:aeb1df146756 | 65 | |
mbed_official | 76:aeb1df146756 | 66 | /** @defgroup FLASH |
mbed_official | 76:aeb1df146756 | 67 | * @brief FLASH driver modules |
mbed_official | 76:aeb1df146756 | 68 | * @{ |
mbed_official | 76:aeb1df146756 | 69 | */ |
mbed_official | 76:aeb1df146756 | 70 | |
mbed_official | 76:aeb1df146756 | 71 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 72 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 73 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 74 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 75 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 76 | static __RAM_FUNC GetStatus(void); |
mbed_official | 76:aeb1df146756 | 77 | static __RAM_FUNC WaitForLastOperation(uint32_t Timeout); |
mbed_official | 76:aeb1df146756 | 78 | |
mbed_official | 76:aeb1df146756 | 79 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 80 | |
mbed_official | 76:aeb1df146756 | 81 | /** @defgroup FLASH_Private_Functions |
mbed_official | 76:aeb1df146756 | 82 | * @{ |
mbed_official | 76:aeb1df146756 | 83 | */ |
mbed_official | 76:aeb1df146756 | 84 | |
mbed_official | 76:aeb1df146756 | 85 | /** @addtogroup FLASH_Group1 |
mbed_official | 76:aeb1df146756 | 86 | * |
mbed_official | 76:aeb1df146756 | 87 | @verbatim |
mbed_official | 76:aeb1df146756 | 88 | @endverbatim |
mbed_official | 76:aeb1df146756 | 89 | * @{ |
mbed_official | 76:aeb1df146756 | 90 | */ |
mbed_official | 76:aeb1df146756 | 91 | #if defined ( __TASKING__ ) |
mbed_official | 76:aeb1df146756 | 92 | #pragma section_code_init on |
mbed_official | 76:aeb1df146756 | 93 | #endif |
mbed_official | 76:aeb1df146756 | 94 | |
mbed_official | 76:aeb1df146756 | 95 | /** |
mbed_official | 76:aeb1df146756 | 96 | * @brief Enable or disable the power down mode during RUN mode. |
mbed_official | 76:aeb1df146756 | 97 | * @note This function can be used only when the user code is running from Internal SRAM. |
mbed_official | 76:aeb1df146756 | 98 | * @param NewState: new state of the power down mode during RUN mode. |
mbed_official | 76:aeb1df146756 | 99 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 100 | * @retval None |
mbed_official | 76:aeb1df146756 | 101 | */ |
mbed_official | 76:aeb1df146756 | 102 | __RAM_FUNC FLASH_RUNPowerDownCmd(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 103 | { |
mbed_official | 76:aeb1df146756 | 104 | FLASH_Status status = FLASH_COMPLETE; |
mbed_official | 76:aeb1df146756 | 105 | |
mbed_official | 76:aeb1df146756 | 106 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 107 | { |
mbed_official | 76:aeb1df146756 | 108 | /* Unlock the RUN_PD bit */ |
mbed_official | 76:aeb1df146756 | 109 | FLASH->PDKEYR = FLASH_PDKEY1; |
mbed_official | 76:aeb1df146756 | 110 | FLASH->PDKEYR = FLASH_PDKEY2; |
mbed_official | 76:aeb1df146756 | 111 | |
mbed_official | 76:aeb1df146756 | 112 | /* Set the RUN_PD bit in FLASH_ACR register to put Flash in power down mode */ |
mbed_official | 76:aeb1df146756 | 113 | FLASH->ACR |= (uint32_t)FLASH_ACR_RUN_PD; |
mbed_official | 76:aeb1df146756 | 114 | |
mbed_official | 76:aeb1df146756 | 115 | if((FLASH->ACR & FLASH_ACR_RUN_PD) != FLASH_ACR_RUN_PD) |
mbed_official | 76:aeb1df146756 | 116 | { |
mbed_official | 76:aeb1df146756 | 117 | status = FLASH_ERROR_PROGRAM; |
mbed_official | 76:aeb1df146756 | 118 | } |
mbed_official | 76:aeb1df146756 | 119 | } |
mbed_official | 76:aeb1df146756 | 120 | else |
mbed_official | 76:aeb1df146756 | 121 | { |
mbed_official | 76:aeb1df146756 | 122 | /* Clear the RUN_PD bit in FLASH_ACR register to put Flash in idle mode */ |
mbed_official | 76:aeb1df146756 | 123 | FLASH->ACR &= (uint32_t)(~(uint32_t)FLASH_ACR_RUN_PD); |
mbed_official | 76:aeb1df146756 | 124 | } |
mbed_official | 76:aeb1df146756 | 125 | |
mbed_official | 76:aeb1df146756 | 126 | /* Return the Write Status */ |
mbed_official | 76:aeb1df146756 | 127 | return status; |
mbed_official | 76:aeb1df146756 | 128 | } |
mbed_official | 76:aeb1df146756 | 129 | |
mbed_official | 76:aeb1df146756 | 130 | /** |
mbed_official | 76:aeb1df146756 | 131 | * @} |
mbed_official | 76:aeb1df146756 | 132 | */ |
mbed_official | 76:aeb1df146756 | 133 | |
mbed_official | 76:aeb1df146756 | 134 | /** @addtogroup FLASH_Group2 |
mbed_official | 76:aeb1df146756 | 135 | * |
mbed_official | 76:aeb1df146756 | 136 | @verbatim |
mbed_official | 76:aeb1df146756 | 137 | @endverbatim |
mbed_official | 76:aeb1df146756 | 138 | * @{ |
mbed_official | 76:aeb1df146756 | 139 | */ |
mbed_official | 76:aeb1df146756 | 140 | |
mbed_official | 76:aeb1df146756 | 141 | /** |
mbed_official | 76:aeb1df146756 | 142 | * @brief Erases a specified 2 page in program memory in parallel. |
mbed_official | 76:aeb1df146756 | 143 | * @note This function can be used only for STM32L1XX_HD density devices. |
mbed_official | 76:aeb1df146756 | 144 | * To correctly run this function, the FLASH_Unlock() function |
mbed_official | 76:aeb1df146756 | 145 | * must be called before. |
mbed_official | 76:aeb1df146756 | 146 | * Call the FLASH_Lock() to disable the flash memory access |
mbed_official | 76:aeb1df146756 | 147 | * (recommended to protect the FLASH memory against possible unwanted operation). |
mbed_official | 76:aeb1df146756 | 148 | * @param Page_Address1: The page address in program memory to be erased in |
mbed_official | 76:aeb1df146756 | 149 | * the first Bank (BANK1). This parameter should be between 0x08000000 |
mbed_official | 76:aeb1df146756 | 150 | * and 0x0802FF00. |
mbed_official | 76:aeb1df146756 | 151 | * @param Page_Address2: The page address in program memory to be erased in |
mbed_official | 76:aeb1df146756 | 152 | * the second Bank (BANK2). This parameter should be between 0x08030000 |
mbed_official | 76:aeb1df146756 | 153 | * and 0x0805FF00. |
mbed_official | 76:aeb1df146756 | 154 | * @note A Page is erased in the Program memory only if the address to load |
mbed_official | 76:aeb1df146756 | 155 | * is the start address of a page (multiple of 256 bytes). |
mbed_official | 76:aeb1df146756 | 156 | * @retval FLASH Status: The returned value can be: |
mbed_official | 76:aeb1df146756 | 157 | * FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. |
mbed_official | 76:aeb1df146756 | 158 | */ |
mbed_official | 76:aeb1df146756 | 159 | FLASH_Status FLASH_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2) |
mbed_official | 76:aeb1df146756 | 160 | { |
mbed_official | 76:aeb1df146756 | 161 | FLASH_Status status = FLASH_COMPLETE; |
mbed_official | 76:aeb1df146756 | 162 | |
mbed_official | 76:aeb1df146756 | 163 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 164 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 165 | |
mbed_official | 76:aeb1df146756 | 166 | if(status == FLASH_COMPLETE) |
mbed_official | 76:aeb1df146756 | 167 | { |
mbed_official | 76:aeb1df146756 | 168 | /* If the previous operation is completed, proceed to erase the page */ |
mbed_official | 76:aeb1df146756 | 169 | |
mbed_official | 76:aeb1df146756 | 170 | /* Set the PARALLBANK bit */ |
mbed_official | 76:aeb1df146756 | 171 | FLASH->PECR |= FLASH_PECR_PARALLBANK; |
mbed_official | 76:aeb1df146756 | 172 | |
mbed_official | 76:aeb1df146756 | 173 | /* Set the ERASE bit */ |
mbed_official | 76:aeb1df146756 | 174 | FLASH->PECR |= FLASH_PECR_ERASE; |
mbed_official | 76:aeb1df146756 | 175 | |
mbed_official | 76:aeb1df146756 | 176 | /* Set PROG bit */ |
mbed_official | 76:aeb1df146756 | 177 | FLASH->PECR |= FLASH_PECR_PROG; |
mbed_official | 76:aeb1df146756 | 178 | |
mbed_official | 76:aeb1df146756 | 179 | /* Write 00000000h to the first word of the first program page to erase */ |
mbed_official | 76:aeb1df146756 | 180 | *(__IO uint32_t *)Page_Address1 = 0x00000000; |
mbed_official | 76:aeb1df146756 | 181 | /* Write 00000000h to the first word of the second program page to erase */ |
mbed_official | 76:aeb1df146756 | 182 | *(__IO uint32_t *)Page_Address2 = 0x00000000; |
mbed_official | 76:aeb1df146756 | 183 | |
mbed_official | 76:aeb1df146756 | 184 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 185 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 186 | |
mbed_official | 76:aeb1df146756 | 187 | /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */ |
mbed_official | 76:aeb1df146756 | 188 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_PROG); |
mbed_official | 76:aeb1df146756 | 189 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_ERASE); |
mbed_official | 76:aeb1df146756 | 190 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_PARALLBANK); |
mbed_official | 76:aeb1df146756 | 191 | } |
mbed_official | 76:aeb1df146756 | 192 | /* Return the Erase Status */ |
mbed_official | 76:aeb1df146756 | 193 | return status; |
mbed_official | 76:aeb1df146756 | 194 | } |
mbed_official | 76:aeb1df146756 | 195 | |
mbed_official | 76:aeb1df146756 | 196 | /** |
mbed_official | 76:aeb1df146756 | 197 | * @brief Programs a half page in program memory. |
mbed_official | 76:aeb1df146756 | 198 | * @param Address: specifies the address to be written. |
mbed_official | 76:aeb1df146756 | 199 | * @param pBuffer: pointer to the buffer containing the data to be written to |
mbed_official | 76:aeb1df146756 | 200 | * the half page. |
mbed_official | 76:aeb1df146756 | 201 | * @note To correctly run this function, the FLASH_Unlock() function |
mbed_official | 76:aeb1df146756 | 202 | * must be called before. |
mbed_official | 76:aeb1df146756 | 203 | * Call the FLASH_Lock() to disable the flash memory access |
mbed_official | 76:aeb1df146756 | 204 | * (recommended to protect the FLASH memory against possible unwanted operation) |
mbed_official | 76:aeb1df146756 | 205 | * @note Half page write is possible only from SRAM. |
mbed_official | 76:aeb1df146756 | 206 | * @note If there are more than 32 words to write, after 32 words another |
mbed_official | 76:aeb1df146756 | 207 | * Half Page programming operation starts and has to be finished. |
mbed_official | 76:aeb1df146756 | 208 | * @note A half page is written to the program memory only if the first |
mbed_official | 76:aeb1df146756 | 209 | * address to load is the start address of a half page (multiple of 128 |
mbed_official | 76:aeb1df146756 | 210 | * bytes) and the 31 remaining words to load are in the same half page. |
mbed_official | 76:aeb1df146756 | 211 | * @note During the Program memory half page write all read operations are |
mbed_official | 76:aeb1df146756 | 212 | * forbidden (this includes DMA read operations and debugger read |
mbed_official | 76:aeb1df146756 | 213 | * operations such as breakpoints, periodic updates, etc.). |
mbed_official | 76:aeb1df146756 | 214 | * @note If a PGAERR is set during a Program memory half page write, the |
mbed_official | 76:aeb1df146756 | 215 | * complete write operation is aborted. Software should then reset the |
mbed_official | 76:aeb1df146756 | 216 | * FPRG and PROG/DATA bits and restart the write operation from the |
mbed_official | 76:aeb1df146756 | 217 | * beginning. |
mbed_official | 76:aeb1df146756 | 218 | * @retval FLASH Status: The returned value can be: |
mbed_official | 76:aeb1df146756 | 219 | * FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. |
mbed_official | 76:aeb1df146756 | 220 | */ |
mbed_official | 76:aeb1df146756 | 221 | __RAM_FUNC FLASH_ProgramHalfPage(uint32_t Address, uint32_t* pBuffer) |
mbed_official | 76:aeb1df146756 | 222 | { |
mbed_official | 76:aeb1df146756 | 223 | uint32_t count = 0; |
mbed_official | 76:aeb1df146756 | 224 | |
mbed_official | 76:aeb1df146756 | 225 | FLASH_Status status = FLASH_COMPLETE; |
mbed_official | 76:aeb1df146756 | 226 | |
mbed_official | 76:aeb1df146756 | 227 | /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008) |
mbed_official | 76:aeb1df146756 | 228 | This bit prevents the interruption of multicycle instructions and therefore |
mbed_official | 76:aeb1df146756 | 229 | will increase the interrupt latency. of Cortex-M3. */ |
mbed_official | 76:aeb1df146756 | 230 | SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk; |
mbed_official | 76:aeb1df146756 | 231 | |
mbed_official | 76:aeb1df146756 | 232 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 233 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 234 | |
mbed_official | 76:aeb1df146756 | 235 | if(status == FLASH_COMPLETE) |
mbed_official | 76:aeb1df146756 | 236 | { |
mbed_official | 76:aeb1df146756 | 237 | /* if the previous operation is completed, proceed to program the new |
mbed_official | 76:aeb1df146756 | 238 | half page */ |
mbed_official | 76:aeb1df146756 | 239 | FLASH->PECR |= FLASH_PECR_FPRG; |
mbed_official | 76:aeb1df146756 | 240 | FLASH->PECR |= FLASH_PECR_PROG; |
mbed_official | 76:aeb1df146756 | 241 | |
mbed_official | 76:aeb1df146756 | 242 | /* Write one half page directly with 32 different words */ |
mbed_official | 76:aeb1df146756 | 243 | while(count < 32) |
mbed_official | 76:aeb1df146756 | 244 | { |
mbed_official | 76:aeb1df146756 | 245 | *(__IO uint32_t*) (Address + (4 * count)) = *(pBuffer++); |
mbed_official | 76:aeb1df146756 | 246 | count ++; |
mbed_official | 76:aeb1df146756 | 247 | } |
mbed_official | 76:aeb1df146756 | 248 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 249 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 250 | |
mbed_official | 76:aeb1df146756 | 251 | /* if the write operation is completed, disable the PROG and FPRG bits */ |
mbed_official | 76:aeb1df146756 | 252 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_PROG); |
mbed_official | 76:aeb1df146756 | 253 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_FPRG); |
mbed_official | 76:aeb1df146756 | 254 | } |
mbed_official | 76:aeb1df146756 | 255 | |
mbed_official | 76:aeb1df146756 | 256 | SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk; |
mbed_official | 76:aeb1df146756 | 257 | |
mbed_official | 76:aeb1df146756 | 258 | /* Return the Write Status */ |
mbed_official | 76:aeb1df146756 | 259 | return status; |
mbed_official | 76:aeb1df146756 | 260 | } |
mbed_official | 76:aeb1df146756 | 261 | |
mbed_official | 76:aeb1df146756 | 262 | /** |
mbed_official | 76:aeb1df146756 | 263 | * @brief Programs 2 half page in program memory in parallel. |
mbed_official | 76:aeb1df146756 | 264 | * @param Address1: specifies the first address to be written in the first bank |
mbed_official | 76:aeb1df146756 | 265 | * (BANK1). This parameter should be between 0x08000000 and 0x0802FF80. |
mbed_official | 76:aeb1df146756 | 266 | * @param pBuffer1: pointer to the buffer containing the data to be written |
mbed_official | 76:aeb1df146756 | 267 | * to the first half page in the first bank. |
mbed_official | 76:aeb1df146756 | 268 | * @param Address2: specifies the second address to be written in the second bank |
mbed_official | 76:aeb1df146756 | 269 | * (BANK2). This parameter should be between 0x08030000 and 0x0805FF80. |
mbed_official | 76:aeb1df146756 | 270 | * @param pBuffer2: pointer to the buffer containing the data to be written |
mbed_official | 76:aeb1df146756 | 271 | * to the second half page in the second bank. |
mbed_official | 76:aeb1df146756 | 272 | * @note This function can be used only for STM32L1XX_HD density devices. |
mbed_official | 76:aeb1df146756 | 273 | * @note To correctly run this function, the FLASH_Unlock() function |
mbed_official | 76:aeb1df146756 | 274 | * must be called before. |
mbed_official | 76:aeb1df146756 | 275 | * Call the FLASH_Lock() to disable the flash memory access |
mbed_official | 76:aeb1df146756 | 276 | * (recommended to protect the FLASH memory against possible unwanted operation). |
mbed_official | 76:aeb1df146756 | 277 | * @note Half page write is possible only from SRAM. |
mbed_official | 76:aeb1df146756 | 278 | * @note If there are more than 32 words to write, after 32 words another |
mbed_official | 76:aeb1df146756 | 279 | * Half Page programming operation starts and has to be finished. |
mbed_official | 76:aeb1df146756 | 280 | * @note A half page is written to the program memory only if the first |
mbed_official | 76:aeb1df146756 | 281 | * address to load is the start address of a half page (multiple of 128 |
mbed_official | 76:aeb1df146756 | 282 | * bytes) and the 31 remaining words to load are in the same half page. |
mbed_official | 76:aeb1df146756 | 283 | * @note During the Program memory half page write all read operations are |
mbed_official | 76:aeb1df146756 | 284 | * forbidden (this includes DMA read operations and debugger read |
mbed_official | 76:aeb1df146756 | 285 | * operations such as breakpoints, periodic updates, etc.). |
mbed_official | 76:aeb1df146756 | 286 | * @note If a PGAERR is set during a Program memory half page write, the |
mbed_official | 76:aeb1df146756 | 287 | * complete write operation is aborted. Software should then reset the |
mbed_official | 76:aeb1df146756 | 288 | * FPRG and PROG/DATA bits and restart the write operation from the |
mbed_official | 76:aeb1df146756 | 289 | * beginning. |
mbed_official | 76:aeb1df146756 | 290 | * @retval FLASH Status: The returned value can be: |
mbed_official | 76:aeb1df146756 | 291 | * FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. |
mbed_official | 76:aeb1df146756 | 292 | */ |
mbed_official | 76:aeb1df146756 | 293 | __RAM_FUNC FLASH_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2) |
mbed_official | 76:aeb1df146756 | 294 | { |
mbed_official | 76:aeb1df146756 | 295 | uint32_t count = 0; |
mbed_official | 76:aeb1df146756 | 296 | |
mbed_official | 76:aeb1df146756 | 297 | FLASH_Status status = FLASH_COMPLETE; |
mbed_official | 76:aeb1df146756 | 298 | |
mbed_official | 76:aeb1df146756 | 299 | /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008) |
mbed_official | 76:aeb1df146756 | 300 | This bit prevents the interruption of multicycle instructions and therefore |
mbed_official | 76:aeb1df146756 | 301 | will increase the interrupt latency. of Cortex-M3. */ |
mbed_official | 76:aeb1df146756 | 302 | SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk; |
mbed_official | 76:aeb1df146756 | 303 | |
mbed_official | 76:aeb1df146756 | 304 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 305 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 306 | |
mbed_official | 76:aeb1df146756 | 307 | if(status == FLASH_COMPLETE) |
mbed_official | 76:aeb1df146756 | 308 | { |
mbed_official | 76:aeb1df146756 | 309 | /* If the previous operation is completed, proceed to program the new |
mbed_official | 76:aeb1df146756 | 310 | half page */ |
mbed_official | 76:aeb1df146756 | 311 | FLASH->PECR |= FLASH_PECR_PARALLBANK; |
mbed_official | 76:aeb1df146756 | 312 | FLASH->PECR |= FLASH_PECR_FPRG; |
mbed_official | 76:aeb1df146756 | 313 | FLASH->PECR |= FLASH_PECR_PROG; |
mbed_official | 76:aeb1df146756 | 314 | |
mbed_official | 76:aeb1df146756 | 315 | /* Write the first half page directly with 32 different words */ |
mbed_official | 76:aeb1df146756 | 316 | while(count < 32) |
mbed_official | 76:aeb1df146756 | 317 | { |
mbed_official | 76:aeb1df146756 | 318 | *(__IO uint32_t*) (Address1 + (4 * count)) = *(pBuffer1++); |
mbed_official | 76:aeb1df146756 | 319 | count ++; |
mbed_official | 76:aeb1df146756 | 320 | } |
mbed_official | 76:aeb1df146756 | 321 | count = 0; |
mbed_official | 76:aeb1df146756 | 322 | /* Write the second half page directly with 32 different words */ |
mbed_official | 76:aeb1df146756 | 323 | while(count < 32) |
mbed_official | 76:aeb1df146756 | 324 | { |
mbed_official | 76:aeb1df146756 | 325 | *(__IO uint32_t*) (Address2 + (4 * count)) = *(pBuffer2++); |
mbed_official | 76:aeb1df146756 | 326 | count ++; |
mbed_official | 76:aeb1df146756 | 327 | } |
mbed_official | 76:aeb1df146756 | 328 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 329 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 330 | |
mbed_official | 76:aeb1df146756 | 331 | /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */ |
mbed_official | 76:aeb1df146756 | 332 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_PROG); |
mbed_official | 76:aeb1df146756 | 333 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_FPRG); |
mbed_official | 76:aeb1df146756 | 334 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_PARALLBANK); |
mbed_official | 76:aeb1df146756 | 335 | } |
mbed_official | 76:aeb1df146756 | 336 | |
mbed_official | 76:aeb1df146756 | 337 | SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk; |
mbed_official | 76:aeb1df146756 | 338 | |
mbed_official | 76:aeb1df146756 | 339 | /* Return the Write Status */ |
mbed_official | 76:aeb1df146756 | 340 | return status; |
mbed_official | 76:aeb1df146756 | 341 | } |
mbed_official | 76:aeb1df146756 | 342 | |
mbed_official | 76:aeb1df146756 | 343 | /** |
mbed_official | 76:aeb1df146756 | 344 | * @} |
mbed_official | 76:aeb1df146756 | 345 | */ |
mbed_official | 76:aeb1df146756 | 346 | |
mbed_official | 76:aeb1df146756 | 347 | /** @addtogroup FLASH_Group3 |
mbed_official | 76:aeb1df146756 | 348 | * |
mbed_official | 76:aeb1df146756 | 349 | @verbatim |
mbed_official | 76:aeb1df146756 | 350 | @endverbatim |
mbed_official | 76:aeb1df146756 | 351 | * @{ |
mbed_official | 76:aeb1df146756 | 352 | */ |
mbed_official | 76:aeb1df146756 | 353 | |
mbed_official | 76:aeb1df146756 | 354 | /** |
mbed_official | 76:aeb1df146756 | 355 | * @brief Erase a double word in data memory. |
mbed_official | 76:aeb1df146756 | 356 | * @param Address: specifies the address to be erased. |
mbed_official | 76:aeb1df146756 | 357 | * @note To correctly run this function, the DATA_EEPROM_Unlock() function |
mbed_official | 76:aeb1df146756 | 358 | * must be called before. |
mbed_official | 76:aeb1df146756 | 359 | * Call the DATA_EEPROM_Lock() to he data EEPROM access |
mbed_official | 76:aeb1df146756 | 360 | * and Flash program erase control register access(recommended to protect |
mbed_official | 76:aeb1df146756 | 361 | * the DATA_EEPROM against possible unwanted operation). |
mbed_official | 76:aeb1df146756 | 362 | * @note Data memory double word erase is possible only from SRAM. |
mbed_official | 76:aeb1df146756 | 363 | * @note A double word is erased to the data memory only if the first address |
mbed_official | 76:aeb1df146756 | 364 | * to load is the start address of a double word (multiple of 8 bytes). |
mbed_official | 76:aeb1df146756 | 365 | * @note During the Data memory double word erase, all read operations are |
mbed_official | 76:aeb1df146756 | 366 | * forbidden (this includes DMA read operations and debugger read |
mbed_official | 76:aeb1df146756 | 367 | * operations such as breakpoints, periodic updates, etc.). |
mbed_official | 76:aeb1df146756 | 368 | * @retval FLASH Status: The returned value can be: |
mbed_official | 76:aeb1df146756 | 369 | * FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. |
mbed_official | 76:aeb1df146756 | 370 | */ |
mbed_official | 76:aeb1df146756 | 371 | |
mbed_official | 76:aeb1df146756 | 372 | __RAM_FUNC DATA_EEPROM_EraseDoubleWord(uint32_t Address) |
mbed_official | 76:aeb1df146756 | 373 | { |
mbed_official | 76:aeb1df146756 | 374 | FLASH_Status status = FLASH_COMPLETE; |
mbed_official | 76:aeb1df146756 | 375 | |
mbed_official | 76:aeb1df146756 | 376 | /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008) |
mbed_official | 76:aeb1df146756 | 377 | This bit prevents the interruption of multicycle instructions and therefore |
mbed_official | 76:aeb1df146756 | 378 | will increase the interrupt latency. of Cortex-M3. */ |
mbed_official | 76:aeb1df146756 | 379 | SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk; |
mbed_official | 76:aeb1df146756 | 380 | |
mbed_official | 76:aeb1df146756 | 381 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 382 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 383 | |
mbed_official | 76:aeb1df146756 | 384 | if(status == FLASH_COMPLETE) |
mbed_official | 76:aeb1df146756 | 385 | { |
mbed_official | 76:aeb1df146756 | 386 | /* If the previous operation is completed, proceed to erase the next double word */ |
mbed_official | 76:aeb1df146756 | 387 | /* Set the ERASE bit */ |
mbed_official | 76:aeb1df146756 | 388 | FLASH->PECR |= FLASH_PECR_ERASE; |
mbed_official | 76:aeb1df146756 | 389 | |
mbed_official | 76:aeb1df146756 | 390 | /* Set DATA bit */ |
mbed_official | 76:aeb1df146756 | 391 | FLASH->PECR |= FLASH_PECR_DATA; |
mbed_official | 76:aeb1df146756 | 392 | |
mbed_official | 76:aeb1df146756 | 393 | /* Write 00000000h to the 2 words to erase */ |
mbed_official | 76:aeb1df146756 | 394 | *(__IO uint32_t *)Address = 0x00000000; |
mbed_official | 76:aeb1df146756 | 395 | Address += 4; |
mbed_official | 76:aeb1df146756 | 396 | *(__IO uint32_t *)Address = 0x00000000; |
mbed_official | 76:aeb1df146756 | 397 | |
mbed_official | 76:aeb1df146756 | 398 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 399 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 400 | |
mbed_official | 76:aeb1df146756 | 401 | /* If the erase operation is completed, disable the ERASE and DATA bits */ |
mbed_official | 76:aeb1df146756 | 402 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_ERASE); |
mbed_official | 76:aeb1df146756 | 403 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_DATA); |
mbed_official | 76:aeb1df146756 | 404 | } |
mbed_official | 76:aeb1df146756 | 405 | |
mbed_official | 76:aeb1df146756 | 406 | SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk; |
mbed_official | 76:aeb1df146756 | 407 | |
mbed_official | 76:aeb1df146756 | 408 | /* Return the erase status */ |
mbed_official | 76:aeb1df146756 | 409 | return status; |
mbed_official | 76:aeb1df146756 | 410 | } |
mbed_official | 76:aeb1df146756 | 411 | |
mbed_official | 76:aeb1df146756 | 412 | /** |
mbed_official | 76:aeb1df146756 | 413 | * @brief Write a double word in data memory without erase. |
mbed_official | 76:aeb1df146756 | 414 | * @param Address: specifies the address to be written. |
mbed_official | 76:aeb1df146756 | 415 | * @param Data: specifies the data to be written. |
mbed_official | 76:aeb1df146756 | 416 | * @note To correctly run this function, the DATA_EEPROM_Unlock() function |
mbed_official | 76:aeb1df146756 | 417 | * must be called before. |
mbed_official | 76:aeb1df146756 | 418 | * Call the DATA_EEPROM_Lock() to he data EEPROM access |
mbed_official | 76:aeb1df146756 | 419 | * and Flash program erase control register access(recommended to protect |
mbed_official | 76:aeb1df146756 | 420 | * the DATA_EEPROM against possible unwanted operation). |
mbed_official | 76:aeb1df146756 | 421 | * @note Data memory double word write is possible only from SRAM. |
mbed_official | 76:aeb1df146756 | 422 | * @note A data memory double word is written to the data memory only if the |
mbed_official | 76:aeb1df146756 | 423 | * first address to load is the start address of a double word (multiple |
mbed_official | 76:aeb1df146756 | 424 | * of double word). |
mbed_official | 76:aeb1df146756 | 425 | * @note During the Data memory double word write, all read operations are |
mbed_official | 76:aeb1df146756 | 426 | * forbidden (this includes DMA read operations and debugger read |
mbed_official | 76:aeb1df146756 | 427 | * operations such as breakpoints, periodic updates, etc.). |
mbed_official | 76:aeb1df146756 | 428 | * @retval FLASH Status: The returned value can be: |
mbed_official | 76:aeb1df146756 | 429 | * FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. |
mbed_official | 76:aeb1df146756 | 430 | */ |
mbed_official | 76:aeb1df146756 | 431 | __RAM_FUNC DATA_EEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data) |
mbed_official | 76:aeb1df146756 | 432 | { |
mbed_official | 76:aeb1df146756 | 433 | FLASH_Status status = FLASH_COMPLETE; |
mbed_official | 76:aeb1df146756 | 434 | |
mbed_official | 76:aeb1df146756 | 435 | /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008) |
mbed_official | 76:aeb1df146756 | 436 | This bit prevents the interruption of multicycle instructions and therefore |
mbed_official | 76:aeb1df146756 | 437 | will increase the interrupt latency. of Cortex-M3. */ |
mbed_official | 76:aeb1df146756 | 438 | SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk; |
mbed_official | 76:aeb1df146756 | 439 | |
mbed_official | 76:aeb1df146756 | 440 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 441 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 442 | |
mbed_official | 76:aeb1df146756 | 443 | if(status == FLASH_COMPLETE) |
mbed_official | 76:aeb1df146756 | 444 | { |
mbed_official | 76:aeb1df146756 | 445 | /* If the previous operation is completed, proceed to program the new data*/ |
mbed_official | 76:aeb1df146756 | 446 | FLASH->PECR |= FLASH_PECR_FPRG; |
mbed_official | 76:aeb1df146756 | 447 | FLASH->PECR |= FLASH_PECR_DATA; |
mbed_official | 76:aeb1df146756 | 448 | |
mbed_official | 76:aeb1df146756 | 449 | /* Write the 2 words */ |
mbed_official | 76:aeb1df146756 | 450 | *(__IO uint32_t *)Address = (uint32_t) Data; |
mbed_official | 76:aeb1df146756 | 451 | Address += 4; |
mbed_official | 76:aeb1df146756 | 452 | *(__IO uint32_t *)Address = (uint32_t) (Data >> 32); |
mbed_official | 76:aeb1df146756 | 453 | |
mbed_official | 76:aeb1df146756 | 454 | /* Wait for last operation to be completed */ |
mbed_official | 76:aeb1df146756 | 455 | status = WaitForLastOperation(FLASH_ER_PRG_TIMEOUT); |
mbed_official | 76:aeb1df146756 | 456 | |
mbed_official | 76:aeb1df146756 | 457 | /* If the write operation is completed, disable the FPRG and DATA bits */ |
mbed_official | 76:aeb1df146756 | 458 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_FPRG); |
mbed_official | 76:aeb1df146756 | 459 | FLASH->PECR &= (uint32_t)(~FLASH_PECR_DATA); |
mbed_official | 76:aeb1df146756 | 460 | } |
mbed_official | 76:aeb1df146756 | 461 | |
mbed_official | 76:aeb1df146756 | 462 | SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk; |
mbed_official | 76:aeb1df146756 | 463 | |
mbed_official | 76:aeb1df146756 | 464 | /* Return the Write Status */ |
mbed_official | 76:aeb1df146756 | 465 | return status; |
mbed_official | 76:aeb1df146756 | 466 | } |
mbed_official | 76:aeb1df146756 | 467 | |
mbed_official | 76:aeb1df146756 | 468 | /** |
mbed_official | 76:aeb1df146756 | 469 | * @} |
mbed_official | 76:aeb1df146756 | 470 | */ |
mbed_official | 76:aeb1df146756 | 471 | |
mbed_official | 76:aeb1df146756 | 472 | /** |
mbed_official | 76:aeb1df146756 | 473 | * @brief Returns the FLASH Status. |
mbed_official | 76:aeb1df146756 | 474 | * @param None |
mbed_official | 76:aeb1df146756 | 475 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, |
mbed_official | 76:aeb1df146756 | 476 | * FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP or FLASH_COMPLETE |
mbed_official | 76:aeb1df146756 | 477 | */ |
mbed_official | 76:aeb1df146756 | 478 | static __RAM_FUNC GetStatus(void) |
mbed_official | 76:aeb1df146756 | 479 | { |
mbed_official | 76:aeb1df146756 | 480 | FLASH_Status FLASHstatus = FLASH_COMPLETE; |
mbed_official | 76:aeb1df146756 | 481 | |
mbed_official | 76:aeb1df146756 | 482 | if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY) |
mbed_official | 76:aeb1df146756 | 483 | { |
mbed_official | 76:aeb1df146756 | 484 | FLASHstatus = FLASH_BUSY; |
mbed_official | 76:aeb1df146756 | 485 | } |
mbed_official | 76:aeb1df146756 | 486 | else |
mbed_official | 76:aeb1df146756 | 487 | { |
mbed_official | 76:aeb1df146756 | 488 | if((FLASH->SR & (uint32_t)FLASH_FLAG_WRPERR)!= (uint32_t)0x00) |
mbed_official | 76:aeb1df146756 | 489 | { |
mbed_official | 76:aeb1df146756 | 490 | FLASHstatus = FLASH_ERROR_WRP; |
mbed_official | 76:aeb1df146756 | 491 | } |
mbed_official | 76:aeb1df146756 | 492 | else |
mbed_official | 76:aeb1df146756 | 493 | { |
mbed_official | 76:aeb1df146756 | 494 | if((FLASH->SR & (uint32_t)0x1E00) != (uint32_t)0x00) |
mbed_official | 76:aeb1df146756 | 495 | { |
mbed_official | 76:aeb1df146756 | 496 | FLASHstatus = FLASH_ERROR_PROGRAM; |
mbed_official | 76:aeb1df146756 | 497 | } |
mbed_official | 76:aeb1df146756 | 498 | else |
mbed_official | 76:aeb1df146756 | 499 | { |
mbed_official | 76:aeb1df146756 | 500 | FLASHstatus = FLASH_COMPLETE; |
mbed_official | 76:aeb1df146756 | 501 | } |
mbed_official | 76:aeb1df146756 | 502 | } |
mbed_official | 76:aeb1df146756 | 503 | } |
mbed_official | 76:aeb1df146756 | 504 | /* Return the FLASH Status */ |
mbed_official | 76:aeb1df146756 | 505 | return FLASHstatus; |
mbed_official | 76:aeb1df146756 | 506 | } |
mbed_official | 76:aeb1df146756 | 507 | |
mbed_official | 76:aeb1df146756 | 508 | /** |
mbed_official | 76:aeb1df146756 | 509 | * @brief Waits for a FLASH operation to complete or a TIMEOUT to occur. |
mbed_official | 76:aeb1df146756 | 510 | * @param Timeout: FLASH programming Timeout |
mbed_official | 76:aeb1df146756 | 511 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, |
mbed_official | 76:aeb1df146756 | 512 | * FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP, FLASH_COMPLETE or |
mbed_official | 76:aeb1df146756 | 513 | * FLASH_TIMEOUT. |
mbed_official | 76:aeb1df146756 | 514 | */ |
mbed_official | 76:aeb1df146756 | 515 | static __RAM_FUNC WaitForLastOperation(uint32_t Timeout) |
mbed_official | 76:aeb1df146756 | 516 | { |
mbed_official | 76:aeb1df146756 | 517 | __IO FLASH_Status status = FLASH_COMPLETE; |
mbed_official | 76:aeb1df146756 | 518 | |
mbed_official | 76:aeb1df146756 | 519 | /* Check for the FLASH Status */ |
mbed_official | 76:aeb1df146756 | 520 | status = GetStatus(); |
mbed_official | 76:aeb1df146756 | 521 | |
mbed_official | 76:aeb1df146756 | 522 | /* Wait for a FLASH operation to complete or a TIMEOUT to occur */ |
mbed_official | 76:aeb1df146756 | 523 | while((status == FLASH_BUSY) && (Timeout != 0x00)) |
mbed_official | 76:aeb1df146756 | 524 | { |
mbed_official | 76:aeb1df146756 | 525 | status = GetStatus(); |
mbed_official | 76:aeb1df146756 | 526 | Timeout--; |
mbed_official | 76:aeb1df146756 | 527 | } |
mbed_official | 76:aeb1df146756 | 528 | |
mbed_official | 76:aeb1df146756 | 529 | if(Timeout == 0x00 ) |
mbed_official | 76:aeb1df146756 | 530 | { |
mbed_official | 76:aeb1df146756 | 531 | status = FLASH_TIMEOUT; |
mbed_official | 76:aeb1df146756 | 532 | } |
mbed_official | 76:aeb1df146756 | 533 | /* Return the operation status */ |
mbed_official | 76:aeb1df146756 | 534 | return status; |
mbed_official | 76:aeb1df146756 | 535 | } |
mbed_official | 76:aeb1df146756 | 536 | |
mbed_official | 76:aeb1df146756 | 537 | #if defined ( __TASKING__ ) |
mbed_official | 76:aeb1df146756 | 538 | #pragma section_code_init restore |
mbed_official | 76:aeb1df146756 | 539 | #endif |
mbed_official | 76:aeb1df146756 | 540 | |
mbed_official | 76:aeb1df146756 | 541 | /** |
mbed_official | 76:aeb1df146756 | 542 | * @} |
mbed_official | 76:aeb1df146756 | 543 | */ |
mbed_official | 76:aeb1df146756 | 544 | |
mbed_official | 76:aeb1df146756 | 545 | /** |
mbed_official | 76:aeb1df146756 | 546 | * @} |
mbed_official | 76:aeb1df146756 | 547 | */ |
mbed_official | 76:aeb1df146756 | 548 | |
mbed_official | 76:aeb1df146756 | 549 | /** |
mbed_official | 76:aeb1df146756 | 550 | * @} |
mbed_official | 76:aeb1df146756 | 551 | */ |
mbed_official | 76:aeb1df146756 | 552 | |
mbed_official | 76:aeb1df146756 | 553 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |