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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F030R8/stm32f0xx_tim.c@76:aeb1df146756, 2014-01-27 (annotated)

Committer:: mbed_official
Date:: Mon Jan 27 14:30:07 2014 +0000
Revision:: 76:aeb1df146756
Child:: 106:ced8cbb51063

Synchronized with git revision a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd



Full URL: https://github.com/mbedmicro/mbed/commit/a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd/



Add NUCLEO_L152RE

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User	Revision	Line number	New contents of line
mbed_official	76:aeb1df146756	1	/**
mbed_official	76:aeb1df146756	2	******************************************************************************
mbed_official	76:aeb1df146756	3	* @file stm32f0xx_tim.c
mbed_official	76:aeb1df146756	4	* @author MCD Application Team
mbed_official	76:aeb1df146756	5	* @version V1.3.0
mbed_official	76:aeb1df146756	6	* @date 16-January-2014
mbed_official	76:aeb1df146756	7	* @brief This file provides firmware functions to manage the following
mbed_official	76:aeb1df146756	8	* functionalities of the TIM peripheral:
mbed_official	76:aeb1df146756	9	* + TimeBase management
mbed_official	76:aeb1df146756	10	* + Output Compare management
mbed_official	76:aeb1df146756	11	* + Input Capture management
mbed_official	76:aeb1df146756	12	* + Interrupts, DMA and flags management
mbed_official	76:aeb1df146756	13	* + Clocks management
mbed_official	76:aeb1df146756	14	* + Synchronization management
mbed_official	76:aeb1df146756	15	* + Specific interface management
mbed_official	76:aeb1df146756	16	* + Specific remapping management
mbed_official	76:aeb1df146756	17	*
mbed_official	76:aeb1df146756	18	* @verbatim
mbed_official	76:aeb1df146756	19
mbed_official	76:aeb1df146756	20	===============================================================================
mbed_official	76:aeb1df146756	21	##### How to use this driver #####
mbed_official	76:aeb1df146756	22	===============================================================================
mbed_official	76:aeb1df146756	23	[..] This driver provides functions to configure and program the TIM
mbed_official	76:aeb1df146756	24	of all STM32F0xx devices These functions are split in 8 groups:
mbed_official	76:aeb1df146756	25	(#) TIM TimeBase management: this group includes all needed functions
mbed_official	76:aeb1df146756	26	to configure the TM Timebase unit:
mbed_official	76:aeb1df146756	27	(++) Set/Get Prescaler.
mbed_official	76:aeb1df146756	28	(++) Set/Get Autoreload.
mbed_official	76:aeb1df146756	29	(++) Counter modes configuration.
mbed_official	76:aeb1df146756	30	(++) Set Clock division.
mbed_official	76:aeb1df146756	31	(++) Select the One Pulse mode.
mbed_official	76:aeb1df146756	32	(++) Update Request Configuration.
mbed_official	76:aeb1df146756	33	(++) Update Disable Configuration.
mbed_official	76:aeb1df146756	34	(++) Auto-Preload Configuration.
mbed_official	76:aeb1df146756	35	(++) Enable/Disable the counter.
mbed_official	76:aeb1df146756	36
mbed_official	76:aeb1df146756	37	(#) TIM Output Compare management: this group includes all needed
mbed_official	76:aeb1df146756	38	functions to configure the Capture/Compare unit used in Output
mbed_official	76:aeb1df146756	39	compare mode:
mbed_official	76:aeb1df146756	40	(++) Configure each channel, independently, in Output Compare mode.
mbed_official	76:aeb1df146756	41	(++) Select the output compare modes.
mbed_official	76:aeb1df146756	42	(++) Select the Polarities of each channel.
mbed_official	76:aeb1df146756	43	(++) Set/Get the Capture/Compare register values.
mbed_official	76:aeb1df146756	44	(++) Select the Output Compare Fast mode.
mbed_official	76:aeb1df146756	45	(++) Select the Output Compare Forced mode.
mbed_official	76:aeb1df146756	46	(++) Output Compare-Preload Configuration.
mbed_official	76:aeb1df146756	47	(++) Clear Output Compare Reference.
mbed_official	76:aeb1df146756	48	(++) Select the OCREF Clear signal.
mbed_official	76:aeb1df146756	49	(++) Enable/Disable the Capture/Compare Channels.
mbed_official	76:aeb1df146756	50
mbed_official	76:aeb1df146756	51	(#) TIM Input Capture management: this group includes all needed
mbed_official	76:aeb1df146756	52	functions to configure the Capture/Compare unit used in
mbed_official	76:aeb1df146756	53	Input Capture mode:
mbed_official	76:aeb1df146756	54	(++) Configure each channel in input capture mode.
mbed_official	76:aeb1df146756	55	(++) Configure Channel1/2 in PWM Input mode.
mbed_official	76:aeb1df146756	56	(++) Set the Input Capture Prescaler.
mbed_official	76:aeb1df146756	57	(++) Get the Capture/Compare values.
mbed_official	76:aeb1df146756	58
mbed_official	76:aeb1df146756	59	(#) Advanced-control timers (TIM1) specific features
mbed_official	76:aeb1df146756	60	(++) Configures the Break input, dead time, Lock level, the OSSI,
mbed_official	76:aeb1df146756	61	the OSSR State and the AOE(automatic output enable)
mbed_official	76:aeb1df146756	62	(++) Enable/Disable the TIM peripheral Main Outputs
mbed_official	76:aeb1df146756	63	(++) Select the Commutation event
mbed_official	76:aeb1df146756	64	(++) Set/Reset the Capture Compare Preload Control bit
mbed_official	76:aeb1df146756	65
mbed_official	76:aeb1df146756	66	(#) TIM interrupts, DMA and flags management.
mbed_official	76:aeb1df146756	67	(++) Enable/Disable interrupt sources.
mbed_official	76:aeb1df146756	68	(++) Get flags status.
mbed_official	76:aeb1df146756	69	(++) Clear flags/ Pending bits.
mbed_official	76:aeb1df146756	70	(++) Enable/Disable DMA requests.
mbed_official	76:aeb1df146756	71	(++) Configure DMA burst mode.
mbed_official	76:aeb1df146756	72	(++) Select CaptureCompare DMA request.
mbed_official	76:aeb1df146756	73
mbed_official	76:aeb1df146756	74	(#) TIM clocks management: this group includes all needed functions
mbed_official	76:aeb1df146756	75	to configure the clock controller unit:
mbed_official	76:aeb1df146756	76	(++) Select internal/External clock.
mbed_official	76:aeb1df146756	77	(++) Select the external clock mode: ETR(Mode1/Mode2), TIx or ITRx.
mbed_official	76:aeb1df146756	78
mbed_official	76:aeb1df146756	79	(#) TIM synchronization management: this group includes all needed.
mbed_official	76:aeb1df146756	80	functions to configure the Synchronization unit:
mbed_official	76:aeb1df146756	81	(++) Select Input Trigger.
mbed_official	76:aeb1df146756	82	(++) Select Output Trigger.
mbed_official	76:aeb1df146756	83	(++) Select Master Slave Mode.
mbed_official	76:aeb1df146756	84	(++) ETR Configuration when used as external trigger.
mbed_official	76:aeb1df146756	85
mbed_official	76:aeb1df146756	86	(#) TIM specific interface management, this group includes all
mbed_official	76:aeb1df146756	87	needed functions to use the specific TIM interface:
mbed_official	76:aeb1df146756	88	(++) Encoder Interface Configuration.
mbed_official	76:aeb1df146756	89	(++) Select Hall Sensor.
mbed_official	76:aeb1df146756	90
mbed_official	76:aeb1df146756	91	(#) TIM specific remapping management includes the Remapping
mbed_official	76:aeb1df146756	92	configuration of specific timers
mbed_official	76:aeb1df146756	93
mbed_official	76:aeb1df146756	94	@endverbatim
mbed_official	76:aeb1df146756	95	*
mbed_official	76:aeb1df146756	96	******************************************************************************
mbed_official	76:aeb1df146756	97	* @attention
mbed_official	76:aeb1df146756	98	*
mbed_official	76:aeb1df146756	99	* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
mbed_official	76:aeb1df146756	100	*
mbed_official	76:aeb1df146756	101	* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
mbed_official	76:aeb1df146756	102	* You may not use this file except in compliance with the License.
mbed_official	76:aeb1df146756	103	* You may obtain a copy of the License at:
mbed_official	76:aeb1df146756	104	*
mbed_official	76:aeb1df146756	105	* http://www.st.com/software_license_agreement_liberty_v2
mbed_official	76:aeb1df146756	106	*
mbed_official	76:aeb1df146756	107	* Unless required by applicable law or agreed to in writing, software
mbed_official	76:aeb1df146756	108	* distributed under the License is distributed on an "AS IS" BASIS,
mbed_official	76:aeb1df146756	109	* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official	76:aeb1df146756	110	* See the License for the specific language governing permissions and
mbed_official	76:aeb1df146756	111	* limitations under the License.
mbed_official	76:aeb1df146756	112	*
mbed_official	76:aeb1df146756	113	******************************************************************************
mbed_official	76:aeb1df146756	114	*/
mbed_official	76:aeb1df146756	115
mbed_official	76:aeb1df146756	116	/* Includes ------------------------------------------------------------------*/
mbed_official	76:aeb1df146756	117	#include "stm32f0xx_tim.h"
mbed_official	76:aeb1df146756	118	#include "stm32f0xx_rcc.h"
mbed_official	76:aeb1df146756	119
mbed_official	76:aeb1df146756	120	/** @addtogroup STM32F0xx_StdPeriph_Driver
mbed_official	76:aeb1df146756	121	* @{
mbed_official	76:aeb1df146756	122	*/
mbed_official	76:aeb1df146756	123
mbed_official	76:aeb1df146756	124	/** @defgroup TIM
mbed_official	76:aeb1df146756	125	* @brief TIM driver modules
mbed_official	76:aeb1df146756	126	* @{
mbed_official	76:aeb1df146756	127	*/
mbed_official	76:aeb1df146756	128
mbed_official	76:aeb1df146756	129	/* Private typedef -----------------------------------------------------------*/
mbed_official	76:aeb1df146756	130	/* Private define ------------------------------------------------------------*/
mbed_official	76:aeb1df146756	131
mbed_official	76:aeb1df146756	132	/* ---------------------- TIM registers bit mask ------------------------ */
mbed_official	76:aeb1df146756	133	#define SMCR_ETR_MASK ((uint16_t)0x00FF)
mbed_official	76:aeb1df146756	134	#define CCMR_OFFSET ((uint16_t)0x0018)
mbed_official	76:aeb1df146756	135	#define CCER_CCE_SET ((uint16_t)0x0001)
mbed_official	76:aeb1df146756	136	#define CCER_CCNE_SET ((uint16_t)0x0004)
mbed_official	76:aeb1df146756	137
mbed_official	76:aeb1df146756	138	/* Private macro -------------------------------------------------------------*/
mbed_official	76:aeb1df146756	139	/* Private variables ---------------------------------------------------------*/
mbed_official	76:aeb1df146756	140	/* Private function prototypes -----------------------------------------------*/
mbed_official	76:aeb1df146756	141
mbed_official	76:aeb1df146756	142	static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	143	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	144	static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	145	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	146	static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	147	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	148	static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	149	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	150	/* Private functions ---------------------------------------------------------*/
mbed_official	76:aeb1df146756	151
mbed_official	76:aeb1df146756	152	/** @defgroup TIM_Private_Functions
mbed_official	76:aeb1df146756	153	* @{
mbed_official	76:aeb1df146756	154	*/
mbed_official	76:aeb1df146756	155
mbed_official	76:aeb1df146756	156	/** @defgroup TIM_Group1 TimeBase management functions
mbed_official	76:aeb1df146756	157	* @brief TimeBase management functions
mbed_official	76:aeb1df146756	158	*
mbed_official	76:aeb1df146756	159	@verbatim
mbed_official	76:aeb1df146756	160	===============================================================================
mbed_official	76:aeb1df146756	161	##### TimeBase management functions #####
mbed_official	76:aeb1df146756	162	===============================================================================
mbed_official	76:aeb1df146756	163
mbed_official	76:aeb1df146756	164	* TIM Driver: how to use it in Timing(Time base) Mode *
mbed_official	76:aeb1df146756	165	===============================================================================
mbed_official	76:aeb1df146756	166	[..] To use the Timer in Timing(Time base) mode, the following steps are
mbed_official	76:aeb1df146756	167	mandatory:
mbed_official	76:aeb1df146756	168	(#) Enable TIM clock using
mbed_official	76:aeb1df146756	169	RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE) function.
mbed_official	76:aeb1df146756	170	(#) Fill the TIM_TimeBaseInitStruct with the desired parameters.
mbed_official	76:aeb1df146756	171	(#) Call TIM_TimeBaseInit(TIMx, &TIM_TimeBaseInitStruct) to configure
mbed_official	76:aeb1df146756	172	the Time Base unit with the corresponding configuration.
mbed_official	76:aeb1df146756	173	(#) Enable the NVIC if you need to generate the update interrupt.
mbed_official	76:aeb1df146756	174	(#) Enable the corresponding interrupt using the function
mbed_official	76:aeb1df146756	175	TIM_ITConfig(TIMx, TIM_IT_Update).
mbed_official	76:aeb1df146756	176	(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official	76:aeb1df146756	177	[..]
mbed_official	76:aeb1df146756	178	(@) All other functions can be used seperatly to modify, if needed,
mbed_official	76:aeb1df146756	179	a specific feature of the Timer.
mbed_official	76:aeb1df146756	180
mbed_official	76:aeb1df146756	181	@endverbatim
mbed_official	76:aeb1df146756	182	* @{
mbed_official	76:aeb1df146756	183	*/
mbed_official	76:aeb1df146756	184
mbed_official	76:aeb1df146756	185	/**
mbed_official	76:aeb1df146756	186	* @brief Deinitializes the TIMx peripheral registers to their default reset values.
mbed_official	76:aeb1df146756	187	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	188	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	189	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	190	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	191	* @retval None
mbed_official	76:aeb1df146756	192	*
mbed_official	76:aeb1df146756	193	*/
mbed_official	76:aeb1df146756	194	void TIM_DeInit(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	195	{
mbed_official	76:aeb1df146756	196	/* Check the parameters */
mbed_official	76:aeb1df146756	197	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	198
mbed_official	76:aeb1df146756	199	if (TIMx == TIM1)
mbed_official	76:aeb1df146756	200	{
mbed_official	76:aeb1df146756	201	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE);
mbed_official	76:aeb1df146756	202	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE);
mbed_official	76:aeb1df146756	203	}
mbed_official	76:aeb1df146756	204	else if (TIMx == TIM2)
mbed_official	76:aeb1df146756	205	{
mbed_official	76:aeb1df146756	206	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE);
mbed_official	76:aeb1df146756	207	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE);
mbed_official	76:aeb1df146756	208	}
mbed_official	76:aeb1df146756	209	else if (TIMx == TIM3)
mbed_official	76:aeb1df146756	210	{
mbed_official	76:aeb1df146756	211	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE);
mbed_official	76:aeb1df146756	212	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE);
mbed_official	76:aeb1df146756	213	}
mbed_official	76:aeb1df146756	214	else if (TIMx == TIM6)
mbed_official	76:aeb1df146756	215	{
mbed_official	76:aeb1df146756	216	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE);
mbed_official	76:aeb1df146756	217	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE);
mbed_official	76:aeb1df146756	218	}
mbed_official	76:aeb1df146756	219	else if (TIMx == TIM7)
mbed_official	76:aeb1df146756	220	{
mbed_official	76:aeb1df146756	221	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE);
mbed_official	76:aeb1df146756	222	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE);
mbed_official	76:aeb1df146756	223	}
mbed_official	76:aeb1df146756	224	else if (TIMx == TIM14)
mbed_official	76:aeb1df146756	225	{
mbed_official	76:aeb1df146756	226	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, ENABLE);
mbed_official	76:aeb1df146756	227	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, DISABLE);
mbed_official	76:aeb1df146756	228	}
mbed_official	76:aeb1df146756	229	else if (TIMx == TIM15)
mbed_official	76:aeb1df146756	230	{
mbed_official	76:aeb1df146756	231	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, ENABLE);
mbed_official	76:aeb1df146756	232	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, DISABLE);
mbed_official	76:aeb1df146756	233	}
mbed_official	76:aeb1df146756	234	else if (TIMx == TIM16)
mbed_official	76:aeb1df146756	235	{
mbed_official	76:aeb1df146756	236	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, ENABLE);
mbed_official	76:aeb1df146756	237	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, DISABLE);
mbed_official	76:aeb1df146756	238	}
mbed_official	76:aeb1df146756	239	else
mbed_official	76:aeb1df146756	240	{
mbed_official	76:aeb1df146756	241	if (TIMx == TIM17)
mbed_official	76:aeb1df146756	242	{
mbed_official	76:aeb1df146756	243	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, ENABLE);
mbed_official	76:aeb1df146756	244	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, DISABLE);
mbed_official	76:aeb1df146756	245	}
mbed_official	76:aeb1df146756	246	}
mbed_official	76:aeb1df146756	247
mbed_official	76:aeb1df146756	248	}
mbed_official	76:aeb1df146756	249
mbed_official	76:aeb1df146756	250	/**
mbed_official	76:aeb1df146756	251	* @brief Initializes the TIMx Time Base Unit peripheral according to
mbed_official	76:aeb1df146756	252	* the specified parameters in the TIM_TimeBaseInitStruct.
mbed_official	76:aeb1df146756	253	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	254	* peripheral.
mbed_official	76:aeb1df146756	255	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	256	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	257	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	258	* @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef
mbed_official	76:aeb1df146756	259	* structure that contains the configuration information for
mbed_official	76:aeb1df146756	260	* the specified TIM peripheral.
mbed_official	76:aeb1df146756	261	* @retval None
mbed_official	76:aeb1df146756	262	*/
mbed_official	76:aeb1df146756	263	void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
mbed_official	76:aeb1df146756	264	{
mbed_official	76:aeb1df146756	265	uint16_t tmpcr1 = 0;
mbed_official	76:aeb1df146756	266
mbed_official	76:aeb1df146756	267	/* Check the parameters */
mbed_official	76:aeb1df146756	268	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	269	assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode));
mbed_official	76:aeb1df146756	270	assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision));
mbed_official	76:aeb1df146756	271
mbed_official	76:aeb1df146756	272	tmpcr1 = TIMx->CR1;
mbed_official	76:aeb1df146756	273
mbed_official	76:aeb1df146756	274	if((TIMx == TIM1) \|\| (TIMx == TIM2) \|\| (TIMx == TIM3))
mbed_official	76:aeb1df146756	275	{
mbed_official	76:aeb1df146756	276	/* Select the Counter Mode */
mbed_official	76:aeb1df146756	277	tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR \| TIM_CR1_CMS)));
mbed_official	76:aeb1df146756	278	tmpcr1 \|= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode;
mbed_official	76:aeb1df146756	279	}
mbed_official	76:aeb1df146756	280
mbed_official	76:aeb1df146756	281	if(TIMx != TIM6)
mbed_official	76:aeb1df146756	282	{
mbed_official	76:aeb1df146756	283	/* Set the clock division */
mbed_official	76:aeb1df146756	284	tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CR1_CKD));
mbed_official	76:aeb1df146756	285	tmpcr1 \|= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision;
mbed_official	76:aeb1df146756	286	}
mbed_official	76:aeb1df146756	287
mbed_official	76:aeb1df146756	288	TIMx->CR1 = tmpcr1;
mbed_official	76:aeb1df146756	289
mbed_official	76:aeb1df146756	290	/* Set the Autoreload value */
mbed_official	76:aeb1df146756	291	TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ;
mbed_official	76:aeb1df146756	292
mbed_official	76:aeb1df146756	293	/* Set the Prescaler value */
mbed_official	76:aeb1df146756	294	TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;
mbed_official	76:aeb1df146756	295
mbed_official	76:aeb1df146756	296	if ((TIMx == TIM1) \|\| (TIMx == TIM15)\|\| (TIMx == TIM16) \|\| (TIMx == TIM17))
mbed_official	76:aeb1df146756	297	{
mbed_official	76:aeb1df146756	298	/* Set the Repetition Counter value */
mbed_official	76:aeb1df146756	299	TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter;
mbed_official	76:aeb1df146756	300	}
mbed_official	76:aeb1df146756	301
mbed_official	76:aeb1df146756	302	/* Generate an update event to reload the Prescaler and the Repetition counter
mbed_official	76:aeb1df146756	303	values immediately */
mbed_official	76:aeb1df146756	304	TIMx->EGR = TIM_PSCReloadMode_Immediate;
mbed_official	76:aeb1df146756	305	}
mbed_official	76:aeb1df146756	306
mbed_official	76:aeb1df146756	307	/**
mbed_official	76:aeb1df146756	308	* @brief Fills each TIM_TimeBaseInitStruct member with its default value.
mbed_official	76:aeb1df146756	309	* @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef structure
mbed_official	76:aeb1df146756	310	* which will be initialized.
mbed_official	76:aeb1df146756	311	* @retval None
mbed_official	76:aeb1df146756	312	*/
mbed_official	76:aeb1df146756	313	void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
mbed_official	76:aeb1df146756	314	{
mbed_official	76:aeb1df146756	315	/* Set the default configuration */
mbed_official	76:aeb1df146756	316	TIM_TimeBaseInitStruct->TIM_Period = 0xFFFFFFFF;
mbed_official	76:aeb1df146756	317	TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000;
mbed_official	76:aeb1df146756	318	TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1;
mbed_official	76:aeb1df146756	319	TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up;
mbed_official	76:aeb1df146756	320	TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000;
mbed_official	76:aeb1df146756	321	}
mbed_official	76:aeb1df146756	322
mbed_official	76:aeb1df146756	323	/**
mbed_official	76:aeb1df146756	324	* @brief Configures the TIMx Prescaler.
mbed_official	76:aeb1df146756	325	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	326	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	327	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	328	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	329	* @param Prescaler: specifies the Prescaler Register value
mbed_official	76:aeb1df146756	330	* @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode
mbed_official	76:aeb1df146756	331	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	332	* @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event.
mbed_official	76:aeb1df146756	333	* @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediatly.
mbed_official	76:aeb1df146756	334	* @retval None
mbed_official	76:aeb1df146756	335	*/
mbed_official	76:aeb1df146756	336	void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode)
mbed_official	76:aeb1df146756	337	{
mbed_official	76:aeb1df146756	338	/* Check the parameters */
mbed_official	76:aeb1df146756	339	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	340	assert_param(IS_TIM_PRESCALER_RELOAD(TIM_PSCReloadMode));
mbed_official	76:aeb1df146756	341
mbed_official	76:aeb1df146756	342	/* Set the Prescaler value */
mbed_official	76:aeb1df146756	343	TIMx->PSC = Prescaler;
mbed_official	76:aeb1df146756	344	/* Set or reset the UG Bit */
mbed_official	76:aeb1df146756	345	TIMx->EGR = TIM_PSCReloadMode;
mbed_official	76:aeb1df146756	346	}
mbed_official	76:aeb1df146756	347
mbed_official	76:aeb1df146756	348	/**
mbed_official	76:aeb1df146756	349	* @brief Specifies the TIMx Counter Mode to be used.
mbed_official	76:aeb1df146756	350	* @param TIMx: where x can be 1, 2, or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	351	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	352	* @param TIM_CounterMode: specifies the Counter Mode to be used
mbed_official	76:aeb1df146756	353	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	354	* @arg TIM_CounterMode_Up: TIM Up Counting Mode
mbed_official	76:aeb1df146756	355	* @arg TIM_CounterMode_Down: TIM Down Counting Mode
mbed_official	76:aeb1df146756	356	* @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1
mbed_official	76:aeb1df146756	357	* @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2
mbed_official	76:aeb1df146756	358	* @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3
mbed_official	76:aeb1df146756	359	* @retval None
mbed_official	76:aeb1df146756	360	*/
mbed_official	76:aeb1df146756	361	void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode)
mbed_official	76:aeb1df146756	362	{
mbed_official	76:aeb1df146756	363	uint16_t tmpcr1 = 0;
mbed_official	76:aeb1df146756	364
mbed_official	76:aeb1df146756	365	/* Check the parameters */
mbed_official	76:aeb1df146756	366	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	367	assert_param(IS_TIM_COUNTER_MODE(TIM_CounterMode));
mbed_official	76:aeb1df146756	368
mbed_official	76:aeb1df146756	369	tmpcr1 = TIMx->CR1;
mbed_official	76:aeb1df146756	370	/* Reset the CMS and DIR Bits */
mbed_official	76:aeb1df146756	371	tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR \| TIM_CR1_CMS)));
mbed_official	76:aeb1df146756	372	/* Set the Counter Mode */
mbed_official	76:aeb1df146756	373	tmpcr1 \|= TIM_CounterMode;
mbed_official	76:aeb1df146756	374	/* Write to TIMx CR1 register */
mbed_official	76:aeb1df146756	375	TIMx->CR1 = tmpcr1;
mbed_official	76:aeb1df146756	376	}
mbed_official	76:aeb1df146756	377
mbed_official	76:aeb1df146756	378	/**
mbed_official	76:aeb1df146756	379	* @brief Sets the TIMx Counter Register value
mbed_official	76:aeb1df146756	380	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	381	* peripheral.
mbed_official	76:aeb1df146756	382	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	383	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	384	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	385	* @param Counter: specifies the Counter register new value.
mbed_official	76:aeb1df146756	386	* @retval None
mbed_official	76:aeb1df146756	387	*/
mbed_official	76:aeb1df146756	388	void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter)
mbed_official	76:aeb1df146756	389	{
mbed_official	76:aeb1df146756	390	/* Check the parameters */
mbed_official	76:aeb1df146756	391	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	392
mbed_official	76:aeb1df146756	393	/* Set the Counter Register value */
mbed_official	76:aeb1df146756	394	TIMx->CNT = Counter;
mbed_official	76:aeb1df146756	395	}
mbed_official	76:aeb1df146756	396
mbed_official	76:aeb1df146756	397	/**
mbed_official	76:aeb1df146756	398	* @brief Sets the TIMx Autoreload Register value
mbed_official	76:aeb1df146756	399	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	400	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	401	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	402	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	403	* @param Autoreload: specifies the Autoreload register new value.
mbed_official	76:aeb1df146756	404	* @retval None
mbed_official	76:aeb1df146756	405	*/
mbed_official	76:aeb1df146756	406	void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload)
mbed_official	76:aeb1df146756	407	{
mbed_official	76:aeb1df146756	408	/* Check the parameters */
mbed_official	76:aeb1df146756	409	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	410
mbed_official	76:aeb1df146756	411	/* Set the Autoreload Register value */
mbed_official	76:aeb1df146756	412	TIMx->ARR = Autoreload;
mbed_official	76:aeb1df146756	413	}
mbed_official	76:aeb1df146756	414
mbed_official	76:aeb1df146756	415	/**
mbed_official	76:aeb1df146756	416	* @brief Gets the TIMx Counter value.
mbed_official	76:aeb1df146756	417	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	418	* peripheral.
mbed_official	76:aeb1df146756	419	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	420	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	421	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	422	* @retval Counter Register value.
mbed_official	76:aeb1df146756	423	*/
mbed_official	76:aeb1df146756	424	uint32_t TIM_GetCounter(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	425	{
mbed_official	76:aeb1df146756	426	/* Check the parameters */
mbed_official	76:aeb1df146756	427	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	428
mbed_official	76:aeb1df146756	429	/* Get the Counter Register value */
mbed_official	76:aeb1df146756	430	return TIMx->CNT;
mbed_official	76:aeb1df146756	431	}
mbed_official	76:aeb1df146756	432
mbed_official	76:aeb1df146756	433	/**
mbed_official	76:aeb1df146756	434	* @brief Gets the TIMx Prescaler value.
mbed_official	76:aeb1df146756	435	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	436	* peripheral.
mbed_official	76:aeb1df146756	437	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	438	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	439	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	440	* @retval Prescaler Register value.
mbed_official	76:aeb1df146756	441	*/
mbed_official	76:aeb1df146756	442	uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	443	{
mbed_official	76:aeb1df146756	444	/* Check the parameters */
mbed_official	76:aeb1df146756	445	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	446
mbed_official	76:aeb1df146756	447	/* Get the Prescaler Register value */
mbed_official	76:aeb1df146756	448	return TIMx->PSC;
mbed_official	76:aeb1df146756	449	}
mbed_official	76:aeb1df146756	450
mbed_official	76:aeb1df146756	451	/**
mbed_official	76:aeb1df146756	452	* @brief Enables or Disables the TIMx Update event.
mbed_official	76:aeb1df146756	453	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	454	* peripheral.
mbed_official	76:aeb1df146756	455	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	456	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	457	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	458	* @param NewState: new state of the TIMx UDIS bit
mbed_official	76:aeb1df146756	459	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	460	* @retval None
mbed_official	76:aeb1df146756	461	*/
mbed_official	76:aeb1df146756	462	void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	463	{
mbed_official	76:aeb1df146756	464	/* Check the parameters */
mbed_official	76:aeb1df146756	465	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	466	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	467
mbed_official	76:aeb1df146756	468	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	469	{
mbed_official	76:aeb1df146756	470	/* Set the Update Disable Bit */
mbed_official	76:aeb1df146756	471	TIMx->CR1 \|= TIM_CR1_UDIS;
mbed_official	76:aeb1df146756	472	}
mbed_official	76:aeb1df146756	473	else
mbed_official	76:aeb1df146756	474	{
mbed_official	76:aeb1df146756	475	/* Reset the Update Disable Bit */
mbed_official	76:aeb1df146756	476	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_UDIS);
mbed_official	76:aeb1df146756	477	}
mbed_official	76:aeb1df146756	478	}
mbed_official	76:aeb1df146756	479
mbed_official	76:aeb1df146756	480	/**
mbed_official	76:aeb1df146756	481	* @brief Configures the TIMx Update Request Interrupt source.
mbed_official	76:aeb1df146756	482	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	483	* peripheral.
mbed_official	76:aeb1df146756	484	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	485	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	486	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	487	* @param TIM_UpdateSource: specifies the Update source.
mbed_official	76:aeb1df146756	488	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	489	* @arg TIM_UpdateSource_Regular: Source of update is the counter
mbed_official	76:aeb1df146756	490	* overflow/underflow or the setting of UG bit, or an update
mbed_official	76:aeb1df146756	491	* generation through the slave mode controller.
mbed_official	76:aeb1df146756	492	* @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow.
mbed_official	76:aeb1df146756	493	* @retval None
mbed_official	76:aeb1df146756	494	*/
mbed_official	76:aeb1df146756	495	void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource)
mbed_official	76:aeb1df146756	496	{
mbed_official	76:aeb1df146756	497	/* Check the parameters */
mbed_official	76:aeb1df146756	498	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	499	assert_param(IS_TIM_UPDATE_SOURCE(TIM_UpdateSource));
mbed_official	76:aeb1df146756	500
mbed_official	76:aeb1df146756	501	if (TIM_UpdateSource != TIM_UpdateSource_Global)
mbed_official	76:aeb1df146756	502	{
mbed_official	76:aeb1df146756	503	/* Set the URS Bit */
mbed_official	76:aeb1df146756	504	TIMx->CR1 \|= TIM_CR1_URS;
mbed_official	76:aeb1df146756	505	}
mbed_official	76:aeb1df146756	506	else
mbed_official	76:aeb1df146756	507	{
mbed_official	76:aeb1df146756	508	/* Reset the URS Bit */
mbed_official	76:aeb1df146756	509	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_URS);
mbed_official	76:aeb1df146756	510	}
mbed_official	76:aeb1df146756	511	}
mbed_official	76:aeb1df146756	512
mbed_official	76:aeb1df146756	513	/**
mbed_official	76:aeb1df146756	514	* @brief Enables or disables TIMx peripheral Preload register on ARR.
mbed_official	76:aeb1df146756	515	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	516	* peripheral.
mbed_official	76:aeb1df146756	517	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	518	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	519	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	520	* @param NewState: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	521	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	522	* @retval None
mbed_official	76:aeb1df146756	523	*/
mbed_official	76:aeb1df146756	524	void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	525	{
mbed_official	76:aeb1df146756	526	/* Check the parameters */
mbed_official	76:aeb1df146756	527	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	528	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	529
mbed_official	76:aeb1df146756	530	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	531	{
mbed_official	76:aeb1df146756	532	/* Set the ARR Preload Bit */
mbed_official	76:aeb1df146756	533	TIMx->CR1 \|= TIM_CR1_ARPE;
mbed_official	76:aeb1df146756	534	}
mbed_official	76:aeb1df146756	535	else
mbed_official	76:aeb1df146756	536	{
mbed_official	76:aeb1df146756	537	/* Reset the ARR Preload Bit */
mbed_official	76:aeb1df146756	538	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_ARPE);
mbed_official	76:aeb1df146756	539	}
mbed_official	76:aeb1df146756	540	}
mbed_official	76:aeb1df146756	541
mbed_official	76:aeb1df146756	542	/**
mbed_official	76:aeb1df146756	543	* @brief Selects the TIMx's One Pulse Mode.
mbed_official	76:aeb1df146756	544	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	545	* peripheral.
mbed_official	76:aeb1df146756	546	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	547	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	548	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	549	* @param TIM_OPMode: specifies the OPM Mode to be used.
mbed_official	76:aeb1df146756	550	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	551	* @arg TIM_OPMode_Single
mbed_official	76:aeb1df146756	552	* @arg TIM_OPMode_Repetitive
mbed_official	76:aeb1df146756	553	* @retval None
mbed_official	76:aeb1df146756	554	*/
mbed_official	76:aeb1df146756	555	void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode)
mbed_official	76:aeb1df146756	556	{
mbed_official	76:aeb1df146756	557	/* Check the parameters */
mbed_official	76:aeb1df146756	558	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	559	assert_param(IS_TIM_OPM_MODE(TIM_OPMode));
mbed_official	76:aeb1df146756	560
mbed_official	76:aeb1df146756	561	/* Reset the OPM Bit */
mbed_official	76:aeb1df146756	562	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_OPM);
mbed_official	76:aeb1df146756	563	/* Configure the OPM Mode */
mbed_official	76:aeb1df146756	564	TIMx->CR1 \|= TIM_OPMode;
mbed_official	76:aeb1df146756	565	}
mbed_official	76:aeb1df146756	566
mbed_official	76:aeb1df146756	567	/**
mbed_official	76:aeb1df146756	568	* @brief Sets the TIMx Clock Division value.
mbed_official	76:aeb1df146756	569	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	570	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	571	* @param TIM_CKD: specifies the clock division value.
mbed_official	76:aeb1df146756	572	* This parameter can be one of the following value:
mbed_official	76:aeb1df146756	573	* @arg TIM_CKD_DIV1: TDTS = Tck_tim
mbed_official	76:aeb1df146756	574	* @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim
mbed_official	76:aeb1df146756	575	* @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim
mbed_official	76:aeb1df146756	576	* @retval None
mbed_official	76:aeb1df146756	577	*/
mbed_official	76:aeb1df146756	578	void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD)
mbed_official	76:aeb1df146756	579	{
mbed_official	76:aeb1df146756	580	/* Check the parameters */
mbed_official	76:aeb1df146756	581	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	582	assert_param(IS_TIM_CKD_DIV(TIM_CKD));
mbed_official	76:aeb1df146756	583
mbed_official	76:aeb1df146756	584	/* Reset the CKD Bits */
mbed_official	76:aeb1df146756	585	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_CKD);
mbed_official	76:aeb1df146756	586	/* Set the CKD value */
mbed_official	76:aeb1df146756	587	TIMx->CR1 \|= TIM_CKD;
mbed_official	76:aeb1df146756	588	}
mbed_official	76:aeb1df146756	589
mbed_official	76:aeb1df146756	590	/**
mbed_official	76:aeb1df146756	591	* @brief Enables or disables the specified TIM peripheral.
mbed_official	76:aeb1df146756	592	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17to select the TIMx
mbed_official	76:aeb1df146756	593	* peripheral.
mbed_official	76:aeb1df146756	594	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	595	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	596	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	597	* @param NewState: new state of the TIMx peripheral.
mbed_official	76:aeb1df146756	598	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	599	* @retval None
mbed_official	76:aeb1df146756	600	*/
mbed_official	76:aeb1df146756	601	void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	602	{
mbed_official	76:aeb1df146756	603	/* Check the parameters */
mbed_official	76:aeb1df146756	604	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	605	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	606
mbed_official	76:aeb1df146756	607	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	608	{
mbed_official	76:aeb1df146756	609	/* Enable the TIM Counter */
mbed_official	76:aeb1df146756	610	TIMx->CR1 \|= TIM_CR1_CEN;
mbed_official	76:aeb1df146756	611	}
mbed_official	76:aeb1df146756	612	else
mbed_official	76:aeb1df146756	613	{
mbed_official	76:aeb1df146756	614	/* Disable the TIM Counter */
mbed_official	76:aeb1df146756	615	TIMx->CR1 &= (uint16_t)(~((uint16_t)TIM_CR1_CEN));
mbed_official	76:aeb1df146756	616	}
mbed_official	76:aeb1df146756	617	}
mbed_official	76:aeb1df146756	618
mbed_official	76:aeb1df146756	619	/**
mbed_official	76:aeb1df146756	620	* @}
mbed_official	76:aeb1df146756	621	*/
mbed_official	76:aeb1df146756	622
mbed_official	76:aeb1df146756	623	/** @defgroup TIM_Group2 Advanced-control timers (TIM1) specific features
mbed_official	76:aeb1df146756	624	* @brief Advanced-control timers (TIM1) specific features
mbed_official	76:aeb1df146756	625	*
mbed_official	76:aeb1df146756	626	@verbatim
mbed_official	76:aeb1df146756	627	===============================================================================
mbed_official	76:aeb1df146756	628	##### Advanced-control timers (TIM1) specific features #####
mbed_official	76:aeb1df146756	629	===============================================================================
mbed_official	76:aeb1df146756	630
mbed_official	76:aeb1df146756	631	===================================================================
mbed_official	76:aeb1df146756	632	* TIM Driver: how to use the Break feature *
mbed_official	76:aeb1df146756	633	===================================================================
mbed_official	76:aeb1df146756	634	[..] After configuring the Timer channel(s) in the appropriate Output Compare mode:
mbed_official	76:aeb1df146756	635
mbed_official	76:aeb1df146756	636	(#) Fill the TIM_BDTRInitStruct with the desired parameters for the Timer
mbed_official	76:aeb1df146756	637	Break Polarity, dead time, Lock level, the OSSI/OSSR State and the
mbed_official	76:aeb1df146756	638	AOE(automatic output enable).
mbed_official	76:aeb1df146756	639
mbed_official	76:aeb1df146756	640	(#) Call TIM_BDTRConfig(TIMx, &TIM_BDTRInitStruct) to configure the Timer
mbed_official	76:aeb1df146756	641
mbed_official	76:aeb1df146756	642	(#) Enable the Main Output using TIM_CtrlPWMOutputs(TIM1, ENABLE)
mbed_official	76:aeb1df146756	643
mbed_official	76:aeb1df146756	644	(#) Once the break even occurs, the Timer's output signals are put in reset
mbed_official	76:aeb1df146756	645	state or in a known state (according to the configuration made in
mbed_official	76:aeb1df146756	646	TIM_BDTRConfig() function).
mbed_official	76:aeb1df146756	647
mbed_official	76:aeb1df146756	648	@endverbatim
mbed_official	76:aeb1df146756	649	* @{
mbed_official	76:aeb1df146756	650	*/
mbed_official	76:aeb1df146756	651	/**
mbed_official	76:aeb1df146756	652	* @brief Configures the: Break feature, dead time, Lock level, OSSI/OSSR State
mbed_official	76:aeb1df146756	653	* and the AOE(automatic output enable).
mbed_official	76:aeb1df146756	654	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIM
mbed_official	76:aeb1df146756	655	* @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure that
mbed_official	76:aeb1df146756	656	* contains the BDTR Register configuration information for the TIM peripheral.
mbed_official	76:aeb1df146756	657	* @retval None
mbed_official	76:aeb1df146756	658	*/
mbed_official	76:aeb1df146756	659	void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct)
mbed_official	76:aeb1df146756	660	{
mbed_official	76:aeb1df146756	661	/* Check the parameters */
mbed_official	76:aeb1df146756	662	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	663	assert_param(IS_TIM_OSSR_STATE(TIM_BDTRInitStruct->TIM_OSSRState));
mbed_official	76:aeb1df146756	664	assert_param(IS_TIM_OSSI_STATE(TIM_BDTRInitStruct->TIM_OSSIState));
mbed_official	76:aeb1df146756	665	assert_param(IS_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->TIM_LOCKLevel));
mbed_official	76:aeb1df146756	666	assert_param(IS_TIM_BREAK_STATE(TIM_BDTRInitStruct->TIM_Break));
mbed_official	76:aeb1df146756	667	assert_param(IS_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->TIM_BreakPolarity));
mbed_official	76:aeb1df146756	668	assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->TIM_AutomaticOutput));
mbed_official	76:aeb1df146756	669	/* Set the Lock level, the Break enable Bit and the Ploarity, the OSSR State,
mbed_official	76:aeb1df146756	670	the OSSI State, the dead time value and the Automatic Output Enable Bit */
mbed_official	76:aeb1df146756	671	TIMx->BDTR = (uint32_t)TIM_BDTRInitStruct->TIM_OSSRState \| TIM_BDTRInitStruct->TIM_OSSIState \|
mbed_official	76:aeb1df146756	672	TIM_BDTRInitStruct->TIM_LOCKLevel \| TIM_BDTRInitStruct->TIM_DeadTime \|
mbed_official	76:aeb1df146756	673	TIM_BDTRInitStruct->TIM_Break \| TIM_BDTRInitStruct->TIM_BreakPolarity \|
mbed_official	76:aeb1df146756	674	TIM_BDTRInitStruct->TIM_AutomaticOutput;
mbed_official	76:aeb1df146756	675	}
mbed_official	76:aeb1df146756	676
mbed_official	76:aeb1df146756	677	/**
mbed_official	76:aeb1df146756	678	* @brief Fills each TIM_BDTRInitStruct member with its default value.
mbed_official	76:aeb1df146756	679	* @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure which
mbed_official	76:aeb1df146756	680	* will be initialized.
mbed_official	76:aeb1df146756	681	* @retval None
mbed_official	76:aeb1df146756	682	*/
mbed_official	76:aeb1df146756	683	void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct)
mbed_official	76:aeb1df146756	684	{
mbed_official	76:aeb1df146756	685	/* Set the default configuration */
mbed_official	76:aeb1df146756	686	TIM_BDTRInitStruct->TIM_OSSRState = TIM_OSSRState_Disable;
mbed_official	76:aeb1df146756	687	TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable;
mbed_official	76:aeb1df146756	688	TIM_BDTRInitStruct->TIM_LOCKLevel = TIM_LOCKLevel_OFF;
mbed_official	76:aeb1df146756	689	TIM_BDTRInitStruct->TIM_DeadTime = 0x00;
mbed_official	76:aeb1df146756	690	TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable;
mbed_official	76:aeb1df146756	691	TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low;
mbed_official	76:aeb1df146756	692	TIM_BDTRInitStruct->TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
mbed_official	76:aeb1df146756	693	}
mbed_official	76:aeb1df146756	694
mbed_official	76:aeb1df146756	695	/**
mbed_official	76:aeb1df146756	696	* @brief Enables or disables the TIM peripheral Main Outputs.
mbed_official	76:aeb1df146756	697	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIMx peripheral.
mbed_official	76:aeb1df146756	698	* @param NewState: new state of the TIM peripheral Main Outputs.
mbed_official	76:aeb1df146756	699	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	700	* @retval None
mbed_official	76:aeb1df146756	701	*/
mbed_official	76:aeb1df146756	702	void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	703	{
mbed_official	76:aeb1df146756	704	/* Check the parameters */
mbed_official	76:aeb1df146756	705	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	706	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	707	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	708	{
mbed_official	76:aeb1df146756	709	/* Enable the TIM Main Output */
mbed_official	76:aeb1df146756	710	TIMx->BDTR \|= TIM_BDTR_MOE;
mbed_official	76:aeb1df146756	711	}
mbed_official	76:aeb1df146756	712	else
mbed_official	76:aeb1df146756	713	{
mbed_official	76:aeb1df146756	714	/* Disable the TIM Main Output */
mbed_official	76:aeb1df146756	715	TIMx->BDTR &= (uint16_t)(~((uint16_t)TIM_BDTR_MOE));
mbed_official	76:aeb1df146756	716	}
mbed_official	76:aeb1df146756	717	}
mbed_official	76:aeb1df146756	718
mbed_official	76:aeb1df146756	719	/**
mbed_official	76:aeb1df146756	720	* @}
mbed_official	76:aeb1df146756	721	*/
mbed_official	76:aeb1df146756	722
mbed_official	76:aeb1df146756	723	/** @defgroup TIM_Group3 Output Compare management functions
mbed_official	76:aeb1df146756	724	* @brief Output Compare management functions
mbed_official	76:aeb1df146756	725	*
mbed_official	76:aeb1df146756	726	@verbatim
mbed_official	76:aeb1df146756	727	===============================================================================
mbed_official	76:aeb1df146756	728	##### Output Compare management functions #####
mbed_official	76:aeb1df146756	729	===============================================================================
mbed_official	76:aeb1df146756	730	* TIM Driver: how to use it in Output Compare Mode *
mbed_official	76:aeb1df146756	731	===============================================================================
mbed_official	76:aeb1df146756	732	[..] To use the Timer in Output Compare mode, the following steps are mandatory:
mbed_official	76:aeb1df146756	733	(#) Enable TIM clock using
mbed_official	76:aeb1df146756	734	RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE) function.
mbed_official	76:aeb1df146756	735	(#) Configure the TIM pins by configuring the corresponding GPIO pins
mbed_official	76:aeb1df146756	736	(#) Configure the Time base unit as described in the first part of this
mbed_official	76:aeb1df146756	737	driver, if needed, else the Timer will run with the default
mbed_official	76:aeb1df146756	738	configuration:
mbed_official	76:aeb1df146756	739	(++) Autoreload value = 0xFFFF.
mbed_official	76:aeb1df146756	740	(++) Prescaler value = 0x0000.
mbed_official	76:aeb1df146756	741	(++) Counter mode = Up counting.
mbed_official	76:aeb1df146756	742	(++) Clock Division = TIM_CKD_DIV1.
mbed_official	76:aeb1df146756	743	(#) Fill the TIM_OCInitStruct with the desired parameters including:
mbed_official	76:aeb1df146756	744	(++) The TIM Output Compare mode: TIM_OCMode.
mbed_official	76:aeb1df146756	745	(++) TIM Output State: TIM_OutputState.
mbed_official	76:aeb1df146756	746	(++) TIM Pulse value: TIM_Pulse.
mbed_official	76:aeb1df146756	747	(++) TIM Output Compare Polarity : TIM_OCPolarity.
mbed_official	76:aeb1df146756	748	(#) Call TIM_OCxInit(TIMx, &TIM_OCInitStruct) to configure the desired
mbed_official	76:aeb1df146756	749	channel with the corresponding configuration.
mbed_official	76:aeb1df146756	750	(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official	76:aeb1df146756	751	[..]
mbed_official	76:aeb1df146756	752	(@) All other functions can be used separately to modify, if needed,
mbed_official	76:aeb1df146756	753	a specific feature of the Timer.
mbed_official	76:aeb1df146756	754	(@) In case of PWM mode, this function is mandatory:
mbed_official	76:aeb1df146756	755	TIM_OCxPreloadConfig(TIMx, TIM_OCPreload_ENABLE).
mbed_official	76:aeb1df146756	756	(@) If the corresponding interrupt or DMA request are needed, the user should:
mbed_official	76:aeb1df146756	757	(#@) Enable the NVIC (or the DMA) to use the TIM interrupts (or DMA requests).
mbed_official	76:aeb1df146756	758	(#@) Enable the corresponding interrupt (or DMA request) using the function
mbed_official	76:aeb1df146756	759	TIM_ITConfig(TIMx, TIM_IT_CCx) (or TIM_DMA_Cmd(TIMx, TIM_DMA_CCx)).
mbed_official	76:aeb1df146756	760
mbed_official	76:aeb1df146756	761	@endverbatim
mbed_official	76:aeb1df146756	762	* @{
mbed_official	76:aeb1df146756	763	*/
mbed_official	76:aeb1df146756	764
mbed_official	76:aeb1df146756	765	/**
mbed_official	76:aeb1df146756	766	* @brief Initializes the TIMx Channel1 according to the specified
mbed_official	76:aeb1df146756	767	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	768	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	769	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	770	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	771	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	772	* peripheral.
mbed_official	76:aeb1df146756	773	* @retval None
mbed_official	76:aeb1df146756	774	*/
mbed_official	76:aeb1df146756	775	void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	776	{
mbed_official	76:aeb1df146756	777	uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
mbed_official	76:aeb1df146756	778
mbed_official	76:aeb1df146756	779	/* Check the parameters */
mbed_official	76:aeb1df146756	780	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	781	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	782	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	783	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	784	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	76:aeb1df146756	785	TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E);
mbed_official	76:aeb1df146756	786	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	787	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	788	/* Get the TIMx CR2 register value */
mbed_official	76:aeb1df146756	789	tmpcr2 = TIMx->CR2;
mbed_official	76:aeb1df146756	790
mbed_official	76:aeb1df146756	791	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	792	tmpccmrx = TIMx->CCMR1;
mbed_official	76:aeb1df146756	793
mbed_official	76:aeb1df146756	794	/* Reset the Output Compare Mode Bits */
mbed_official	76:aeb1df146756	795	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC1M));
mbed_official	76:aeb1df146756	796	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC1S));
mbed_official	76:aeb1df146756	797
mbed_official	76:aeb1df146756	798	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	799	tmpccmrx \|= TIM_OCInitStruct->TIM_OCMode;
mbed_official	76:aeb1df146756	800
mbed_official	76:aeb1df146756	801	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	802	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P));
mbed_official	76:aeb1df146756	803	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	804	tmpccer \|= TIM_OCInitStruct->TIM_OCPolarity;
mbed_official	76:aeb1df146756	805
mbed_official	76:aeb1df146756	806	/* Set the Output State */
mbed_official	76:aeb1df146756	807	tmpccer \|= TIM_OCInitStruct->TIM_OutputState;
mbed_official	76:aeb1df146756	808
mbed_official	76:aeb1df146756	809	if((TIMx == TIM1) \|\| (TIMx == TIM15) \|\| (TIMx == TIM16) \|\| (TIMx == TIM17))
mbed_official	76:aeb1df146756	810	{
mbed_official	76:aeb1df146756	811	assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
mbed_official	76:aeb1df146756	812	assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity));
mbed_official	76:aeb1df146756	813	assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState));
mbed_official	76:aeb1df146756	814	assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
mbed_official	76:aeb1df146756	815
mbed_official	76:aeb1df146756	816	/* Reset the Output N Polarity level */
mbed_official	76:aeb1df146756	817	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NP));
mbed_official	76:aeb1df146756	818	/* Set the Output N Polarity */
mbed_official	76:aeb1df146756	819	tmpccer \|= TIM_OCInitStruct->TIM_OCNPolarity;
mbed_official	76:aeb1df146756	820
mbed_official	76:aeb1df146756	821	/* Reset the Output N State */
mbed_official	76:aeb1df146756	822	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NE));
mbed_official	76:aeb1df146756	823	/* Set the Output N State */
mbed_official	76:aeb1df146756	824	tmpccer \|= TIM_OCInitStruct->TIM_OutputNState;
mbed_official	76:aeb1df146756	825
mbed_official	76:aeb1df146756	826	/* Reset the Ouput Compare and Output Compare N IDLE State */
mbed_official	76:aeb1df146756	827	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1));
mbed_official	76:aeb1df146756	828	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1N));
mbed_official	76:aeb1df146756	829
mbed_official	76:aeb1df146756	830	/* Set the Output Idle state */
mbed_official	76:aeb1df146756	831	tmpcr2 \|= TIM_OCInitStruct->TIM_OCIdleState;
mbed_official	76:aeb1df146756	832	/* Set the Output N Idle state */
mbed_official	76:aeb1df146756	833	tmpcr2 \|= TIM_OCInitStruct->TIM_OCNIdleState;
mbed_official	76:aeb1df146756	834	}
mbed_official	76:aeb1df146756	835	/* Write to TIMx CR2 */
mbed_official	76:aeb1df146756	836	TIMx->CR2 = tmpcr2;
mbed_official	76:aeb1df146756	837
mbed_official	76:aeb1df146756	838	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	839	TIMx->CCMR1 = tmpccmrx;
mbed_official	76:aeb1df146756	840
mbed_official	76:aeb1df146756	841	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	842	TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	843
mbed_official	76:aeb1df146756	844	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	845	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	846	}
mbed_official	76:aeb1df146756	847
mbed_official	76:aeb1df146756	848	/**
mbed_official	76:aeb1df146756	849	* @brief Initializes the TIMx Channel2 according to the specified
mbed_official	76:aeb1df146756	850	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	851	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	852	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	853	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	854	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	855	* peripheral.
mbed_official	76:aeb1df146756	856	* @retval None
mbed_official	76:aeb1df146756	857	*/
mbed_official	76:aeb1df146756	858	void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	859	{
mbed_official	76:aeb1df146756	860	uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
mbed_official	76:aeb1df146756	861
mbed_official	76:aeb1df146756	862	/* Check the parameters */
mbed_official	76:aeb1df146756	863	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	864	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	865	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	866	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	867	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	76:aeb1df146756	868	TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC2E));
mbed_official	76:aeb1df146756	869
mbed_official	76:aeb1df146756	870	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	871	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	872	/* Get the TIMx CR2 register value */
mbed_official	76:aeb1df146756	873	tmpcr2 = TIMx->CR2;
mbed_official	76:aeb1df146756	874
mbed_official	76:aeb1df146756	875	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	876	tmpccmrx = TIMx->CCMR1;
mbed_official	76:aeb1df146756	877
mbed_official	76:aeb1df146756	878	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	76:aeb1df146756	879	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC2M));
mbed_official	76:aeb1df146756	880	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S));
mbed_official	76:aeb1df146756	881
mbed_official	76:aeb1df146756	882	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	883	tmpccmrx \|= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
mbed_official	76:aeb1df146756	884
mbed_official	76:aeb1df146756	885	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	886	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2P));
mbed_official	76:aeb1df146756	887	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	888	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 4);
mbed_official	76:aeb1df146756	889
mbed_official	76:aeb1df146756	890	/* Set the Output State */
mbed_official	76:aeb1df146756	891	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4);
mbed_official	76:aeb1df146756	892
mbed_official	76:aeb1df146756	893	if((TIMx == TIM1) \|\| (TIMx == TIM15))
mbed_official	76:aeb1df146756	894	{
mbed_official	76:aeb1df146756	895	/* Check the parameters */
mbed_official	76:aeb1df146756	896	assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
mbed_official	76:aeb1df146756	897
mbed_official	76:aeb1df146756	898	/* Reset the Ouput Compare State */
mbed_official	76:aeb1df146756	899	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2));
mbed_official	76:aeb1df146756	900
mbed_official	76:aeb1df146756	901	/* Set the Output Idle state */
mbed_official	76:aeb1df146756	902	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 2);
mbed_official	76:aeb1df146756	903
mbed_official	76:aeb1df146756	904	if (TIMx == TIM1)
mbed_official	76:aeb1df146756	905	{
mbed_official	76:aeb1df146756	906	/* Check the parameters */
mbed_official	76:aeb1df146756	907	assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
mbed_official	76:aeb1df146756	908	assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity));
mbed_official	76:aeb1df146756	909	assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState));
mbed_official	76:aeb1df146756	910
mbed_official	76:aeb1df146756	911	/* Reset the Output N Polarity level */
mbed_official	76:aeb1df146756	912	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NP));
mbed_official	76:aeb1df146756	913	/* Set the Output N Polarity */
mbed_official	76:aeb1df146756	914	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4);
mbed_official	76:aeb1df146756	915
mbed_official	76:aeb1df146756	916	/* Reset the Output N State */
mbed_official	76:aeb1df146756	917	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NE));
mbed_official	76:aeb1df146756	918	/* Set the Output N State */
mbed_official	76:aeb1df146756	919	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 4);
mbed_official	76:aeb1df146756	920
mbed_official	76:aeb1df146756	921	/* Reset the Output Compare N IDLE State */
mbed_official	76:aeb1df146756	922	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2N));
mbed_official	76:aeb1df146756	923
mbed_official	76:aeb1df146756	924	/* Set the Output N Idle state */
mbed_official	76:aeb1df146756	925	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2);
mbed_official	76:aeb1df146756	926	}
mbed_official	76:aeb1df146756	927	}
mbed_official	76:aeb1df146756	928	/* Write to TIMx CR2 */
mbed_official	76:aeb1df146756	929	TIMx->CR2 = tmpcr2;
mbed_official	76:aeb1df146756	930
mbed_official	76:aeb1df146756	931	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	932	TIMx->CCMR1 = tmpccmrx;
mbed_official	76:aeb1df146756	933
mbed_official	76:aeb1df146756	934	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	935	TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	936
mbed_official	76:aeb1df146756	937	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	938	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	939	}
mbed_official	76:aeb1df146756	940
mbed_official	76:aeb1df146756	941	/**
mbed_official	76:aeb1df146756	942	* @brief Initializes the TIMx Channel3 according to the specified
mbed_official	76:aeb1df146756	943	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	944	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	945	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	946	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	947	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	948	* peripheral.
mbed_official	76:aeb1df146756	949	* @retval None
mbed_official	76:aeb1df146756	950	*/
mbed_official	76:aeb1df146756	951	void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	952	{
mbed_official	76:aeb1df146756	953	uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
mbed_official	76:aeb1df146756	954
mbed_official	76:aeb1df146756	955	/* Check the parameters */
mbed_official	76:aeb1df146756	956	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	957	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	958	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	959	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	960	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	76:aeb1df146756	961	TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC3E));
mbed_official	76:aeb1df146756	962
mbed_official	76:aeb1df146756	963	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	964	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	965	/* Get the TIMx CR2 register value */
mbed_official	76:aeb1df146756	966	tmpcr2 = TIMx->CR2;
mbed_official	76:aeb1df146756	967
mbed_official	76:aeb1df146756	968	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	969	tmpccmrx = TIMx->CCMR2;
mbed_official	76:aeb1df146756	970
mbed_official	76:aeb1df146756	971	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	76:aeb1df146756	972	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC3M));
mbed_official	76:aeb1df146756	973	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC3S));
mbed_official	76:aeb1df146756	974	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	975	tmpccmrx \|= TIM_OCInitStruct->TIM_OCMode;
mbed_official	76:aeb1df146756	976
mbed_official	76:aeb1df146756	977	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	978	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3P));
mbed_official	76:aeb1df146756	979	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	980	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 8);
mbed_official	76:aeb1df146756	981
mbed_official	76:aeb1df146756	982	/* Set the Output State */
mbed_official	76:aeb1df146756	983	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8);
mbed_official	76:aeb1df146756	984
mbed_official	76:aeb1df146756	985	if(TIMx == TIM1)
mbed_official	76:aeb1df146756	986	{
mbed_official	76:aeb1df146756	987	assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
mbed_official	76:aeb1df146756	988	assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity));
mbed_official	76:aeb1df146756	989	assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState));
mbed_official	76:aeb1df146756	990	assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
mbed_official	76:aeb1df146756	991
mbed_official	76:aeb1df146756	992	/* Reset the Output N Polarity level */
mbed_official	76:aeb1df146756	993	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NP));
mbed_official	76:aeb1df146756	994	/* Set the Output N Polarity */
mbed_official	76:aeb1df146756	995	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 8);
mbed_official	76:aeb1df146756	996	/* Reset the Output N State */
mbed_official	76:aeb1df146756	997	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NE));
mbed_official	76:aeb1df146756	998
mbed_official	76:aeb1df146756	999	/* Set the Output N State */
mbed_official	76:aeb1df146756	1000	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 8);
mbed_official	76:aeb1df146756	1001	/* Reset the Ouput Compare and Output Compare N IDLE State */
mbed_official	76:aeb1df146756	1002	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3));
mbed_official	76:aeb1df146756	1003	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3N));
mbed_official	76:aeb1df146756	1004	/* Set the Output Idle state */
mbed_official	76:aeb1df146756	1005	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 4);
mbed_official	76:aeb1df146756	1006	/* Set the Output N Idle state */
mbed_official	76:aeb1df146756	1007	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 4);
mbed_official	76:aeb1df146756	1008	}
mbed_official	76:aeb1df146756	1009	/* Write to TIMx CR2 */
mbed_official	76:aeb1df146756	1010	TIMx->CR2 = tmpcr2;
mbed_official	76:aeb1df146756	1011
mbed_official	76:aeb1df146756	1012	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1013	TIMx->CCMR2 = tmpccmrx;
mbed_official	76:aeb1df146756	1014
mbed_official	76:aeb1df146756	1015	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	1016	TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	1017
mbed_official	76:aeb1df146756	1018	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	1019	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1020	}
mbed_official	76:aeb1df146756	1021
mbed_official	76:aeb1df146756	1022	/**
mbed_official	76:aeb1df146756	1023	* @brief Initializes the TIMx Channel4 according to the specified
mbed_official	76:aeb1df146756	1024	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	1025	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1026	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1027	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	1028	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	1029	* peripheral.
mbed_official	76:aeb1df146756	1030	* @retval None
mbed_official	76:aeb1df146756	1031	*/
mbed_official	76:aeb1df146756	1032	void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	1033	{
mbed_official	76:aeb1df146756	1034	uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
mbed_official	76:aeb1df146756	1035
mbed_official	76:aeb1df146756	1036	/* Check the parameters */
mbed_official	76:aeb1df146756	1037	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1038	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	1039	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	1040	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	1041	/* Disable the Channel 2: Reset the CC4E Bit */
mbed_official	76:aeb1df146756	1042	TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC4E));
mbed_official	76:aeb1df146756	1043
mbed_official	76:aeb1df146756	1044	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	1045	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1046	/* Get the TIMx CR2 register value */
mbed_official	76:aeb1df146756	1047	tmpcr2 = TIMx->CR2;
mbed_official	76:aeb1df146756	1048
mbed_official	76:aeb1df146756	1049	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	1050	tmpccmrx = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1051
mbed_official	76:aeb1df146756	1052	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	76:aeb1df146756	1053	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC4M));
mbed_official	76:aeb1df146756	1054	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC4S));
mbed_official	76:aeb1df146756	1055
mbed_official	76:aeb1df146756	1056	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	1057	tmpccmrx \|= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
mbed_official	76:aeb1df146756	1058
mbed_official	76:aeb1df146756	1059	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	1060	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC4P));
mbed_official	76:aeb1df146756	1061	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	1062	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 12);
mbed_official	76:aeb1df146756	1063
mbed_official	76:aeb1df146756	1064	/* Set the Output State */
mbed_official	76:aeb1df146756	1065	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12);
mbed_official	76:aeb1df146756	1066
mbed_official	76:aeb1df146756	1067	if(TIMx == TIM1)
mbed_official	76:aeb1df146756	1068	{
mbed_official	76:aeb1df146756	1069	assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
mbed_official	76:aeb1df146756	1070	/* Reset the Ouput Compare IDLE State */
mbed_official	76:aeb1df146756	1071	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS4));
mbed_official	76:aeb1df146756	1072	/* Set the Output Idle state */
mbed_official	76:aeb1df146756	1073	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 6);
mbed_official	76:aeb1df146756	1074	}
mbed_official	76:aeb1df146756	1075	/* Write to TIMx CR2 */
mbed_official	76:aeb1df146756	1076	TIMx->CR2 = tmpcr2;
mbed_official	76:aeb1df146756	1077
mbed_official	76:aeb1df146756	1078	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1079	TIMx->CCMR2 = tmpccmrx;
mbed_official	76:aeb1df146756	1080
mbed_official	76:aeb1df146756	1081	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	1082	TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	1083
mbed_official	76:aeb1df146756	1084	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	1085	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1086	}
mbed_official	76:aeb1df146756	1087
mbed_official	76:aeb1df146756	1088	/**
mbed_official	76:aeb1df146756	1089	* @brief Fills each TIM_OCInitStruct member with its default value.
mbed_official	76:aeb1df146756	1090	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure which will
mbed_official	76:aeb1df146756	1091	* be initialized.
mbed_official	76:aeb1df146756	1092	* @retval None
mbed_official	76:aeb1df146756	1093	*/
mbed_official	76:aeb1df146756	1094	void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	1095	{
mbed_official	76:aeb1df146756	1096	/* Set the default configuration */
mbed_official	76:aeb1df146756	1097	TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing;
mbed_official	76:aeb1df146756	1098	TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable;
mbed_official	76:aeb1df146756	1099	TIM_OCInitStruct->TIM_OutputNState = TIM_OutputNState_Disable;
mbed_official	76:aeb1df146756	1100	TIM_OCInitStruct->TIM_Pulse = 0x0000000;
mbed_official	76:aeb1df146756	1101	TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High;
mbed_official	76:aeb1df146756	1102	TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High;
mbed_official	76:aeb1df146756	1103	TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset;
mbed_official	76:aeb1df146756	1104	TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset;
mbed_official	76:aeb1df146756	1105	}
mbed_official	76:aeb1df146756	1106
mbed_official	76:aeb1df146756	1107	/**
mbed_official	76:aeb1df146756	1108	* @brief Selects the TIM Output Compare Mode.
mbed_official	76:aeb1df146756	1109	* @note This function disables the selected channel before changing the Output
mbed_official	76:aeb1df146756	1110	* Compare Mode.
mbed_official	76:aeb1df146756	1111	* User has to enable this channel using TIM_CCxCmd and TIM_CCxNCmd functions.
mbed_official	76:aeb1df146756	1112	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1113	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1114	* @param TIM_Channel: specifies the TIM Channel
mbed_official	76:aeb1df146756	1115	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1116	* @arg TIM_Channel_1: TIM Channel 1
mbed_official	76:aeb1df146756	1117	* @arg TIM_Channel_2: TIM Channel 2
mbed_official	76:aeb1df146756	1118	* @arg TIM_Channel_3: TIM Channel 3
mbed_official	76:aeb1df146756	1119	* @arg TIM_Channel_4: TIM Channel 4
mbed_official	76:aeb1df146756	1120	* @param TIM_OCMode: specifies the TIM Output Compare Mode.
mbed_official	76:aeb1df146756	1121	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1122	* @arg TIM_OCMode_Timing
mbed_official	76:aeb1df146756	1123	* @arg TIM_OCMode_Active
mbed_official	76:aeb1df146756	1124	* @arg TIM_OCMode_Toggle
mbed_official	76:aeb1df146756	1125	* @arg TIM_OCMode_PWM1
mbed_official	76:aeb1df146756	1126	* @arg TIM_OCMode_PWM2
mbed_official	76:aeb1df146756	1127	* @arg TIM_ForcedAction_Active
mbed_official	76:aeb1df146756	1128	* @arg TIM_ForcedAction_InActive
mbed_official	76:aeb1df146756	1129	* @retval None
mbed_official	76:aeb1df146756	1130	*/
mbed_official	76:aeb1df146756	1131	void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode)
mbed_official	76:aeb1df146756	1132	{
mbed_official	76:aeb1df146756	1133	uint32_t tmp = 0;
mbed_official	76:aeb1df146756	1134	uint16_t tmp1 = 0;
mbed_official	76:aeb1df146756	1135
mbed_official	76:aeb1df146756	1136	/* Check the parameters */
mbed_official	76:aeb1df146756	1137	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1138	assert_param(IS_TIM_OCM(TIM_OCMode));
mbed_official	76:aeb1df146756	1139
mbed_official	76:aeb1df146756	1140	tmp = (uint32_t) TIMx;
mbed_official	76:aeb1df146756	1141	tmp += CCMR_OFFSET;
mbed_official	76:aeb1df146756	1142
mbed_official	76:aeb1df146756	1143	tmp1 = CCER_CCE_SET << (uint16_t)TIM_Channel;
mbed_official	76:aeb1df146756	1144
mbed_official	76:aeb1df146756	1145	/* Disable the Channel: Reset the CCxE Bit */
mbed_official	76:aeb1df146756	1146	TIMx->CCER &= (uint16_t) ~tmp1;
mbed_official	76:aeb1df146756	1147
mbed_official	76:aeb1df146756	1148	if((TIM_Channel == TIM_Channel_1) \|\|(TIM_Channel == TIM_Channel_3))
mbed_official	76:aeb1df146756	1149	{
mbed_official	76:aeb1df146756	1150	tmp += (TIM_Channel>>1);
mbed_official	76:aeb1df146756	1151
mbed_official	76:aeb1df146756	1152	/* Reset the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	1153	(__IO uint32_t ) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC1M);
mbed_official	76:aeb1df146756	1154
mbed_official	76:aeb1df146756	1155	/* Configure the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	1156	(__IO uint32_t ) tmp \|= TIM_OCMode;
mbed_official	76:aeb1df146756	1157	}
mbed_official	76:aeb1df146756	1158	else
mbed_official	76:aeb1df146756	1159	{
mbed_official	76:aeb1df146756	1160	tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1;
mbed_official	76:aeb1df146756	1161
mbed_official	76:aeb1df146756	1162	/* Reset the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	1163	(__IO uint32_t ) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC2M);
mbed_official	76:aeb1df146756	1164
mbed_official	76:aeb1df146756	1165	/* Configure the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	1166	(__IO uint32_t ) tmp \|= (uint16_t)(TIM_OCMode << 8);
mbed_official	76:aeb1df146756	1167	}
mbed_official	76:aeb1df146756	1168	}
mbed_official	76:aeb1df146756	1169
mbed_official	76:aeb1df146756	1170	/**
mbed_official	76:aeb1df146756	1171	* @brief Sets the TIMx Capture Compare1 Register value
mbed_official	76:aeb1df146756	1172	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1173	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1174	* @param Compare1: specifies the Capture Compare1 register new value.
mbed_official	76:aeb1df146756	1175	* @retval None
mbed_official	76:aeb1df146756	1176	*/
mbed_official	76:aeb1df146756	1177	void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1)
mbed_official	76:aeb1df146756	1178	{
mbed_official	76:aeb1df146756	1179	/* Check the parameters */
mbed_official	76:aeb1df146756	1180	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1181
mbed_official	76:aeb1df146756	1182	/* Set the Capture Compare1 Register value */
mbed_official	76:aeb1df146756	1183	TIMx->CCR1 = Compare1;
mbed_official	76:aeb1df146756	1184	}
mbed_official	76:aeb1df146756	1185
mbed_official	76:aeb1df146756	1186	/**
mbed_official	76:aeb1df146756	1187	* @brief Sets the TIMx Capture Compare2 Register value
mbed_official	76:aeb1df146756	1188	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1189	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1190	* @param Compare2: specifies the Capture Compare2 register new value.
mbed_official	76:aeb1df146756	1191	* @retval None
mbed_official	76:aeb1df146756	1192	*/
mbed_official	76:aeb1df146756	1193	void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2)
mbed_official	76:aeb1df146756	1194	{
mbed_official	76:aeb1df146756	1195	/* Check the parameters */
mbed_official	76:aeb1df146756	1196	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1197
mbed_official	76:aeb1df146756	1198	/* Set the Capture Compare2 Register value */
mbed_official	76:aeb1df146756	1199	TIMx->CCR2 = Compare2;
mbed_official	76:aeb1df146756	1200	}
mbed_official	76:aeb1df146756	1201
mbed_official	76:aeb1df146756	1202	/**
mbed_official	76:aeb1df146756	1203	* @brief Sets the TIMx Capture Compare3 Register value
mbed_official	76:aeb1df146756	1204	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1205	* @param Compare3: specifies the Capture Compare3 register new value.
mbed_official	76:aeb1df146756	1206	* @retval None
mbed_official	76:aeb1df146756	1207	*/
mbed_official	76:aeb1df146756	1208	void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3)
mbed_official	76:aeb1df146756	1209	{
mbed_official	76:aeb1df146756	1210	/* Check the parameters */
mbed_official	76:aeb1df146756	1211	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1212
mbed_official	76:aeb1df146756	1213	/* Set the Capture Compare3 Register value */
mbed_official	76:aeb1df146756	1214	TIMx->CCR3 = Compare3;
mbed_official	76:aeb1df146756	1215	}
mbed_official	76:aeb1df146756	1216
mbed_official	76:aeb1df146756	1217	/**
mbed_official	76:aeb1df146756	1218	* @brief Sets the TIMx Capture Compare4 Register value
mbed_official	76:aeb1df146756	1219	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1220	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1221	* @param Compare4: specifies the Capture Compare4 register new value.
mbed_official	76:aeb1df146756	1222	* @retval None
mbed_official	76:aeb1df146756	1223	*/
mbed_official	76:aeb1df146756	1224	void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4)
mbed_official	76:aeb1df146756	1225	{
mbed_official	76:aeb1df146756	1226	/* Check the parameters */
mbed_official	76:aeb1df146756	1227	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1228
mbed_official	76:aeb1df146756	1229	/* Set the Capture Compare4 Register value */
mbed_official	76:aeb1df146756	1230	TIMx->CCR4 = Compare4;
mbed_official	76:aeb1df146756	1231	}
mbed_official	76:aeb1df146756	1232
mbed_official	76:aeb1df146756	1233	/**
mbed_official	76:aeb1df146756	1234	* @brief Forces the TIMx output 1 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1235	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1236	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1237	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1238	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1239	* @arg TIM_ForcedAction_Active: Force active level on OC1REF
mbed_official	76:aeb1df146756	1240	* @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF.
mbed_official	76:aeb1df146756	1241	* @retval None
mbed_official	76:aeb1df146756	1242	*/
mbed_official	76:aeb1df146756	1243	void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1244	{
mbed_official	76:aeb1df146756	1245	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1246	/* Check the parameters */
mbed_official	76:aeb1df146756	1247	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1248	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1249	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1250	/* Reset the OC1M Bits */
mbed_official	76:aeb1df146756	1251	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1M);
mbed_official	76:aeb1df146756	1252	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1253	tmpccmr1 \|= TIM_ForcedAction;
mbed_official	76:aeb1df146756	1254	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1255	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1256	}
mbed_official	76:aeb1df146756	1257
mbed_official	76:aeb1df146756	1258	/**
mbed_official	76:aeb1df146756	1259	* @brief Forces the TIMx output 2 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1260	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1261	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1262	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1263	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1264	* @arg TIM_ForcedAction_Active: Force active level on OC2REF
mbed_official	76:aeb1df146756	1265	* @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF.
mbed_official	76:aeb1df146756	1266	* @retval None
mbed_official	76:aeb1df146756	1267	*/
mbed_official	76:aeb1df146756	1268	void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1269	{
mbed_official	76:aeb1df146756	1270	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1271
mbed_official	76:aeb1df146756	1272	/* Check the parameters */
mbed_official	76:aeb1df146756	1273	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1274	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1275
mbed_official	76:aeb1df146756	1276	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1277	/* Reset the OC2M Bits */
mbed_official	76:aeb1df146756	1278	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2M);
mbed_official	76:aeb1df146756	1279	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1280	tmpccmr1 \|= (uint16_t)(TIM_ForcedAction << 8);
mbed_official	76:aeb1df146756	1281	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1282	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1283	}
mbed_official	76:aeb1df146756	1284
mbed_official	76:aeb1df146756	1285	/**
mbed_official	76:aeb1df146756	1286	* @brief Forces the TIMx output 3 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1287	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1288	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1289	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1290	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1291	* @arg TIM_ForcedAction_Active: Force active level on OC3REF
mbed_official	76:aeb1df146756	1292	* @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF.
mbed_official	76:aeb1df146756	1293	* @retval None
mbed_official	76:aeb1df146756	1294	*/
mbed_official	76:aeb1df146756	1295	void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1296	{
mbed_official	76:aeb1df146756	1297	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1298
mbed_official	76:aeb1df146756	1299	/* Check the parameters */
mbed_official	76:aeb1df146756	1300	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1301	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1302
mbed_official	76:aeb1df146756	1303	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1304	/* Reset the OC1M Bits */
mbed_official	76:aeb1df146756	1305	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3M);
mbed_official	76:aeb1df146756	1306	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1307	tmpccmr2 \|= TIM_ForcedAction;
mbed_official	76:aeb1df146756	1308	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1309	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1310	}
mbed_official	76:aeb1df146756	1311
mbed_official	76:aeb1df146756	1312	/**
mbed_official	76:aeb1df146756	1313	* @brief Forces the TIMx output 4 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1314	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1315	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1316	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1317	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1318	* @arg TIM_ForcedAction_Active: Force active level on OC4REF
mbed_official	76:aeb1df146756	1319	* @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF.
mbed_official	76:aeb1df146756	1320	* @retval None
mbed_official	76:aeb1df146756	1321	*/
mbed_official	76:aeb1df146756	1322	void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1323	{
mbed_official	76:aeb1df146756	1324	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1325	/* Check the parameters */
mbed_official	76:aeb1df146756	1326	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1327	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1328
mbed_official	76:aeb1df146756	1329	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1330	/* Reset the OC2M Bits */
mbed_official	76:aeb1df146756	1331	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4M);
mbed_official	76:aeb1df146756	1332	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1333	tmpccmr2 \|= (uint16_t)(TIM_ForcedAction << 8);
mbed_official	76:aeb1df146756	1334	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1335	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1336	}
mbed_official	76:aeb1df146756	1337
mbed_official	76:aeb1df146756	1338	/**
mbed_official	76:aeb1df146756	1339	* @brief Sets or Resets the TIM peripheral Capture Compare Preload Control bit.
mbed_official	76:aeb1df146756	1340	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIMx peripheral
mbed_official	76:aeb1df146756	1341	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1342	* @param NewState: new state of the Capture Compare Preload Control bit
mbed_official	76:aeb1df146756	1343	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	1344	* @retval None
mbed_official	76:aeb1df146756	1345	*/
mbed_official	76:aeb1df146756	1346	void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	1347	{
mbed_official	76:aeb1df146756	1348	/* Check the parameters */
mbed_official	76:aeb1df146756	1349	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1350	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	1351	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	1352	{
mbed_official	76:aeb1df146756	1353	/* Set the CCPC Bit */
mbed_official	76:aeb1df146756	1354	TIMx->CR2 \|= TIM_CR2_CCPC;
mbed_official	76:aeb1df146756	1355	}
mbed_official	76:aeb1df146756	1356	else
mbed_official	76:aeb1df146756	1357	{
mbed_official	76:aeb1df146756	1358	/* Reset the CCPC Bit */
mbed_official	76:aeb1df146756	1359	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCPC);
mbed_official	76:aeb1df146756	1360	}
mbed_official	76:aeb1df146756	1361	}
mbed_official	76:aeb1df146756	1362
mbed_official	76:aeb1df146756	1363
mbed_official	76:aeb1df146756	1364	/**
mbed_official	76:aeb1df146756	1365	* @brief Enables or disables the TIMx peripheral Preload register on CCR1.
mbed_official	76:aeb1df146756	1366	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1367	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1368	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	1369	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1370	* @arg TIM_OCPreload_Enable
mbed_official	76:aeb1df146756	1371	* @arg TIM_OCPreload_Disable
mbed_official	76:aeb1df146756	1372	* @retval None
mbed_official	76:aeb1df146756	1373	*/
mbed_official	76:aeb1df146756	1374	void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1375	{
mbed_official	76:aeb1df146756	1376	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1377	/* Check the parameters */
mbed_official	76:aeb1df146756	1378	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1379	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1380
mbed_official	76:aeb1df146756	1381	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1382	/* Reset the OC1PE Bit */
mbed_official	76:aeb1df146756	1383	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1PE);
mbed_official	76:aeb1df146756	1384	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1385	tmpccmr1 \|= TIM_OCPreload;
mbed_official	76:aeb1df146756	1386	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1387	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1388	}
mbed_official	76:aeb1df146756	1389
mbed_official	76:aeb1df146756	1390	/**
mbed_official	76:aeb1df146756	1391	* @brief Enables or disables the TIMx peripheral Preload register on CCR2.
mbed_official	76:aeb1df146756	1392	* @param TIMx: where x can be 1, 2, 3 and 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1393	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1394	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	1395	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1396	* @arg TIM_OCPreload_Enable
mbed_official	76:aeb1df146756	1397	* @arg TIM_OCPreload_Disable
mbed_official	76:aeb1df146756	1398	* @retval None
mbed_official	76:aeb1df146756	1399	*/
mbed_official	76:aeb1df146756	1400	void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1401	{
mbed_official	76:aeb1df146756	1402	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1403	/* Check the parameters */
mbed_official	76:aeb1df146756	1404	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1405	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1406
mbed_official	76:aeb1df146756	1407	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1408	/* Reset the OC2PE Bit */
mbed_official	76:aeb1df146756	1409	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2PE);
mbed_official	76:aeb1df146756	1410	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1411	tmpccmr1 \|= (uint16_t)(TIM_OCPreload << 8);
mbed_official	76:aeb1df146756	1412	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1413	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1414	}
mbed_official	76:aeb1df146756	1415
mbed_official	76:aeb1df146756	1416	/**
mbed_official	76:aeb1df146756	1417	* @brief Enables or disables the TIMx peripheral Preload register on CCR3.
mbed_official	76:aeb1df146756	1418	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1419	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1420	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	1421	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1422	* @arg TIM_OCPreload_Enable
mbed_official	76:aeb1df146756	1423	* @arg TIM_OCPreload_Disable
mbed_official	76:aeb1df146756	1424	* @retval None
mbed_official	76:aeb1df146756	1425	*/
mbed_official	76:aeb1df146756	1426	void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1427	{
mbed_official	76:aeb1df146756	1428	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1429
mbed_official	76:aeb1df146756	1430	/* Check the parameters */
mbed_official	76:aeb1df146756	1431	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1432	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1433
mbed_official	76:aeb1df146756	1434	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1435	/* Reset the OC3PE Bit */
mbed_official	76:aeb1df146756	1436	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3PE);
mbed_official	76:aeb1df146756	1437	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1438	tmpccmr2 \|= TIM_OCPreload;
mbed_official	76:aeb1df146756	1439	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1440	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1441	}
mbed_official	76:aeb1df146756	1442
mbed_official	76:aeb1df146756	1443	/**
mbed_official	76:aeb1df146756	1444	* @brief Enables or disables the TIMx peripheral Preload register on CCR4.
mbed_official	76:aeb1df146756	1445	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1446	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1447	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	1448	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1449	* @arg TIM_OCPreload_Enable
mbed_official	76:aeb1df146756	1450	* @arg TIM_OCPreload_Disable
mbed_official	76:aeb1df146756	1451	* @retval None
mbed_official	76:aeb1df146756	1452	*/
mbed_official	76:aeb1df146756	1453	void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1454	{
mbed_official	76:aeb1df146756	1455	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1456
mbed_official	76:aeb1df146756	1457	/* Check the parameters */
mbed_official	76:aeb1df146756	1458	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1459	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1460
mbed_official	76:aeb1df146756	1461	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1462	/* Reset the OC4PE Bit */
mbed_official	76:aeb1df146756	1463	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4PE);
mbed_official	76:aeb1df146756	1464	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1465	tmpccmr2 \|= (uint16_t)(TIM_OCPreload << 8);
mbed_official	76:aeb1df146756	1466	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1467	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1468	}
mbed_official	76:aeb1df146756	1469
mbed_official	76:aeb1df146756	1470	/**
mbed_official	76:aeb1df146756	1471	* @brief Configures the TIMx Output Compare 1 Fast feature.
mbed_official	76:aeb1df146756	1472	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1473	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1474	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1475	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1476	* @arg TIM_OCFast_Enable: TIM output compare fast enable
mbed_official	76:aeb1df146756	1477	* @arg TIM_OCFast_Disable: TIM output compare fast disable
mbed_official	76:aeb1df146756	1478	* @retval None
mbed_official	76:aeb1df146756	1479	*/
mbed_official	76:aeb1df146756	1480	void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1481	{
mbed_official	76:aeb1df146756	1482	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1483
mbed_official	76:aeb1df146756	1484	/* Check the parameters */
mbed_official	76:aeb1df146756	1485	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1486	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1487
mbed_official	76:aeb1df146756	1488	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	1489	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1490	/* Reset the OC1FE Bit */
mbed_official	76:aeb1df146756	1491	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1FE);
mbed_official	76:aeb1df146756	1492	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1493	tmpccmr1 \|= TIM_OCFast;
mbed_official	76:aeb1df146756	1494	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	1495	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1496	}
mbed_official	76:aeb1df146756	1497
mbed_official	76:aeb1df146756	1498	/**
mbed_official	76:aeb1df146756	1499	* @brief Configures the TIMx Output Compare 2 Fast feature.
mbed_official	76:aeb1df146756	1500	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1501	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1502	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1503	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1504	* @arg TIM_OCFast_Enable: TIM output compare fast enable
mbed_official	76:aeb1df146756	1505	* @arg TIM_OCFast_Disable: TIM output compare fast disable
mbed_official	76:aeb1df146756	1506	* @retval None
mbed_official	76:aeb1df146756	1507	*/
mbed_official	76:aeb1df146756	1508	void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1509	{
mbed_official	76:aeb1df146756	1510	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1511
mbed_official	76:aeb1df146756	1512	/* Check the parameters */
mbed_official	76:aeb1df146756	1513	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1514	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1515
mbed_official	76:aeb1df146756	1516	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	1517	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1518	/* Reset the OC2FE Bit */
mbed_official	76:aeb1df146756	1519	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2FE);
mbed_official	76:aeb1df146756	1520	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1521	tmpccmr1 \|= (uint16_t)(TIM_OCFast << 8);
mbed_official	76:aeb1df146756	1522	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	1523	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1524	}
mbed_official	76:aeb1df146756	1525
mbed_official	76:aeb1df146756	1526	/**
mbed_official	76:aeb1df146756	1527	* @brief Configures the TIMx Output Compare 3 Fast feature.
mbed_official	76:aeb1df146756	1528	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1529	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1530	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1531	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1532	* @arg TIM_OCFast_Enable: TIM output compare fast enable
mbed_official	76:aeb1df146756	1533	* @arg TIM_OCFast_Disable: TIM output compare fast disable
mbed_official	76:aeb1df146756	1534	* @retval None
mbed_official	76:aeb1df146756	1535	*/
mbed_official	76:aeb1df146756	1536	void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1537	{
mbed_official	76:aeb1df146756	1538	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1539
mbed_official	76:aeb1df146756	1540	/* Check the parameters */
mbed_official	76:aeb1df146756	1541	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1542	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1543
mbed_official	76:aeb1df146756	1544	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	1545	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1546	/* Reset the OC3FE Bit */
mbed_official	76:aeb1df146756	1547	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3FE);
mbed_official	76:aeb1df146756	1548	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1549	tmpccmr2 \|= TIM_OCFast;
mbed_official	76:aeb1df146756	1550	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1551	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1552	}
mbed_official	76:aeb1df146756	1553
mbed_official	76:aeb1df146756	1554	/**
mbed_official	76:aeb1df146756	1555	* @brief Configures the TIMx Output Compare 4 Fast feature.
mbed_official	76:aeb1df146756	1556	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1557	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1558	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1559	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1560	* @arg TIM_OCFast_Enable: TIM output compare fast enable
mbed_official	76:aeb1df146756	1561	* @arg TIM_OCFast_Disable: TIM output compare fast disable
mbed_official	76:aeb1df146756	1562	* @retval None
mbed_official	76:aeb1df146756	1563	*/
mbed_official	76:aeb1df146756	1564	void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1565	{
mbed_official	76:aeb1df146756	1566	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1567
mbed_official	76:aeb1df146756	1568	/* Check the parameters */
mbed_official	76:aeb1df146756	1569	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1570	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1571
mbed_official	76:aeb1df146756	1572	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	1573	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1574	/* Reset the OC4FE Bit */
mbed_official	76:aeb1df146756	1575	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4FE);
mbed_official	76:aeb1df146756	1576	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1577	tmpccmr2 \|= (uint16_t)(TIM_OCFast << 8);
mbed_official	76:aeb1df146756	1578	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1579	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1580	}
mbed_official	76:aeb1df146756	1581
mbed_official	76:aeb1df146756	1582	/**
mbed_official	76:aeb1df146756	1583	* @brief Clears or safeguards the OCREF1 signal on an external event
mbed_official	76:aeb1df146756	1584	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1585	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1586	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1587	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1588	* @arg TIM_OCClear_Enable: TIM Output clear enable
mbed_official	76:aeb1df146756	1589	* @arg TIM_OCClear_Disable: TIM Output clear disable
mbed_official	76:aeb1df146756	1590	* @retval None
mbed_official	76:aeb1df146756	1591	*/
mbed_official	76:aeb1df146756	1592	void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1593	{
mbed_official	76:aeb1df146756	1594	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1595
mbed_official	76:aeb1df146756	1596	/* Check the parameters */
mbed_official	76:aeb1df146756	1597	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1598	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1599
mbed_official	76:aeb1df146756	1600	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1601	/* Reset the OC1CE Bit */
mbed_official	76:aeb1df146756	1602	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1CE);
mbed_official	76:aeb1df146756	1603	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1604	tmpccmr1 \|= TIM_OCClear;
mbed_official	76:aeb1df146756	1605	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1606	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1607	}
mbed_official	76:aeb1df146756	1608
mbed_official	76:aeb1df146756	1609	/**
mbed_official	76:aeb1df146756	1610	* @brief Clears or safeguards the OCREF2 signal on an external event
mbed_official	76:aeb1df146756	1611	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1612	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1613	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1614	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1615	* @arg TIM_OCClear_Enable: TIM Output clear enable
mbed_official	76:aeb1df146756	1616	* @arg TIM_OCClear_Disable: TIM Output clear disable
mbed_official	76:aeb1df146756	1617	* @retval None
mbed_official	76:aeb1df146756	1618	*/
mbed_official	76:aeb1df146756	1619	void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1620	{
mbed_official	76:aeb1df146756	1621	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1622
mbed_official	76:aeb1df146756	1623	/* Check the parameters */
mbed_official	76:aeb1df146756	1624	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1625	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1626
mbed_official	76:aeb1df146756	1627	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1628	/* Reset the OC2CE Bit */
mbed_official	76:aeb1df146756	1629	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2CE);
mbed_official	76:aeb1df146756	1630	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1631	tmpccmr1 \|= (uint16_t)(TIM_OCClear << 8);
mbed_official	76:aeb1df146756	1632	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1633	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1634	}
mbed_official	76:aeb1df146756	1635
mbed_official	76:aeb1df146756	1636	/**
mbed_official	76:aeb1df146756	1637	* @brief Clears or safeguards the OCREF3 signal on an external event
mbed_official	76:aeb1df146756	1638	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1639	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1640	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1641	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1642	* @arg TIM_OCClear_Enable: TIM Output clear enable
mbed_official	76:aeb1df146756	1643	* @arg TIM_OCClear_Disable: TIM Output clear disable
mbed_official	76:aeb1df146756	1644	* @retval None
mbed_official	76:aeb1df146756	1645	*/
mbed_official	76:aeb1df146756	1646	void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1647	{
mbed_official	76:aeb1df146756	1648	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1649
mbed_official	76:aeb1df146756	1650	/* Check the parameters */
mbed_official	76:aeb1df146756	1651	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1652	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1653
mbed_official	76:aeb1df146756	1654	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1655	/* Reset the OC3CE Bit */
mbed_official	76:aeb1df146756	1656	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3CE);
mbed_official	76:aeb1df146756	1657	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1658	tmpccmr2 \|= TIM_OCClear;
mbed_official	76:aeb1df146756	1659	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1660	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1661	}
mbed_official	76:aeb1df146756	1662
mbed_official	76:aeb1df146756	1663	/**
mbed_official	76:aeb1df146756	1664	* @brief Clears or safeguards the OCREF4 signal on an external event
mbed_official	76:aeb1df146756	1665	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1666	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1667	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1668	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1669	* @arg TIM_OCClear_Enable: TIM Output clear enable
mbed_official	76:aeb1df146756	1670	* @arg TIM_OCClear_Disable: TIM Output clear disable
mbed_official	76:aeb1df146756	1671	* @retval None
mbed_official	76:aeb1df146756	1672	*/
mbed_official	76:aeb1df146756	1673	void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1674	{
mbed_official	76:aeb1df146756	1675	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1676
mbed_official	76:aeb1df146756	1677	/* Check the parameters */
mbed_official	76:aeb1df146756	1678	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1679	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1680
mbed_official	76:aeb1df146756	1681	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1682	/* Reset the OC4CE Bit */
mbed_official	76:aeb1df146756	1683	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4CE);
mbed_official	76:aeb1df146756	1684	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1685	tmpccmr2 \|= (uint16_t)(TIM_OCClear << 8);
mbed_official	76:aeb1df146756	1686	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1687	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1688	}
mbed_official	76:aeb1df146756	1689
mbed_official	76:aeb1df146756	1690	/**
mbed_official	76:aeb1df146756	1691	* @brief Configures the TIMx channel 1 polarity.
mbed_official	76:aeb1df146756	1692	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1693	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1694	* @param TIM_OCPolarity: specifies the OC1 Polarity
mbed_official	76:aeb1df146756	1695	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1696	* @arg TIM_OCPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1697	* @arg TIM_OCPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1698	* @retval None
mbed_official	76:aeb1df146756	1699	*/
mbed_official	76:aeb1df146756	1700	void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1701	{
mbed_official	76:aeb1df146756	1702	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1703
mbed_official	76:aeb1df146756	1704	/* Check the parameters */
mbed_official	76:aeb1df146756	1705	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1706	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1707
mbed_official	76:aeb1df146756	1708	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1709	/* Set or Reset the CC1P Bit */
mbed_official	76:aeb1df146756	1710	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P);
mbed_official	76:aeb1df146756	1711	tmpccer \|= TIM_OCPolarity;
mbed_official	76:aeb1df146756	1712	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1713	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1714	}
mbed_official	76:aeb1df146756	1715
mbed_official	76:aeb1df146756	1716	/**
mbed_official	76:aeb1df146756	1717	* @brief Configures the TIMx Channel 1N polarity.
mbed_official	76:aeb1df146756	1718	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1719	* @param TIM_OCNPolarity: specifies the OC1N Polarity
mbed_official	76:aeb1df146756	1720	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1721	* @arg TIM_OCNPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1722	* @arg TIM_OCNPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1723	* @retval None
mbed_official	76:aeb1df146756	1724	*/
mbed_official	76:aeb1df146756	1725	void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity)
mbed_official	76:aeb1df146756	1726	{
mbed_official	76:aeb1df146756	1727	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1728	/* Check the parameters */
mbed_official	76:aeb1df146756	1729	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1730	assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity));
mbed_official	76:aeb1df146756	1731
mbed_official	76:aeb1df146756	1732	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1733	/* Set or Reset the CC1NP Bit */
mbed_official	76:aeb1df146756	1734	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1NP);
mbed_official	76:aeb1df146756	1735	tmpccer \|= TIM_OCNPolarity;
mbed_official	76:aeb1df146756	1736	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1737	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1738	}
mbed_official	76:aeb1df146756	1739
mbed_official	76:aeb1df146756	1740	/**
mbed_official	76:aeb1df146756	1741	* @brief Configures the TIMx channel 2 polarity.
mbed_official	76:aeb1df146756	1742	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1743	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1744	* @param TIM_OCPolarity: specifies the OC2 Polarity
mbed_official	76:aeb1df146756	1745	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1746	* @arg TIM_OCPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1747	* @arg TIM_OCPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1748	* @retval None
mbed_official	76:aeb1df146756	1749	*/
mbed_official	76:aeb1df146756	1750	void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1751	{
mbed_official	76:aeb1df146756	1752	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1753
mbed_official	76:aeb1df146756	1754	/* Check the parameters */
mbed_official	76:aeb1df146756	1755	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1756	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1757
mbed_official	76:aeb1df146756	1758	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1759	/* Set or Reset the CC2P Bit */
mbed_official	76:aeb1df146756	1760	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2P);
mbed_official	76:aeb1df146756	1761	tmpccer \|= (uint16_t)(TIM_OCPolarity << 4);
mbed_official	76:aeb1df146756	1762	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1763	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1764	}
mbed_official	76:aeb1df146756	1765
mbed_official	76:aeb1df146756	1766	/**
mbed_official	76:aeb1df146756	1767	* @brief Configures the TIMx Channel 2N polarity.
mbed_official	76:aeb1df146756	1768	* @param TIMx: where x can be 1 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1769	* @param TIM_OCNPolarity: specifies the OC2N Polarity
mbed_official	76:aeb1df146756	1770	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1771	* @arg TIM_OCNPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1772	* @arg TIM_OCNPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1773	* @retval None
mbed_official	76:aeb1df146756	1774	*/
mbed_official	76:aeb1df146756	1775	void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity)
mbed_official	76:aeb1df146756	1776	{
mbed_official	76:aeb1df146756	1777	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1778	/* Check the parameters */
mbed_official	76:aeb1df146756	1779	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1780	assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity));
mbed_official	76:aeb1df146756	1781
mbed_official	76:aeb1df146756	1782	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1783	/* Set or Reset the CC2NP Bit */
mbed_official	76:aeb1df146756	1784	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2NP);
mbed_official	76:aeb1df146756	1785	tmpccer \|= (uint16_t)(TIM_OCNPolarity << 4);
mbed_official	76:aeb1df146756	1786	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1787	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1788	}
mbed_official	76:aeb1df146756	1789
mbed_official	76:aeb1df146756	1790	/**
mbed_official	76:aeb1df146756	1791	* @brief Configures the TIMx channel 3 polarity.
mbed_official	76:aeb1df146756	1792	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1793	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1794	* @param TIM_OCPolarity: specifies the OC3 Polarity
mbed_official	76:aeb1df146756	1795	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1796	* @arg TIM_OCPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1797	* @arg TIM_OCPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1798	* @retval None
mbed_official	76:aeb1df146756	1799	*/
mbed_official	76:aeb1df146756	1800	void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1801	{
mbed_official	76:aeb1df146756	1802	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1803
mbed_official	76:aeb1df146756	1804	/* Check the parameters */
mbed_official	76:aeb1df146756	1805	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1806	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1807
mbed_official	76:aeb1df146756	1808	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1809	/* Set or Reset the CC3P Bit */
mbed_official	76:aeb1df146756	1810	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3P);
mbed_official	76:aeb1df146756	1811	tmpccer \|= (uint16_t)(TIM_OCPolarity << 8);
mbed_official	76:aeb1df146756	1812	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1813	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1814	}
mbed_official	76:aeb1df146756	1815
mbed_official	76:aeb1df146756	1816	/**
mbed_official	76:aeb1df146756	1817	* @brief Configures the TIMx Channel 3N polarity.
mbed_official	76:aeb1df146756	1818	* @param TIMx: where x can be 1 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1819	* @param TIM_OCNPolarity: specifies the OC3N Polarity
mbed_official	76:aeb1df146756	1820	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1821	* @arg TIM_OCNPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1822	* @arg TIM_OCNPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1823	* @retval None
mbed_official	76:aeb1df146756	1824	*/
mbed_official	76:aeb1df146756	1825	void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity)
mbed_official	76:aeb1df146756	1826	{
mbed_official	76:aeb1df146756	1827	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1828
mbed_official	76:aeb1df146756	1829	/* Check the parameters */
mbed_official	76:aeb1df146756	1830	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1831	assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity));
mbed_official	76:aeb1df146756	1832
mbed_official	76:aeb1df146756	1833	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1834	/* Set or Reset the CC3NP Bit */
mbed_official	76:aeb1df146756	1835	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3NP);
mbed_official	76:aeb1df146756	1836	tmpccer \|= (uint16_t)(TIM_OCNPolarity << 8);
mbed_official	76:aeb1df146756	1837	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1838	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1839	}
mbed_official	76:aeb1df146756	1840
mbed_official	76:aeb1df146756	1841	/**
mbed_official	76:aeb1df146756	1842	* @brief Configures the TIMx channel 4 polarity.
mbed_official	76:aeb1df146756	1843	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1844	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1845	* @param TIM_OCPolarity: specifies the OC4 Polarity
mbed_official	76:aeb1df146756	1846	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1847	* @arg TIM_OCPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1848	* @arg TIM_OCPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1849	* @retval None
mbed_official	76:aeb1df146756	1850	*/
mbed_official	76:aeb1df146756	1851	void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1852	{
mbed_official	76:aeb1df146756	1853	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1854
mbed_official	76:aeb1df146756	1855	/* Check the parameters */
mbed_official	76:aeb1df146756	1856	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1857	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1858
mbed_official	76:aeb1df146756	1859	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1860	/* Set or Reset the CC4P Bit */
mbed_official	76:aeb1df146756	1861	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC4P);
mbed_official	76:aeb1df146756	1862	tmpccer \|= (uint16_t)(TIM_OCPolarity << 12);
mbed_official	76:aeb1df146756	1863	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1864	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1865	}
mbed_official	76:aeb1df146756	1866
mbed_official	76:aeb1df146756	1867	/**
mbed_official	76:aeb1df146756	1868	* @brief Selects the OCReference Clear source.
mbed_official	76:aeb1df146756	1869	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1870	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1871	* @param TIM_OCReferenceClear: specifies the OCReference Clear source.
mbed_official	76:aeb1df146756	1872	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1873	* @arg TIM_OCReferenceClear_ETRF: The internal OCreference clear input is connected to ETRF.
mbed_official	76:aeb1df146756	1874	* @arg TIM_OCReferenceClear_OCREFCLR: The internal OCreference clear input is connected to OCREF_CLR input.
mbed_official	76:aeb1df146756	1875	* @retval None
mbed_official	76:aeb1df146756	1876	*/
mbed_official	76:aeb1df146756	1877	void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear)
mbed_official	76:aeb1df146756	1878	{
mbed_official	76:aeb1df146756	1879	/* Check the parameters */
mbed_official	76:aeb1df146756	1880	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1881	assert_param(TIM_OCREFERENCECECLEAR_SOURCE(TIM_OCReferenceClear));
mbed_official	76:aeb1df146756	1882
mbed_official	76:aeb1df146756	1883	/* Set the TIM_OCReferenceClear source */
mbed_official	76:aeb1df146756	1884	TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_OCCS);
mbed_official	76:aeb1df146756	1885	TIMx->SMCR \|= TIM_OCReferenceClear;
mbed_official	76:aeb1df146756	1886	}
mbed_official	76:aeb1df146756	1887
mbed_official	76:aeb1df146756	1888	/**
mbed_official	76:aeb1df146756	1889	* @brief Enables or disables the TIM Capture Compare Channel x.
mbed_official	76:aeb1df146756	1890	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1891	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1892	* @param TIM_Channel: specifies the TIM Channel
mbed_official	76:aeb1df146756	1893	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1894	* @arg TIM_Channel_1: TIM Channel 1
mbed_official	76:aeb1df146756	1895	* @arg TIM_Channel_2: TIM Channel 2
mbed_official	76:aeb1df146756	1896	* @arg TIM_Channel_3: TIM Channel 3
mbed_official	76:aeb1df146756	1897	* @arg TIM_Channel_4: TIM Channel 4
mbed_official	76:aeb1df146756	1898	* @param TIM_CCx: specifies the TIM Channel CCxE bit new state.
mbed_official	76:aeb1df146756	1899	* This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable.
mbed_official	76:aeb1df146756	1900	* @retval None
mbed_official	76:aeb1df146756	1901	*/
mbed_official	76:aeb1df146756	1902	void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx)
mbed_official	76:aeb1df146756	1903	{
mbed_official	76:aeb1df146756	1904	uint16_t tmp = 0;
mbed_official	76:aeb1df146756	1905
mbed_official	76:aeb1df146756	1906	/* Check the parameters */
mbed_official	76:aeb1df146756	1907	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1908	assert_param(IS_TIM_CCX(TIM_CCx));
mbed_official	76:aeb1df146756	1909
mbed_official	76:aeb1df146756	1910	tmp = CCER_CCE_SET << TIM_Channel;
mbed_official	76:aeb1df146756	1911
mbed_official	76:aeb1df146756	1912	/* Reset the CCxE Bit */
mbed_official	76:aeb1df146756	1913	TIMx->CCER &= (uint16_t)~ tmp;
mbed_official	76:aeb1df146756	1914
mbed_official	76:aeb1df146756	1915	/* Set or reset the CCxE Bit */
mbed_official	76:aeb1df146756	1916	TIMx->CCER \|= (uint16_t)(TIM_CCx << TIM_Channel);
mbed_official	76:aeb1df146756	1917	}
mbed_official	76:aeb1df146756	1918
mbed_official	76:aeb1df146756	1919	/**
mbed_official	76:aeb1df146756	1920	* @brief Enables or disables the TIM Capture Compare Channel xN.
mbed_official	76:aeb1df146756	1921	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1922	* @param TIM_Channel: specifies the TIM Channel
mbed_official	76:aeb1df146756	1923	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1924	* @arg TIM_Channel_1: TIM Channel 1
mbed_official	76:aeb1df146756	1925	* @arg TIM_Channel_2: TIM Channel 2
mbed_official	76:aeb1df146756	1926	* @arg TIM_Channel_3: TIM Channel 3
mbed_official	76:aeb1df146756	1927	* @param TIM_CCxN: specifies the TIM Channel CCxNE bit new state.
mbed_official	76:aeb1df146756	1928	* This parameter can be: TIM_CCxN_Enable or TIM_CCxN_Disable.
mbed_official	76:aeb1df146756	1929	* @retval None
mbed_official	76:aeb1df146756	1930	*/
mbed_official	76:aeb1df146756	1931	void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN)
mbed_official	76:aeb1df146756	1932	{
mbed_official	76:aeb1df146756	1933	uint16_t tmp = 0;
mbed_official	76:aeb1df146756	1934
mbed_official	76:aeb1df146756	1935	/* Check the parameters */
mbed_official	76:aeb1df146756	1936	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1937	assert_param(IS_TIM_COMPLEMENTARY_CHANNEL(TIM_Channel));
mbed_official	76:aeb1df146756	1938	assert_param(IS_TIM_CCXN(TIM_CCxN));
mbed_official	76:aeb1df146756	1939
mbed_official	76:aeb1df146756	1940	tmp = CCER_CCNE_SET << TIM_Channel;
mbed_official	76:aeb1df146756	1941
mbed_official	76:aeb1df146756	1942	/* Reset the CCxNE Bit */
mbed_official	76:aeb1df146756	1943	TIMx->CCER &= (uint16_t) ~tmp;
mbed_official	76:aeb1df146756	1944
mbed_official	76:aeb1df146756	1945	/* Set or reset the CCxNE Bit */
mbed_official	76:aeb1df146756	1946	TIMx->CCER \|= (uint16_t)(TIM_CCxN << TIM_Channel);
mbed_official	76:aeb1df146756	1947	}
mbed_official	76:aeb1df146756	1948
mbed_official	76:aeb1df146756	1949	/**
mbed_official	76:aeb1df146756	1950	* @brief Selects the TIM peripheral Commutation event.
mbed_official	76:aeb1df146756	1951	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIMx peripheral
mbed_official	76:aeb1df146756	1952	* @param NewState: new state of the Commutation event.
mbed_official	76:aeb1df146756	1953	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	1954	* @retval None
mbed_official	76:aeb1df146756	1955	*/
mbed_official	76:aeb1df146756	1956	void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	1957	{
mbed_official	76:aeb1df146756	1958	/* Check the parameters */
mbed_official	76:aeb1df146756	1959	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1960	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	1961	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	1962	{
mbed_official	76:aeb1df146756	1963	/* Set the COM Bit */
mbed_official	76:aeb1df146756	1964	TIMx->CR2 \|= TIM_CR2_CCUS;
mbed_official	76:aeb1df146756	1965	}
mbed_official	76:aeb1df146756	1966	else
mbed_official	76:aeb1df146756	1967	{
mbed_official	76:aeb1df146756	1968	/* Reset the COM Bit */
mbed_official	76:aeb1df146756	1969	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCUS);
mbed_official	76:aeb1df146756	1970	}
mbed_official	76:aeb1df146756	1971	}
mbed_official	76:aeb1df146756	1972
mbed_official	76:aeb1df146756	1973	/**
mbed_official	76:aeb1df146756	1974	* @}
mbed_official	76:aeb1df146756	1975	*/
mbed_official	76:aeb1df146756	1976
mbed_official	76:aeb1df146756	1977	/** @defgroup TIM_Group4 Input Capture management functions
mbed_official	76:aeb1df146756	1978	* @brief Input Capture management functions
mbed_official	76:aeb1df146756	1979	*
mbed_official	76:aeb1df146756	1980	@verbatim
mbed_official	76:aeb1df146756	1981	===============================================================================
mbed_official	76:aeb1df146756	1982	##### Input Capture management functions #####
mbed_official	76:aeb1df146756	1983	===============================================================================
mbed_official	76:aeb1df146756	1984
mbed_official	76:aeb1df146756	1985	* TIM Driver: how to use it in Input Capture Mode *
mbed_official	76:aeb1df146756	1986	===============================================================================
mbed_official	76:aeb1df146756	1987	[..] To use the Timer in Input Capture mode, the following steps are mandatory:
mbed_official	76:aeb1df146756	1988	(#) Enable TIM clock using RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE)
mbed_official	76:aeb1df146756	1989	function.
mbed_official	76:aeb1df146756	1990	(#) Configure the TIM pins by configuring the corresponding GPIO pins.
mbed_official	76:aeb1df146756	1991	(#) Configure the Time base unit as described in the first part of this
mbed_official	76:aeb1df146756	1992	driver, if needed, else the Timer will run with the default configuration:
mbed_official	76:aeb1df146756	1993	(++) Autoreload value = 0xFFFF.
mbed_official	76:aeb1df146756	1994	(++) Prescaler value = 0x0000.
mbed_official	76:aeb1df146756	1995	(++) Counter mode = Up counting.
mbed_official	76:aeb1df146756	1996	(++) Clock Division = TIM_CKD_DIV1.
mbed_official	76:aeb1df146756	1997	(#) Fill the TIM_ICInitStruct with the desired parameters including:
mbed_official	76:aeb1df146756	1998	(++) TIM Channel: TIM_Channel.
mbed_official	76:aeb1df146756	1999	(++) TIM Input Capture polarity: TIM_ICPolarity.
mbed_official	76:aeb1df146756	2000	(++) TIM Input Capture selection: TIM_ICSelection.
mbed_official	76:aeb1df146756	2001	(++) TIM Input Capture Prescaler: TIM_ICPrescaler.
mbed_official	76:aeb1df146756	2002	(++) TIM Input CApture filter value: TIM_ICFilter.
mbed_official	76:aeb1df146756	2003	(#) Call TIM_ICInit(TIMx, &TIM_ICInitStruct) to configure the desired
mbed_official	76:aeb1df146756	2004	channel with the corresponding configuration and to measure only
mbed_official	76:aeb1df146756	2005	frequency or duty cycle of the input signal,or, Call
mbed_official	76:aeb1df146756	2006	TIM_PWMIConfig(TIMx, &TIM_ICInitStruct) to configure the desired
mbed_official	76:aeb1df146756	2007	channels with the corresponding configuration and to measure the
mbed_official	76:aeb1df146756	2008	frequency and the duty cycle of the input signal.
mbed_official	76:aeb1df146756	2009	(#) Enable the NVIC or the DMA to read the measured frequency.
mbed_official	76:aeb1df146756	2010	(#) Enable the corresponding interrupt (or DMA request) to read
mbed_official	76:aeb1df146756	2011	the Captured value, using the function TIM_ITConfig(TIMx, TIM_IT_CCx)
mbed_official	76:aeb1df146756	2012	(or TIM_DMA_Cmd(TIMx, TIM_DMA_CCx)).
mbed_official	76:aeb1df146756	2013	(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official	76:aeb1df146756	2014	(#) Use TIM_GetCapturex(TIMx); to read the captured value.
mbed_official	76:aeb1df146756	2015	[..]
mbed_official	76:aeb1df146756	2016	(@) All other functions can be used separately to modify, if needed,
mbed_official	76:aeb1df146756	2017	a specific feature of the Timer.
mbed_official	76:aeb1df146756	2018
mbed_official	76:aeb1df146756	2019	@endverbatim
mbed_official	76:aeb1df146756	2020	* @{
mbed_official	76:aeb1df146756	2021	*/
mbed_official	76:aeb1df146756	2022
mbed_official	76:aeb1df146756	2023	/**
mbed_official	76:aeb1df146756	2024	* @brief Initializes the TIM peripheral according to the specified
mbed_official	76:aeb1df146756	2025	* parameters in the TIM_ICInitStruct.
mbed_official	76:aeb1df146756	2026	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2027	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2028	* @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
mbed_official	76:aeb1df146756	2029	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	2030	* peripheral.
mbed_official	76:aeb1df146756	2031	* @retval None
mbed_official	76:aeb1df146756	2032	*/
mbed_official	76:aeb1df146756	2033	void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official	76:aeb1df146756	2034	{
mbed_official	76:aeb1df146756	2035	/* Check the parameters */
mbed_official	76:aeb1df146756	2036	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2037	assert_param(IS_TIM_CHANNEL(TIM_ICInitStruct->TIM_Channel));
mbed_official	76:aeb1df146756	2038	assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection));
mbed_official	76:aeb1df146756	2039	assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler));
mbed_official	76:aeb1df146756	2040	assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter));
mbed_official	76:aeb1df146756	2041	assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity));
mbed_official	76:aeb1df146756	2042
mbed_official	76:aeb1df146756	2043	if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
mbed_official	76:aeb1df146756	2044	{
mbed_official	76:aeb1df146756	2045	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2046	/* TI1 Configuration */
mbed_official	76:aeb1df146756	2047	TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	2048	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2049	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2050	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2051	TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2052	}
mbed_official	76:aeb1df146756	2053	else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2)
mbed_official	76:aeb1df146756	2054	{
mbed_official	76:aeb1df146756	2055	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2056	/* TI2 Configuration */
mbed_official	76:aeb1df146756	2057	TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	2058	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2059	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2060	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2061	TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2062	}
mbed_official	76:aeb1df146756	2063	else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3)
mbed_official	76:aeb1df146756	2064	{
mbed_official	76:aeb1df146756	2065	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2066	/* TI3 Configuration */
mbed_official	76:aeb1df146756	2067	TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	2068	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2069	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2070	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2071	TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2072	}
mbed_official	76:aeb1df146756	2073	else
mbed_official	76:aeb1df146756	2074	{
mbed_official	76:aeb1df146756	2075	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2076	/* TI4 Configuration */
mbed_official	76:aeb1df146756	2077	TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	2078	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2079	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2080	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2081	TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2082	}
mbed_official	76:aeb1df146756	2083	}
mbed_official	76:aeb1df146756	2084
mbed_official	76:aeb1df146756	2085	/**
mbed_official	76:aeb1df146756	2086	* @brief Fills each TIM_ICInitStruct member with its default value.
mbed_official	76:aeb1df146756	2087	* @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure which will
mbed_official	76:aeb1df146756	2088	* be initialized.
mbed_official	76:aeb1df146756	2089	* @retval None
mbed_official	76:aeb1df146756	2090	*/
mbed_official	76:aeb1df146756	2091	void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official	76:aeb1df146756	2092	{
mbed_official	76:aeb1df146756	2093	/* Set the default configuration */
mbed_official	76:aeb1df146756	2094	TIM_ICInitStruct->TIM_Channel = TIM_Channel_1;
mbed_official	76:aeb1df146756	2095	TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
mbed_official	76:aeb1df146756	2096	TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI;
mbed_official	76:aeb1df146756	2097	TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
mbed_official	76:aeb1df146756	2098	TIM_ICInitStruct->TIM_ICFilter = 0x00;
mbed_official	76:aeb1df146756	2099	}
mbed_official	76:aeb1df146756	2100
mbed_official	76:aeb1df146756	2101	/**
mbed_official	76:aeb1df146756	2102	* @brief Configures the TIM peripheral according to the specified
mbed_official	76:aeb1df146756	2103	* parameters in the TIM_ICInitStruct to measure an external PWM signal.
mbed_official	76:aeb1df146756	2104	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2105	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2106	* @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
mbed_official	76:aeb1df146756	2107	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	2108	* peripheral.
mbed_official	76:aeb1df146756	2109	* @retval None
mbed_official	76:aeb1df146756	2110	*/
mbed_official	76:aeb1df146756	2111	void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official	76:aeb1df146756	2112	{
mbed_official	76:aeb1df146756	2113	uint16_t icoppositepolarity = TIM_ICPolarity_Rising;
mbed_official	76:aeb1df146756	2114	uint16_t icoppositeselection = TIM_ICSelection_DirectTI;
mbed_official	76:aeb1df146756	2115	/* Check the parameters */
mbed_official	76:aeb1df146756	2116	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2117	/* Select the Opposite Input Polarity */
mbed_official	76:aeb1df146756	2118	if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising)
mbed_official	76:aeb1df146756	2119	{
mbed_official	76:aeb1df146756	2120	icoppositepolarity = TIM_ICPolarity_Falling;
mbed_official	76:aeb1df146756	2121	}
mbed_official	76:aeb1df146756	2122	else
mbed_official	76:aeb1df146756	2123	{
mbed_official	76:aeb1df146756	2124	icoppositepolarity = TIM_ICPolarity_Rising;
mbed_official	76:aeb1df146756	2125	}
mbed_official	76:aeb1df146756	2126	/* Select the Opposite Input */
mbed_official	76:aeb1df146756	2127	if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI)
mbed_official	76:aeb1df146756	2128	{
mbed_official	76:aeb1df146756	2129	icoppositeselection = TIM_ICSelection_IndirectTI;
mbed_official	76:aeb1df146756	2130	}
mbed_official	76:aeb1df146756	2131	else
mbed_official	76:aeb1df146756	2132	{
mbed_official	76:aeb1df146756	2133	icoppositeselection = TIM_ICSelection_DirectTI;
mbed_official	76:aeb1df146756	2134	}
mbed_official	76:aeb1df146756	2135	if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
mbed_official	76:aeb1df146756	2136	{
mbed_official	76:aeb1df146756	2137	/* TI1 Configuration */
mbed_official	76:aeb1df146756	2138	TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2139	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2140	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2141	TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2142	/* TI2 Configuration */
mbed_official	76:aeb1df146756	2143	TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2144	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2145	TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2146	}
mbed_official	76:aeb1df146756	2147	else
mbed_official	76:aeb1df146756	2148	{
mbed_official	76:aeb1df146756	2149	/* TI2 Configuration */
mbed_official	76:aeb1df146756	2150	TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2151	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2152	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2153	TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2154	/* TI1 Configuration */
mbed_official	76:aeb1df146756	2155	TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2156	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2157	TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2158	}
mbed_official	76:aeb1df146756	2159	}
mbed_official	76:aeb1df146756	2160
mbed_official	76:aeb1df146756	2161	/**
mbed_official	76:aeb1df146756	2162	* @brief Gets the TIMx Input Capture 1 value.
mbed_official	76:aeb1df146756	2163	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2164	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2165	* @retval Capture Compare 1 Register value.
mbed_official	76:aeb1df146756	2166	*/
mbed_official	76:aeb1df146756	2167	uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2168	{
mbed_official	76:aeb1df146756	2169	/* Check the parameters */
mbed_official	76:aeb1df146756	2170	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2171
mbed_official	76:aeb1df146756	2172	/* Get the Capture 1 Register value */
mbed_official	76:aeb1df146756	2173	return TIMx->CCR1;
mbed_official	76:aeb1df146756	2174	}
mbed_official	76:aeb1df146756	2175
mbed_official	76:aeb1df146756	2176	/**
mbed_official	76:aeb1df146756	2177	* @brief Gets the TIMx Input Capture 2 value.
mbed_official	76:aeb1df146756	2178	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2179	* @retval Capture Compare 2 Register value.
mbed_official	76:aeb1df146756	2180	*/
mbed_official	76:aeb1df146756	2181	uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2182	{
mbed_official	76:aeb1df146756	2183	/* Check the parameters */
mbed_official	76:aeb1df146756	2184	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2185
mbed_official	76:aeb1df146756	2186	/* Get the Capture 2 Register value */
mbed_official	76:aeb1df146756	2187	return TIMx->CCR2;
mbed_official	76:aeb1df146756	2188	}
mbed_official	76:aeb1df146756	2189
mbed_official	76:aeb1df146756	2190	/**
mbed_official	76:aeb1df146756	2191	* @brief Gets the TIMx Input Capture 3 value.
mbed_official	76:aeb1df146756	2192	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2193	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2194	* @retval Capture Compare 3 Register value.
mbed_official	76:aeb1df146756	2195	*/
mbed_official	76:aeb1df146756	2196	uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2197	{
mbed_official	76:aeb1df146756	2198	/* Check the parameters */
mbed_official	76:aeb1df146756	2199	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2200
mbed_official	76:aeb1df146756	2201	/* Get the Capture 3 Register value */
mbed_official	76:aeb1df146756	2202	return TIMx->CCR3;
mbed_official	76:aeb1df146756	2203	}
mbed_official	76:aeb1df146756	2204
mbed_official	76:aeb1df146756	2205	/**
mbed_official	76:aeb1df146756	2206	* @brief Gets the TIMx Input Capture 4 value.
mbed_official	76:aeb1df146756	2207	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2208	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2209	* @retval Capture Compare 4 Register value.
mbed_official	76:aeb1df146756	2210	*/
mbed_official	76:aeb1df146756	2211	uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2212	{
mbed_official	76:aeb1df146756	2213	/* Check the parameters */
mbed_official	76:aeb1df146756	2214	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2215
mbed_official	76:aeb1df146756	2216	/* Get the Capture 4 Register value */
mbed_official	76:aeb1df146756	2217	return TIMx->CCR4;
mbed_official	76:aeb1df146756	2218	}
mbed_official	76:aeb1df146756	2219
mbed_official	76:aeb1df146756	2220	/**
mbed_official	76:aeb1df146756	2221	* @brief Sets the TIMx Input Capture 1 prescaler.
mbed_official	76:aeb1df146756	2222	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2223	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2224	* @param TIM_ICPSC: specifies the Input Capture1 prescaler new value.
mbed_official	76:aeb1df146756	2225	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2226	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	76:aeb1df146756	2227	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	76:aeb1df146756	2228	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	76:aeb1df146756	2229	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	76:aeb1df146756	2230	* @retval None
mbed_official	76:aeb1df146756	2231	*/
mbed_official	76:aeb1df146756	2232	void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	2233	{
mbed_official	76:aeb1df146756	2234	/* Check the parameters */
mbed_official	76:aeb1df146756	2235	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2236	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	2237
mbed_official	76:aeb1df146756	2238	/* Reset the IC1PSC Bits */
mbed_official	76:aeb1df146756	2239	TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC1PSC);
mbed_official	76:aeb1df146756	2240	/* Set the IC1PSC value */
mbed_official	76:aeb1df146756	2241	TIMx->CCMR1 \|= TIM_ICPSC;
mbed_official	76:aeb1df146756	2242	}
mbed_official	76:aeb1df146756	2243
mbed_official	76:aeb1df146756	2244	/**
mbed_official	76:aeb1df146756	2245	* @brief Sets the TIMx Input Capture 2 prescaler.
mbed_official	76:aeb1df146756	2246	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2247	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2248	* @param TIM_ICPSC: specifies the Input Capture2 prescaler new value.
mbed_official	76:aeb1df146756	2249	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2250	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	76:aeb1df146756	2251	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	76:aeb1df146756	2252	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	76:aeb1df146756	2253	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	76:aeb1df146756	2254	* @retval None
mbed_official	76:aeb1df146756	2255	*/
mbed_official	76:aeb1df146756	2256	void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	2257	{
mbed_official	76:aeb1df146756	2258	/* Check the parameters */
mbed_official	76:aeb1df146756	2259	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2260	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	2261
mbed_official	76:aeb1df146756	2262	/* Reset the IC2PSC Bits */
mbed_official	76:aeb1df146756	2263	TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC2PSC);
mbed_official	76:aeb1df146756	2264	/* Set the IC2PSC value */
mbed_official	76:aeb1df146756	2265	TIMx->CCMR1 \|= (uint16_t)(TIM_ICPSC << 8);
mbed_official	76:aeb1df146756	2266	}
mbed_official	76:aeb1df146756	2267
mbed_official	76:aeb1df146756	2268	/**
mbed_official	76:aeb1df146756	2269	* @brief Sets the TIMx Input Capture 3 prescaler.
mbed_official	76:aeb1df146756	2270	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2271	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2272	* @param TIM_ICPSC: specifies the Input Capture3 prescaler new value.
mbed_official	76:aeb1df146756	2273	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2274	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	76:aeb1df146756	2275	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	76:aeb1df146756	2276	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	76:aeb1df146756	2277	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	76:aeb1df146756	2278	* @retval None
mbed_official	76:aeb1df146756	2279	*/
mbed_official	76:aeb1df146756	2280	void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	2281	{
mbed_official	76:aeb1df146756	2282	/* Check the parameters */
mbed_official	76:aeb1df146756	2283	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2284	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	2285
mbed_official	76:aeb1df146756	2286	/* Reset the IC3PSC Bits */
mbed_official	76:aeb1df146756	2287	TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC3PSC);
mbed_official	76:aeb1df146756	2288	/* Set the IC3PSC value */
mbed_official	76:aeb1df146756	2289	TIMx->CCMR2 \|= TIM_ICPSC;
mbed_official	76:aeb1df146756	2290	}
mbed_official	76:aeb1df146756	2291
mbed_official	76:aeb1df146756	2292	/**
mbed_official	76:aeb1df146756	2293	* @brief Sets the TIMx Input Capture 4 prescaler.
mbed_official	76:aeb1df146756	2294	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2295	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2296	* @param TIM_ICPSC: specifies the Input Capture4 prescaler new value.
mbed_official	76:aeb1df146756	2297	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2298	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	76:aeb1df146756	2299	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	76:aeb1df146756	2300	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	76:aeb1df146756	2301	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	76:aeb1df146756	2302	* @retval None
mbed_official	76:aeb1df146756	2303	*/
mbed_official	76:aeb1df146756	2304	void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	2305	{
mbed_official	76:aeb1df146756	2306	/* Check the parameters */
mbed_official	76:aeb1df146756	2307	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2308	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	2309
mbed_official	76:aeb1df146756	2310	/* Reset the IC4PSC Bits */
mbed_official	76:aeb1df146756	2311	TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC4PSC);
mbed_official	76:aeb1df146756	2312	/* Set the IC4PSC value */
mbed_official	76:aeb1df146756	2313	TIMx->CCMR2 \|= (uint16_t)(TIM_ICPSC << 8);
mbed_official	76:aeb1df146756	2314	}
mbed_official	76:aeb1df146756	2315
mbed_official	76:aeb1df146756	2316	/**
mbed_official	76:aeb1df146756	2317	* @}
mbed_official	76:aeb1df146756	2318	*/
mbed_official	76:aeb1df146756	2319
mbed_official	76:aeb1df146756	2320	/** @defgroup TIM_Group5 Interrupts DMA and flags management functions
mbed_official	76:aeb1df146756	2321	* @brief Interrupts, DMA and flags management functions
mbed_official	76:aeb1df146756	2322	*
mbed_official	76:aeb1df146756	2323	@verbatim
mbed_official	76:aeb1df146756	2324	===============================================================================
mbed_official	76:aeb1df146756	2325	##### Interrupts, DMA and flags management functions #####
mbed_official	76:aeb1df146756	2326	===============================================================================
mbed_official	76:aeb1df146756	2327
mbed_official	76:aeb1df146756	2328	@endverbatim
mbed_official	76:aeb1df146756	2329	* @{
mbed_official	76:aeb1df146756	2330	*/
mbed_official	76:aeb1df146756	2331
mbed_official	76:aeb1df146756	2332	/**
mbed_official	76:aeb1df146756	2333	* @brief Enables or disables the specified TIM interrupts.
mbed_official	76:aeb1df146756	2334	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIMx peripheral.
mbed_official	76:aeb1df146756	2335	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2336	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2337	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2338	* @param TIM_IT: specifies the TIM interrupts sources to be enabled or disabled.
mbed_official	76:aeb1df146756	2339	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2340	* @arg TIM_IT_Update: TIM update Interrupt source
mbed_official	76:aeb1df146756	2341	* @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source
mbed_official	76:aeb1df146756	2342	* @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source
mbed_official	76:aeb1df146756	2343	* @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source
mbed_official	76:aeb1df146756	2344	* @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source
mbed_official	76:aeb1df146756	2345	* @arg TIM_IT_COM: TIM Commutation Interrupt source
mbed_official	76:aeb1df146756	2346	* @arg TIM_IT_Trigger: TIM Trigger Interrupt source
mbed_official	76:aeb1df146756	2347	* @arg TIM_IT_Break: TIM Break Interrupt source
mbed_official	76:aeb1df146756	2348	*
mbed_official	76:aeb1df146756	2349	* @note TIM6 and TIM7 can only generate an update interrupt.
mbed_official	76:aeb1df146756	2350	* @note TIM15 can have only TIM_IT_Update, TIM_IT_CC1,TIM_IT_CC2 or TIM_IT_Trigger.
mbed_official	76:aeb1df146756	2351	* @note TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1.
mbed_official	76:aeb1df146756	2352	* @note TIM_IT_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2353	* @note TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2354	*
mbed_official	76:aeb1df146756	2355	* @param NewState: new state of the TIM interrupts.
mbed_official	76:aeb1df146756	2356	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	2357	* @retval None
mbed_official	76:aeb1df146756	2358	*/
mbed_official	76:aeb1df146756	2359	void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState)
mbed_official	76:aeb1df146756	2360	{
mbed_official	76:aeb1df146756	2361	/* Check the parameters */
mbed_official	76:aeb1df146756	2362	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2363	assert_param(IS_TIM_IT(TIM_IT));
mbed_official	76:aeb1df146756	2364	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	2365
mbed_official	76:aeb1df146756	2366	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	2367	{
mbed_official	76:aeb1df146756	2368	/* Enable the Interrupt sources */
mbed_official	76:aeb1df146756	2369	TIMx->DIER \|= TIM_IT;
mbed_official	76:aeb1df146756	2370	}
mbed_official	76:aeb1df146756	2371	else
mbed_official	76:aeb1df146756	2372	{
mbed_official	76:aeb1df146756	2373	/* Disable the Interrupt sources */
mbed_official	76:aeb1df146756	2374	TIMx->DIER &= (uint16_t)~TIM_IT;
mbed_official	76:aeb1df146756	2375	}
mbed_official	76:aeb1df146756	2376	}
mbed_official	76:aeb1df146756	2377
mbed_official	76:aeb1df146756	2378	/**
mbed_official	76:aeb1df146756	2379	* @brief Configures the TIMx event to be generate by software.
mbed_official	76:aeb1df146756	2380	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the
mbed_official	76:aeb1df146756	2381	* TIM peripheral.
mbed_official	76:aeb1df146756	2382	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2383	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2384	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2385	* @param TIM_EventSource: specifies the event source.
mbed_official	76:aeb1df146756	2386	* This parameter can be one or more of the following values:
mbed_official	76:aeb1df146756	2387	* @arg TIM_EventSource_Update: Timer update Event source
mbed_official	76:aeb1df146756	2388	* @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source
mbed_official	76:aeb1df146756	2389	* @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source
mbed_official	76:aeb1df146756	2390	* @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source
mbed_official	76:aeb1df146756	2391	* @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source
mbed_official	76:aeb1df146756	2392	* @arg TIM_EventSource_COM: Timer COM event source
mbed_official	76:aeb1df146756	2393	* @arg TIM_EventSource_Trigger: Timer Trigger Event source
mbed_official	76:aeb1df146756	2394	* @arg TIM_EventSource_Break: Timer Break event source
mbed_official	76:aeb1df146756	2395	*
mbed_official	76:aeb1df146756	2396	* @note TIM6 and TIM7 can only generate an update event.
mbed_official	76:aeb1df146756	2397	* @note TIM_EventSource_COM and TIM_EventSource_Break are used only with TIM1.
mbed_official	76:aeb1df146756	2398	*
mbed_official	76:aeb1df146756	2399	* @retval None
mbed_official	76:aeb1df146756	2400	*/
mbed_official	76:aeb1df146756	2401	void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource)
mbed_official	76:aeb1df146756	2402	{
mbed_official	76:aeb1df146756	2403	/* Check the parameters */
mbed_official	76:aeb1df146756	2404	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2405	assert_param(IS_TIM_EVENT_SOURCE(TIM_EventSource));
mbed_official	76:aeb1df146756	2406	/* Set the event sources */
mbed_official	76:aeb1df146756	2407	TIMx->EGR = TIM_EventSource;
mbed_official	76:aeb1df146756	2408	}
mbed_official	76:aeb1df146756	2409
mbed_official	76:aeb1df146756	2410	/**
mbed_official	76:aeb1df146756	2411	* @brief Checks whether the specified TIM flag is set or not.
mbed_official	76:aeb1df146756	2412	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2413	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2414	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2415	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2416	* @param TIM_FLAG: specifies the flag to check.
mbed_official	76:aeb1df146756	2417	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2418	* @arg TIM_FLAG_Update: TIM update Flag
mbed_official	76:aeb1df146756	2419	* @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag
mbed_official	76:aeb1df146756	2420	* @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag
mbed_official	76:aeb1df146756	2421	* @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag
mbed_official	76:aeb1df146756	2422	* @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag
mbed_official	76:aeb1df146756	2423	* @arg TIM_FLAG_COM: TIM Commutation Flag
mbed_official	76:aeb1df146756	2424	* @arg TIM_FLAG_Trigger: TIM Trigger Flag
mbed_official	76:aeb1df146756	2425	* @arg TIM_FLAG_Break: TIM Break Flag
mbed_official	76:aeb1df146756	2426	* @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag
mbed_official	76:aeb1df146756	2427	* @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag
mbed_official	76:aeb1df146756	2428	* @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag
mbed_official	76:aeb1df146756	2429	* @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag
mbed_official	76:aeb1df146756	2430	*
mbed_official	76:aeb1df146756	2431	* @note TIM6 and TIM7 can have only one update flag.
mbed_official	76:aeb1df146756	2432	* @note TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, TIM_FLAG_CC2 or TIM_FLAG_Trigger.
mbed_official	76:aeb1df146756	2433	* @note TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1.
mbed_official	76:aeb1df146756	2434	* @note TIM_FLAG_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2435	* @note TIM_FLAG_COM is used only with TIM1 TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2436	*
mbed_official	76:aeb1df146756	2437	* @retval The new state of TIM_FLAG (SET or RESET).
mbed_official	76:aeb1df146756	2438	*/
mbed_official	76:aeb1df146756	2439	FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG)
mbed_official	76:aeb1df146756	2440	{
mbed_official	76:aeb1df146756	2441	ITStatus bitstatus = RESET;
mbed_official	76:aeb1df146756	2442
mbed_official	76:aeb1df146756	2443	/* Check the parameters */
mbed_official	76:aeb1df146756	2444	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2445	assert_param(IS_TIM_GET_FLAG(TIM_FLAG));
mbed_official	76:aeb1df146756	2446
mbed_official	76:aeb1df146756	2447	if ((TIMx->SR & TIM_FLAG) != (uint16_t)RESET)
mbed_official	76:aeb1df146756	2448	{
mbed_official	76:aeb1df146756	2449	bitstatus = SET;
mbed_official	76:aeb1df146756	2450	}
mbed_official	76:aeb1df146756	2451	else
mbed_official	76:aeb1df146756	2452	{
mbed_official	76:aeb1df146756	2453	bitstatus = RESET;
mbed_official	76:aeb1df146756	2454	}
mbed_official	76:aeb1df146756	2455	return bitstatus;
mbed_official	76:aeb1df146756	2456	}
mbed_official	76:aeb1df146756	2457
mbed_official	76:aeb1df146756	2458	/**
mbed_official	76:aeb1df146756	2459	* @brief Clears the TIMx's pending flags.
mbed_official	76:aeb1df146756	2460	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2461	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2462	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2463	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2464	* @param TIM_FLAG: specifies the flag bit to clear.
mbed_official	76:aeb1df146756	2465	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2466	* @arg TIM_FLAG_Update: TIM update Flag
mbed_official	76:aeb1df146756	2467	* @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag
mbed_official	76:aeb1df146756	2468	* @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag
mbed_official	76:aeb1df146756	2469	* @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag
mbed_official	76:aeb1df146756	2470	* @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag
mbed_official	76:aeb1df146756	2471	* @arg TIM_FLAG_COM: TIM Commutation Flag
mbed_official	76:aeb1df146756	2472	* @arg TIM_FLAG_Trigger: TIM Trigger Flag
mbed_official	76:aeb1df146756	2473	* @arg TIM_FLAG_Break: TIM Break Flag
mbed_official	76:aeb1df146756	2474	* @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag
mbed_official	76:aeb1df146756	2475	* @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag
mbed_official	76:aeb1df146756	2476	* @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag
mbed_official	76:aeb1df146756	2477	* @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag
mbed_official	76:aeb1df146756	2478	*
mbed_official	76:aeb1df146756	2479	* @note TIM6 and TIM7 can have only one update flag.
mbed_official	76:aeb1df146756	2480	* @note TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1,TIM_FLAG_CC2 or
mbed_official	76:aeb1df146756	2481	* TIM_FLAG_Trigger.
mbed_official	76:aeb1df146756	2482	* @note TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1.
mbed_official	76:aeb1df146756	2483	* @note TIM_FLAG_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2484	* @note TIM_FLAG_COM is used only with TIM1, TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2485	*
mbed_official	76:aeb1df146756	2486	* @retval None
mbed_official	76:aeb1df146756	2487	*/
mbed_official	76:aeb1df146756	2488	void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG)
mbed_official	76:aeb1df146756	2489	{
mbed_official	76:aeb1df146756	2490	/* Check the parameters */
mbed_official	76:aeb1df146756	2491	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2492	assert_param(IS_TIM_CLEAR_FLAG(TIM_FLAG));
mbed_official	76:aeb1df146756	2493
mbed_official	76:aeb1df146756	2494	/* Clear the flags */
mbed_official	76:aeb1df146756	2495	TIMx->SR = (uint16_t)~TIM_FLAG;
mbed_official	76:aeb1df146756	2496	}
mbed_official	76:aeb1df146756	2497
mbed_official	76:aeb1df146756	2498	/**
mbed_official	76:aeb1df146756	2499	* @brief Checks whether the TIM interrupt has occurred or not.
mbed_official	76:aeb1df146756	2500	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2501	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2502	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2503	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2504	* @param TIM_IT: specifies the TIM interrupt source to check.
mbed_official	76:aeb1df146756	2505	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2506	* @arg TIM_IT_Update: TIM update Interrupt source
mbed_official	76:aeb1df146756	2507	* @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source
mbed_official	76:aeb1df146756	2508	* @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source
mbed_official	76:aeb1df146756	2509	* @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source
mbed_official	76:aeb1df146756	2510	* @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source
mbed_official	76:aeb1df146756	2511	* @arg TIM_IT_COM: TIM Commutation Interrupt source
mbed_official	76:aeb1df146756	2512	* @arg TIM_IT_Trigger: TIM Trigger Interrupt source
mbed_official	76:aeb1df146756	2513	* @arg TIM_IT_Break: TIM Break Interrupt source
mbed_official	76:aeb1df146756	2514	*
mbed_official	76:aeb1df146756	2515	* @note TIM6 and TIM7 can generate only an update interrupt.
mbed_official	76:aeb1df146756	2516	* @note TIM15 can have only TIM_IT_Update, TIM_IT_CC1, TIM_IT_CC2 or TIM_IT_Trigger.
mbed_official	76:aeb1df146756	2517	* @note TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1.
mbed_official	76:aeb1df146756	2518	* @note TIM_IT_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2519	* @note TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2520	*
mbed_official	76:aeb1df146756	2521	* @retval The new state of the TIM_IT(SET or RESET).
mbed_official	76:aeb1df146756	2522	*/
mbed_official	76:aeb1df146756	2523	ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT)
mbed_official	76:aeb1df146756	2524	{
mbed_official	76:aeb1df146756	2525	ITStatus bitstatus = RESET;
mbed_official	76:aeb1df146756	2526	uint16_t itstatus = 0x0, itenable = 0x0;
mbed_official	76:aeb1df146756	2527
mbed_official	76:aeb1df146756	2528	/* Check the parameters */
mbed_official	76:aeb1df146756	2529	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2530	assert_param(IS_TIM_GET_IT(TIM_IT));
mbed_official	76:aeb1df146756	2531
mbed_official	76:aeb1df146756	2532	itstatus = TIMx->SR & TIM_IT;
mbed_official	76:aeb1df146756	2533
mbed_official	76:aeb1df146756	2534	itenable = TIMx->DIER & TIM_IT;
mbed_official	76:aeb1df146756	2535	if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET))
mbed_official	76:aeb1df146756	2536	{
mbed_official	76:aeb1df146756	2537	bitstatus = SET;
mbed_official	76:aeb1df146756	2538	}
mbed_official	76:aeb1df146756	2539	else
mbed_official	76:aeb1df146756	2540	{
mbed_official	76:aeb1df146756	2541	bitstatus = RESET;
mbed_official	76:aeb1df146756	2542	}
mbed_official	76:aeb1df146756	2543	return bitstatus;
mbed_official	76:aeb1df146756	2544	}
mbed_official	76:aeb1df146756	2545
mbed_official	76:aeb1df146756	2546	/**
mbed_official	76:aeb1df146756	2547	* @brief Clears the TIMx's interrupt pending bits.
mbed_official	76:aeb1df146756	2548	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2549	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2550	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2551	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2552	* @param TIM_IT: specifies the pending bit to clear.
mbed_official	76:aeb1df146756	2553	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2554	* @arg TIM_IT_Update: TIM1 update Interrupt source
mbed_official	76:aeb1df146756	2555	* @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source
mbed_official	76:aeb1df146756	2556	* @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source
mbed_official	76:aeb1df146756	2557	* @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source
mbed_official	76:aeb1df146756	2558	* @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source
mbed_official	76:aeb1df146756	2559	* @arg TIM_IT_COM: TIM Commutation Interrupt source
mbed_official	76:aeb1df146756	2560	* @arg TIM_IT_Trigger: TIM Trigger Interrupt source
mbed_official	76:aeb1df146756	2561	* @arg TIM_IT_Break: TIM Break Interrupt source
mbed_official	76:aeb1df146756	2562	*
mbed_official	76:aeb1df146756	2563	* @note TIM6 and TIM7 can generate only an update interrupt.
mbed_official	76:aeb1df146756	2564	* @note TIM15 can have only TIM_IT_Update, TIM_IT_CC1, TIM_IT_CC2 or TIM_IT_Trigger.
mbed_official	76:aeb1df146756	2565	* @note TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1.
mbed_official	76:aeb1df146756	2566	* @note TIM_IT_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2567	* @note TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2568	*
mbed_official	76:aeb1df146756	2569	* @retval None
mbed_official	76:aeb1df146756	2570	*/
mbed_official	76:aeb1df146756	2571	void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT)
mbed_official	76:aeb1df146756	2572	{
mbed_official	76:aeb1df146756	2573	/* Check the parameters */
mbed_official	76:aeb1df146756	2574	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2575	assert_param(IS_TIM_IT(TIM_IT));
mbed_official	76:aeb1df146756	2576
mbed_official	76:aeb1df146756	2577	/* Clear the IT pending Bit */
mbed_official	76:aeb1df146756	2578	TIMx->SR = (uint16_t)~TIM_IT;
mbed_official	76:aeb1df146756	2579	}
mbed_official	76:aeb1df146756	2580
mbed_official	76:aeb1df146756	2581	/**
mbed_official	76:aeb1df146756	2582	* @brief Configures the TIMx's DMA interface.
mbed_official	76:aeb1df146756	2583	* @param TIMx: where x can be 1, 2, 3, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2584	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2585	* @param TIM_DMABase: DMA Base address.
mbed_official	76:aeb1df146756	2586	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2587	* @arg TIM_DMABase_CR1
mbed_official	76:aeb1df146756	2588	* @arg TIM_DMABase_CR2
mbed_official	76:aeb1df146756	2589	* @arg TIM_DMABase_SMCR
mbed_official	76:aeb1df146756	2590	* @arg TIM_DMABase_DIER
mbed_official	76:aeb1df146756	2591	* @arg TIM_DMABase_SR
mbed_official	76:aeb1df146756	2592	* @arg TIM_DMABase_EGR
mbed_official	76:aeb1df146756	2593	* @arg TIM_DMABase_CCMR1
mbed_official	76:aeb1df146756	2594	* @arg TIM_DMABase_CCMR2
mbed_official	76:aeb1df146756	2595	* @arg TIM_DMABase_CCER
mbed_official	76:aeb1df146756	2596	* @arg TIM_DMABase_CNT
mbed_official	76:aeb1df146756	2597	* @arg TIM_DMABase_PSC
mbed_official	76:aeb1df146756	2598	* @arg TIM_DMABase_ARR
mbed_official	76:aeb1df146756	2599	* @arg TIM_DMABase_CCR1
mbed_official	76:aeb1df146756	2600	* @arg TIM_DMABase_CCR2
mbed_official	76:aeb1df146756	2601	* @arg TIM_DMABase_CCR3
mbed_official	76:aeb1df146756	2602	* @arg TIM_DMABase_CCR4
mbed_official	76:aeb1df146756	2603	* @arg TIM_DMABase_DCR
mbed_official	76:aeb1df146756	2604	* @arg TIM_DMABase_OR
mbed_official	76:aeb1df146756	2605	* @param TIM_DMABurstLength: DMA Burst length. This parameter can be one value
mbed_official	76:aeb1df146756	2606	* between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official	76:aeb1df146756	2607	* @retval None
mbed_official	76:aeb1df146756	2608	*/
mbed_official	76:aeb1df146756	2609	void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength)
mbed_official	76:aeb1df146756	2610	{
mbed_official	76:aeb1df146756	2611	/* Check the parameters */
mbed_official	76:aeb1df146756	2612	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2613	assert_param(IS_TIM_DMA_BASE(TIM_DMABase));
mbed_official	76:aeb1df146756	2614	assert_param(IS_TIM_DMA_LENGTH(TIM_DMABurstLength));
mbed_official	76:aeb1df146756	2615	/* Set the DMA Base and the DMA Burst Length */
mbed_official	76:aeb1df146756	2616	TIMx->DCR = TIM_DMABase \| TIM_DMABurstLength;
mbed_official	76:aeb1df146756	2617	}
mbed_official	76:aeb1df146756	2618
mbed_official	76:aeb1df146756	2619	/**
mbed_official	76:aeb1df146756	2620	* @brief Enables or disables the TIMx's DMA Requests.
mbed_official	76:aeb1df146756	2621	* @param TIMx: where x can be 1, 2, 3, 6, 7, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2622	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2623	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2624	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2625	* @param TIM_DMASource: specifies the DMA Request sources.
mbed_official	76:aeb1df146756	2626	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2627	* @arg TIM_DMA_Update: TIM update Interrupt source
mbed_official	76:aeb1df146756	2628	* @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official	76:aeb1df146756	2629	* @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official	76:aeb1df146756	2630	* @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official	76:aeb1df146756	2631	* @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official	76:aeb1df146756	2632	* @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official	76:aeb1df146756	2633	* @arg TIM_DMA_Trigger: TIM Trigger DMA source
mbed_official	76:aeb1df146756	2634	* @param NewState: new state of the DMA Request sources.
mbed_official	76:aeb1df146756	2635	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	2636	* @retval None
mbed_official	76:aeb1df146756	2637	*/
mbed_official	76:aeb1df146756	2638	void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState)
mbed_official	76:aeb1df146756	2639	{
mbed_official	76:aeb1df146756	2640	/* Check the parameters */
mbed_official	76:aeb1df146756	2641	assert_param(IS_TIM_LIST10_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2642	assert_param(IS_TIM_DMA_SOURCE(TIM_DMASource));
mbed_official	76:aeb1df146756	2643	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	2644
mbed_official	76:aeb1df146756	2645	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	2646	{
mbed_official	76:aeb1df146756	2647	/* Enable the DMA sources */
mbed_official	76:aeb1df146756	2648	TIMx->DIER \|= TIM_DMASource;
mbed_official	76:aeb1df146756	2649	}
mbed_official	76:aeb1df146756	2650	else
mbed_official	76:aeb1df146756	2651	{
mbed_official	76:aeb1df146756	2652	/* Disable the DMA sources */
mbed_official	76:aeb1df146756	2653	TIMx->DIER &= (uint16_t)~TIM_DMASource;
mbed_official	76:aeb1df146756	2654	}
mbed_official	76:aeb1df146756	2655	}
mbed_official	76:aeb1df146756	2656
mbed_official	76:aeb1df146756	2657	/**
mbed_official	76:aeb1df146756	2658	* @brief Selects the TIMx peripheral Capture Compare DMA source.
mbed_official	76:aeb1df146756	2659	* @param TIMx: where x can be 1, 2, 3, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2660	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2661	* @param NewState: new state of the Capture Compare DMA source
mbed_official	76:aeb1df146756	2662	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	2663	* @retval None
mbed_official	76:aeb1df146756	2664	*/
mbed_official	76:aeb1df146756	2665	void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	2666	{
mbed_official	76:aeb1df146756	2667	/* Check the parameters */
mbed_official	76:aeb1df146756	2668	assert_param(IS_TIM_LIST5_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2669	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	2670
mbed_official	76:aeb1df146756	2671	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	2672	{
mbed_official	76:aeb1df146756	2673	/* Set the CCDS Bit */
mbed_official	76:aeb1df146756	2674	TIMx->CR2 \|= TIM_CR2_CCDS;
mbed_official	76:aeb1df146756	2675	}
mbed_official	76:aeb1df146756	2676	else
mbed_official	76:aeb1df146756	2677	{
mbed_official	76:aeb1df146756	2678	/* Reset the CCDS Bit */
mbed_official	76:aeb1df146756	2679	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCDS);
mbed_official	76:aeb1df146756	2680	}
mbed_official	76:aeb1df146756	2681	}
mbed_official	76:aeb1df146756	2682
mbed_official	76:aeb1df146756	2683	/**
mbed_official	76:aeb1df146756	2684	* @}
mbed_official	76:aeb1df146756	2685	*/
mbed_official	76:aeb1df146756	2686
mbed_official	76:aeb1df146756	2687	/** @defgroup TIM_Group6 Clocks management functions
mbed_official	76:aeb1df146756	2688	* @brief Clocks management functions
mbed_official	76:aeb1df146756	2689	*
mbed_official	76:aeb1df146756	2690	@verbatim
mbed_official	76:aeb1df146756	2691	===============================================================================
mbed_official	76:aeb1df146756	2692	##### Clocks management functions #####
mbed_official	76:aeb1df146756	2693	===============================================================================
mbed_official	76:aeb1df146756	2694
mbed_official	76:aeb1df146756	2695	@endverbatim
mbed_official	76:aeb1df146756	2696	* @{
mbed_official	76:aeb1df146756	2697	*/
mbed_official	76:aeb1df146756	2698
mbed_official	76:aeb1df146756	2699	/**
mbed_official	76:aeb1df146756	2700	* @brief Configures the TIMx internal Clock
mbed_official	76:aeb1df146756	2701	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2702	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2703	* @retval None
mbed_official	76:aeb1df146756	2704	*/
mbed_official	76:aeb1df146756	2705	void TIM_InternalClockConfig(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2706	{
mbed_official	76:aeb1df146756	2707	/* Check the parameters */
mbed_official	76:aeb1df146756	2708	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2709	/* Disable slave mode to clock the prescaler directly with the internal clock */
mbed_official	76:aeb1df146756	2710	TIMx->SMCR &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official	76:aeb1df146756	2711	}
mbed_official	76:aeb1df146756	2712
mbed_official	76:aeb1df146756	2713	/**
mbed_official	76:aeb1df146756	2714	* @brief Configures the TIMx Internal Trigger as External Clock
mbed_official	76:aeb1df146756	2715	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2716	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2717	* @param TIM_ITRSource: Trigger source.
mbed_official	76:aeb1df146756	2718	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2719	* @arg TIM_TS_ITR0: Internal Trigger 0
mbed_official	76:aeb1df146756	2720	* @arg TIM_TS_ITR1: Internal Trigger 1
mbed_official	76:aeb1df146756	2721	* @arg TIM_TS_ITR2: Internal Trigger 2
mbed_official	76:aeb1df146756	2722	* @arg TIM_TS_ITR3: Internal Trigger 3
mbed_official	76:aeb1df146756	2723	* @retval None
mbed_official	76:aeb1df146756	2724	*/
mbed_official	76:aeb1df146756	2725	void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource)
mbed_official	76:aeb1df146756	2726	{
mbed_official	76:aeb1df146756	2727	/* Check the parameters */
mbed_official	76:aeb1df146756	2728	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2729	assert_param(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource));
mbed_official	76:aeb1df146756	2730	/* Select the Internal Trigger */
mbed_official	76:aeb1df146756	2731	TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource);
mbed_official	76:aeb1df146756	2732	/* Select the External clock mode1 */
mbed_official	76:aeb1df146756	2733	TIMx->SMCR \|= TIM_SlaveMode_External1;
mbed_official	76:aeb1df146756	2734	}
mbed_official	76:aeb1df146756	2735
mbed_official	76:aeb1df146756	2736	/**
mbed_official	76:aeb1df146756	2737	* @brief Configures the TIMx Trigger as External Clock
mbed_official	76:aeb1df146756	2738	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2739	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2740	* @param TIM_TIxExternalCLKSource: Trigger source.
mbed_official	76:aeb1df146756	2741	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2742	* @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector
mbed_official	76:aeb1df146756	2743	* @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1
mbed_official	76:aeb1df146756	2744	* @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2
mbed_official	76:aeb1df146756	2745	* @param TIM_ICPolarity: specifies the TIx Polarity.
mbed_official	76:aeb1df146756	2746	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2747	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	2748	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	2749	* @param ICFilter: specifies the filter value.
mbed_official	76:aeb1df146756	2750	* This parameter must be a value between 0x0 and 0xF.
mbed_official	76:aeb1df146756	2751	* @retval None
mbed_official	76:aeb1df146756	2752	*/
mbed_official	76:aeb1df146756	2753	void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
mbed_official	76:aeb1df146756	2754	uint16_t TIM_ICPolarity, uint16_t ICFilter)
mbed_official	76:aeb1df146756	2755	{
mbed_official	76:aeb1df146756	2756	/* Check the parameters */
mbed_official	76:aeb1df146756	2757	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2758	assert_param(IS_TIM_IC_POLARITY(TIM_ICPolarity));
mbed_official	76:aeb1df146756	2759	assert_param(IS_TIM_IC_FILTER(ICFilter));
mbed_official	76:aeb1df146756	2760
mbed_official	76:aeb1df146756	2761	/* Configure the Timer Input Clock Source */
mbed_official	76:aeb1df146756	2762	if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2)
mbed_official	76:aeb1df146756	2763	{
mbed_official	76:aeb1df146756	2764	TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
mbed_official	76:aeb1df146756	2765	}
mbed_official	76:aeb1df146756	2766	else
mbed_official	76:aeb1df146756	2767	{
mbed_official	76:aeb1df146756	2768	TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
mbed_official	76:aeb1df146756	2769	}
mbed_official	76:aeb1df146756	2770	/* Select the Trigger source */
mbed_official	76:aeb1df146756	2771	TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource);
mbed_official	76:aeb1df146756	2772	/* Select the External clock mode1 */
mbed_official	76:aeb1df146756	2773	TIMx->SMCR \|= TIM_SlaveMode_External1;
mbed_official	76:aeb1df146756	2774	}
mbed_official	76:aeb1df146756	2775
mbed_official	76:aeb1df146756	2776	/**
mbed_official	76:aeb1df146756	2777	* @brief Configures the External clock Mode1
mbed_official	76:aeb1df146756	2778	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2779	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2780	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	76:aeb1df146756	2781	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2782	* @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official	76:aeb1df146756	2783	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	76:aeb1df146756	2784	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	76:aeb1df146756	2785	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	76:aeb1df146756	2786	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	76:aeb1df146756	2787	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2788	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	76:aeb1df146756	2789	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	76:aeb1df146756	2790	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	76:aeb1df146756	2791	* This parameter must be a value between 0x00 and 0x0F
mbed_official	76:aeb1df146756	2792	* @retval None
mbed_official	76:aeb1df146756	2793	*/
mbed_official	76:aeb1df146756	2794	void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official	76:aeb1df146756	2795	uint16_t ExtTRGFilter)
mbed_official	76:aeb1df146756	2796	{
mbed_official	76:aeb1df146756	2797	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	2798
mbed_official	76:aeb1df146756	2799	/* Check the parameters */
mbed_official	76:aeb1df146756	2800	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2801	assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official	76:aeb1df146756	2802	assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official	76:aeb1df146756	2803	assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official	76:aeb1df146756	2804
mbed_official	76:aeb1df146756	2805	/* Configure the ETR Clock source */
mbed_official	76:aeb1df146756	2806	TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
mbed_official	76:aeb1df146756	2807
mbed_official	76:aeb1df146756	2808	/* Get the TIMx SMCR register value */
mbed_official	76:aeb1df146756	2809	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	2810	/* Reset the SMS Bits */
mbed_official	76:aeb1df146756	2811	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official	76:aeb1df146756	2812	/* Select the External clock mode1 */
mbed_official	76:aeb1df146756	2813	tmpsmcr \|= TIM_SlaveMode_External1;
mbed_official	76:aeb1df146756	2814	/* Select the Trigger selection : ETRF */
mbed_official	76:aeb1df146756	2815	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS));
mbed_official	76:aeb1df146756	2816	tmpsmcr \|= TIM_TS_ETRF;
mbed_official	76:aeb1df146756	2817	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	2818	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	2819	}
mbed_official	76:aeb1df146756	2820
mbed_official	76:aeb1df146756	2821	/**
mbed_official	76:aeb1df146756	2822	* @brief Configures the External clock Mode2
mbed_official	76:aeb1df146756	2823	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2824	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2825	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	76:aeb1df146756	2826	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2827	* @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official	76:aeb1df146756	2828	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	76:aeb1df146756	2829	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	76:aeb1df146756	2830	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	76:aeb1df146756	2831	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	76:aeb1df146756	2832	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2833	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	76:aeb1df146756	2834	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	76:aeb1df146756	2835	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	76:aeb1df146756	2836	* This parameter must be a value between 0x00 and 0x0F
mbed_official	76:aeb1df146756	2837	* @retval None
mbed_official	76:aeb1df146756	2838	*/
mbed_official	76:aeb1df146756	2839	void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official	76:aeb1df146756	2840	uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)
mbed_official	76:aeb1df146756	2841	{
mbed_official	76:aeb1df146756	2842	/* Check the parameters */
mbed_official	76:aeb1df146756	2843	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2844	assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official	76:aeb1df146756	2845	assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official	76:aeb1df146756	2846	assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official	76:aeb1df146756	2847
mbed_official	76:aeb1df146756	2848	/* Configure the ETR Clock source */
mbed_official	76:aeb1df146756	2849	TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
mbed_official	76:aeb1df146756	2850	/* Enable the External clock mode2 */
mbed_official	76:aeb1df146756	2851	TIMx->SMCR \|= TIM_SMCR_ECE;
mbed_official	76:aeb1df146756	2852	}
mbed_official	76:aeb1df146756	2853
mbed_official	76:aeb1df146756	2854	/**
mbed_official	76:aeb1df146756	2855	* @}
mbed_official	76:aeb1df146756	2856	*/
mbed_official	76:aeb1df146756	2857
mbed_official	76:aeb1df146756	2858	/** @defgroup TIM_Group7 Synchronization management functions
mbed_official	76:aeb1df146756	2859	* @brief Synchronization management functions
mbed_official	76:aeb1df146756	2860	*
mbed_official	76:aeb1df146756	2861	@verbatim
mbed_official	76:aeb1df146756	2862	===============================================================================
mbed_official	76:aeb1df146756	2863	##### Synchronization management functions #####
mbed_official	76:aeb1df146756	2864	===============================================================================
mbed_official	76:aeb1df146756	2865	* TIM Driver: how to use it in synchronization Mode *
mbed_official	76:aeb1df146756	2866	===============================================================================
mbed_official	76:aeb1df146756	2867	[..] Case of two/several Timers
mbed_official	76:aeb1df146756	2868	(#) Configure the Master Timers using the following functions:
mbed_official	76:aeb1df146756	2869	(++) void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2870	uint16_t TIM_TRGOSource).
mbed_official	76:aeb1df146756	2871	(++) void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2872	uint16_t TIM_MasterSlaveMode);
mbed_official	76:aeb1df146756	2873	(#) Configure the Slave Timers using the following functions:
mbed_official	76:aeb1df146756	2874	(++) void TIM_SelectInputTrigger(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2875	uint16_t TIM_InputTriggerSource);
mbed_official	76:aeb1df146756	2876	(++) void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official	76:aeb1df146756	2877	[..] Case of Timers and external trigger(ETR pin)
mbed_official	76:aeb1df146756	2878	(#) Configure the Etrenal trigger using this function:
mbed_official	76:aeb1df146756	2879	(++) void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official	76:aeb1df146756	2880	uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
mbed_official	76:aeb1df146756	2881	(#) Configure the Slave Timers using the following functions:
mbed_official	76:aeb1df146756	2882	(++) void TIM_SelectInputTrigger(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2883	uint16_t TIM_InputTriggerSource);
mbed_official	76:aeb1df146756	2884	(++) void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official	76:aeb1df146756	2885
mbed_official	76:aeb1df146756	2886	@endverbatim
mbed_official	76:aeb1df146756	2887	* @{
mbed_official	76:aeb1df146756	2888	*/
mbed_official	76:aeb1df146756	2889	/**
mbed_official	76:aeb1df146756	2890	* @brief Selects the Input Trigger source
mbed_official	76:aeb1df146756	2891	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2892	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2893	* @param TIM_InputTriggerSource: The Input Trigger source.
mbed_official	76:aeb1df146756	2894	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2895	* @arg TIM_TS_ITR0: Internal Trigger 0
mbed_official	76:aeb1df146756	2896	* @arg TIM_TS_ITR1: Internal Trigger 1
mbed_official	76:aeb1df146756	2897	* @arg TIM_TS_ITR2: Internal Trigger 2
mbed_official	76:aeb1df146756	2898	* @arg TIM_TS_ITR3: Internal Trigger 3
mbed_official	76:aeb1df146756	2899	* @arg TIM_TS_TI1F_ED: TI1 Edge Detector
mbed_official	76:aeb1df146756	2900	* @arg TIM_TS_TI1FP1: Filtered Timer Input 1
mbed_official	76:aeb1df146756	2901	* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
mbed_official	76:aeb1df146756	2902	* @arg TIM_TS_ETRF: External Trigger input
mbed_official	76:aeb1df146756	2903	* @retval None
mbed_official	76:aeb1df146756	2904	*/
mbed_official	76:aeb1df146756	2905	void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource)
mbed_official	76:aeb1df146756	2906	{
mbed_official	76:aeb1df146756	2907	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	2908
mbed_official	76:aeb1df146756	2909	/* Check the parameters */
mbed_official	76:aeb1df146756	2910	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2911	assert_param(IS_TIM_TRIGGER_SELECTION(TIM_InputTriggerSource));
mbed_official	76:aeb1df146756	2912
mbed_official	76:aeb1df146756	2913	/* Get the TIMx SMCR register value */
mbed_official	76:aeb1df146756	2914	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	2915	/* Reset the TS Bits */
mbed_official	76:aeb1df146756	2916	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS));
mbed_official	76:aeb1df146756	2917	/* Set the Input Trigger source */
mbed_official	76:aeb1df146756	2918	tmpsmcr \|= TIM_InputTriggerSource;
mbed_official	76:aeb1df146756	2919	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	2920	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	2921	}
mbed_official	76:aeb1df146756	2922
mbed_official	76:aeb1df146756	2923	/**
mbed_official	76:aeb1df146756	2924	* @brief Selects the TIMx Trigger Output Mode.
mbed_official	76:aeb1df146756	2925	* @param TIMx: where x can be 1, 2, 3, 6, 7, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2926	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2927	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2928	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2929	* @param TIM_TRGOSource: specifies the Trigger Output source.
mbed_official	76:aeb1df146756	2930	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2931	*
mbed_official	76:aeb1df146756	2932	* - For all TIMx
mbed_official	76:aeb1df146756	2933	* @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2934	* @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2935	* @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2936	*
mbed_official	76:aeb1df146756	2937	* - For all TIMx except TIM6 and TIM7
mbed_official	76:aeb1df146756	2938	* @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag
mbed_official	76:aeb1df146756	2939	* is to be set, as soon as a capture or compare match occurs (TRGO).
mbed_official	76:aeb1df146756	2940	* @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2941	* @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2942	* @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2943	* @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2944	*
mbed_official	76:aeb1df146756	2945	* @retval None
mbed_official	76:aeb1df146756	2946	*/
mbed_official	76:aeb1df146756	2947	void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource)
mbed_official	76:aeb1df146756	2948	{
mbed_official	76:aeb1df146756	2949	/* Check the parameters */
mbed_official	76:aeb1df146756	2950	assert_param(IS_TIM_LIST9_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2951	assert_param(IS_TIM_TRGO_SOURCE(TIM_TRGOSource));
mbed_official	76:aeb1df146756	2952
mbed_official	76:aeb1df146756	2953	/* Reset the MMS Bits */
mbed_official	76:aeb1df146756	2954	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_MMS);
mbed_official	76:aeb1df146756	2955	/* Select the TRGO source */
mbed_official	76:aeb1df146756	2956	TIMx->CR2 \|= TIM_TRGOSource;
mbed_official	76:aeb1df146756	2957	}
mbed_official	76:aeb1df146756	2958
mbed_official	76:aeb1df146756	2959	/**
mbed_official	76:aeb1df146756	2960	* @brief Selects the TIMx Slave Mode.
mbed_official	76:aeb1df146756	2961	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2962	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2963	* @param TIM_SlaveMode: specifies the Timer Slave Mode.
mbed_official	76:aeb1df146756	2964	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2965	* @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes
mbed_official	76:aeb1df146756	2966	* the counter and triggers an update of the registers.
mbed_official	76:aeb1df146756	2967	* @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high.
mbed_official	76:aeb1df146756	2968	* @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI.
mbed_official	76:aeb1df146756	2969	* @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter.
mbed_official	76:aeb1df146756	2970	* @retval None
mbed_official	76:aeb1df146756	2971	*/
mbed_official	76:aeb1df146756	2972	void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode)
mbed_official	76:aeb1df146756	2973	{
mbed_official	76:aeb1df146756	2974	/* Check the parameters */
mbed_official	76:aeb1df146756	2975	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2976	assert_param(IS_TIM_SLAVE_MODE(TIM_SlaveMode));
mbed_official	76:aeb1df146756	2977
mbed_official	76:aeb1df146756	2978	/* Reset the SMS Bits */
mbed_official	76:aeb1df146756	2979	TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_SMS);
mbed_official	76:aeb1df146756	2980	/* Select the Slave Mode */
mbed_official	76:aeb1df146756	2981	TIMx->SMCR \|= TIM_SlaveMode;
mbed_official	76:aeb1df146756	2982	}
mbed_official	76:aeb1df146756	2983
mbed_official	76:aeb1df146756	2984	/**
mbed_official	76:aeb1df146756	2985	* @brief Sets or Resets the TIMx Master/Slave Mode.
mbed_official	76:aeb1df146756	2986	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2987	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2988	* @param TIM_MasterSlaveMode: specifies the Timer Master Slave Mode.
mbed_official	76:aeb1df146756	2989	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2990	* @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer
mbed_official	76:aeb1df146756	2991	* and its slaves (through TRGO).
mbed_official	76:aeb1df146756	2992	* @arg TIM_MasterSlaveMode_Disable: No action
mbed_official	76:aeb1df146756	2993	* @retval None
mbed_official	76:aeb1df146756	2994	*/
mbed_official	76:aeb1df146756	2995	void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode)
mbed_official	76:aeb1df146756	2996	{
mbed_official	76:aeb1df146756	2997	/* Check the parameters */
mbed_official	76:aeb1df146756	2998	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2999	assert_param(IS_TIM_MSM_STATE(TIM_MasterSlaveMode));
mbed_official	76:aeb1df146756	3000
mbed_official	76:aeb1df146756	3001	/* Reset the MSM Bit */
mbed_official	76:aeb1df146756	3002	TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_MSM);
mbed_official	76:aeb1df146756	3003
mbed_official	76:aeb1df146756	3004	/* Set or Reset the MSM Bit */
mbed_official	76:aeb1df146756	3005	TIMx->SMCR \|= TIM_MasterSlaveMode;
mbed_official	76:aeb1df146756	3006	}
mbed_official	76:aeb1df146756	3007
mbed_official	76:aeb1df146756	3008	/**
mbed_official	76:aeb1df146756	3009	* @brief Configures the TIMx External Trigger (ETR).
mbed_official	76:aeb1df146756	3010	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3011	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3012	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	76:aeb1df146756	3013	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3014	* @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official	76:aeb1df146756	3015	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	76:aeb1df146756	3016	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	76:aeb1df146756	3017	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	76:aeb1df146756	3018	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	76:aeb1df146756	3019	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3020	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	76:aeb1df146756	3021	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	76:aeb1df146756	3022	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	76:aeb1df146756	3023	* This parameter must be a value between 0x00 and 0x0F
mbed_official	76:aeb1df146756	3024	* @retval None
mbed_official	76:aeb1df146756	3025	*/
mbed_official	76:aeb1df146756	3026	void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official	76:aeb1df146756	3027	uint16_t ExtTRGFilter)
mbed_official	76:aeb1df146756	3028	{
mbed_official	76:aeb1df146756	3029	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	3030
mbed_official	76:aeb1df146756	3031	/* Check the parameters */
mbed_official	76:aeb1df146756	3032	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	3033	assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official	76:aeb1df146756	3034	assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official	76:aeb1df146756	3035	assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official	76:aeb1df146756	3036
mbed_official	76:aeb1df146756	3037	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	3038	/* Reset the ETR Bits */
mbed_official	76:aeb1df146756	3039	tmpsmcr &= SMCR_ETR_MASK;
mbed_official	76:aeb1df146756	3040	/* Set the Prescaler, the Filter value and the Polarity */
mbed_official	76:aeb1df146756	3041	tmpsmcr \|= (uint16_t)(TIM_ExtTRGPrescaler \| (uint16_t)(TIM_ExtTRGPolarity \| (uint16_t)(ExtTRGFilter << (uint16_t)8)));
mbed_official	76:aeb1df146756	3042	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	3043	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	3044	}
mbed_official	76:aeb1df146756	3045
mbed_official	76:aeb1df146756	3046	/**
mbed_official	76:aeb1df146756	3047	* @}
mbed_official	76:aeb1df146756	3048	*/
mbed_official	76:aeb1df146756	3049
mbed_official	76:aeb1df146756	3050	/** @defgroup TIM_Group8 Specific interface management functions
mbed_official	76:aeb1df146756	3051	* @brief Specific interface management functions
mbed_official	76:aeb1df146756	3052	*
mbed_official	76:aeb1df146756	3053	@verbatim
mbed_official	76:aeb1df146756	3054	===============================================================================
mbed_official	76:aeb1df146756	3055	##### Specific interface management functions #####
mbed_official	76:aeb1df146756	3056	===============================================================================
mbed_official	76:aeb1df146756	3057
mbed_official	76:aeb1df146756	3058	@endverbatim
mbed_official	76:aeb1df146756	3059	* @{
mbed_official	76:aeb1df146756	3060	*/
mbed_official	76:aeb1df146756	3061
mbed_official	76:aeb1df146756	3062	/**
mbed_official	76:aeb1df146756	3063	* @brief Configures the TIMx Encoder Interface.
mbed_official	76:aeb1df146756	3064	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3065	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3066	* @param TIM_EncoderMode: specifies the TIMx Encoder Mode.
mbed_official	76:aeb1df146756	3067	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3068	* @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level.
mbed_official	76:aeb1df146756	3069	* @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level.
mbed_official	76:aeb1df146756	3070	* @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending
mbed_official	76:aeb1df146756	3071	* on the level of the other input.
mbed_official	76:aeb1df146756	3072	* @param TIM_IC1Polarity: specifies the IC1 Polarity
mbed_official	76:aeb1df146756	3073	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	3074	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	3075	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	3076	* @param TIM_IC2Polarity: specifies the IC2 Polarity
mbed_official	76:aeb1df146756	3077	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	3078	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	3079	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	3080	* @retval None
mbed_official	76:aeb1df146756	3081	*/
mbed_official	76:aeb1df146756	3082	void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
mbed_official	76:aeb1df146756	3083	uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity)
mbed_official	76:aeb1df146756	3084	{
mbed_official	76:aeb1df146756	3085	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	3086	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	3087	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	3088
mbed_official	76:aeb1df146756	3089	/* Check the parameters */
mbed_official	76:aeb1df146756	3090	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	3091	assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode));
mbed_official	76:aeb1df146756	3092	assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity));
mbed_official	76:aeb1df146756	3093	assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity));
mbed_official	76:aeb1df146756	3094
mbed_official	76:aeb1df146756	3095	/* Get the TIMx SMCR register value */
mbed_official	76:aeb1df146756	3096	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	3097	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	3098	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	3099	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	3100	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3101	/* Set the encoder Mode */
mbed_official	76:aeb1df146756	3102	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official	76:aeb1df146756	3103	tmpsmcr \|= TIM_EncoderMode;
mbed_official	76:aeb1df146756	3104	/* Select the Capture Compare 1 and the Capture Compare 2 as input */
mbed_official	76:aeb1df146756	3105	tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S)));
mbed_official	76:aeb1df146756	3106	tmpccmr1 \|= TIM_CCMR1_CC1S_0 \| TIM_CCMR1_CC2S_0;
mbed_official	76:aeb1df146756	3107	/* Set the TI1 and the TI2 Polarities */
mbed_official	76:aeb1df146756	3108	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P \| TIM_CCER_CC1NP)) & (uint16_t)~((uint16_t)(TIM_CCER_CC2P \| TIM_CCER_CC2NP));
mbed_official	76:aeb1df146756	3109	tmpccer \|= (uint16_t)(TIM_IC1Polarity \| (uint16_t)(TIM_IC2Polarity << (uint16_t)4));
mbed_official	76:aeb1df146756	3110	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	3111	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	3112	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	3113	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	3114	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	3115	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3116	}
mbed_official	76:aeb1df146756	3117
mbed_official	76:aeb1df146756	3118	/**
mbed_official	76:aeb1df146756	3119	* @brief Enables or disables the TIMx's Hall sensor interface.
mbed_official	76:aeb1df146756	3120	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3121	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3122	* @param NewState: new state of the TIMx Hall sensor interface.
mbed_official	76:aeb1df146756	3123	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	3124	* @retval None
mbed_official	76:aeb1df146756	3125	*/
mbed_official	76:aeb1df146756	3126	void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	3127	{
mbed_official	76:aeb1df146756	3128	/* Check the parameters */
mbed_official	76:aeb1df146756	3129	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	3130	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	3131
mbed_official	76:aeb1df146756	3132	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	3133	{
mbed_official	76:aeb1df146756	3134	/* Set the TI1S Bit */
mbed_official	76:aeb1df146756	3135	TIMx->CR2 \|= TIM_CR2_TI1S;
mbed_official	76:aeb1df146756	3136	}
mbed_official	76:aeb1df146756	3137	else
mbed_official	76:aeb1df146756	3138	{
mbed_official	76:aeb1df146756	3139	/* Reset the TI1S Bit */
mbed_official	76:aeb1df146756	3140	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_TI1S);
mbed_official	76:aeb1df146756	3141	}
mbed_official	76:aeb1df146756	3142	}
mbed_official	76:aeb1df146756	3143
mbed_official	76:aeb1df146756	3144	/**
mbed_official	76:aeb1df146756	3145	* @}
mbed_official	76:aeb1df146756	3146	*/
mbed_official	76:aeb1df146756	3147
mbed_official	76:aeb1df146756	3148	/** @defgroup TIM_Group9 Specific remapping management function
mbed_official	76:aeb1df146756	3149	* @brief Specific remapping management function
mbed_official	76:aeb1df146756	3150	*
mbed_official	76:aeb1df146756	3151	@verbatim
mbed_official	76:aeb1df146756	3152	===============================================================================
mbed_official	76:aeb1df146756	3153	##### Specific remapping management function #####
mbed_official	76:aeb1df146756	3154	===============================================================================
mbed_official	76:aeb1df146756	3155
mbed_official	76:aeb1df146756	3156	@endverbatim
mbed_official	76:aeb1df146756	3157	* @{
mbed_official	76:aeb1df146756	3158	*/
mbed_official	76:aeb1df146756	3159	/**
mbed_official	76:aeb1df146756	3160	* @brief Configures the TIM14 Remapping input Capabilities.
mbed_official	76:aeb1df146756	3161	* @param TIMx: where x can be 14 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3162	* @param TIM_Remap: specifies the TIM input reampping source.
mbed_official	76:aeb1df146756	3163	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3164	* @arg TIM14_GPIO: TIM14 Channel 1 is connected to GPIO.
mbed_official	76:aeb1df146756	3165	* @arg TIM14_RTC_CLK: TIM14 Channel 1 is connected to RTC input clock.
mbed_official	76:aeb1df146756	3166	* RTC input clock can be LSE, LSI or HSE/div128.
mbed_official	76:aeb1df146756	3167	* @arg TIM14_HSE_DIV32: TIM14 Channel 1 is connected to HSE/32 clock.
mbed_official	76:aeb1df146756	3168	* @arg TIM14_MCO: TIM14 Channel 1 is connected to MCO clock.
mbed_official	76:aeb1df146756	3169	* MCO clock can be HSI14, SYSCLK, HSI, HSE or PLL/2.
mbed_official	76:aeb1df146756	3170	* @retval None
mbed_official	76:aeb1df146756	3171	*/
mbed_official	76:aeb1df146756	3172	void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap)
mbed_official	76:aeb1df146756	3173	{
mbed_official	76:aeb1df146756	3174	/* Check the parameters */
mbed_official	76:aeb1df146756	3175	assert_param(IS_TIM_LIST11_PERIPH(TIMx));
mbed_official	76:aeb1df146756	3176	assert_param(IS_TIM_REMAP(TIM_Remap));
mbed_official	76:aeb1df146756	3177
mbed_official	76:aeb1df146756	3178	/* Set the Timer remapping configuration */
mbed_official	76:aeb1df146756	3179	TIMx->OR = TIM_Remap;
mbed_official	76:aeb1df146756	3180	}
mbed_official	76:aeb1df146756	3181
mbed_official	76:aeb1df146756	3182	/**
mbed_official	76:aeb1df146756	3183	* @}
mbed_official	76:aeb1df146756	3184	*/
mbed_official	76:aeb1df146756	3185
mbed_official	76:aeb1df146756	3186	/**
mbed_official	76:aeb1df146756	3187	* @brief Configure the TI1 as Input.
mbed_official	76:aeb1df146756	3188	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3189	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3190	* @param TIM_ICPolarity: The Input Polarity.
mbed_official	76:aeb1df146756	3191	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3192	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	3193	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	3194	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	3195	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3196	* @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
mbed_official	76:aeb1df146756	3197	* @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
mbed_official	76:aeb1df146756	3198	* @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	3199	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	3200	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	3201	* @retval None
mbed_official	76:aeb1df146756	3202	*/
mbed_official	76:aeb1df146756	3203	static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	3204	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	3205	{
mbed_official	76:aeb1df146756	3206	uint16_t tmpccmr1 = 0, tmpccer = 0;
mbed_official	76:aeb1df146756	3207	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	76:aeb1df146756	3208	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E);
mbed_official	76:aeb1df146756	3209	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	3210	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3211	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	3212	tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC1F)));
mbed_official	76:aeb1df146756	3213	tmpccmr1 \|= (uint16_t)(TIM_ICSelection \| (uint16_t)(TIM_ICFilter << (uint16_t)4));
mbed_official	76:aeb1df146756	3214
mbed_official	76:aeb1df146756	3215	/* Select the Polarity and set the CC1E Bit */
mbed_official	76:aeb1df146756	3216	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P \| TIM_CCER_CC1NP));
mbed_official	76:aeb1df146756	3217	tmpccer \|= (uint16_t)(TIM_ICPolarity \| (uint16_t)TIM_CCER_CC1E);
mbed_official	76:aeb1df146756	3218	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	76:aeb1df146756	3219	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	3220	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3221	}
mbed_official	76:aeb1df146756	3222
mbed_official	76:aeb1df146756	3223	/**
mbed_official	76:aeb1df146756	3224	* @brief Configure the TI2 as Input.
mbed_official	76:aeb1df146756	3225	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3226	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3227	* @param TIM_ICPolarity: The Input Polarity.
mbed_official	76:aeb1df146756	3228	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3229	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	3230	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	3231	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	3232	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3233	* @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
mbed_official	76:aeb1df146756	3234	* @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
mbed_official	76:aeb1df146756	3235	* @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	3236	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	3237	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	3238	* @retval None
mbed_official	76:aeb1df146756	3239	*/
mbed_official	76:aeb1df146756	3240	static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	3241	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	3242	{
mbed_official	76:aeb1df146756	3243	uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0;
mbed_official	76:aeb1df146756	3244	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	76:aeb1df146756	3245	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC2E);
mbed_official	76:aeb1df146756	3246	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	3247	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3248	tmp = (uint16_t)(TIM_ICPolarity << 4);
mbed_official	76:aeb1df146756	3249	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	3250	tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC2S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC2F)));
mbed_official	76:aeb1df146756	3251	tmpccmr1 \|= (uint16_t)(TIM_ICFilter << 12);
mbed_official	76:aeb1df146756	3252	tmpccmr1 \|= (uint16_t)(TIM_ICSelection << 8);
mbed_official	76:aeb1df146756	3253	/* Select the Polarity and set the CC2E Bit */
mbed_official	76:aeb1df146756	3254	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P \| TIM_CCER_CC2NP));
mbed_official	76:aeb1df146756	3255	tmpccer \|= (uint16_t)(tmp \| (uint16_t)TIM_CCER_CC2E);
mbed_official	76:aeb1df146756	3256	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	76:aeb1df146756	3257	TIMx->CCMR1 = tmpccmr1 ;
mbed_official	76:aeb1df146756	3258	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3259	}
mbed_official	76:aeb1df146756	3260
mbed_official	76:aeb1df146756	3261	/**
mbed_official	76:aeb1df146756	3262	* @brief Configure the TI3 as Input.
mbed_official	76:aeb1df146756	3263	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3264	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3265	* @param TIM_ICPolarity: The Input Polarity.
mbed_official	76:aeb1df146756	3266	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3267	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	3268	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	3269	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	3270	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3271	* @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
mbed_official	76:aeb1df146756	3272	* @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
mbed_official	76:aeb1df146756	3273	* @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	3274	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	3275	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	3276	* @retval None
mbed_official	76:aeb1df146756	3277	*/
mbed_official	76:aeb1df146756	3278	static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	3279	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	3280	{
mbed_official	76:aeb1df146756	3281	uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
mbed_official	76:aeb1df146756	3282	/* Disable the Channel 3: Reset the CC3E Bit */
mbed_official	76:aeb1df146756	3283	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC3E);
mbed_official	76:aeb1df146756	3284	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	3285	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3286	tmp = (uint16_t)(TIM_ICPolarity << 8);
mbed_official	76:aeb1df146756	3287	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	3288	tmpccmr2 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR2_CC3S)) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC3F)));
mbed_official	76:aeb1df146756	3289	tmpccmr2 \|= (uint16_t)(TIM_ICSelection \| (uint16_t)(TIM_ICFilter << (uint16_t)4));
mbed_official	76:aeb1df146756	3290	/* Select the Polarity and set the CC3E Bit */
mbed_official	76:aeb1df146756	3291	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P \| TIM_CCER_CC3NP));
mbed_official	76:aeb1df146756	3292	tmpccer \|= (uint16_t)(tmp \| (uint16_t)TIM_CCER_CC3E);
mbed_official	76:aeb1df146756	3293	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	76:aeb1df146756	3294	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	3295	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3296	}
mbed_official	76:aeb1df146756	3297
mbed_official	76:aeb1df146756	3298	/**
mbed_official	76:aeb1df146756	3299	* @brief Configure the TI4 as Input.
mbed_official	76:aeb1df146756	3300	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3301	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3302	* @param TIM_ICPolarity: The Input Polarity.
mbed_official	76:aeb1df146756	3303	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3304	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	3305	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	3306	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	3307	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3308	* @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
mbed_official	76:aeb1df146756	3309	* @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
mbed_official	76:aeb1df146756	3310	* @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	3311	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	3312	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	3313	* @retval None
mbed_official	76:aeb1df146756	3314	*/
mbed_official	76:aeb1df146756	3315	static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	3316	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	3317	{
mbed_official	76:aeb1df146756	3318	uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
mbed_official	76:aeb1df146756	3319
mbed_official	76:aeb1df146756	3320	/* Disable the Channel 4: Reset the CC4E Bit */
mbed_official	76:aeb1df146756	3321	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC4E);
mbed_official	76:aeb1df146756	3322	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	3323	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3324	tmp = (uint16_t)(TIM_ICPolarity << 12);
mbed_official	76:aeb1df146756	3325	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	3326	tmpccmr2 &= (uint16_t)((uint16_t)(~(uint16_t)TIM_CCMR2_CC4S) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC4F)));
mbed_official	76:aeb1df146756	3327	tmpccmr2 \|= (uint16_t)(TIM_ICSelection << 8);
mbed_official	76:aeb1df146756	3328	tmpccmr2 \|= (uint16_t)(TIM_ICFilter << 12);
mbed_official	76:aeb1df146756	3329	/* Select the Polarity and set the CC4E Bit */
mbed_official	76:aeb1df146756	3330	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC4P \| TIM_CCER_CC4NP));
mbed_official	76:aeb1df146756	3331	tmpccer \|= (uint16_t)(tmp \| (uint16_t)TIM_CCER_CC4E);
mbed_official	76:aeb1df146756	3332	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	76:aeb1df146756	3333	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	3334	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3335	}
mbed_official	76:aeb1df146756	3336
mbed_official	76:aeb1df146756	3337	/**
mbed_official	76:aeb1df146756	3338	* @}
mbed_official	76:aeb1df146756	3339	*/
mbed_official	76:aeb1df146756	3340
mbed_official	76:aeb1df146756	3341	/**
mbed_official	76:aeb1df146756	3342	* @}
mbed_official	76:aeb1df146756	3343	*/
mbed_official	76:aeb1df146756	3344
mbed_official	76:aeb1df146756	3345	/**
mbed_official	76:aeb1df146756	3346	* @}
mbed_official	76:aeb1df146756	3347	*/
mbed_official	76:aeb1df146756	3348
mbed_official	76:aeb1df146756	3349	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	29 Jun 2014
Imports:	3
Forks:	0
Commits:	135
Dependents:	1
Dependencies:	0
Followers:	3

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F030R8/stm32f0xx_tim.c@76:aeb1df146756, 2014-01-27 (annotated)

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