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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x_hrtim.c@125:23cc3068a9e4, 2014-03-19 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Mar 19 10:15:22 2014 +0000
- Revision:
- 125:23cc3068a9e4
Synchronized with git revision ace35dfba3748c7cdc102eb38ec6b9e1067c3252
Full URL: https://github.com/mbedmicro/mbed/commit/ace35dfba3748c7cdc102eb38ec6b9e1067c3252/
[NUCLEO_F302R8] Add cmsis and hal files + change F401RE clock to 84MHz
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 125:23cc3068a9e4 | 1 | /** |
| mbed_official | 125:23cc3068a9e4 | 2 | ****************************************************************************** |
| mbed_official | 125:23cc3068a9e4 | 3 | * @file stm32f30x_hrtim.c |
| mbed_official | 125:23cc3068a9e4 | 4 | * @author MCD Application Team |
| mbed_official | 125:23cc3068a9e4 | 5 | * @version V1.1.0 |
| mbed_official | 125:23cc3068a9e4 | 6 | * @date 27-February-2014 |
| mbed_official | 125:23cc3068a9e4 | 7 | * @brief HRTIMx module driver. |
| mbed_official | 125:23cc3068a9e4 | 8 | * |
| mbed_official | 125:23cc3068a9e4 | 9 | * This file provides firmware functions to manage the following |
| mbed_official | 125:23cc3068a9e4 | 10 | * functionalities of the HRTIMx peripheral: |
| mbed_official | 125:23cc3068a9e4 | 11 | * + Initialization/de-initialization methods |
| mbed_official | 125:23cc3068a9e4 | 12 | * + I/O operation methods |
| mbed_official | 125:23cc3068a9e4 | 13 | * + Peripheral Control methods |
| mbed_official | 125:23cc3068a9e4 | 14 | * |
| mbed_official | 125:23cc3068a9e4 | 15 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 16 | ================================================================================ |
| mbed_official | 125:23cc3068a9e4 | 17 | ##### <HRTIM specific features> ##### |
| mbed_official | 125:23cc3068a9e4 | 18 | ================================================================================ |
| mbed_official | 125:23cc3068a9e4 | 19 | |
| mbed_official | 125:23cc3068a9e4 | 20 | [..] < HRTIM introduction: |
| mbed_official | 125:23cc3068a9e4 | 21 | (#) The high-resolution timer can generate up to 10 digital signals with |
| mbed_official | 125:23cc3068a9e4 | 22 | highly accurate timings. |
| mbed_official | 125:23cc3068a9e4 | 23 | It is primarily intended to drive power conversion systems such as |
| mbed_official | 125:23cc3068a9e4 | 24 | switch mode power supplies or lighting systems, |
| mbed_official | 125:23cc3068a9e4 | 25 | but can be of general purpose usage, whenever a very fine timing |
| mbed_official | 125:23cc3068a9e4 | 26 | resolution is expected. |
| mbed_official | 125:23cc3068a9e4 | 27 | |
| mbed_official | 125:23cc3068a9e4 | 28 | (#) Its modular architecture allows to generate either independent or |
| mbed_official | 125:23cc3068a9e4 | 29 | coupled waveforms. |
| mbed_official | 125:23cc3068a9e4 | 30 | The wave-shape is defined by self-contained timings |
| mbed_official | 125:23cc3068a9e4 | 31 | (using counters and compare units) and a broad range of external events, |
| mbed_official | 125:23cc3068a9e4 | 32 | such as analog or digital feedbacks and synchronisation signals. |
| mbed_official | 125:23cc3068a9e4 | 33 | This allows to produce a large variety of control signal (PWM, phase-shifted, |
| mbed_official | 125:23cc3068a9e4 | 34 | constant Ton,...) and address most of conversion topologies. |
| mbed_official | 125:23cc3068a9e4 | 35 | |
| mbed_official | 125:23cc3068a9e4 | 36 | (#) For control and monitoring purposes, the timer has also timing measure |
| mbed_official | 125:23cc3068a9e4 | 37 | capabilities and links to built-in ADC and DAC converters. |
| mbed_official | 125:23cc3068a9e4 | 38 | Last, it features light-load management mode and is able to handle |
| mbed_official | 125:23cc3068a9e4 | 39 | various fault schemes for safe shut-down purposes. |
| mbed_official | 125:23cc3068a9e4 | 40 | |
| mbed_official | 125:23cc3068a9e4 | 41 | |
| mbed_official | 125:23cc3068a9e4 | 42 | ##### How to use this driver ##### |
| mbed_official | 125:23cc3068a9e4 | 43 | ================================================================================ |
| mbed_official | 125:23cc3068a9e4 | 44 | [..] This driver provides functions to configure and program the HRTIM |
| mbed_official | 125:23cc3068a9e4 | 45 | of all stm32f33x devices. |
| mbed_official | 125:23cc3068a9e4 | 46 | These functions are split in 9 groups: |
| mbed_official | 125:23cc3068a9e4 | 47 | |
| mbed_official | 125:23cc3068a9e4 | 48 | (#) HRTIM Simple TimeBase management: this group includes all needed functions |
| mbed_official | 125:23cc3068a9e4 | 49 | to configure the HRTIM Timebase unit: |
| mbed_official | 125:23cc3068a9e4 | 50 | (++) Initializes the HRTIMx timer in simple time base mode |
| mbed_official | 125:23cc3068a9e4 | 51 | (++) Start/Stop the time base generation |
| mbed_official | 125:23cc3068a9e4 | 52 | (++) Deinitialize the HRTIM peripheral |
| mbed_official | 125:23cc3068a9e4 | 53 | |
| mbed_official | 125:23cc3068a9e4 | 54 | |
| mbed_official | 125:23cc3068a9e4 | 55 | (#) HRTIM simple Output Compare management: this group includes all needed |
| mbed_official | 125:23cc3068a9e4 | 56 | functions to configure the Compare unit used in Output compare mode: |
| mbed_official | 125:23cc3068a9e4 | 57 | (++) Initializes the HRTIMx timer time base unit |
| mbed_official | 125:23cc3068a9e4 | 58 | (++) Configure the compare unit in in simple Output Compare mode |
| mbed_official | 125:23cc3068a9e4 | 59 | (++) Start/Stop the Output compare generation |
| mbed_official | 125:23cc3068a9e4 | 60 | |
| mbed_official | 125:23cc3068a9e4 | 61 | (#) HRTIM simple PWM management: this group includes all needed |
| mbed_official | 125:23cc3068a9e4 | 62 | functions to configure the Compare unit used in PWM mode: |
| mbed_official | 125:23cc3068a9e4 | 63 | (++) Initializes the HRTIMx timer time base unit |
| mbed_official | 125:23cc3068a9e4 | 64 | (++) Configure the compare unit in in simple PWM mode |
| mbed_official | 125:23cc3068a9e4 | 65 | (++) Start/Stop the PWM generation |
| mbed_official | 125:23cc3068a9e4 | 66 | |
| mbed_official | 125:23cc3068a9e4 | 67 | (#) HRTIM simple Capture management: this group includes all needed |
| mbed_official | 125:23cc3068a9e4 | 68 | functions to configure the Capture unit used in Capture mode: |
| mbed_official | 125:23cc3068a9e4 | 69 | (++) Initializes the HRTIMx timer time base unit |
| mbed_official | 125:23cc3068a9e4 | 70 | (++) Configure the compare unit in in simple Capture mode |
| mbed_official | 125:23cc3068a9e4 | 71 | (++) Start/Stop the Capture mode |
| mbed_official | 125:23cc3068a9e4 | 72 | |
| mbed_official | 125:23cc3068a9e4 | 73 | (#) HRTIM simple One Pulse management: this group includes all needed |
| mbed_official | 125:23cc3068a9e4 | 74 | functions to configure the Capture unit and Compare unit used in One Pulse mode: |
| mbed_official | 125:23cc3068a9e4 | 75 | (++) Initializes the HRTIMx timer time base unit |
| mbed_official | 125:23cc3068a9e4 | 76 | (++) Configure the compare unit and the capture unit in in simple One Pulse mode |
| mbed_official | 125:23cc3068a9e4 | 77 | (++) Start/Stop the One Pulse mode generation |
| mbed_official | 125:23cc3068a9e4 | 78 | |
| mbed_official | 125:23cc3068a9e4 | 79 | (#) HRTIM Waveform management: this group includes all needed |
| mbed_official | 125:23cc3068a9e4 | 80 | functions to configure the HRTIM possible waveform mode: |
| mbed_official | 125:23cc3068a9e4 | 81 | (++) Initializes the HRTIMx timer Master time base unit |
| mbed_official | 125:23cc3068a9e4 | 82 | (++) Initializes the HRTIMx timer Slaves time base unit |
| mbed_official | 125:23cc3068a9e4 | 83 | (++) Configures the HRTIMx timer Compare unit |
| mbed_official | 125:23cc3068a9e4 | 84 | (++) Configures the HRTIMx Slave timer Capture unit |
| mbed_official | 125:23cc3068a9e4 | 85 | (++) Configures the HRTIMx timer Output unit |
| mbed_official | 125:23cc3068a9e4 | 86 | (++) Configures the HRTIMx timer DeadTime / Chopper / Burst features |
| mbed_official | 125:23cc3068a9e4 | 87 | (++) Configures the HRTIMx timer Fault / External event features |
| mbed_official | 125:23cc3068a9e4 | 88 | (++) Configures the HRTIMx timer Synchronization features: Internal/External connection, DACs,... |
| mbed_official | 125:23cc3068a9e4 | 89 | (++) Configures the HRTIMx timer Synchronization features: ADCs Triggers |
| mbed_official | 125:23cc3068a9e4 | 90 | (++) HRTIMx timer Outputs Start/Stop |
| mbed_official | 125:23cc3068a9e4 | 91 | (++) Start/Stop the HRTIMx Timer counters |
| mbed_official | 125:23cc3068a9e4 | 92 | |
| mbed_official | 125:23cc3068a9e4 | 93 | (#) HRTIM interrupts, DMA and flags management |
| mbed_official | 125:23cc3068a9e4 | 94 | (++) Enable/Disable interrupt sources |
| mbed_official | 125:23cc3068a9e4 | 95 | (++) Get flags status |
| mbed_official | 125:23cc3068a9e4 | 96 | (++) Clear flags/ Pending bits |
| mbed_official | 125:23cc3068a9e4 | 97 | (++) Enable/Disable DMA requests |
| mbed_official | 125:23cc3068a9e4 | 98 | (++) Configure DMA burst mode |
| mbed_official | 125:23cc3068a9e4 | 99 | |
| mbed_official | 125:23cc3068a9e4 | 100 | (#) TIM specific interface management, this group includes all |
| mbed_official | 125:23cc3068a9e4 | 101 | needed functions to use the specific TIM interface: |
| mbed_official | 125:23cc3068a9e4 | 102 | (++) HRTIMx timer DLL calibration |
| mbed_official | 125:23cc3068a9e4 | 103 | |
| mbed_official | 125:23cc3068a9e4 | 104 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 105 | ****************************************************************************** |
| mbed_official | 125:23cc3068a9e4 | 106 | * @attention |
| mbed_official | 125:23cc3068a9e4 | 107 | * |
| mbed_official | 125:23cc3068a9e4 | 108 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 125:23cc3068a9e4 | 109 | * |
| mbed_official | 125:23cc3068a9e4 | 110 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 125:23cc3068a9e4 | 111 | * are permitted provided that the following conditions are met: |
| mbed_official | 125:23cc3068a9e4 | 112 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 125:23cc3068a9e4 | 113 | * this list of conditions and the following disclaimer. |
| mbed_official | 125:23cc3068a9e4 | 114 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 125:23cc3068a9e4 | 115 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 125:23cc3068a9e4 | 116 | * and/or other materials provided with the distribution. |
| mbed_official | 125:23cc3068a9e4 | 117 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 125:23cc3068a9e4 | 118 | * may be used to endorse or promote products derived from this software |
| mbed_official | 125:23cc3068a9e4 | 119 | * without specific prior written permission. |
| mbed_official | 125:23cc3068a9e4 | 120 | * |
| mbed_official | 125:23cc3068a9e4 | 121 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 125:23cc3068a9e4 | 122 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 125:23cc3068a9e4 | 123 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 125:23cc3068a9e4 | 124 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 125:23cc3068a9e4 | 125 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 125:23cc3068a9e4 | 126 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 125:23cc3068a9e4 | 127 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 125:23cc3068a9e4 | 128 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 125:23cc3068a9e4 | 129 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 125:23cc3068a9e4 | 130 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 125:23cc3068a9e4 | 131 | * |
| mbed_official | 125:23cc3068a9e4 | 132 | ****************************************************************************** |
| mbed_official | 125:23cc3068a9e4 | 133 | */ |
| mbed_official | 125:23cc3068a9e4 | 134 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 135 | #include "stm32f30x_hrtim.h" |
| mbed_official | 125:23cc3068a9e4 | 136 | |
| mbed_official | 125:23cc3068a9e4 | 137 | /** @addtogroup STM32F30x_StdPeriph_Driver |
| mbed_official | 125:23cc3068a9e4 | 138 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 139 | */ |
| mbed_official | 125:23cc3068a9e4 | 140 | |
| mbed_official | 125:23cc3068a9e4 | 141 | /** @defgroup HRTIM |
| mbed_official | 125:23cc3068a9e4 | 142 | * @brief HRTIM driver module |
| mbed_official | 125:23cc3068a9e4 | 143 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 144 | */ |
| mbed_official | 125:23cc3068a9e4 | 145 | |
| mbed_official | 125:23cc3068a9e4 | 146 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 147 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 148 | #define HRTIM_FLTR_FLTxEN (HRTIM_FLTR_FLT1EN |\ |
| mbed_official | 125:23cc3068a9e4 | 149 | HRTIM_FLTR_FLT2EN |\ |
| mbed_official | 125:23cc3068a9e4 | 150 | HRTIM_FLTR_FLT3EN |\ |
| mbed_official | 125:23cc3068a9e4 | 151 | HRTIM_FLTR_FLT4EN | \ |
| mbed_official | 125:23cc3068a9e4 | 152 | HRTIM_FLTR_FLT5EN) |
| mbed_official | 125:23cc3068a9e4 | 153 | |
| mbed_official | 125:23cc3068a9e4 | 154 | #define HRTIM_TIMCR_TIMUPDATETRIGGER (HRTIM_TIMUPDATETRIGGER_MASTER |\ |
| mbed_official | 125:23cc3068a9e4 | 155 | HRTIM_TIMUPDATETRIGGER_TIMER_A |\ |
| mbed_official | 125:23cc3068a9e4 | 156 | HRTIM_TIMUPDATETRIGGER_TIMER_B |\ |
| mbed_official | 125:23cc3068a9e4 | 157 | HRTIM_TIMUPDATETRIGGER_TIMER_C |\ |
| mbed_official | 125:23cc3068a9e4 | 158 | HRTIM_TIMUPDATETRIGGER_TIMER_D |\ |
| mbed_official | 125:23cc3068a9e4 | 159 | HRTIM_TIMUPDATETRIGGER_TIMER_E) |
| mbed_official | 125:23cc3068a9e4 | 160 | |
| mbed_official | 125:23cc3068a9e4 | 161 | #define HRTIM_TIM_OFFSET (uint32_t)0x00000080 |
| mbed_official | 125:23cc3068a9e4 | 162 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 163 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 164 | static uint32_t TimerIdxToTimerId[] = |
| mbed_official | 125:23cc3068a9e4 | 165 | { |
| mbed_official | 125:23cc3068a9e4 | 166 | HRTIM_TIMERID_TIMER_A, |
| mbed_official | 125:23cc3068a9e4 | 167 | HRTIM_TIMERID_TIMER_B, |
| mbed_official | 125:23cc3068a9e4 | 168 | HRTIM_TIMERID_TIMER_C, |
| mbed_official | 125:23cc3068a9e4 | 169 | HRTIM_TIMERID_TIMER_D, |
| mbed_official | 125:23cc3068a9e4 | 170 | HRTIM_TIMERID_TIMER_E, |
| mbed_official | 125:23cc3068a9e4 | 171 | HRTIM_TIMERID_MASTER, |
| mbed_official | 125:23cc3068a9e4 | 172 | }; |
| mbed_official | 125:23cc3068a9e4 | 173 | |
| mbed_official | 125:23cc3068a9e4 | 174 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 175 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 176 | static void HRTIM_MasterBase_Config(HRTIM_TypeDef* HRTIMx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruc); |
| mbed_official | 125:23cc3068a9e4 | 177 | static void HRTIM_TimingUnitBase_Config(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 178 | static void HRTIM_MasterWaveform_Config(HRTIM_TypeDef * HRTIMx, HRTIM_TimerInitTypeDef * TimerInit); |
| mbed_official | 125:23cc3068a9e4 | 179 | static void HRTIM_TimingUnitWaveform_Config(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 180 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 181 | HRTIM_TimerInitTypeDef * TimerInit); |
| mbed_official | 125:23cc3068a9e4 | 182 | static void HRTIM_CompareUnitConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 183 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 184 | uint32_t CompareUnit, |
| mbed_official | 125:23cc3068a9e4 | 185 | HRTIM_CompareCfgTypeDef * CompareCfg); |
| mbed_official | 125:23cc3068a9e4 | 186 | static void HRTIM_CaptureUnitConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 187 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 188 | uint32_t CaptureUnit, |
| mbed_official | 125:23cc3068a9e4 | 189 | uint32_t Event); |
| mbed_official | 125:23cc3068a9e4 | 190 | static void HRTIM_OutputConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 191 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 192 | uint32_t Output, |
| mbed_official | 125:23cc3068a9e4 | 193 | HRTIM_OutputCfgTypeDef * OutputCfg); |
| mbed_official | 125:23cc3068a9e4 | 194 | static void HRTIM_ExternalEventConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 195 | uint32_t Event, |
| mbed_official | 125:23cc3068a9e4 | 196 | HRTIM_EventCfgTypeDef * EventCfg); |
| mbed_official | 125:23cc3068a9e4 | 197 | static void HRTIM_TIM_ResetConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 198 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 199 | uint32_t Event); |
| mbed_official | 125:23cc3068a9e4 | 200 | /** @defgroup HRTIM_Private_Functions |
| mbed_official | 125:23cc3068a9e4 | 201 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 202 | */ |
| mbed_official | 125:23cc3068a9e4 | 203 | |
| mbed_official | 125:23cc3068a9e4 | 204 | /** @defgroup HRTIM_Group1 Initialization/de-initialization methods |
| mbed_official | 125:23cc3068a9e4 | 205 | * @brief Initialization and Configuration functions |
| mbed_official | 125:23cc3068a9e4 | 206 | * |
| mbed_official | 125:23cc3068a9e4 | 207 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 208 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 209 | ##### Initialization/de-initialization methods ##### |
| mbed_official | 125:23cc3068a9e4 | 210 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 211 | [..] This section provides functions allowing to: |
| mbed_official | 125:23cc3068a9e4 | 212 | (+)Initializes timer in basic time base mode |
| mbed_official | 125:23cc3068a9e4 | 213 | (+)Initializes timer in basic OC mode |
| mbed_official | 125:23cc3068a9e4 | 214 | (+)Initializes timer in basic PWM mode |
| mbed_official | 125:23cc3068a9e4 | 215 | (+)Initializes timer in basic Capture mode |
| mbed_official | 125:23cc3068a9e4 | 216 | (+)Initializes timer in One Pulse mode |
| mbed_official | 125:23cc3068a9e4 | 217 | (+)Initializes a timer operating in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 218 | (+)De-initializes the HRTIMx timer |
| mbed_official | 125:23cc3068a9e4 | 219 | |
| mbed_official | 125:23cc3068a9e4 | 220 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 221 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 222 | */ |
| mbed_official | 125:23cc3068a9e4 | 223 | |
| mbed_official | 125:23cc3068a9e4 | 224 | /** |
| mbed_official | 125:23cc3068a9e4 | 225 | * @brief Initializes the HRTIMx timer in basic time base mode |
| mbed_official | 125:23cc3068a9e4 | 226 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 227 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 228 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 229 | * @arg 0x0 for master timer |
| mbed_official | 125:23cc3068a9e4 | 230 | * @arg 0x1 to 0x5 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 231 | * @note The time-base unit initialization parameters specify: |
| mbed_official | 125:23cc3068a9e4 | 232 | * The timer counter operating mode (continuous, one shot) |
| mbed_official | 125:23cc3068a9e4 | 233 | * The timer clock prescaler |
| mbed_official | 125:23cc3068a9e4 | 234 | * The timer period |
| mbed_official | 125:23cc3068a9e4 | 235 | * The timer repetition counter. |
| mbed_official | 125:23cc3068a9e4 | 236 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 237 | */ |
| mbed_official | 125:23cc3068a9e4 | 238 | void HRTIM_SimpleBase_Init(HRTIM_TypeDef* HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct) |
| mbed_official | 125:23cc3068a9e4 | 239 | { |
| mbed_official | 125:23cc3068a9e4 | 240 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 241 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 242 | assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode)); |
| mbed_official | 125:23cc3068a9e4 | 243 | |
| mbed_official | 125:23cc3068a9e4 | 244 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
| mbed_official | 125:23cc3068a9e4 | 245 | { |
| mbed_official | 125:23cc3068a9e4 | 246 | /* Configure master timer */ |
| mbed_official | 125:23cc3068a9e4 | 247 | HRTIM_MasterBase_Config(HRTIMx, HRTIM_BaseInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 248 | } |
| mbed_official | 125:23cc3068a9e4 | 249 | else |
| mbed_official | 125:23cc3068a9e4 | 250 | { |
| mbed_official | 125:23cc3068a9e4 | 251 | /* Configure timing unit */ |
| mbed_official | 125:23cc3068a9e4 | 252 | HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 253 | } |
| mbed_official | 125:23cc3068a9e4 | 254 | } |
| mbed_official | 125:23cc3068a9e4 | 255 | |
| mbed_official | 125:23cc3068a9e4 | 256 | /** |
| mbed_official | 125:23cc3068a9e4 | 257 | * @brief De-initializes a timer operating in all mode |
| mbed_official | 125:23cc3068a9e4 | 258 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 259 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 260 | */ |
| mbed_official | 125:23cc3068a9e4 | 261 | void HRTIM_DeInit(HRTIM_TypeDef* HRTIMx) |
| mbed_official | 125:23cc3068a9e4 | 262 | { |
| mbed_official | 125:23cc3068a9e4 | 263 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 264 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_HRTIM1, ENABLE); |
| mbed_official | 125:23cc3068a9e4 | 265 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_HRTIM1, DISABLE); |
| mbed_official | 125:23cc3068a9e4 | 266 | } |
| mbed_official | 125:23cc3068a9e4 | 267 | |
| mbed_official | 125:23cc3068a9e4 | 268 | /** |
| mbed_official | 125:23cc3068a9e4 | 269 | * @brief Initializes the HRTIMx timer in basic output compare mode |
| mbed_official | 125:23cc3068a9e4 | 270 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 271 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 272 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 273 | * @arg 0x1 to 0x5 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 274 | * @note Initializes the time-base unit of the timer and prepare it to |
| mbed_official | 125:23cc3068a9e4 | 275 | * operate in output compare mode |
| mbed_official | 125:23cc3068a9e4 | 276 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 277 | */ |
| mbed_official | 125:23cc3068a9e4 | 278 | void HRTIM_SimpleOC_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct) |
| mbed_official | 125:23cc3068a9e4 | 279 | { |
| mbed_official | 125:23cc3068a9e4 | 280 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 281 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 282 | assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode)); |
| mbed_official | 125:23cc3068a9e4 | 283 | |
| mbed_official | 125:23cc3068a9e4 | 284 | /* Configure timing unit */ |
| mbed_official | 125:23cc3068a9e4 | 285 | HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 286 | } |
| mbed_official | 125:23cc3068a9e4 | 287 | |
| mbed_official | 125:23cc3068a9e4 | 288 | /** |
| mbed_official | 125:23cc3068a9e4 | 289 | * @brief Initializes the HRTIMx timer in basic PWM mode |
| mbed_official | 125:23cc3068a9e4 | 290 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 291 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 292 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 293 | * @arg 0x1 to 0x5 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 294 | * @note Initializes the time-base unit of the timer and prepare it to |
| mbed_official | 125:23cc3068a9e4 | 295 | * operate in capture mode |
| mbed_official | 125:23cc3068a9e4 | 296 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 297 | */ |
| mbed_official | 125:23cc3068a9e4 | 298 | void HRTIM_SimplePWM_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct) |
| mbed_official | 125:23cc3068a9e4 | 299 | { |
| mbed_official | 125:23cc3068a9e4 | 300 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 301 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 302 | assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode)); |
| mbed_official | 125:23cc3068a9e4 | 303 | |
| mbed_official | 125:23cc3068a9e4 | 304 | /* Configure timing unit */ |
| mbed_official | 125:23cc3068a9e4 | 305 | HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 306 | } |
| mbed_official | 125:23cc3068a9e4 | 307 | |
| mbed_official | 125:23cc3068a9e4 | 308 | /** |
| mbed_official | 125:23cc3068a9e4 | 309 | * @brief Initializes a timer operating in basic capture mode |
| mbed_official | 125:23cc3068a9e4 | 310 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 311 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 312 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 313 | * @arg 0x1 to 0x5 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 314 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 315 | */ |
| mbed_official | 125:23cc3068a9e4 | 316 | void HRTIM_SimpleCapture_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct) |
| mbed_official | 125:23cc3068a9e4 | 317 | { |
| mbed_official | 125:23cc3068a9e4 | 318 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 319 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 320 | assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode)); |
| mbed_official | 125:23cc3068a9e4 | 321 | |
| mbed_official | 125:23cc3068a9e4 | 322 | /* Configure timing unit */ |
| mbed_official | 125:23cc3068a9e4 | 323 | HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 324 | } |
| mbed_official | 125:23cc3068a9e4 | 325 | |
| mbed_official | 125:23cc3068a9e4 | 326 | /** |
| mbed_official | 125:23cc3068a9e4 | 327 | * @brief Initializes the HRTIMx timer in basic one pulse mode |
| mbed_official | 125:23cc3068a9e4 | 328 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 329 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 330 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 331 | * @arg 0x1 to 0x5 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 332 | * @note Initializes the time-base unit of the timer and prepare it to |
| mbed_official | 125:23cc3068a9e4 | 333 | * operate in one pulse mode. In this mode the counter operates |
| mbed_official | 125:23cc3068a9e4 | 334 | * in single shot mode (retriggerable or not) |
| mbed_official | 125:23cc3068a9e4 | 335 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 336 | */ |
| mbed_official | 125:23cc3068a9e4 | 337 | void HRTIM_SimpleOnePulse_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct) |
| mbed_official | 125:23cc3068a9e4 | 338 | { |
| mbed_official | 125:23cc3068a9e4 | 339 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 340 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 341 | assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode)); |
| mbed_official | 125:23cc3068a9e4 | 342 | |
| mbed_official | 125:23cc3068a9e4 | 343 | /* Configure timing unit */ |
| mbed_official | 125:23cc3068a9e4 | 344 | HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 345 | } |
| mbed_official | 125:23cc3068a9e4 | 346 | |
| mbed_official | 125:23cc3068a9e4 | 347 | /** |
| mbed_official | 125:23cc3068a9e4 | 348 | * @brief Initializes a timer operating in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 349 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 350 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 351 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 352 | * @arg 0x0 for master timer |
| mbed_official | 125:23cc3068a9e4 | 353 | * @arg 0x1 to 0x5 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 354 | * @param pTimerInit: pointer to the timer initialization data structure |
| mbed_official | 125:23cc3068a9e4 | 355 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 356 | */ |
| mbed_official | 125:23cc3068a9e4 | 357 | void HRTIM_Waveform_Init(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 358 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 359 | HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct, |
| mbed_official | 125:23cc3068a9e4 | 360 | HRTIM_TimerInitTypeDef* HRTIM_TimerInitStruct) |
| mbed_official | 125:23cc3068a9e4 | 361 | { |
| mbed_official | 125:23cc3068a9e4 | 362 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 363 | assert_param(IS_HRTIM_HALFMODE(HRTIM_TimerInitStruct->HalfModeEnable)); |
| mbed_official | 125:23cc3068a9e4 | 364 | assert_param(IS_HRTIM_SYNCSTART(HRTIM_TimerInitStruct->StartOnSync)); |
| mbed_official | 125:23cc3068a9e4 | 365 | assert_param(IS_HRTIM_SYNCRESET(HRTIM_TimerInitStruct->ResetOnSync)); |
| mbed_official | 125:23cc3068a9e4 | 366 | assert_param(IS_HRTIM_DACSYNC(HRTIM_TimerInitStruct->DACSynchro)); |
| mbed_official | 125:23cc3068a9e4 | 367 | assert_param(IS_HRTIM_PRELOAD(HRTIM_TimerInitStruct->PreloadEnable)); |
| mbed_official | 125:23cc3068a9e4 | 368 | assert_param(IS_HRTIM_TIMERBURSTMODE(HRTIM_TimerInitStruct->BurstMode)); |
| mbed_official | 125:23cc3068a9e4 | 369 | assert_param(IS_HRTIM_UPDATEONREPETITION(HRTIM_TimerInitStruct->RepetitionUpdate)); |
| mbed_official | 125:23cc3068a9e4 | 370 | |
| mbed_official | 125:23cc3068a9e4 | 371 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
| mbed_official | 125:23cc3068a9e4 | 372 | { |
| mbed_official | 125:23cc3068a9e4 | 373 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 374 | assert_param(IS_HRTIM_UPDATEGATING_MASTER(HRTIM_TimerInitStruct->UpdateGating)); |
| mbed_official | 125:23cc3068a9e4 | 375 | |
| mbed_official | 125:23cc3068a9e4 | 376 | /* Configure master timer */ |
| mbed_official | 125:23cc3068a9e4 | 377 | HRTIM_MasterBase_Config(HRTIMx, HRTIM_BaseInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 378 | HRTIM_MasterWaveform_Config(HRTIMx, HRTIM_TimerInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 379 | } |
| mbed_official | 125:23cc3068a9e4 | 380 | else |
| mbed_official | 125:23cc3068a9e4 | 381 | { |
| mbed_official | 125:23cc3068a9e4 | 382 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 383 | assert_param(IS_HRTIM_UPDATEGATING_TIM(HRTIM_TimerInitStruct->UpdateGating)); |
| mbed_official | 125:23cc3068a9e4 | 384 | |
| mbed_official | 125:23cc3068a9e4 | 385 | /* Configure timing unit */ |
| mbed_official | 125:23cc3068a9e4 | 386 | HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 387 | HRTIM_TimingUnitWaveform_Config(HRTIMx, TimerIdx, HRTIM_TimerInitStruct); |
| mbed_official | 125:23cc3068a9e4 | 388 | } |
| mbed_official | 125:23cc3068a9e4 | 389 | } |
| mbed_official | 125:23cc3068a9e4 | 390 | |
| mbed_official | 125:23cc3068a9e4 | 391 | /** |
| mbed_official | 125:23cc3068a9e4 | 392 | * @} |
| mbed_official | 125:23cc3068a9e4 | 393 | */ |
| mbed_official | 125:23cc3068a9e4 | 394 | |
| mbed_official | 125:23cc3068a9e4 | 395 | /** @defgroup HRTIM_Group2 I/O operation methods |
| mbed_official | 125:23cc3068a9e4 | 396 | * @brief Data transfers functions |
| mbed_official | 125:23cc3068a9e4 | 397 | * |
| mbed_official | 125:23cc3068a9e4 | 398 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 399 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 400 | ##### IO operation methods ##### |
| mbed_official | 125:23cc3068a9e4 | 401 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 402 | [..] |
| mbed_official | 125:23cc3068a9e4 | 403 | This subsection provides a set of functions allowing to manage the HRTIMx data |
| mbed_official | 125:23cc3068a9e4 | 404 | transfers. |
| mbed_official | 125:23cc3068a9e4 | 405 | (+) Starts the DLL calibration. |
| mbed_official | 125:23cc3068a9e4 | 406 | (+) Starts / stops the counter of a timer operating in basic time base mode |
| mbed_official | 125:23cc3068a9e4 | 407 | (+) Starts / stops the output compare signal generation on the designed timer output |
| mbed_official | 125:23cc3068a9e4 | 408 | (+) Starts / stops the PWM output signal generation on the designed timer output |
| mbed_official | 125:23cc3068a9e4 | 409 | (+) Enables / disables a basic capture on the designed capture unit |
| mbed_official | 125:23cc3068a9e4 | 410 | |
| mbed_official | 125:23cc3068a9e4 | 411 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 412 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 413 | */ |
| mbed_official | 125:23cc3068a9e4 | 414 | |
| mbed_official | 125:23cc3068a9e4 | 415 | /** |
| mbed_official | 125:23cc3068a9e4 | 416 | * @brief Starts the DLL calibration |
| mbed_official | 125:23cc3068a9e4 | 417 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 418 | * @param CalibrationRate: DLL calibration period |
| mbed_official | 125:23cc3068a9e4 | 419 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 420 | * @arg HRTIM_CALIBRATIONRATE_7300: 7.3 ms |
| mbed_official | 125:23cc3068a9e4 | 421 | * @arg HRTIM_CALIBRATIONRATE_910: 910 us |
| mbed_official | 125:23cc3068a9e4 | 422 | * @arg HRTIM_CALIBRATIONRATE_114: 114 us |
| mbed_official | 125:23cc3068a9e4 | 423 | * @arg HRTIM_CALIBRATIONRATE_14: 14 us |
| mbed_official | 125:23cc3068a9e4 | 424 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 425 | */ |
| mbed_official | 125:23cc3068a9e4 | 426 | void HRTIM_DLLCalibrationStart(HRTIM_TypeDef * HRTIMx, uint32_t CalibrationRate) |
| mbed_official | 125:23cc3068a9e4 | 427 | { |
| mbed_official | 125:23cc3068a9e4 | 428 | uint32_t HRTIM_dllcr; |
| mbed_official | 125:23cc3068a9e4 | 429 | |
| mbed_official | 125:23cc3068a9e4 | 430 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 431 | assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate)); |
| mbed_official | 125:23cc3068a9e4 | 432 | |
| mbed_official | 125:23cc3068a9e4 | 433 | /* Configure DLL Calibration */ |
| mbed_official | 125:23cc3068a9e4 | 434 | HRTIM_dllcr = (HRTIMx->HRTIM_COMMON).DLLCR; |
| mbed_official | 125:23cc3068a9e4 | 435 | |
| mbed_official | 125:23cc3068a9e4 | 436 | /* Set the Calibration rate */ |
| mbed_official | 125:23cc3068a9e4 | 437 | HRTIM_dllcr &= ~(HRTIM_DLLCR_CALRTE); |
| mbed_official | 125:23cc3068a9e4 | 438 | HRTIM_dllcr |= CalibrationRate; |
| mbed_official | 125:23cc3068a9e4 | 439 | |
| mbed_official | 125:23cc3068a9e4 | 440 | /* Start DLL calibration */ |
| mbed_official | 125:23cc3068a9e4 | 441 | HRTIM_dllcr |= HRTIM_DLLCR_CAL; |
| mbed_official | 125:23cc3068a9e4 | 442 | |
| mbed_official | 125:23cc3068a9e4 | 443 | /* Update HRTIMx register */ |
| mbed_official | 125:23cc3068a9e4 | 444 | (HRTIMx->HRTIM_COMMON).DLLCR = HRTIM_dllcr; |
| mbed_official | 125:23cc3068a9e4 | 445 | |
| mbed_official | 125:23cc3068a9e4 | 446 | } |
| mbed_official | 125:23cc3068a9e4 | 447 | /** |
| mbed_official | 125:23cc3068a9e4 | 448 | * @brief Starts the counter of a timer operating in basic time base mode |
| mbed_official | 125:23cc3068a9e4 | 449 | * @param HRTIMx: pointer to HRTIM peripheral |
| mbed_official | 125:23cc3068a9e4 | 450 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 451 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 452 | * @arg 0x5 for master timer |
| mbed_official | 125:23cc3068a9e4 | 453 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 454 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 455 | */ |
| mbed_official | 125:23cc3068a9e4 | 456 | void HRTIM_SimpleBaseStart(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx) |
| mbed_official | 125:23cc3068a9e4 | 457 | { |
| mbed_official | 125:23cc3068a9e4 | 458 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 459 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 460 | |
| mbed_official | 125:23cc3068a9e4 | 461 | /* Enable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 462 | __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 463 | } |
| mbed_official | 125:23cc3068a9e4 | 464 | |
| mbed_official | 125:23cc3068a9e4 | 465 | /** |
| mbed_official | 125:23cc3068a9e4 | 466 | * @brief Stops the counter of a timer operating in basic time base mode |
| mbed_official | 125:23cc3068a9e4 | 467 | * @param HRTIMx: pointer to HRTIM peripheral |
| mbed_official | 125:23cc3068a9e4 | 468 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 469 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 470 | * @arg 0x5 for master timer |
| mbed_official | 125:23cc3068a9e4 | 471 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 472 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 473 | */ |
| mbed_official | 125:23cc3068a9e4 | 474 | void HRTIM_SimpleBaseStop(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx) |
| mbed_official | 125:23cc3068a9e4 | 475 | { |
| mbed_official | 125:23cc3068a9e4 | 476 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 477 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 478 | |
| mbed_official | 125:23cc3068a9e4 | 479 | /* Disable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 480 | __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 481 | } |
| mbed_official | 125:23cc3068a9e4 | 482 | |
| mbed_official | 125:23cc3068a9e4 | 483 | /** |
| mbed_official | 125:23cc3068a9e4 | 484 | * @brief Starts the output compare signal generation on the designed timer output |
| mbed_official | 125:23cc3068a9e4 | 485 | * @param HRTIMx: pointer to HRTIM peripheral |
| mbed_official | 125:23cc3068a9e4 | 486 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 487 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 488 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 489 | * @param OCChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 490 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 491 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 492 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 493 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 494 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 495 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 496 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 497 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 498 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 499 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 500 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 501 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 502 | */ |
| mbed_official | 125:23cc3068a9e4 | 503 | void HRTIM_SimpleOCStart(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 504 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 505 | uint32_t OCChannel) |
| mbed_official | 125:23cc3068a9e4 | 506 | { |
| mbed_official | 125:23cc3068a9e4 | 507 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 508 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| mbed_official | 125:23cc3068a9e4 | 509 | |
| mbed_official | 125:23cc3068a9e4 | 510 | /* Enable the timer output */ |
| mbed_official | 125:23cc3068a9e4 | 511 | (HRTIMx->HRTIM_COMMON).OENR |= OCChannel; |
| mbed_official | 125:23cc3068a9e4 | 512 | |
| mbed_official | 125:23cc3068a9e4 | 513 | /* Enable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 514 | __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 515 | |
| mbed_official | 125:23cc3068a9e4 | 516 | } |
| mbed_official | 125:23cc3068a9e4 | 517 | |
| mbed_official | 125:23cc3068a9e4 | 518 | /** |
| mbed_official | 125:23cc3068a9e4 | 519 | * @brief Stops the output compare signal generation on the designed timer output |
| mbed_official | 125:23cc3068a9e4 | 520 | * @param HRTIMx: pointer to HRTIM peripheral |
| mbed_official | 125:23cc3068a9e4 | 521 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 522 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 523 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 524 | * @param OCChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 525 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 526 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 527 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 528 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 529 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 530 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 531 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 532 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 533 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 534 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 535 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 536 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 537 | */ |
| mbed_official | 125:23cc3068a9e4 | 538 | void HRTIM_SimpleOCStop(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 539 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 540 | uint32_t OCChannel) |
| mbed_official | 125:23cc3068a9e4 | 541 | { |
| mbed_official | 125:23cc3068a9e4 | 542 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 543 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| mbed_official | 125:23cc3068a9e4 | 544 | |
| mbed_official | 125:23cc3068a9e4 | 545 | /* Disable the timer output */ |
| mbed_official | 125:23cc3068a9e4 | 546 | HRTIMx->HRTIM_COMMON.DISR |= OCChannel; |
| mbed_official | 125:23cc3068a9e4 | 547 | |
| mbed_official | 125:23cc3068a9e4 | 548 | /* Disable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 549 | __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 550 | } |
| mbed_official | 125:23cc3068a9e4 | 551 | |
| mbed_official | 125:23cc3068a9e4 | 552 | /** |
| mbed_official | 125:23cc3068a9e4 | 553 | * @brief Starts the PWM output signal generation on the designed timer output |
| mbed_official | 125:23cc3068a9e4 | 554 | * @param HRTIMx: pointer to HRTIM peripheral |
| mbed_official | 125:23cc3068a9e4 | 555 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 556 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 557 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 558 | * @param PWMChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 559 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 560 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 561 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 562 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 563 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 564 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 565 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 566 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 567 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 568 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 569 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 570 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 571 | */ |
| mbed_official | 125:23cc3068a9e4 | 572 | void HRTIM_SimplePWMStart(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 573 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 574 | uint32_t PWMChannel) |
| mbed_official | 125:23cc3068a9e4 | 575 | { |
| mbed_official | 125:23cc3068a9e4 | 576 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 577 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| mbed_official | 125:23cc3068a9e4 | 578 | |
| mbed_official | 125:23cc3068a9e4 | 579 | /* Enable the timer output */ |
| mbed_official | 125:23cc3068a9e4 | 580 | HRTIMx->HRTIM_COMMON.OENR |= PWMChannel; |
| mbed_official | 125:23cc3068a9e4 | 581 | |
| mbed_official | 125:23cc3068a9e4 | 582 | /* Enable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 583 | __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 584 | } |
| mbed_official | 125:23cc3068a9e4 | 585 | |
| mbed_official | 125:23cc3068a9e4 | 586 | /** |
| mbed_official | 125:23cc3068a9e4 | 587 | * @brief Stops the PWM output signal generation on the designed timer output |
| mbed_official | 125:23cc3068a9e4 | 588 | * @param HRTIMx: pointer to HRTIM peripheral |
| mbed_official | 125:23cc3068a9e4 | 589 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 590 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 591 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 592 | * @param PWMChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 593 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 594 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 595 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 596 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 597 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 598 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 599 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 600 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 601 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 602 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 603 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 604 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 605 | */ |
| mbed_official | 125:23cc3068a9e4 | 606 | void HRTIM_SimplePWMStop(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 607 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 608 | uint32_t PWMChannel) |
| mbed_official | 125:23cc3068a9e4 | 609 | { |
| mbed_official | 125:23cc3068a9e4 | 610 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 611 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| mbed_official | 125:23cc3068a9e4 | 612 | |
| mbed_official | 125:23cc3068a9e4 | 613 | /* Disable the timer output */ |
| mbed_official | 125:23cc3068a9e4 | 614 | HRTIMx->HRTIM_COMMON.DISR |= PWMChannel; |
| mbed_official | 125:23cc3068a9e4 | 615 | |
| mbed_official | 125:23cc3068a9e4 | 616 | /* Disable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 617 | __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 618 | } |
| mbed_official | 125:23cc3068a9e4 | 619 | |
| mbed_official | 125:23cc3068a9e4 | 620 | /** |
| mbed_official | 125:23cc3068a9e4 | 621 | * @brief Enables a basic capture on the designed capture unit |
| mbed_official | 125:23cc3068a9e4 | 622 | * @param HRTIMx: pointer to HRTIM peripheral |
| mbed_official | 125:23cc3068a9e4 | 623 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 624 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 625 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 626 | * @param CaptureChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 627 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 628 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| mbed_official | 125:23cc3068a9e4 | 629 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| mbed_official | 125:23cc3068a9e4 | 630 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 631 | * @note The external event triggering the capture is available for all timing |
| mbed_official | 125:23cc3068a9e4 | 632 | * units. It can be used directly and is active as soon as the timing |
| mbed_official | 125:23cc3068a9e4 | 633 | * unit counter is enabled. |
| mbed_official | 125:23cc3068a9e4 | 634 | */ |
| mbed_official | 125:23cc3068a9e4 | 635 | void HRTIM_SimpleCaptureStart(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 636 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 637 | uint32_t CaptureChannel) |
| mbed_official | 125:23cc3068a9e4 | 638 | { |
| mbed_official | 125:23cc3068a9e4 | 639 | /* Enable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 640 | __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 641 | |
| mbed_official | 125:23cc3068a9e4 | 642 | } |
| mbed_official | 125:23cc3068a9e4 | 643 | |
| mbed_official | 125:23cc3068a9e4 | 644 | /** |
| mbed_official | 125:23cc3068a9e4 | 645 | * @brief Disables a basic capture on the designed capture unit |
| mbed_official | 125:23cc3068a9e4 | 646 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 647 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 648 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 649 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 650 | * @param CaptureChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 651 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 652 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| mbed_official | 125:23cc3068a9e4 | 653 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| mbed_official | 125:23cc3068a9e4 | 654 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 655 | */ |
| mbed_official | 125:23cc3068a9e4 | 656 | void HRTIM_SimpleCaptureStop(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 657 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 658 | uint32_t CaptureChannel) |
| mbed_official | 125:23cc3068a9e4 | 659 | { |
| mbed_official | 125:23cc3068a9e4 | 660 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 661 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 662 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
| mbed_official | 125:23cc3068a9e4 | 663 | |
| mbed_official | 125:23cc3068a9e4 | 664 | /* Set the capture unit trigger */ |
| mbed_official | 125:23cc3068a9e4 | 665 | switch (CaptureChannel) |
| mbed_official | 125:23cc3068a9e4 | 666 | { |
| mbed_official | 125:23cc3068a9e4 | 667 | case HRTIM_CAPTUREUNIT_1: |
| mbed_official | 125:23cc3068a9e4 | 668 | { |
| mbed_official | 125:23cc3068a9e4 | 669 | HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE; |
| mbed_official | 125:23cc3068a9e4 | 670 | } |
| mbed_official | 125:23cc3068a9e4 | 671 | break; |
| mbed_official | 125:23cc3068a9e4 | 672 | case HRTIM_CAPTUREUNIT_2: |
| mbed_official | 125:23cc3068a9e4 | 673 | { |
| mbed_official | 125:23cc3068a9e4 | 674 | HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE; |
| mbed_official | 125:23cc3068a9e4 | 675 | } |
| mbed_official | 125:23cc3068a9e4 | 676 | break; |
| mbed_official | 125:23cc3068a9e4 | 677 | default: |
| mbed_official | 125:23cc3068a9e4 | 678 | break; |
| mbed_official | 125:23cc3068a9e4 | 679 | } |
| mbed_official | 125:23cc3068a9e4 | 680 | |
| mbed_official | 125:23cc3068a9e4 | 681 | /* Disable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 682 | if ((HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) && |
| mbed_official | 125:23cc3068a9e4 | 683 | (HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE)) |
| mbed_official | 125:23cc3068a9e4 | 684 | { |
| mbed_official | 125:23cc3068a9e4 | 685 | __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 686 | } |
| mbed_official | 125:23cc3068a9e4 | 687 | |
| mbed_official | 125:23cc3068a9e4 | 688 | } |
| mbed_official | 125:23cc3068a9e4 | 689 | |
| mbed_official | 125:23cc3068a9e4 | 690 | /** |
| mbed_official | 125:23cc3068a9e4 | 691 | * @brief Enables the basic one pulse signal generation on the designed output |
| mbed_official | 125:23cc3068a9e4 | 692 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 693 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 694 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 695 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 696 | * @param OnePulseChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 697 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 698 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 699 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 700 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 701 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 702 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 703 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 704 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 705 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 706 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 707 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 708 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 709 | */ |
| mbed_official | 125:23cc3068a9e4 | 710 | void HRTIM_SimpleOnePulseStart(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 711 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 712 | uint32_t OnePulseChannel) |
| mbed_official | 125:23cc3068a9e4 | 713 | { |
| mbed_official | 125:23cc3068a9e4 | 714 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 715 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
| mbed_official | 125:23cc3068a9e4 | 716 | |
| mbed_official | 125:23cc3068a9e4 | 717 | /* Enable the timer output */ |
| mbed_official | 125:23cc3068a9e4 | 718 | HRTIMx->HRTIM_COMMON.OENR |= OnePulseChannel; |
| mbed_official | 125:23cc3068a9e4 | 719 | |
| mbed_official | 125:23cc3068a9e4 | 720 | /* Enable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 721 | __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 722 | } |
| mbed_official | 125:23cc3068a9e4 | 723 | |
| mbed_official | 125:23cc3068a9e4 | 724 | /** |
| mbed_official | 125:23cc3068a9e4 | 725 | * @brief Disables the basic one pulse signal generation on the designed output |
| mbed_official | 125:23cc3068a9e4 | 726 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 727 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 728 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 729 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 730 | * @param OnePulseChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 731 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 732 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 733 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 734 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 735 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 736 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 737 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 738 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 739 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 740 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 741 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 742 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 743 | */ |
| mbed_official | 125:23cc3068a9e4 | 744 | void HRTIM_SimpleOnePulseStop(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 745 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 746 | uint32_t OnePulseChannel) |
| mbed_official | 125:23cc3068a9e4 | 747 | { |
| mbed_official | 125:23cc3068a9e4 | 748 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 749 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
| mbed_official | 125:23cc3068a9e4 | 750 | |
| mbed_official | 125:23cc3068a9e4 | 751 | /* Disable the timer output */ |
| mbed_official | 125:23cc3068a9e4 | 752 | HRTIMx->HRTIM_COMMON.DISR |= OnePulseChannel; |
| mbed_official | 125:23cc3068a9e4 | 753 | |
| mbed_official | 125:23cc3068a9e4 | 754 | /* Disable the timer counter */ |
| mbed_official | 125:23cc3068a9e4 | 755 | __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]); |
| mbed_official | 125:23cc3068a9e4 | 756 | } |
| mbed_official | 125:23cc3068a9e4 | 757 | |
| mbed_official | 125:23cc3068a9e4 | 758 | /** |
| mbed_official | 125:23cc3068a9e4 | 759 | * @brief Starts the counter of the designated timer(s) operating in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 760 | * Timers can be combined (ORed) to allow for simultaneous counter start |
| mbed_official | 125:23cc3068a9e4 | 761 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 762 | * @param TimersToStart: Timer counter(s) to start |
| mbed_official | 125:23cc3068a9e4 | 763 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 764 | * @arg HRTIM_TIMERID_MASTER |
| mbed_official | 125:23cc3068a9e4 | 765 | * @arg HRTIM_TIMERID_TIMER_A |
| mbed_official | 125:23cc3068a9e4 | 766 | * @arg HRTIM_TIMERID_TIMER_B |
| mbed_official | 125:23cc3068a9e4 | 767 | * @arg HRTIM_TIMERID_TIMER_C |
| mbed_official | 125:23cc3068a9e4 | 768 | * @arg HRTIM_TIMERID_TIMER_D |
| mbed_official | 125:23cc3068a9e4 | 769 | * @arg HRTIM_TIMERID_TIMER_E |
| mbed_official | 125:23cc3068a9e4 | 770 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 771 | */ |
| mbed_official | 125:23cc3068a9e4 | 772 | void HRTIM_WaveformCounterStart(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 773 | uint32_t TimersToStart) |
| mbed_official | 125:23cc3068a9e4 | 774 | { |
| mbed_official | 125:23cc3068a9e4 | 775 | /* Enable timer(s) counter */ |
| mbed_official | 125:23cc3068a9e4 | 776 | HRTIMx->HRTIM_MASTER.MCR |= TimersToStart; |
| mbed_official | 125:23cc3068a9e4 | 777 | } |
| mbed_official | 125:23cc3068a9e4 | 778 | |
| mbed_official | 125:23cc3068a9e4 | 779 | /** |
| mbed_official | 125:23cc3068a9e4 | 780 | * @brief Stops the counter of the designated timer(s) operating in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 781 | * Timers can be combined (ORed) to allow for simultaneous counter stop |
| mbed_official | 125:23cc3068a9e4 | 782 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 783 | * @param TimersToStop: Timer counter(s) to stop |
| mbed_official | 125:23cc3068a9e4 | 784 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 785 | * @arg HRTIM_TIMER_MASTER |
| mbed_official | 125:23cc3068a9e4 | 786 | * @arg HRTIM_TIMER_A |
| mbed_official | 125:23cc3068a9e4 | 787 | * @arg HRTIM_TIMER_B |
| mbed_official | 125:23cc3068a9e4 | 788 | * @arg HRTIM_TIMER_C |
| mbed_official | 125:23cc3068a9e4 | 789 | * @arg HRTIM_TIMER_D |
| mbed_official | 125:23cc3068a9e4 | 790 | * @arg HRTIM_TIMER_E |
| mbed_official | 125:23cc3068a9e4 | 791 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 792 | */ |
| mbed_official | 125:23cc3068a9e4 | 793 | void HRTIM_WaveformCounterStop(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 794 | uint32_t TimersToStop) |
| mbed_official | 125:23cc3068a9e4 | 795 | { |
| mbed_official | 125:23cc3068a9e4 | 796 | /* Disable timer(s) counter */ |
| mbed_official | 125:23cc3068a9e4 | 797 | HRTIMx->HRTIM_MASTER.MCR &= ~TimersToStop; |
| mbed_official | 125:23cc3068a9e4 | 798 | } |
| mbed_official | 125:23cc3068a9e4 | 799 | |
| mbed_official | 125:23cc3068a9e4 | 800 | /** |
| mbed_official | 125:23cc3068a9e4 | 801 | * @brief Enables the generation of the waveform signal on the designated output(s) |
| mbed_official | 125:23cc3068a9e4 | 802 | * Outputs can be combined (ORed) to allow for simultaneous output enabling |
| mbed_official | 125:23cc3068a9e4 | 803 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 804 | * @param OutputsToStart: Timer output(s) to enable |
| mbed_official | 125:23cc3068a9e4 | 805 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 806 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 807 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 808 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 809 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 810 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 811 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 812 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 813 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 814 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 815 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 816 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 817 | */ |
| mbed_official | 125:23cc3068a9e4 | 818 | void HRTIM_WaveformOutputStart(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 819 | uint32_t OutputsToStart) |
| mbed_official | 125:23cc3068a9e4 | 820 | { |
| mbed_official | 125:23cc3068a9e4 | 821 | /* Enable the HRTIM outputs */ |
| mbed_official | 125:23cc3068a9e4 | 822 | HRTIMx->HRTIM_COMMON.OENR = OutputsToStart; |
| mbed_official | 125:23cc3068a9e4 | 823 | } |
| mbed_official | 125:23cc3068a9e4 | 824 | |
| mbed_official | 125:23cc3068a9e4 | 825 | /** |
| mbed_official | 125:23cc3068a9e4 | 826 | * @brief Disables the generation of the waveform signal on the designated output(s) |
| mbed_official | 125:23cc3068a9e4 | 827 | * Outputs can be combined (ORed) to allow for simultaneous output disabling |
| mbed_official | 125:23cc3068a9e4 | 828 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 829 | * @param OutputsToStop: Timer output(s) to disable |
| mbed_official | 125:23cc3068a9e4 | 830 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 831 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 832 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 833 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 834 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 835 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 836 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 837 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 838 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 839 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 840 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 841 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 842 | */ |
| mbed_official | 125:23cc3068a9e4 | 843 | void HRTIM_WaveformOutputStop(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 844 | uint32_t OutputsToStop) |
| mbed_official | 125:23cc3068a9e4 | 845 | { |
| mbed_official | 125:23cc3068a9e4 | 846 | /* Disable the HRTIM outputs */ |
| mbed_official | 125:23cc3068a9e4 | 847 | HRTIMx->HRTIM_COMMON.DISR = OutputsToStop; |
| mbed_official | 125:23cc3068a9e4 | 848 | } |
| mbed_official | 125:23cc3068a9e4 | 849 | |
| mbed_official | 125:23cc3068a9e4 | 850 | /** |
| mbed_official | 125:23cc3068a9e4 | 851 | * @brief Enables or disables the Master and slaves interrupt request |
| mbed_official | 125:23cc3068a9e4 | 852 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 853 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 854 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 855 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 856 | * @param HRTIM_IT: specifies the HRTIM interrupts sources to be enabled or disabled. |
| mbed_official | 125:23cc3068a9e4 | 857 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 858 | * @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt source |
| mbed_official | 125:23cc3068a9e4 | 859 | * @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt source |
| mbed_official | 125:23cc3068a9e4 | 860 | * @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 861 | * @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 862 | * @arg HRTIM_MASTER_IT_MREP: Master Repetition Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 863 | * @arg HRTIM_MASTER_IT_SYNC: Synchronization input Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 864 | * @arg HRTIM_MASTER_IT_MUPD: Master update Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 865 | * @arg HRTIM_TIM_IT_CMP1: Timer compare 1 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 866 | * @arg HRTIM_TIM_IT_CMP2: Timer compare 2 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 867 | * @arg HRTIM_TIM_IT_CMP3: Timer compare 3 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 868 | * @arg HRTIM_TIM_IT_CMP4: Timer compare 4 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 869 | * @arg HRTIM_TIM_IT_REP: Timer repetition Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 870 | * @arg HRTIM_TIM_IT_UPD: Timer update Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 871 | * @arg HRTIM_TIM_IT_CPT1: Timer capture 1 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 872 | * @arg HRTIM_TIM_IT_CPT2: Timer capture 2 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 873 | * @arg HRTIM_TIM_IT_SET1: Timer output 1 set Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 874 | * @arg HRTIM_TIM_IT_RST1: Timer output 1 reset Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 875 | * @arg HRTIM_TIM_IT_SET2: Timer output 2 set Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 876 | * @arg HRTIM_TIM_IT_RST2: Timer output 2 reset Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 877 | * @arg HRTIM_TIM_IT_RST: Timer reset Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 878 | * @arg HRTIM_TIM_IT_DLYPRT1: Timer delay protection Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 879 | * @param NewState: new state of the TIM interrupts. |
| mbed_official | 125:23cc3068a9e4 | 880 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 125:23cc3068a9e4 | 881 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 882 | */ |
| mbed_official | 125:23cc3068a9e4 | 883 | void HRTIM_ITConfig(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_IT, FunctionalState NewState) |
| mbed_official | 125:23cc3068a9e4 | 884 | { |
| mbed_official | 125:23cc3068a9e4 | 885 | if(TimerIdx != HRTIM_TIMERINDEX_MASTER) |
| mbed_official | 125:23cc3068a9e4 | 886 | { |
| mbed_official | 125:23cc3068a9e4 | 887 | if(NewState != DISABLE) |
| mbed_official | 125:23cc3068a9e4 | 888 | { |
| mbed_official | 125:23cc3068a9e4 | 889 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER |= HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 890 | } |
| mbed_official | 125:23cc3068a9e4 | 891 | else |
| mbed_official | 125:23cc3068a9e4 | 892 | { |
| mbed_official | 125:23cc3068a9e4 | 893 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER &= ~HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 894 | } |
| mbed_official | 125:23cc3068a9e4 | 895 | } |
| mbed_official | 125:23cc3068a9e4 | 896 | else |
| mbed_official | 125:23cc3068a9e4 | 897 | { |
| mbed_official | 125:23cc3068a9e4 | 898 | if(NewState != DISABLE) |
| mbed_official | 125:23cc3068a9e4 | 899 | { |
| mbed_official | 125:23cc3068a9e4 | 900 | HRTIMx->HRTIM_MASTER.MDIER |= HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 901 | } |
| mbed_official | 125:23cc3068a9e4 | 902 | else |
| mbed_official | 125:23cc3068a9e4 | 903 | { |
| mbed_official | 125:23cc3068a9e4 | 904 | HRTIMx->HRTIM_MASTER.MDIER &= ~HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 905 | } |
| mbed_official | 125:23cc3068a9e4 | 906 | } |
| mbed_official | 125:23cc3068a9e4 | 907 | } |
| mbed_official | 125:23cc3068a9e4 | 908 | |
| mbed_official | 125:23cc3068a9e4 | 909 | /** |
| mbed_official | 125:23cc3068a9e4 | 910 | * @brief Enables or disables the common interrupt request |
| mbed_official | 125:23cc3068a9e4 | 911 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 912 | * @param HRTIM_IT: specifies the HRTIM interrupts sources to be enabled or disabled. |
| mbed_official | 125:23cc3068a9e4 | 913 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 914 | * @arg HRTIM_IT_FLT1: Fault 1 interrupt source |
| mbed_official | 125:23cc3068a9e4 | 915 | * @arg HRTIM_IT_FLT2: Fault 2 interrupt source |
| mbed_official | 125:23cc3068a9e4 | 916 | * @arg HRTIM_IT_FLT3: Fault 3 interrupt Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 917 | * @arg HRTIM_IT_FLT4: Fault 4 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 918 | * @arg HRTIM_IT_FLT5: Fault 5 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 919 | * @arg HRTIM_IT_SYSFLT: System Fault Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 920 | * @arg HRTIM_IT_DLLRDY: DLL ready Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 921 | * @arg HRTIM_IT_BMPER: Burst mode period Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 922 | * @param NewState: new state of the TIM interrupts. |
| mbed_official | 125:23cc3068a9e4 | 923 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 125:23cc3068a9e4 | 924 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 925 | */ |
| mbed_official | 125:23cc3068a9e4 | 926 | void HRTIM_ITCommonConfig(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonIT, FunctionalState NewState) |
| mbed_official | 125:23cc3068a9e4 | 927 | { |
| mbed_official | 125:23cc3068a9e4 | 928 | if(NewState != DISABLE) |
| mbed_official | 125:23cc3068a9e4 | 929 | { |
| mbed_official | 125:23cc3068a9e4 | 930 | HRTIMx->HRTIM_COMMON.IER |= HRTIM_CommonIT; |
| mbed_official | 125:23cc3068a9e4 | 931 | } |
| mbed_official | 125:23cc3068a9e4 | 932 | else |
| mbed_official | 125:23cc3068a9e4 | 933 | { |
| mbed_official | 125:23cc3068a9e4 | 934 | HRTIMx->HRTIM_COMMON.IER &= ~HRTIM_CommonIT; |
| mbed_official | 125:23cc3068a9e4 | 935 | } |
| mbed_official | 125:23cc3068a9e4 | 936 | } |
| mbed_official | 125:23cc3068a9e4 | 937 | |
| mbed_official | 125:23cc3068a9e4 | 938 | /** |
| mbed_official | 125:23cc3068a9e4 | 939 | * @brief Clears the Master and slaves interrupt flags |
| mbed_official | 125:23cc3068a9e4 | 940 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 941 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 942 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 943 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 944 | * @param HRTIM_FLAG: specifies the HRTIM flags sources to be cleared. |
| mbed_official | 125:23cc3068a9e4 | 945 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 946 | * @arg HRTIM_MASTER_FLAG_MCMP1: Master compare 1 interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 947 | * @arg HRTIM_MASTER_FLAG_MCMP2: Master compare 2 interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 948 | * @arg HRTIM_MASTER_FLAG_MCMP3: Master compare 3 interrupt Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 949 | * @arg HRTIM_MASTER_FLAG_MCMP4: Master compare 4 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 950 | * @arg HRTIM_MASTER_FLAG_MREP: Master Repetition Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 951 | * @arg HRTIM_MASTER_FLAG_SYNC: Synchronization input Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 952 | * @arg HRTIM_MASTER_FLAG_MUPD: Master update Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 953 | * @arg HRTIM_TIM_FLAG_CMP1: Timer compare 1 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 954 | * @arg HRTIM_TIM_FLAG_CMP2: Timer compare 2 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 955 | * @arg HRTIM_TIM_FLAG_CMP3: Timer compare 3 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 956 | * @arg HRTIM_TIM_FLAG_CMP4: Timer compare 4 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 957 | * @arg HRTIM_TIM_FLAG_REP: Timer repetition Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 958 | * @arg HRTIM_TIM_FLAG_UPD: Timer update Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 959 | * @arg HRTIM_TIM_FLAG_CPT1: Timer capture 1 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 960 | * @arg HRTIM_TIM_FLAG_CPT2: Timer capture 2 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 961 | * @arg HRTIM_TIM_FLAG_SET1: Timer output 1 set Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 962 | * @arg HRTIM_TIM_FLAG_RST1: Timer output 1 reset Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 963 | * @arg HRTIM_TIM_FLAG_SET2: Timer output 2 set Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 964 | * @arg HRTIM_TIM_FLAG_RST2: Timer output 2 reset Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 965 | * @arg HRTIM_TIM_FLAG_RST: Timer reset Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 966 | * @arg HRTIM_TIM_FLAG_DLYPRT1: Timer delay protection Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 967 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 968 | */ |
| mbed_official | 125:23cc3068a9e4 | 969 | void HRTIM_ClearFlag(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_FLAG) |
| mbed_official | 125:23cc3068a9e4 | 970 | { |
| mbed_official | 125:23cc3068a9e4 | 971 | if(TimerIdx != HRTIM_TIMERINDEX_MASTER) |
| mbed_official | 125:23cc3068a9e4 | 972 | { |
| mbed_official | 125:23cc3068a9e4 | 973 | HRTIMx->HRTIM_MASTER.MICR |= HRTIM_FLAG; |
| mbed_official | 125:23cc3068a9e4 | 974 | } |
| mbed_official | 125:23cc3068a9e4 | 975 | else |
| mbed_official | 125:23cc3068a9e4 | 976 | { |
| mbed_official | 125:23cc3068a9e4 | 977 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxICR |= HRTIM_FLAG; |
| mbed_official | 125:23cc3068a9e4 | 978 | } |
| mbed_official | 125:23cc3068a9e4 | 979 | } |
| mbed_official | 125:23cc3068a9e4 | 980 | |
| mbed_official | 125:23cc3068a9e4 | 981 | /** |
| mbed_official | 125:23cc3068a9e4 | 982 | * @brief Clears the common interrupt flags |
| mbed_official | 125:23cc3068a9e4 | 983 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 984 | * @param HRTIM_FLAG: specifies the HRTIM flags to be cleared. |
| mbed_official | 125:23cc3068a9e4 | 985 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 986 | * @arg HRTIM_FLAG_FLT1: Fault 1 interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 987 | * @arg HRTIM_FLAG_FLT2: Fault 2 interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 988 | * @arg HRTIM_FLAG_FLT3: Fault 3 interrupt Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 989 | * @arg HRTIM_FLAG_FLT4: Fault 4 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 990 | * @arg HRTIM_FLAG_FLT5: Fault 5 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 991 | * @arg HRTIM_FLAG_SYSFLT: System Fault Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 992 | * @arg HRTIM_FLAG_DLLRDY: DLL ready Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 993 | * @arg HRTIM_FLAG_BMPER: Burst mode period Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 994 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 995 | */ |
| mbed_official | 125:23cc3068a9e4 | 996 | void HRTIM_ClearCommonFlag(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonFLAG) |
| mbed_official | 125:23cc3068a9e4 | 997 | { |
| mbed_official | 125:23cc3068a9e4 | 998 | HRTIMx->HRTIM_COMMON.ICR |= HRTIM_CommonFLAG; |
| mbed_official | 125:23cc3068a9e4 | 999 | } |
| mbed_official | 125:23cc3068a9e4 | 1000 | |
| mbed_official | 125:23cc3068a9e4 | 1001 | /** |
| mbed_official | 125:23cc3068a9e4 | 1002 | * @brief Clears the Master and slaves interrupt request pending bits |
| mbed_official | 125:23cc3068a9e4 | 1003 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1004 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1005 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1006 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1007 | * @param HRTIM_IT: specifies the HRTIM interrupts sources to be enabled or disabled. |
| mbed_official | 125:23cc3068a9e4 | 1008 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1009 | * @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1010 | * @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1011 | * @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1012 | * @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1013 | * @arg HRTIM_MASTER_IT_MREP: Master Repetition Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1014 | * @arg HRTIM_MASTER_IT_SYNC: Synchronization input Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1015 | * @arg HRTIM_MASTER_IT_MUPD: Master update Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1016 | * @arg HRTIM_TIM_IT_CMP1: Timer compare 1 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1017 | * @arg HRTIM_TIM_IT_CMP2: Timer compare 2 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1018 | * @arg HRTIM_TIM_IT_CMP3: Timer compare 3 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1019 | * @arg HRTIM_TIM_IT_CMP4: Timer compare 4 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1020 | * @arg HRTIM_TIM_IT_REP: Timer repetition Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1021 | * @arg HRTIM_TIM_IT_UPD: Timer update Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1022 | * @arg HRTIM_TIM_IT_CPT1: Timer capture 1 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1023 | * @arg HRTIM_TIM_IT_CPT2: Timer capture 2 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1024 | * @arg HRTIM_TIM_IT_SET1: Timer output 1 set Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1025 | * @arg HRTIM_TIM_IT_RST1: Timer output 1 reset Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1026 | * @arg HRTIM_TIM_IT_SET2: Timer output 2 set Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1027 | * @arg HRTIM_TIM_IT_RST2: Timer output 2 reset Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1028 | * @arg HRTIM_TIM_IT_RST: Timer reset Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1029 | * @arg HRTIM_TIM_IT_DLYPRT: Timer delay protection Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1030 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1031 | */ |
| mbed_official | 125:23cc3068a9e4 | 1032 | void HRTIM_ClearITPendingBit(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_IT) |
| mbed_official | 125:23cc3068a9e4 | 1033 | { |
| mbed_official | 125:23cc3068a9e4 | 1034 | if(TimerIdx != HRTIM_TIMERINDEX_MASTER) |
| mbed_official | 125:23cc3068a9e4 | 1035 | { |
| mbed_official | 125:23cc3068a9e4 | 1036 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxICR |= HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 1037 | } |
| mbed_official | 125:23cc3068a9e4 | 1038 | else |
| mbed_official | 125:23cc3068a9e4 | 1039 | { |
| mbed_official | 125:23cc3068a9e4 | 1040 | HRTIMx->HRTIM_MASTER.MICR |= HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 1041 | } |
| mbed_official | 125:23cc3068a9e4 | 1042 | } |
| mbed_official | 125:23cc3068a9e4 | 1043 | |
| mbed_official | 125:23cc3068a9e4 | 1044 | /** |
| mbed_official | 125:23cc3068a9e4 | 1045 | * @brief Clears the common interrupt pending bits |
| mbed_official | 125:23cc3068a9e4 | 1046 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1047 | * @param HRTIM_IT: specifies the HRTIM interrupts sources to be cleared. |
| mbed_official | 125:23cc3068a9e4 | 1048 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1049 | * @arg HRTIM_IT_FLT1: Fault 1 interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1050 | * @arg HRTIM_IT_FLT2: Fault 2 interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1051 | * @arg HRTIM_IT_FLT3: Fault 3 interrupt Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1052 | * @arg HRTIM_IT_FLT4: Fault 4 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1053 | * @arg HRTIM_IT_FLT5: Fault 5 Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1054 | * @arg HRTIM_IT_SYSFLT: System Fault Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1055 | * @arg HRTIM_IT_DLLRDY: DLL ready Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1056 | * @arg HRTIM_IT_BMPER: Burst mode period Interrupt source |
| mbed_official | 125:23cc3068a9e4 | 1057 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1058 | */ |
| mbed_official | 125:23cc3068a9e4 | 1059 | void HRTIM_ClearCommonITPendingBit(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonIT) |
| mbed_official | 125:23cc3068a9e4 | 1060 | { |
| mbed_official | 125:23cc3068a9e4 | 1061 | HRTIMx->HRTIM_COMMON.ICR |= HRTIM_CommonIT; |
| mbed_official | 125:23cc3068a9e4 | 1062 | } |
| mbed_official | 125:23cc3068a9e4 | 1063 | |
| mbed_official | 125:23cc3068a9e4 | 1064 | |
| mbed_official | 125:23cc3068a9e4 | 1065 | /** |
| mbed_official | 125:23cc3068a9e4 | 1066 | * @brief Checks whether the specified HRTIM flag is set or not. |
| mbed_official | 125:23cc3068a9e4 | 1067 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1068 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1069 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1070 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1071 | * @param HRTIM_FLAG: specifies the HRTIM flags to check. |
| mbed_official | 125:23cc3068a9e4 | 1072 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1073 | * @arg HRTIM_MASTER_FLAG_MCMP1: Master compare 1 interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1074 | * @arg HRTIM_MASTER_FLAG_MCMP2: Master compare 2 interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1075 | * @arg HRTIM_MASTER_FLAG_MCMP3: Master compare 3 interrupt Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1076 | * @arg HRTIM_MASTER_FLAG_MCMP4: Master compare 4 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1077 | * @arg HRTIM_MASTER_FLAG_MREP: Master Repetition Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1078 | * @arg HRTIM_MASTER_FLAG_SYNC: Synchronization input Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1079 | * @arg HRTIM_MASTER_FLAG_MUPD: Master update Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1080 | * @arg HRTIM_TIM_FLAG_CMP1: Timer compare 1 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1081 | * @arg HRTIM_TIM_FLAG_CMP2: Timer compare 2 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1082 | * @arg HRTIM_TIM_FLAG_CMP3: Timer compare 3 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1083 | * @arg HRTIM_TIM_FLAG_CMP4: Timer compare 4 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1084 | * @arg HRTIM_TIM_FLAG_REP: Timer repetition Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1085 | * @arg HRTIM_TIM_FLAG_UPD: Timer update Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1086 | * @arg HRTIM_TIM_FLAG_CPT1: Timer capture 1 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1087 | * @arg HRTIM_TIM_FLAG_CPT2: Timer capture 2 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1088 | * @arg HRTIM_TIM_FLAG_SET1: Timer output 1 set Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1089 | * @arg HRTIM_TIM_FLAG_RST1: Timer output 1 reset Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1090 | * @arg HRTIM_TIM_FLAG_SET2: Timer output 2 set Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1091 | * @arg HRTIM_TIM_FLAG_RST2: Timer output 2 reset Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1092 | * @arg HRTIM_TIM_FLAG_RST: Timer reset Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1093 | * @arg HRTIM_TIM_FLAG_DLYPRT: Timer delay protection Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1094 | * @retval The new state of HRTIM_FLAG (SET or RESET). |
| mbed_official | 125:23cc3068a9e4 | 1095 | */ |
| mbed_official | 125:23cc3068a9e4 | 1096 | FlagStatus HRTIM_GetFlagStatus(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_FLAG) |
| mbed_official | 125:23cc3068a9e4 | 1097 | { |
| mbed_official | 125:23cc3068a9e4 | 1098 | FlagStatus bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1099 | |
| mbed_official | 125:23cc3068a9e4 | 1100 | if(TimerIdx != HRTIM_TIMERINDEX_MASTER) |
| mbed_official | 125:23cc3068a9e4 | 1101 | { |
| mbed_official | 125:23cc3068a9e4 | 1102 | if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_FLAG) != RESET) |
| mbed_official | 125:23cc3068a9e4 | 1103 | { |
| mbed_official | 125:23cc3068a9e4 | 1104 | bitstatus = SET; |
| mbed_official | 125:23cc3068a9e4 | 1105 | } |
| mbed_official | 125:23cc3068a9e4 | 1106 | else |
| mbed_official | 125:23cc3068a9e4 | 1107 | { |
| mbed_official | 125:23cc3068a9e4 | 1108 | bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1109 | } |
| mbed_official | 125:23cc3068a9e4 | 1110 | } |
| mbed_official | 125:23cc3068a9e4 | 1111 | else |
| mbed_official | 125:23cc3068a9e4 | 1112 | { |
| mbed_official | 125:23cc3068a9e4 | 1113 | if ((HRTIMx->HRTIM_MASTER.MISR & HRTIM_FLAG) != RESET) |
| mbed_official | 125:23cc3068a9e4 | 1114 | { |
| mbed_official | 125:23cc3068a9e4 | 1115 | bitstatus = SET; |
| mbed_official | 125:23cc3068a9e4 | 1116 | } |
| mbed_official | 125:23cc3068a9e4 | 1117 | else |
| mbed_official | 125:23cc3068a9e4 | 1118 | { |
| mbed_official | 125:23cc3068a9e4 | 1119 | bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1120 | } |
| mbed_official | 125:23cc3068a9e4 | 1121 | } |
| mbed_official | 125:23cc3068a9e4 | 1122 | return bitstatus; |
| mbed_official | 125:23cc3068a9e4 | 1123 | } |
| mbed_official | 125:23cc3068a9e4 | 1124 | |
| mbed_official | 125:23cc3068a9e4 | 1125 | /** |
| mbed_official | 125:23cc3068a9e4 | 1126 | * @brief Checks whether the specified HRTIM common flag is set or not. |
| mbed_official | 125:23cc3068a9e4 | 1127 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1128 | * @param HRTIM_FLAG: specifies the HRTIM flags to check. |
| mbed_official | 125:23cc3068a9e4 | 1129 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1130 | * @arg HRTIM_FLAG_FLT1: Fault 1 interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1131 | * @arg HRTIM_FLAG_FLT2: Fault 2 interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1132 | * @arg HRTIM_FLAG_FLT3: Fault 3 interrupt Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1133 | * @arg HRTIM_FLAG_FLT4: Fault 4 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1134 | * @arg HRTIM_FLAG_FLT5: Fault 5 Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1135 | * @arg HRTIM_FLAG_SYSFLT: System Fault Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1136 | * @arg HRTIM_FLAG_DLLRDY: DLL ready Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1137 | * @arg HRTIM_FLAG_BMPER: Burst mode period Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1138 | * @retval The new state of HRTIM_FLAG (SET or RESET). |
| mbed_official | 125:23cc3068a9e4 | 1139 | */ |
| mbed_official | 125:23cc3068a9e4 | 1140 | FlagStatus HRTIM_GetCommonFlagStatus(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonFLAG) |
| mbed_official | 125:23cc3068a9e4 | 1141 | { |
| mbed_official | 125:23cc3068a9e4 | 1142 | FlagStatus bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1143 | |
| mbed_official | 125:23cc3068a9e4 | 1144 | if((HRTIMx->HRTIM_COMMON.ISR & HRTIM_CommonFLAG) != RESET) |
| mbed_official | 125:23cc3068a9e4 | 1145 | { |
| mbed_official | 125:23cc3068a9e4 | 1146 | bitstatus = SET; |
| mbed_official | 125:23cc3068a9e4 | 1147 | } |
| mbed_official | 125:23cc3068a9e4 | 1148 | else |
| mbed_official | 125:23cc3068a9e4 | 1149 | { |
| mbed_official | 125:23cc3068a9e4 | 1150 | bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1151 | } |
| mbed_official | 125:23cc3068a9e4 | 1152 | return bitstatus; |
| mbed_official | 125:23cc3068a9e4 | 1153 | } |
| mbed_official | 125:23cc3068a9e4 | 1154 | |
| mbed_official | 125:23cc3068a9e4 | 1155 | /** |
| mbed_official | 125:23cc3068a9e4 | 1156 | * @brief Checks whether the specified HRTIM interrupt has occurred or not. |
| mbed_official | 125:23cc3068a9e4 | 1157 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1158 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1159 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1160 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1161 | * @param HRTIM_IT: specifies the HRTIM flags sources to be cleared. |
| mbed_official | 125:23cc3068a9e4 | 1162 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1163 | * @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt |
| mbed_official | 125:23cc3068a9e4 | 1164 | * @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt |
| mbed_official | 125:23cc3068a9e4 | 1165 | * @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1166 | * @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1167 | * @arg HRTIM_MASTER_IT_MREP: Master Repetition Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1168 | * @arg HRTIM_MASTER_IT_SYNC: Synchronization input Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1169 | * @arg HRTIM_MASTER_IT_MUPD: Master update Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1170 | * @arg HRTIM_TIM_IT_CMP1: Timer compare 1 Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1171 | * @arg HRTIM_TIM_IT_CMP2: Timer compare 2 Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1172 | * @arg HRTIM_TIM_IT_CMP3: Timer compare 3 Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1173 | * @arg HRTIM_TIM_IT_CMP4: Timer compare 4 Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1174 | * @arg HRTIM_TIM_IT_REP: Timer repetition Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1175 | * @arg HRTIM_TIM_IT_UPD: Timer update Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1176 | * @arg HRTIM_TIM_IT_CPT1: Timer capture 1 Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1177 | * @arg HRTIM_TIM_IT_CPT2: Timer capture 2 Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1178 | * @arg HRTIM_TIM_IT_SET1: Timer output 1 set Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1179 | * @arg HRTIM_TIM_IT_RST1: Timer output 1 reset Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1180 | * @arg HRTIM_TIM_IT_SET2: Timer output 2 set Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1181 | * @arg HRTIM_TIM_IT_RST2: Timer output 2 reset Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1182 | * @arg HRTIM_TIM_IT_RST: Timer reset Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1183 | * @arg HRTIM_TIM_IT_DLYPRT: Timer delay protection Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1184 | * @retval The new state of the HRTIM_IT(SET or RESET). |
| mbed_official | 125:23cc3068a9e4 | 1185 | */ |
| mbed_official | 125:23cc3068a9e4 | 1186 | ITStatus HRTIM_GetITStatus(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_IT) |
| mbed_official | 125:23cc3068a9e4 | 1187 | { |
| mbed_official | 125:23cc3068a9e4 | 1188 | ITStatus bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1189 | uint16_t itstatus = 0x0, itenable = 0x0; |
| mbed_official | 125:23cc3068a9e4 | 1190 | |
| mbed_official | 125:23cc3068a9e4 | 1191 | if(TimerIdx != HRTIM_TIMERINDEX_MASTER) |
| mbed_official | 125:23cc3068a9e4 | 1192 | { |
| mbed_official | 125:23cc3068a9e4 | 1193 | itstatus = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 1194 | |
| mbed_official | 125:23cc3068a9e4 | 1195 | itenable = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER & HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 1196 | if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET)) |
| mbed_official | 125:23cc3068a9e4 | 1197 | { |
| mbed_official | 125:23cc3068a9e4 | 1198 | bitstatus = SET; |
| mbed_official | 125:23cc3068a9e4 | 1199 | } |
| mbed_official | 125:23cc3068a9e4 | 1200 | else |
| mbed_official | 125:23cc3068a9e4 | 1201 | { |
| mbed_official | 125:23cc3068a9e4 | 1202 | bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1203 | } |
| mbed_official | 125:23cc3068a9e4 | 1204 | } |
| mbed_official | 125:23cc3068a9e4 | 1205 | else |
| mbed_official | 125:23cc3068a9e4 | 1206 | { |
| mbed_official | 125:23cc3068a9e4 | 1207 | itstatus = HRTIMx->HRTIM_MASTER.MISR & HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 1208 | |
| mbed_official | 125:23cc3068a9e4 | 1209 | itenable = HRTIMx->HRTIM_MASTER.MDIER & HRTIM_IT; |
| mbed_official | 125:23cc3068a9e4 | 1210 | if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET)) |
| mbed_official | 125:23cc3068a9e4 | 1211 | { |
| mbed_official | 125:23cc3068a9e4 | 1212 | bitstatus = SET; |
| mbed_official | 125:23cc3068a9e4 | 1213 | } |
| mbed_official | 125:23cc3068a9e4 | 1214 | else |
| mbed_official | 125:23cc3068a9e4 | 1215 | { |
| mbed_official | 125:23cc3068a9e4 | 1216 | bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1217 | } |
| mbed_official | 125:23cc3068a9e4 | 1218 | } |
| mbed_official | 125:23cc3068a9e4 | 1219 | return bitstatus; |
| mbed_official | 125:23cc3068a9e4 | 1220 | } |
| mbed_official | 125:23cc3068a9e4 | 1221 | |
| mbed_official | 125:23cc3068a9e4 | 1222 | /** |
| mbed_official | 125:23cc3068a9e4 | 1223 | * @brief Checks whether the specified HRTIM common interrupt has occurred or not. |
| mbed_official | 125:23cc3068a9e4 | 1224 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1225 | * @param HRTIM_IT: specifies the HRTIM interrupt source to check. |
| mbed_official | 125:23cc3068a9e4 | 1226 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1227 | * @arg HRTIM_IT_FLT1: Fault 1 interrupt |
| mbed_official | 125:23cc3068a9e4 | 1228 | * @arg HRTIM_IT_FLT2: Fault 2 interrupt |
| mbed_official | 125:23cc3068a9e4 | 1229 | * @arg HRTIM_IT_FLT3: Fault 3 interrupt Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1230 | * @arg HRTIM_IT_FLT4: Fault 4 Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1231 | * @arg HRTIM_IT_FLT5: Fault 5 Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1232 | * @arg HRTIM_IT_SYSFLT: System Fault Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1233 | * @arg HRTIM_IT_DLLRDY: DLL ready Interrupt flag |
| mbed_official | 125:23cc3068a9e4 | 1234 | * @arg HRTIM_IT_BMPER: Burst mode period Interrupt |
| mbed_official | 125:23cc3068a9e4 | 1235 | * @retval The new state of HRTIM_FLAG (SET or RESET). |
| mbed_official | 125:23cc3068a9e4 | 1236 | */ |
| mbed_official | 125:23cc3068a9e4 | 1237 | ITStatus HRTIM_GetCommonITStatus(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonIT) |
| mbed_official | 125:23cc3068a9e4 | 1238 | { |
| mbed_official | 125:23cc3068a9e4 | 1239 | ITStatus bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1240 | uint16_t itstatus = 0x0, itenable = 0x0; |
| mbed_official | 125:23cc3068a9e4 | 1241 | |
| mbed_official | 125:23cc3068a9e4 | 1242 | itstatus = HRTIMx->HRTIM_COMMON.ISR & HRTIM_CommonIT; |
| mbed_official | 125:23cc3068a9e4 | 1243 | itenable = HRTIMx->HRTIM_COMMON.IER & HRTIM_CommonIT; |
| mbed_official | 125:23cc3068a9e4 | 1244 | |
| mbed_official | 125:23cc3068a9e4 | 1245 | if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET)) |
| mbed_official | 125:23cc3068a9e4 | 1246 | { |
| mbed_official | 125:23cc3068a9e4 | 1247 | bitstatus = SET; |
| mbed_official | 125:23cc3068a9e4 | 1248 | } |
| mbed_official | 125:23cc3068a9e4 | 1249 | else |
| mbed_official | 125:23cc3068a9e4 | 1250 | { |
| mbed_official | 125:23cc3068a9e4 | 1251 | bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 1252 | } |
| mbed_official | 125:23cc3068a9e4 | 1253 | |
| mbed_official | 125:23cc3068a9e4 | 1254 | return bitstatus; |
| mbed_official | 125:23cc3068a9e4 | 1255 | } |
| mbed_official | 125:23cc3068a9e4 | 1256 | |
| mbed_official | 125:23cc3068a9e4 | 1257 | /** |
| mbed_official | 125:23cc3068a9e4 | 1258 | * @brief Enables or disables the HRTIMx's DMA Requests. |
| mbed_official | 125:23cc3068a9e4 | 1259 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1260 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1261 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1262 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1263 | * @param HRTIM_DMA: specifies the DMA Request sources. |
| mbed_official | 125:23cc3068a9e4 | 1264 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1265 | * @arg HRTIM_MASTER_DMA_MCMP1: Master compare 1 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1266 | * @arg HRTIM_MASTER_DMA_MCMP2: Master compare 2 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1267 | * @arg HRTIM_MASTER_DMA_MCMP3: Master compare 3 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1268 | * @arg HRTIM_MASTER_DMA_MCMP4: Master compare 4 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1269 | * @arg HRTIM_MASTER_DMA_MREP: Master Repetition DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1270 | * @arg HRTIM_MASTER_DMA_SYNC: Synchronization input DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1271 | * @arg HRTIM_MASTER_DMA_MUPD:Master update DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1272 | * @arg HRTIM_TIM_DMA_CMP1: Timer compare 1 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1273 | * @arg HRTIM_TIM_DMA_CMP2: Timer compare 2 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1274 | * @arg HRTIM_TIM_DMA_CMP3: Timer compare 3 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1275 | * @arg HRTIM_TIM_DMA_CMP4: Timer compare 4 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1276 | * @arg HRTIM_TIM_DMA_REP: Timer repetition DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1277 | * @arg HRTIM_TIM_DMA_UPD: Timer update DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1278 | * @arg HRTIM_TIM_DMA_CPT1: Timer capture 1 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1279 | * @arg HRTIM_TIM_DMA_CPT2: Timer capture 2 DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1280 | * @arg HRTIM_TIM_DMA_SET1: Timer output 1 set DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1281 | * @arg HRTIM_TIM_DMA_RST1: Timer output 1 reset DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1282 | * @arg HRTIM_TIM_DMA_SET2: Timer output 2 set DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1283 | * @arg HRTIM_TIM_DMA_RST2: Timer output 2 reset DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1284 | * @arg HRTIM_TIM_DMA_RST: Timer reset DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1285 | * @arg HRTIM_TIM_DMA_DLYPRT: Timer delay protection DMA request source |
| mbed_official | 125:23cc3068a9e4 | 1286 | * @param NewState: new state of the DMA Request sources. |
| mbed_official | 125:23cc3068a9e4 | 1287 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 125:23cc3068a9e4 | 1288 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1289 | */ |
| mbed_official | 125:23cc3068a9e4 | 1290 | void HRTIM_DMACmd(HRTIM_TypeDef* HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_DMA, FunctionalState NewState) |
| mbed_official | 125:23cc3068a9e4 | 1291 | { |
| mbed_official | 125:23cc3068a9e4 | 1292 | if(TimerIdx != HRTIM_TIMERINDEX_MASTER) |
| mbed_official | 125:23cc3068a9e4 | 1293 | { |
| mbed_official | 125:23cc3068a9e4 | 1294 | if(NewState != DISABLE) |
| mbed_official | 125:23cc3068a9e4 | 1295 | { |
| mbed_official | 125:23cc3068a9e4 | 1296 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER |= HRTIM_DMA; |
| mbed_official | 125:23cc3068a9e4 | 1297 | } |
| mbed_official | 125:23cc3068a9e4 | 1298 | else |
| mbed_official | 125:23cc3068a9e4 | 1299 | { |
| mbed_official | 125:23cc3068a9e4 | 1300 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER &= ~HRTIM_DMA; |
| mbed_official | 125:23cc3068a9e4 | 1301 | } |
| mbed_official | 125:23cc3068a9e4 | 1302 | } |
| mbed_official | 125:23cc3068a9e4 | 1303 | else |
| mbed_official | 125:23cc3068a9e4 | 1304 | { |
| mbed_official | 125:23cc3068a9e4 | 1305 | if(NewState != DISABLE) |
| mbed_official | 125:23cc3068a9e4 | 1306 | { |
| mbed_official | 125:23cc3068a9e4 | 1307 | HRTIMx->HRTIM_MASTER.MDIER |= HRTIM_DMA; |
| mbed_official | 125:23cc3068a9e4 | 1308 | } |
| mbed_official | 125:23cc3068a9e4 | 1309 | else |
| mbed_official | 125:23cc3068a9e4 | 1310 | { |
| mbed_official | 125:23cc3068a9e4 | 1311 | HRTIMx->HRTIM_MASTER.MDIER &= ~HRTIM_DMA; |
| mbed_official | 125:23cc3068a9e4 | 1312 | } |
| mbed_official | 125:23cc3068a9e4 | 1313 | } |
| mbed_official | 125:23cc3068a9e4 | 1314 | } |
| mbed_official | 125:23cc3068a9e4 | 1315 | |
| mbed_official | 125:23cc3068a9e4 | 1316 | /** |
| mbed_official | 125:23cc3068a9e4 | 1317 | * @} |
| mbed_official | 125:23cc3068a9e4 | 1318 | */ |
| mbed_official | 125:23cc3068a9e4 | 1319 | |
| mbed_official | 125:23cc3068a9e4 | 1320 | /** @defgroup HRTIM_Group3 Peripheral Control methods |
| mbed_official | 125:23cc3068a9e4 | 1321 | * @brief management functions |
| mbed_official | 125:23cc3068a9e4 | 1322 | * |
| mbed_official | 125:23cc3068a9e4 | 1323 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 1324 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 1325 | ##### Peripheral Control methods ##### |
| mbed_official | 125:23cc3068a9e4 | 1326 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 1327 | [..] |
| mbed_official | 125:23cc3068a9e4 | 1328 | This subsection provides a set of functions allowing to control the HRTIMx data |
| mbed_official | 125:23cc3068a9e4 | 1329 | transfers. |
| mbed_official | 125:23cc3068a9e4 | 1330 | |
| mbed_official | 125:23cc3068a9e4 | 1331 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 1332 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 1333 | */ |
| mbed_official | 125:23cc3068a9e4 | 1334 | |
| mbed_official | 125:23cc3068a9e4 | 1335 | /** |
| mbed_official | 125:23cc3068a9e4 | 1336 | * @brief Configures an output in basic output compare mode |
| mbed_official | 125:23cc3068a9e4 | 1337 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1338 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1339 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1340 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1341 | * @param OCChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 1342 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1343 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1344 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1345 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1346 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1347 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1348 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1349 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1350 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1351 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1352 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1353 | * @param pBasicOCChannelCfg: pointer to the basic output compare output configuration structure |
| mbed_official | 125:23cc3068a9e4 | 1354 | * @note When the timer operates in basic output compare mode: |
| mbed_official | 125:23cc3068a9e4 | 1355 | * Output 1 is implicitely controled by the compare unit 1 |
| mbed_official | 125:23cc3068a9e4 | 1356 | * Output 2 is implicitely controled by the compare unit 2 |
| mbed_official | 125:23cc3068a9e4 | 1357 | * Output Set/Reset crossbar is set according to the selected output compare mode: |
| mbed_official | 125:23cc3068a9e4 | 1358 | * Toggle: SETxyR = RSTxyR = CMPy |
| mbed_official | 125:23cc3068a9e4 | 1359 | * Active: SETxyR = CMPy, RSTxyR = 0 |
| mbed_official | 125:23cc3068a9e4 | 1360 | * Inactive: SETxy =0, RSTxy = CMPy |
| mbed_official | 125:23cc3068a9e4 | 1361 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1362 | */ |
| mbed_official | 125:23cc3068a9e4 | 1363 | void HRTIM_SimpleOCChannelConfig(HRTIM_TypeDef * HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 1364 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1365 | uint32_t OCChannel, |
| mbed_official | 125:23cc3068a9e4 | 1366 | HRTIM_BasicOCChannelCfgTypeDef* pBasicOCChannelCfg) |
| mbed_official | 125:23cc3068a9e4 | 1367 | { |
| mbed_official | 125:23cc3068a9e4 | 1368 | uint32_t CompareUnit = HRTIM_COMPAREUNIT_1; |
| mbed_official | 125:23cc3068a9e4 | 1369 | HRTIM_CompareCfgTypeDef CompareCfg; |
| mbed_official | 125:23cc3068a9e4 | 1370 | HRTIM_OutputCfgTypeDef OutputCfg; |
| mbed_official | 125:23cc3068a9e4 | 1371 | |
| mbed_official | 125:23cc3068a9e4 | 1372 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 1373 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| mbed_official | 125:23cc3068a9e4 | 1374 | assert_param(IS_HRTIM_BASICOCMODE(pBasicOCChannelCfg->Mode)); |
| mbed_official | 125:23cc3068a9e4 | 1375 | assert_param(IS_HRTIM_OUTPUTPOLARITY(pBasicOCChannelCfg->Polarity)); |
| mbed_official | 125:23cc3068a9e4 | 1376 | assert_param(IS_HRTIM_OUTPUTIDLESTATE(pBasicOCChannelCfg->IdleState)); |
| mbed_official | 125:23cc3068a9e4 | 1377 | |
| mbed_official | 125:23cc3068a9e4 | 1378 | /* Configure timer compare unit */ |
| mbed_official | 125:23cc3068a9e4 | 1379 | switch (OCChannel) |
| mbed_official | 125:23cc3068a9e4 | 1380 | { |
| mbed_official | 125:23cc3068a9e4 | 1381 | case HRTIM_OUTPUT_TA1: |
| mbed_official | 125:23cc3068a9e4 | 1382 | case HRTIM_OUTPUT_TB1: |
| mbed_official | 125:23cc3068a9e4 | 1383 | case HRTIM_OUTPUT_TC1: |
| mbed_official | 125:23cc3068a9e4 | 1384 | case HRTIM_OUTPUT_TD1: |
| mbed_official | 125:23cc3068a9e4 | 1385 | case HRTIM_OUTPUT_TE1: |
| mbed_official | 125:23cc3068a9e4 | 1386 | { |
| mbed_official | 125:23cc3068a9e4 | 1387 | CompareUnit = HRTIM_COMPAREUNIT_1; |
| mbed_official | 125:23cc3068a9e4 | 1388 | } |
| mbed_official | 125:23cc3068a9e4 | 1389 | break; |
| mbed_official | 125:23cc3068a9e4 | 1390 | case HRTIM_OUTPUT_TA2: |
| mbed_official | 125:23cc3068a9e4 | 1391 | case HRTIM_OUTPUT_TB2: |
| mbed_official | 125:23cc3068a9e4 | 1392 | case HRTIM_OUTPUT_TC2: |
| mbed_official | 125:23cc3068a9e4 | 1393 | case HRTIM_OUTPUT_TD2: |
| mbed_official | 125:23cc3068a9e4 | 1394 | case HRTIM_OUTPUT_TE2: |
| mbed_official | 125:23cc3068a9e4 | 1395 | { |
| mbed_official | 125:23cc3068a9e4 | 1396 | CompareUnit = HRTIM_COMPAREUNIT_2; |
| mbed_official | 125:23cc3068a9e4 | 1397 | } |
| mbed_official | 125:23cc3068a9e4 | 1398 | break; |
| mbed_official | 125:23cc3068a9e4 | 1399 | default: |
| mbed_official | 125:23cc3068a9e4 | 1400 | break; |
| mbed_official | 125:23cc3068a9e4 | 1401 | } |
| mbed_official | 125:23cc3068a9e4 | 1402 | |
| mbed_official | 125:23cc3068a9e4 | 1403 | CompareCfg.CompareValue = pBasicOCChannelCfg->Pulse; |
| mbed_official | 125:23cc3068a9e4 | 1404 | CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR; |
| mbed_official | 125:23cc3068a9e4 | 1405 | CompareCfg.AutoDelayedTimeout = 0; |
| mbed_official | 125:23cc3068a9e4 | 1406 | |
| mbed_official | 125:23cc3068a9e4 | 1407 | HRTIM_CompareUnitConfig(HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 1408 | TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1409 | CompareUnit, |
| mbed_official | 125:23cc3068a9e4 | 1410 | &CompareCfg); |
| mbed_official | 125:23cc3068a9e4 | 1411 | |
| mbed_official | 125:23cc3068a9e4 | 1412 | /* Configure timer output */ |
| mbed_official | 125:23cc3068a9e4 | 1413 | OutputCfg.Polarity = pBasicOCChannelCfg->Polarity; |
| mbed_official | 125:23cc3068a9e4 | 1414 | OutputCfg.IdleState = pBasicOCChannelCfg->IdleState; |
| mbed_official | 125:23cc3068a9e4 | 1415 | OutputCfg.FaultState = HRTIM_OUTPUTFAULTSTATE_NONE; |
| mbed_official | 125:23cc3068a9e4 | 1416 | OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE; |
| mbed_official | 125:23cc3068a9e4 | 1417 | OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED; |
| mbed_official | 125:23cc3068a9e4 | 1418 | OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR; |
| mbed_official | 125:23cc3068a9e4 | 1419 | |
| mbed_official | 125:23cc3068a9e4 | 1420 | switch (pBasicOCChannelCfg->Mode) |
| mbed_official | 125:23cc3068a9e4 | 1421 | { |
| mbed_official | 125:23cc3068a9e4 | 1422 | case HRTIM_BASICOCMODE_TOGGLE: |
| mbed_official | 125:23cc3068a9e4 | 1423 | { |
| mbed_official | 125:23cc3068a9e4 | 1424 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
| mbed_official | 125:23cc3068a9e4 | 1425 | { |
| mbed_official | 125:23cc3068a9e4 | 1426 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
| mbed_official | 125:23cc3068a9e4 | 1427 | } |
| mbed_official | 125:23cc3068a9e4 | 1428 | else |
| mbed_official | 125:23cc3068a9e4 | 1429 | { |
| mbed_official | 125:23cc3068a9e4 | 1430 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
| mbed_official | 125:23cc3068a9e4 | 1431 | } |
| mbed_official | 125:23cc3068a9e4 | 1432 | OutputCfg.ResetSource = OutputCfg.SetSource; |
| mbed_official | 125:23cc3068a9e4 | 1433 | } |
| mbed_official | 125:23cc3068a9e4 | 1434 | break; |
| mbed_official | 125:23cc3068a9e4 | 1435 | case HRTIM_BASICOCMODE_ACTIVE: |
| mbed_official | 125:23cc3068a9e4 | 1436 | { |
| mbed_official | 125:23cc3068a9e4 | 1437 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
| mbed_official | 125:23cc3068a9e4 | 1438 | { |
| mbed_official | 125:23cc3068a9e4 | 1439 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
| mbed_official | 125:23cc3068a9e4 | 1440 | } |
| mbed_official | 125:23cc3068a9e4 | 1441 | else |
| mbed_official | 125:23cc3068a9e4 | 1442 | { |
| mbed_official | 125:23cc3068a9e4 | 1443 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
| mbed_official | 125:23cc3068a9e4 | 1444 | } |
| mbed_official | 125:23cc3068a9e4 | 1445 | OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE; |
| mbed_official | 125:23cc3068a9e4 | 1446 | } |
| mbed_official | 125:23cc3068a9e4 | 1447 | break; |
| mbed_official | 125:23cc3068a9e4 | 1448 | case HRTIM_BASICOCMODE_INACTIVE: |
| mbed_official | 125:23cc3068a9e4 | 1449 | { |
| mbed_official | 125:23cc3068a9e4 | 1450 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
| mbed_official | 125:23cc3068a9e4 | 1451 | { |
| mbed_official | 125:23cc3068a9e4 | 1452 | OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP1; |
| mbed_official | 125:23cc3068a9e4 | 1453 | } |
| mbed_official | 125:23cc3068a9e4 | 1454 | else |
| mbed_official | 125:23cc3068a9e4 | 1455 | { |
| mbed_official | 125:23cc3068a9e4 | 1456 | OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP2; |
| mbed_official | 125:23cc3068a9e4 | 1457 | } |
| mbed_official | 125:23cc3068a9e4 | 1458 | OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE; |
| mbed_official | 125:23cc3068a9e4 | 1459 | } |
| mbed_official | 125:23cc3068a9e4 | 1460 | break; |
| mbed_official | 125:23cc3068a9e4 | 1461 | default: |
| mbed_official | 125:23cc3068a9e4 | 1462 | break; |
| mbed_official | 125:23cc3068a9e4 | 1463 | } |
| mbed_official | 125:23cc3068a9e4 | 1464 | |
| mbed_official | 125:23cc3068a9e4 | 1465 | HRTIM_OutputConfig(HRTIM_, TimerIdx, OCChannel, &OutputCfg); |
| mbed_official | 125:23cc3068a9e4 | 1466 | } |
| mbed_official | 125:23cc3068a9e4 | 1467 | |
| mbed_official | 125:23cc3068a9e4 | 1468 | /** |
| mbed_official | 125:23cc3068a9e4 | 1469 | * @brief Configures an output in basic PWM mode |
| mbed_official | 125:23cc3068a9e4 | 1470 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1471 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1472 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1473 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1474 | * @param PWMChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 1475 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1476 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1477 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1478 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1479 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1480 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1481 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1482 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1483 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1484 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1485 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1486 | * @param pBasicPWMChannelCfg: pointer to the basic PWM output configuration structure |
| mbed_official | 125:23cc3068a9e4 | 1487 | * @note When the timer operates in basic PWM output mode: |
| mbed_official | 125:23cc3068a9e4 | 1488 | * Output 1 is implicitly controled by the compare unit 1 |
| mbed_official | 125:23cc3068a9e4 | 1489 | * Output 2 is implicitly controled by the compare unit 2 |
| mbed_official | 125:23cc3068a9e4 | 1490 | * Output Set/Reset crossbar is set as follows: |
| mbed_official | 125:23cc3068a9e4 | 1491 | * Output 1: SETx1R = CMP1, RSTx1R = PER |
| mbed_official | 125:23cc3068a9e4 | 1492 | * Output 2: SETx2R = CMP2, RST2R = PER |
| mbed_official | 125:23cc3068a9e4 | 1493 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1494 | */ |
| mbed_official | 125:23cc3068a9e4 | 1495 | void HRTIM_SimplePWMChannelConfig(HRTIM_TypeDef * HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 1496 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1497 | uint32_t PWMChannel, |
| mbed_official | 125:23cc3068a9e4 | 1498 | HRTIM_BasicPWMChannelCfgTypeDef* pBasicPWMChannelCfg) |
| mbed_official | 125:23cc3068a9e4 | 1499 | { |
| mbed_official | 125:23cc3068a9e4 | 1500 | uint32_t CompareUnit = HRTIM_COMPAREUNIT_1; |
| mbed_official | 125:23cc3068a9e4 | 1501 | HRTIM_CompareCfgTypeDef CompareCfg; |
| mbed_official | 125:23cc3068a9e4 | 1502 | HRTIM_OutputCfgTypeDef OutputCfg; |
| mbed_official | 125:23cc3068a9e4 | 1503 | |
| mbed_official | 125:23cc3068a9e4 | 1504 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 1505 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| mbed_official | 125:23cc3068a9e4 | 1506 | assert_param(IS_HRTIM_OUTPUTPOLARITY(pBasicPWMChannelCfg->Polarity)); |
| mbed_official | 125:23cc3068a9e4 | 1507 | assert_param(IS_HRTIM_OUTPUTIDLESTATE(pBasicPWMChannelCfg->IdleState)); |
| mbed_official | 125:23cc3068a9e4 | 1508 | |
| mbed_official | 125:23cc3068a9e4 | 1509 | /* Configure timer compare unit */ |
| mbed_official | 125:23cc3068a9e4 | 1510 | switch (PWMChannel) |
| mbed_official | 125:23cc3068a9e4 | 1511 | { |
| mbed_official | 125:23cc3068a9e4 | 1512 | case HRTIM_OUTPUT_TA1: |
| mbed_official | 125:23cc3068a9e4 | 1513 | case HRTIM_OUTPUT_TB1: |
| mbed_official | 125:23cc3068a9e4 | 1514 | case HRTIM_OUTPUT_TC1: |
| mbed_official | 125:23cc3068a9e4 | 1515 | case HRTIM_OUTPUT_TD1: |
| mbed_official | 125:23cc3068a9e4 | 1516 | case HRTIM_OUTPUT_TE1: |
| mbed_official | 125:23cc3068a9e4 | 1517 | { |
| mbed_official | 125:23cc3068a9e4 | 1518 | CompareUnit = HRTIM_COMPAREUNIT_1; |
| mbed_official | 125:23cc3068a9e4 | 1519 | } |
| mbed_official | 125:23cc3068a9e4 | 1520 | break; |
| mbed_official | 125:23cc3068a9e4 | 1521 | case HRTIM_OUTPUT_TA2: |
| mbed_official | 125:23cc3068a9e4 | 1522 | case HRTIM_OUTPUT_TB2: |
| mbed_official | 125:23cc3068a9e4 | 1523 | case HRTIM_OUTPUT_TC2: |
| mbed_official | 125:23cc3068a9e4 | 1524 | case HRTIM_OUTPUT_TD2: |
| mbed_official | 125:23cc3068a9e4 | 1525 | case HRTIM_OUTPUT_TE2: |
| mbed_official | 125:23cc3068a9e4 | 1526 | { |
| mbed_official | 125:23cc3068a9e4 | 1527 | CompareUnit = HRTIM_COMPAREUNIT_2; |
| mbed_official | 125:23cc3068a9e4 | 1528 | } |
| mbed_official | 125:23cc3068a9e4 | 1529 | break; |
| mbed_official | 125:23cc3068a9e4 | 1530 | default: |
| mbed_official | 125:23cc3068a9e4 | 1531 | break; |
| mbed_official | 125:23cc3068a9e4 | 1532 | } |
| mbed_official | 125:23cc3068a9e4 | 1533 | |
| mbed_official | 125:23cc3068a9e4 | 1534 | CompareCfg.CompareValue = pBasicPWMChannelCfg->Pulse; |
| mbed_official | 125:23cc3068a9e4 | 1535 | CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR; |
| mbed_official | 125:23cc3068a9e4 | 1536 | CompareCfg.AutoDelayedTimeout = 0; |
| mbed_official | 125:23cc3068a9e4 | 1537 | |
| mbed_official | 125:23cc3068a9e4 | 1538 | HRTIM_CompareUnitConfig(HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 1539 | TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1540 | CompareUnit, |
| mbed_official | 125:23cc3068a9e4 | 1541 | &CompareCfg); |
| mbed_official | 125:23cc3068a9e4 | 1542 | |
| mbed_official | 125:23cc3068a9e4 | 1543 | /* Configure timer output */ |
| mbed_official | 125:23cc3068a9e4 | 1544 | OutputCfg.Polarity = pBasicPWMChannelCfg->Polarity; |
| mbed_official | 125:23cc3068a9e4 | 1545 | OutputCfg.IdleState = pBasicPWMChannelCfg->IdleState; |
| mbed_official | 125:23cc3068a9e4 | 1546 | OutputCfg.FaultState = HRTIM_OUTPUTFAULTSTATE_NONE; |
| mbed_official | 125:23cc3068a9e4 | 1547 | OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE; |
| mbed_official | 125:23cc3068a9e4 | 1548 | OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED; |
| mbed_official | 125:23cc3068a9e4 | 1549 | OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR; |
| mbed_official | 125:23cc3068a9e4 | 1550 | |
| mbed_official | 125:23cc3068a9e4 | 1551 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
| mbed_official | 125:23cc3068a9e4 | 1552 | { |
| mbed_official | 125:23cc3068a9e4 | 1553 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
| mbed_official | 125:23cc3068a9e4 | 1554 | } |
| mbed_official | 125:23cc3068a9e4 | 1555 | else |
| mbed_official | 125:23cc3068a9e4 | 1556 | { |
| mbed_official | 125:23cc3068a9e4 | 1557 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
| mbed_official | 125:23cc3068a9e4 | 1558 | } |
| mbed_official | 125:23cc3068a9e4 | 1559 | OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER; |
| mbed_official | 125:23cc3068a9e4 | 1560 | |
| mbed_official | 125:23cc3068a9e4 | 1561 | HRTIM_OutputConfig(HRTIM_, TimerIdx, PWMChannel, &OutputCfg); |
| mbed_official | 125:23cc3068a9e4 | 1562 | } |
| mbed_official | 125:23cc3068a9e4 | 1563 | |
| mbed_official | 125:23cc3068a9e4 | 1564 | /** |
| mbed_official | 125:23cc3068a9e4 | 1565 | * @brief Configures a basic capture |
| mbed_official | 125:23cc3068a9e4 | 1566 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1567 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1568 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1569 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1570 | * @param CaptureChannel: Capture unit |
| mbed_official | 125:23cc3068a9e4 | 1571 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1572 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| mbed_official | 125:23cc3068a9e4 | 1573 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| mbed_official | 125:23cc3068a9e4 | 1574 | * @param pBasicCaptureChannelCfg: pointer to the basic capture configuration structure |
| mbed_official | 125:23cc3068a9e4 | 1575 | * @note When the timer operates in basic capture mode the capture is triggered |
| mbed_official | 125:23cc3068a9e4 | 1576 | * by the designated external event and GPIO input is implicitly used as event source. |
| mbed_official | 125:23cc3068a9e4 | 1577 | * The cature can be triggered by a rising edge, a falling edge or both |
| mbed_official | 125:23cc3068a9e4 | 1578 | * edges on event channel. |
| mbed_official | 125:23cc3068a9e4 | 1579 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1580 | */ |
| mbed_official | 125:23cc3068a9e4 | 1581 | void HRTIM_SimpleCaptureChannelConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 1582 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1583 | uint32_t CaptureChannel, |
| mbed_official | 125:23cc3068a9e4 | 1584 | HRTIM_BasicCaptureChannelCfgTypeDef* pBasicCaptureChannelCfg) |
| mbed_official | 125:23cc3068a9e4 | 1585 | { |
| mbed_official | 125:23cc3068a9e4 | 1586 | HRTIM_EventCfgTypeDef EventCfg; |
| mbed_official | 125:23cc3068a9e4 | 1587 | |
| mbed_official | 125:23cc3068a9e4 | 1588 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 1589 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 1590 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
| mbed_official | 125:23cc3068a9e4 | 1591 | assert_param(IS_HRTIM_EVENT(pBasicCaptureChannelCfg->Event)); |
| mbed_official | 125:23cc3068a9e4 | 1592 | assert_param(IS_HRTIM_EVENTPOLARITY(pBasicCaptureChannelCfg->EventPolarity)); |
| mbed_official | 125:23cc3068a9e4 | 1593 | assert_param(IS_HRTIM_EVENTSENSITIVITY(pBasicCaptureChannelCfg->EventSensitivity)); |
| mbed_official | 125:23cc3068a9e4 | 1594 | assert_param(IS_HRTIM_EVENTFILTER(pBasicCaptureChannelCfg->EventFilter)); |
| mbed_official | 125:23cc3068a9e4 | 1595 | |
| mbed_official | 125:23cc3068a9e4 | 1596 | /* Configure external event channel */ |
| mbed_official | 125:23cc3068a9e4 | 1597 | EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE; |
| mbed_official | 125:23cc3068a9e4 | 1598 | EventCfg.Filter = pBasicCaptureChannelCfg->EventFilter; |
| mbed_official | 125:23cc3068a9e4 | 1599 | EventCfg.Polarity = pBasicCaptureChannelCfg->EventPolarity; |
| mbed_official | 125:23cc3068a9e4 | 1600 | EventCfg.Sensitivity = pBasicCaptureChannelCfg->EventSensitivity; |
| mbed_official | 125:23cc3068a9e4 | 1601 | EventCfg.Source = HRTIM_EVENTSRC_1; |
| mbed_official | 125:23cc3068a9e4 | 1602 | |
| mbed_official | 125:23cc3068a9e4 | 1603 | HRTIM_ExternalEventConfig(HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 1604 | pBasicCaptureChannelCfg->Event, |
| mbed_official | 125:23cc3068a9e4 | 1605 | &EventCfg); |
| mbed_official | 125:23cc3068a9e4 | 1606 | |
| mbed_official | 125:23cc3068a9e4 | 1607 | /* Memorize capture trigger (will be configured when the capture is started */ |
| mbed_official | 125:23cc3068a9e4 | 1608 | HRTIM_CaptureUnitConfig(HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 1609 | TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1610 | CaptureChannel, |
| mbed_official | 125:23cc3068a9e4 | 1611 | pBasicCaptureChannelCfg->Event); |
| mbed_official | 125:23cc3068a9e4 | 1612 | } |
| mbed_official | 125:23cc3068a9e4 | 1613 | |
| mbed_official | 125:23cc3068a9e4 | 1614 | /** |
| mbed_official | 125:23cc3068a9e4 | 1615 | * @brief Configures an output basic one pulse mode |
| mbed_official | 125:23cc3068a9e4 | 1616 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1617 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1618 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1619 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1620 | * @param OnePulseChannel: Timer output |
| mbed_official | 125:23cc3068a9e4 | 1621 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1622 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1623 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1624 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1625 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1626 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1627 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1628 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1629 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1630 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 1631 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 1632 | * @param pBasicOnePulseChannelCfg: pointer to the basic one pulse output configuration structure |
| mbed_official | 125:23cc3068a9e4 | 1633 | * @note When the timer operates in basic one pulse mode: |
| mbed_official | 125:23cc3068a9e4 | 1634 | * the timer counter is implicitly started by the reset event, |
| mbed_official | 125:23cc3068a9e4 | 1635 | * the reset of the timer counter is triggered by the designated external event |
| mbed_official | 125:23cc3068a9e4 | 1636 | * GPIO input is implicitly used as event source, |
| mbed_official | 125:23cc3068a9e4 | 1637 | * Output 1 is implicitly controled by the compare unit 1, |
| mbed_official | 125:23cc3068a9e4 | 1638 | * Output 2 is implicitly controled by the compare unit 2. |
| mbed_official | 125:23cc3068a9e4 | 1639 | * Output Set/Reset crossbar is set as follows: |
| mbed_official | 125:23cc3068a9e4 | 1640 | * Output 1: SETx1R = CMP1, RSTx1R = PER |
| mbed_official | 125:23cc3068a9e4 | 1641 | * Output 2: SETx2R = CMP2, RST2R = PER |
| mbed_official | 125:23cc3068a9e4 | 1642 | * The counter mode should be HRTIM_MODE_SINGLESHOT_RETRIGGERABLE |
| mbed_official | 125:23cc3068a9e4 | 1643 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1644 | */ |
| mbed_official | 125:23cc3068a9e4 | 1645 | void HRTIM_SimpleOnePulseChannelConfig(HRTIM_TypeDef * HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 1646 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1647 | uint32_t OnePulseChannel, |
| mbed_official | 125:23cc3068a9e4 | 1648 | HRTIM_BasicOnePulseChannelCfgTypeDef* pBasicOnePulseChannelCfg) |
| mbed_official | 125:23cc3068a9e4 | 1649 | { |
| mbed_official | 125:23cc3068a9e4 | 1650 | uint32_t CompareUnit = HRTIM_COMPAREUNIT_1; |
| mbed_official | 125:23cc3068a9e4 | 1651 | HRTIM_CompareCfgTypeDef CompareCfg; |
| mbed_official | 125:23cc3068a9e4 | 1652 | HRTIM_OutputCfgTypeDef OutputCfg; |
| mbed_official | 125:23cc3068a9e4 | 1653 | HRTIM_EventCfgTypeDef EventCfg; |
| mbed_official | 125:23cc3068a9e4 | 1654 | |
| mbed_official | 125:23cc3068a9e4 | 1655 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 1656 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
| mbed_official | 125:23cc3068a9e4 | 1657 | assert_param(IS_HRTIM_OUTPUTPOLARITY(pBasicOnePulseChannelCfg->OutputPolarity)); |
| mbed_official | 125:23cc3068a9e4 | 1658 | assert_param(IS_HRTIM_OUTPUTIDLESTATE(pBasicOnePulseChannelCfg->OutputIdleState)); |
| mbed_official | 125:23cc3068a9e4 | 1659 | assert_param(IS_HRTIM_EVENT(pBasicOnePulseChannelCfg->Event)); |
| mbed_official | 125:23cc3068a9e4 | 1660 | assert_param(IS_HRTIM_EVENTPOLARITY(pBasicOnePulseChannelCfg->EventPolarity)); |
| mbed_official | 125:23cc3068a9e4 | 1661 | assert_param(IS_HRTIM_EVENTSENSITIVITY(pBasicOnePulseChannelCfg->EventSensitivity)); |
| mbed_official | 125:23cc3068a9e4 | 1662 | assert_param(IS_HRTIM_EVENTFILTER(pBasicOnePulseChannelCfg->EventFilter)); |
| mbed_official | 125:23cc3068a9e4 | 1663 | |
| mbed_official | 125:23cc3068a9e4 | 1664 | /* Configure timer compare unit */ |
| mbed_official | 125:23cc3068a9e4 | 1665 | switch (OnePulseChannel) |
| mbed_official | 125:23cc3068a9e4 | 1666 | { |
| mbed_official | 125:23cc3068a9e4 | 1667 | case HRTIM_OUTPUT_TA1: |
| mbed_official | 125:23cc3068a9e4 | 1668 | case HRTIM_OUTPUT_TB1: |
| mbed_official | 125:23cc3068a9e4 | 1669 | case HRTIM_OUTPUT_TC1: |
| mbed_official | 125:23cc3068a9e4 | 1670 | case HRTIM_OUTPUT_TD1: |
| mbed_official | 125:23cc3068a9e4 | 1671 | case HRTIM_OUTPUT_TE1: |
| mbed_official | 125:23cc3068a9e4 | 1672 | { |
| mbed_official | 125:23cc3068a9e4 | 1673 | CompareUnit = HRTIM_COMPAREUNIT_1; |
| mbed_official | 125:23cc3068a9e4 | 1674 | } |
| mbed_official | 125:23cc3068a9e4 | 1675 | break; |
| mbed_official | 125:23cc3068a9e4 | 1676 | case HRTIM_OUTPUT_TA2: |
| mbed_official | 125:23cc3068a9e4 | 1677 | case HRTIM_OUTPUT_TB2: |
| mbed_official | 125:23cc3068a9e4 | 1678 | case HRTIM_OUTPUT_TC2: |
| mbed_official | 125:23cc3068a9e4 | 1679 | case HRTIM_OUTPUT_TD2: |
| mbed_official | 125:23cc3068a9e4 | 1680 | case HRTIM_OUTPUT_TE2: |
| mbed_official | 125:23cc3068a9e4 | 1681 | { |
| mbed_official | 125:23cc3068a9e4 | 1682 | CompareUnit = HRTIM_COMPAREUNIT_2; |
| mbed_official | 125:23cc3068a9e4 | 1683 | } |
| mbed_official | 125:23cc3068a9e4 | 1684 | break; |
| mbed_official | 125:23cc3068a9e4 | 1685 | default: |
| mbed_official | 125:23cc3068a9e4 | 1686 | break; |
| mbed_official | 125:23cc3068a9e4 | 1687 | } |
| mbed_official | 125:23cc3068a9e4 | 1688 | |
| mbed_official | 125:23cc3068a9e4 | 1689 | CompareCfg.CompareValue = pBasicOnePulseChannelCfg->Pulse; |
| mbed_official | 125:23cc3068a9e4 | 1690 | CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR; |
| mbed_official | 125:23cc3068a9e4 | 1691 | CompareCfg.AutoDelayedTimeout = 0; |
| mbed_official | 125:23cc3068a9e4 | 1692 | |
| mbed_official | 125:23cc3068a9e4 | 1693 | HRTIM_CompareUnitConfig(HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 1694 | TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1695 | CompareUnit, |
| mbed_official | 125:23cc3068a9e4 | 1696 | &CompareCfg); |
| mbed_official | 125:23cc3068a9e4 | 1697 | |
| mbed_official | 125:23cc3068a9e4 | 1698 | /* Configure timer output */ |
| mbed_official | 125:23cc3068a9e4 | 1699 | OutputCfg.Polarity = pBasicOnePulseChannelCfg->OutputPolarity; |
| mbed_official | 125:23cc3068a9e4 | 1700 | OutputCfg.IdleState = pBasicOnePulseChannelCfg->OutputIdleState; |
| mbed_official | 125:23cc3068a9e4 | 1701 | OutputCfg.FaultState = HRTIM_OUTPUTFAULTSTATE_NONE; |
| mbed_official | 125:23cc3068a9e4 | 1702 | OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE; |
| mbed_official | 125:23cc3068a9e4 | 1703 | OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED; |
| mbed_official | 125:23cc3068a9e4 | 1704 | OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR; |
| mbed_official | 125:23cc3068a9e4 | 1705 | |
| mbed_official | 125:23cc3068a9e4 | 1706 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
| mbed_official | 125:23cc3068a9e4 | 1707 | { |
| mbed_official | 125:23cc3068a9e4 | 1708 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
| mbed_official | 125:23cc3068a9e4 | 1709 | } |
| mbed_official | 125:23cc3068a9e4 | 1710 | else |
| mbed_official | 125:23cc3068a9e4 | 1711 | { |
| mbed_official | 125:23cc3068a9e4 | 1712 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
| mbed_official | 125:23cc3068a9e4 | 1713 | } |
| mbed_official | 125:23cc3068a9e4 | 1714 | OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER; |
| mbed_official | 125:23cc3068a9e4 | 1715 | |
| mbed_official | 125:23cc3068a9e4 | 1716 | HRTIM_OutputConfig(HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 1717 | TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1718 | OnePulseChannel, |
| mbed_official | 125:23cc3068a9e4 | 1719 | &OutputCfg); |
| mbed_official | 125:23cc3068a9e4 | 1720 | |
| mbed_official | 125:23cc3068a9e4 | 1721 | /* Configure external event channel */ |
| mbed_official | 125:23cc3068a9e4 | 1722 | EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE; |
| mbed_official | 125:23cc3068a9e4 | 1723 | EventCfg.Filter = pBasicOnePulseChannelCfg->EventFilter; |
| mbed_official | 125:23cc3068a9e4 | 1724 | EventCfg.Polarity = pBasicOnePulseChannelCfg->EventPolarity; |
| mbed_official | 125:23cc3068a9e4 | 1725 | EventCfg.Sensitivity = pBasicOnePulseChannelCfg->EventSensitivity; |
| mbed_official | 125:23cc3068a9e4 | 1726 | EventCfg.Source = HRTIM_EVENTSRC_1; |
| mbed_official | 125:23cc3068a9e4 | 1727 | |
| mbed_official | 125:23cc3068a9e4 | 1728 | HRTIM_ExternalEventConfig(HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 1729 | pBasicOnePulseChannelCfg->Event, |
| mbed_official | 125:23cc3068a9e4 | 1730 | &EventCfg); |
| mbed_official | 125:23cc3068a9e4 | 1731 | |
| mbed_official | 125:23cc3068a9e4 | 1732 | /* Configure the timer reset register */ |
| mbed_official | 125:23cc3068a9e4 | 1733 | HRTIM_TIM_ResetConfig(HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 1734 | TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1735 | pBasicOnePulseChannelCfg->Event); |
| mbed_official | 125:23cc3068a9e4 | 1736 | } |
| mbed_official | 125:23cc3068a9e4 | 1737 | |
| mbed_official | 125:23cc3068a9e4 | 1738 | /** |
| mbed_official | 125:23cc3068a9e4 | 1739 | * @brief Configures the general behavior of a timer operating in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 1740 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1741 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1742 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1743 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1744 | * @param pTimerCfg: pointer to the timer configuration structure |
| mbed_official | 125:23cc3068a9e4 | 1745 | * @note When the timer operates in waveform mode, all the features supported by |
| mbed_official | 125:23cc3068a9e4 | 1746 | * the HRTIMx are available without any limitation. |
| mbed_official | 125:23cc3068a9e4 | 1747 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1748 | */ |
| mbed_official | 125:23cc3068a9e4 | 1749 | void HRTIM_WaveformTimerConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 1750 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1751 | HRTIM_TimerCfgTypeDef * pTimerCfg) |
| mbed_official | 125:23cc3068a9e4 | 1752 | { |
| mbed_official | 125:23cc3068a9e4 | 1753 | uint32_t HRTIM_timcr; |
| mbed_official | 125:23cc3068a9e4 | 1754 | uint32_t HRTIM_timfltr; |
| mbed_official | 125:23cc3068a9e4 | 1755 | uint32_t HRTIM_timoutr; |
| mbed_official | 125:23cc3068a9e4 | 1756 | uint32_t HRTIM_timrstr; |
| mbed_official | 125:23cc3068a9e4 | 1757 | |
| mbed_official | 125:23cc3068a9e4 | 1758 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 1759 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 1760 | assert_param(IS_HRTIM_TIMPUSHPULLMODE(pTimerCfg->PushPull)); |
| mbed_official | 125:23cc3068a9e4 | 1761 | assert_param(IS_HRTIM_TIMFAULTENABLE(pTimerCfg->FaultEnable)); |
| mbed_official | 125:23cc3068a9e4 | 1762 | assert_param(IS_HRTIM_TIMFAULTLOCK(pTimerCfg->FaultLock)); |
| mbed_official | 125:23cc3068a9e4 | 1763 | assert_param(IS_HRTIM_TIMDEADTIMEINSERTION(pTimerCfg->DeadTimeInsertion)); |
| mbed_official | 125:23cc3068a9e4 | 1764 | assert_param(IS_HRTIM_TIMDELAYEDPROTECTION(pTimerCfg->DelayedProtectionMode)); |
| mbed_official | 125:23cc3068a9e4 | 1765 | assert_param(IS_HRTIM_TIMUPDATETRIGGER(pTimerCfg->UpdateTrigger)); |
| mbed_official | 125:23cc3068a9e4 | 1766 | assert_param(IS_HRTIM_TIMRESETTRIGGER(pTimerCfg->ResetTrigger)); |
| mbed_official | 125:23cc3068a9e4 | 1767 | assert_param(IS_HRTIM_TIMUPDATEONRESET(pTimerCfg->ResetUpdate)); |
| mbed_official | 125:23cc3068a9e4 | 1768 | |
| mbed_official | 125:23cc3068a9e4 | 1769 | /* Configure timing unit (Timer A to Timer E) */ |
| mbed_official | 125:23cc3068a9e4 | 1770 | HRTIM_timcr = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR; |
| mbed_official | 125:23cc3068a9e4 | 1771 | HRTIM_timfltr = HRTIMx->HRTIM_TIMERx[TimerIdx].FLTxR; |
| mbed_official | 125:23cc3068a9e4 | 1772 | HRTIM_timoutr = HRTIMx->HRTIM_TIMERx[TimerIdx].OUTxR; |
| mbed_official | 125:23cc3068a9e4 | 1773 | HRTIM_timrstr = HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR; |
| mbed_official | 125:23cc3068a9e4 | 1774 | |
| mbed_official | 125:23cc3068a9e4 | 1775 | /* Set the push-pull mode */ |
| mbed_official | 125:23cc3068a9e4 | 1776 | HRTIM_timcr &= ~(HRTIM_TIMCR_PSHPLL); |
| mbed_official | 125:23cc3068a9e4 | 1777 | HRTIM_timcr |= pTimerCfg->PushPull; |
| mbed_official | 125:23cc3068a9e4 | 1778 | |
| mbed_official | 125:23cc3068a9e4 | 1779 | /* Enable/Disable registers update on timer counter reset */ |
| mbed_official | 125:23cc3068a9e4 | 1780 | HRTIM_timcr &= ~(HRTIM_TIMCR_TRSTU); |
| mbed_official | 125:23cc3068a9e4 | 1781 | HRTIM_timcr |= pTimerCfg->ResetUpdate; |
| mbed_official | 125:23cc3068a9e4 | 1782 | |
| mbed_official | 125:23cc3068a9e4 | 1783 | /* Set the timer update trigger */ |
| mbed_official | 125:23cc3068a9e4 | 1784 | HRTIM_timcr &= ~(HRTIM_TIMCR_TIMUPDATETRIGGER); |
| mbed_official | 125:23cc3068a9e4 | 1785 | HRTIM_timcr |= pTimerCfg->UpdateTrigger; |
| mbed_official | 125:23cc3068a9e4 | 1786 | |
| mbed_official | 125:23cc3068a9e4 | 1787 | /* Enable/Disable the fault channel at timer level */ |
| mbed_official | 125:23cc3068a9e4 | 1788 | HRTIM_timfltr &= ~(HRTIM_FLTR_FLTxEN); |
| mbed_official | 125:23cc3068a9e4 | 1789 | HRTIM_timfltr |= (pTimerCfg->FaultEnable & HRTIM_FLTR_FLTxEN); |
| mbed_official | 125:23cc3068a9e4 | 1790 | |
| mbed_official | 125:23cc3068a9e4 | 1791 | /* Lock/Unlock fault sources at timer level */ |
| mbed_official | 125:23cc3068a9e4 | 1792 | HRTIM_timfltr &= ~(HRTIM_FLTR_FLTCLK); |
| mbed_official | 125:23cc3068a9e4 | 1793 | HRTIM_timfltr |= pTimerCfg->FaultLock; |
| mbed_official | 125:23cc3068a9e4 | 1794 | |
| mbed_official | 125:23cc3068a9e4 | 1795 | /* Enable/Disable dead time insertion at timer level */ |
| mbed_official | 125:23cc3068a9e4 | 1796 | HRTIM_timoutr &= ~(HRTIM_OUTR_DTEN); |
| mbed_official | 125:23cc3068a9e4 | 1797 | HRTIM_timoutr |= pTimerCfg->DeadTimeInsertion; |
| mbed_official | 125:23cc3068a9e4 | 1798 | |
| mbed_official | 125:23cc3068a9e4 | 1799 | /* Enable/Disable delayed protection at timer level */ |
| mbed_official | 125:23cc3068a9e4 | 1800 | HRTIM_timoutr &= ~(HRTIM_OUTR_DLYPRT| HRTIM_OUTR_DLYPRTEN); |
| mbed_official | 125:23cc3068a9e4 | 1801 | HRTIM_timoutr |= pTimerCfg->DelayedProtectionMode; |
| mbed_official | 125:23cc3068a9e4 | 1802 | |
| mbed_official | 125:23cc3068a9e4 | 1803 | /* Set the timer counter reset trigger */ |
| mbed_official | 125:23cc3068a9e4 | 1804 | HRTIM_timrstr = pTimerCfg->ResetTrigger; |
| mbed_official | 125:23cc3068a9e4 | 1805 | |
| mbed_official | 125:23cc3068a9e4 | 1806 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 1807 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR = HRTIM_timcr; |
| mbed_official | 125:23cc3068a9e4 | 1808 | HRTIMx->HRTIM_TIMERx[TimerIdx].FLTxR = HRTIM_timfltr; |
| mbed_official | 125:23cc3068a9e4 | 1809 | HRTIMx->HRTIM_TIMERx[TimerIdx].OUTxR = HRTIM_timoutr; |
| mbed_official | 125:23cc3068a9e4 | 1810 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_timrstr; |
| mbed_official | 125:23cc3068a9e4 | 1811 | } |
| mbed_official | 125:23cc3068a9e4 | 1812 | |
| mbed_official | 125:23cc3068a9e4 | 1813 | /** |
| mbed_official | 125:23cc3068a9e4 | 1814 | * @brief Configures the compare unit of a timer operating in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 1815 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1816 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1817 | * 0xFF for master timer |
| mbed_official | 125:23cc3068a9e4 | 1818 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1819 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1820 | * @param CompareUnit: Compare unit to configure |
| mbed_official | 125:23cc3068a9e4 | 1821 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1822 | * @arg HRTIM_COMPAREUNIT_1: Compare unit 1 |
| mbed_official | 125:23cc3068a9e4 | 1823 | * @arg HRTIM_COMPAREUNIT_2: Compare unit 2 |
| mbed_official | 125:23cc3068a9e4 | 1824 | * @arg HRTIM_COMPAREUNIT_3: Compare unit 3 |
| mbed_official | 125:23cc3068a9e4 | 1825 | * @arg HRTIM_COMPAREUNIT_4: Compare unit 4 |
| mbed_official | 125:23cc3068a9e4 | 1826 | * @param pCompareCfg: pointer to the compare unit configuration structure |
| mbed_official | 125:23cc3068a9e4 | 1827 | * @note When auto delayed mode is required for compare unit 2 or compare unit 4, |
| mbed_official | 125:23cc3068a9e4 | 1828 | * application has to configure separately the capture unit. Capture unit |
| mbed_official | 125:23cc3068a9e4 | 1829 | * to configure in that case depends on the compare unit auto delayed mode |
| mbed_official | 125:23cc3068a9e4 | 1830 | * is applied to (see below): |
| mbed_official | 125:23cc3068a9e4 | 1831 | * Auto delayed on output compare 2: capture unit 1 must be configured |
| mbed_official | 125:23cc3068a9e4 | 1832 | * Auto delayed on output compare 4: capture unit 2 must be configured |
| mbed_official | 125:23cc3068a9e4 | 1833 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1834 | */ |
| mbed_official | 125:23cc3068a9e4 | 1835 | void HRTIM_WaveformCompareConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 1836 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1837 | uint32_t CompareUnit, |
| mbed_official | 125:23cc3068a9e4 | 1838 | HRTIM_CompareCfgTypeDef* pCompareCfg) |
| mbed_official | 125:23cc3068a9e4 | 1839 | { |
| mbed_official | 125:23cc3068a9e4 | 1840 | uint32_t HRTIM_timcr; |
| mbed_official | 125:23cc3068a9e4 | 1841 | |
| mbed_official | 125:23cc3068a9e4 | 1842 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 1843 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 1844 | assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode)); |
| mbed_official | 125:23cc3068a9e4 | 1845 | |
| mbed_official | 125:23cc3068a9e4 | 1846 | /* Configure the compare unit */ |
| mbed_official | 125:23cc3068a9e4 | 1847 | switch (CompareUnit) |
| mbed_official | 125:23cc3068a9e4 | 1848 | { |
| mbed_official | 125:23cc3068a9e4 | 1849 | case HRTIM_COMPAREUNIT_1: |
| mbed_official | 125:23cc3068a9e4 | 1850 | { |
| mbed_official | 125:23cc3068a9e4 | 1851 | /* Set the compare value */ |
| mbed_official | 125:23cc3068a9e4 | 1852 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP1xR = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 1853 | } |
| mbed_official | 125:23cc3068a9e4 | 1854 | break; |
| mbed_official | 125:23cc3068a9e4 | 1855 | case HRTIM_COMPAREUNIT_2: |
| mbed_official | 125:23cc3068a9e4 | 1856 | { |
| mbed_official | 125:23cc3068a9e4 | 1857 | /* Set the compare value */ |
| mbed_official | 125:23cc3068a9e4 | 1858 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP2xR = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 1859 | |
| mbed_official | 125:23cc3068a9e4 | 1860 | if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR) |
| mbed_official | 125:23cc3068a9e4 | 1861 | { |
| mbed_official | 125:23cc3068a9e4 | 1862 | /* Configure auto-delayed mode */ |
| mbed_official | 125:23cc3068a9e4 | 1863 | HRTIM_timcr = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR; |
| mbed_official | 125:23cc3068a9e4 | 1864 | HRTIM_timcr &= ~HRTIM_TIMCR_DELCMP2; |
| mbed_official | 125:23cc3068a9e4 | 1865 | HRTIM_timcr |= pCompareCfg->AutoDelayedMode; |
| mbed_official | 125:23cc3068a9e4 | 1866 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR = HRTIM_timcr; |
| mbed_official | 125:23cc3068a9e4 | 1867 | |
| mbed_official | 125:23cc3068a9e4 | 1868 | /* Set the compare value for timeout compare unit (if any) */ |
| mbed_official | 125:23cc3068a9e4 | 1869 | if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) |
| mbed_official | 125:23cc3068a9e4 | 1870 | { |
| mbed_official | 125:23cc3068a9e4 | 1871 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout; |
| mbed_official | 125:23cc3068a9e4 | 1872 | } |
| mbed_official | 125:23cc3068a9e4 | 1873 | else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3) |
| mbed_official | 125:23cc3068a9e4 | 1874 | { |
| mbed_official | 125:23cc3068a9e4 | 1875 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout; |
| mbed_official | 125:23cc3068a9e4 | 1876 | } |
| mbed_official | 125:23cc3068a9e4 | 1877 | } |
| mbed_official | 125:23cc3068a9e4 | 1878 | } |
| mbed_official | 125:23cc3068a9e4 | 1879 | break; |
| mbed_official | 125:23cc3068a9e4 | 1880 | case HRTIM_COMPAREUNIT_3: |
| mbed_official | 125:23cc3068a9e4 | 1881 | { |
| mbed_official | 125:23cc3068a9e4 | 1882 | /* Set the compare value */ |
| mbed_official | 125:23cc3068a9e4 | 1883 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP3xR = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 1884 | } |
| mbed_official | 125:23cc3068a9e4 | 1885 | break; |
| mbed_official | 125:23cc3068a9e4 | 1886 | case HRTIM_COMPAREUNIT_4: |
| mbed_official | 125:23cc3068a9e4 | 1887 | { |
| mbed_official | 125:23cc3068a9e4 | 1888 | /* Set the compare value */ |
| mbed_official | 125:23cc3068a9e4 | 1889 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP4xR = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 1890 | |
| mbed_official | 125:23cc3068a9e4 | 1891 | if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR) |
| mbed_official | 125:23cc3068a9e4 | 1892 | { |
| mbed_official | 125:23cc3068a9e4 | 1893 | /* Configure auto-delayed mode */ |
| mbed_official | 125:23cc3068a9e4 | 1894 | HRTIM_timcr = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR; |
| mbed_official | 125:23cc3068a9e4 | 1895 | HRTIM_timcr &= ~HRTIM_TIMCR_DELCMP4; |
| mbed_official | 125:23cc3068a9e4 | 1896 | HRTIM_timcr |= (pCompareCfg->AutoDelayedMode << 2); |
| mbed_official | 125:23cc3068a9e4 | 1897 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR = HRTIM_timcr; |
| mbed_official | 125:23cc3068a9e4 | 1898 | |
| mbed_official | 125:23cc3068a9e4 | 1899 | /* Set the compare value for timeout compare unit (if any) */ |
| mbed_official | 125:23cc3068a9e4 | 1900 | if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) |
| mbed_official | 125:23cc3068a9e4 | 1901 | { |
| mbed_official | 125:23cc3068a9e4 | 1902 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout; |
| mbed_official | 125:23cc3068a9e4 | 1903 | } |
| mbed_official | 125:23cc3068a9e4 | 1904 | else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3) |
| mbed_official | 125:23cc3068a9e4 | 1905 | { |
| mbed_official | 125:23cc3068a9e4 | 1906 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout; |
| mbed_official | 125:23cc3068a9e4 | 1907 | } |
| mbed_official | 125:23cc3068a9e4 | 1908 | } |
| mbed_official | 125:23cc3068a9e4 | 1909 | } |
| mbed_official | 125:23cc3068a9e4 | 1910 | break; |
| mbed_official | 125:23cc3068a9e4 | 1911 | default: |
| mbed_official | 125:23cc3068a9e4 | 1912 | break; |
| mbed_official | 125:23cc3068a9e4 | 1913 | } |
| mbed_official | 125:23cc3068a9e4 | 1914 | } |
| mbed_official | 125:23cc3068a9e4 | 1915 | |
| mbed_official | 125:23cc3068a9e4 | 1916 | /** |
| mbed_official | 125:23cc3068a9e4 | 1917 | * @brief Sets the HRTIMx Master Comparex Register value |
| mbed_official | 125:23cc3068a9e4 | 1918 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1919 | * @param CompareUnit: Compare unit to configure |
| mbed_official | 125:23cc3068a9e4 | 1920 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1921 | * @arg HRTIM_COMPAREUNIT_1: Compare unit 1 |
| mbed_official | 125:23cc3068a9e4 | 1922 | * @arg HRTIM_COMPAREUNIT_2: Compare unit 2 |
| mbed_official | 125:23cc3068a9e4 | 1923 | * @arg HRTIM_COMPAREUNIT_3: Compare unit 3 |
| mbed_official | 125:23cc3068a9e4 | 1924 | * @arg HRTIM_COMPAREUNIT_4: Compare unit 4 |
| mbed_official | 125:23cc3068a9e4 | 1925 | * @param Compare: specifies the Comparex register new value |
| mbed_official | 125:23cc3068a9e4 | 1926 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1927 | */ |
| mbed_official | 125:23cc3068a9e4 | 1928 | void HRTIM_MasterSetCompare(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 1929 | uint32_t CompareUnit, |
| mbed_official | 125:23cc3068a9e4 | 1930 | uint32_t Compare) |
| mbed_official | 125:23cc3068a9e4 | 1931 | { |
| mbed_official | 125:23cc3068a9e4 | 1932 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 1933 | assert_param(IS_HRTIM_COMPAREUNIT(CompareUnit)); |
| mbed_official | 125:23cc3068a9e4 | 1934 | |
| mbed_official | 125:23cc3068a9e4 | 1935 | /* Configure the compare unit */ |
| mbed_official | 125:23cc3068a9e4 | 1936 | switch (CompareUnit) |
| mbed_official | 125:23cc3068a9e4 | 1937 | { |
| mbed_official | 125:23cc3068a9e4 | 1938 | case HRTIM_COMPAREUNIT_1: |
| mbed_official | 125:23cc3068a9e4 | 1939 | { |
| mbed_official | 125:23cc3068a9e4 | 1940 | /* Set the compare value */ |
| mbed_official | 125:23cc3068a9e4 | 1941 | HRTIMx->HRTIM_MASTER.MCMP1R = Compare; |
| mbed_official | 125:23cc3068a9e4 | 1942 | } |
| mbed_official | 125:23cc3068a9e4 | 1943 | break; |
| mbed_official | 125:23cc3068a9e4 | 1944 | case HRTIM_COMPAREUNIT_2: |
| mbed_official | 125:23cc3068a9e4 | 1945 | { |
| mbed_official | 125:23cc3068a9e4 | 1946 | /* Set the compare value */ |
| mbed_official | 125:23cc3068a9e4 | 1947 | HRTIMx->HRTIM_MASTER.MCMP2R = Compare; |
| mbed_official | 125:23cc3068a9e4 | 1948 | } |
| mbed_official | 125:23cc3068a9e4 | 1949 | break; |
| mbed_official | 125:23cc3068a9e4 | 1950 | case HRTIM_COMPAREUNIT_3: |
| mbed_official | 125:23cc3068a9e4 | 1951 | { |
| mbed_official | 125:23cc3068a9e4 | 1952 | /* Set the compare value */ |
| mbed_official | 125:23cc3068a9e4 | 1953 | HRTIMx->HRTIM_MASTER.MCMP3R = Compare; |
| mbed_official | 125:23cc3068a9e4 | 1954 | } |
| mbed_official | 125:23cc3068a9e4 | 1955 | break; |
| mbed_official | 125:23cc3068a9e4 | 1956 | case HRTIM_COMPAREUNIT_4: |
| mbed_official | 125:23cc3068a9e4 | 1957 | { |
| mbed_official | 125:23cc3068a9e4 | 1958 | /* Set the compare value */ |
| mbed_official | 125:23cc3068a9e4 | 1959 | HRTIMx->HRTIM_MASTER.MCMP4R = Compare; |
| mbed_official | 125:23cc3068a9e4 | 1960 | } |
| mbed_official | 125:23cc3068a9e4 | 1961 | break; |
| mbed_official | 125:23cc3068a9e4 | 1962 | default: |
| mbed_official | 125:23cc3068a9e4 | 1963 | break; |
| mbed_official | 125:23cc3068a9e4 | 1964 | } |
| mbed_official | 125:23cc3068a9e4 | 1965 | } |
| mbed_official | 125:23cc3068a9e4 | 1966 | /** |
| mbed_official | 125:23cc3068a9e4 | 1967 | * @brief Configures the capture unit of a timer operating in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 1968 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 1969 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 1970 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1971 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 1972 | * @param CaptureChannel: Capture unit to configure |
| mbed_official | 125:23cc3068a9e4 | 1973 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 1974 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| mbed_official | 125:23cc3068a9e4 | 1975 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| mbed_official | 125:23cc3068a9e4 | 1976 | * @param pCaptureCfg: pointer to the compare unit configuration structure |
| mbed_official | 125:23cc3068a9e4 | 1977 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 1978 | */ |
| mbed_official | 125:23cc3068a9e4 | 1979 | void HRTIM_WaveformCaptureConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 1980 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 1981 | uint32_t CaptureUnit, |
| mbed_official | 125:23cc3068a9e4 | 1982 | HRTIM_CaptureCfgTypeDef* pCaptureCfg) |
| mbed_official | 125:23cc3068a9e4 | 1983 | { |
| mbed_official | 125:23cc3068a9e4 | 1984 | /* Configure the capture unit */ |
| mbed_official | 125:23cc3068a9e4 | 1985 | switch (CaptureUnit) |
| mbed_official | 125:23cc3068a9e4 | 1986 | { |
| mbed_official | 125:23cc3068a9e4 | 1987 | case HRTIM_CAPTUREUNIT_1: |
| mbed_official | 125:23cc3068a9e4 | 1988 | { |
| mbed_official | 125:23cc3068a9e4 | 1989 | HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR = pCaptureCfg->Trigger; |
| mbed_official | 125:23cc3068a9e4 | 1990 | } |
| mbed_official | 125:23cc3068a9e4 | 1991 | break; |
| mbed_official | 125:23cc3068a9e4 | 1992 | case HRTIM_CAPTUREUNIT_2: |
| mbed_official | 125:23cc3068a9e4 | 1993 | { |
| mbed_official | 125:23cc3068a9e4 | 1994 | HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR = pCaptureCfg->Trigger; |
| mbed_official | 125:23cc3068a9e4 | 1995 | } |
| mbed_official | 125:23cc3068a9e4 | 1996 | break; |
| mbed_official | 125:23cc3068a9e4 | 1997 | default: |
| mbed_official | 125:23cc3068a9e4 | 1998 | break; |
| mbed_official | 125:23cc3068a9e4 | 1999 | } |
| mbed_official | 125:23cc3068a9e4 | 2000 | } |
| mbed_official | 125:23cc3068a9e4 | 2001 | |
| mbed_official | 125:23cc3068a9e4 | 2002 | /** |
| mbed_official | 125:23cc3068a9e4 | 2003 | * @brief Configures the output of a timer operating in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 2004 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2005 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 2006 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2007 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 2008 | * @param Output: Timer output |
| mbed_official | 125:23cc3068a9e4 | 2009 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2010 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2011 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2012 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2013 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2014 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2015 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2016 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2017 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2018 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2019 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2020 | * @param pOutputCfg: pointer to the timer output configuration structure |
| mbed_official | 125:23cc3068a9e4 | 2021 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2022 | */ |
| mbed_official | 125:23cc3068a9e4 | 2023 | void HRTIM_WaveformOutputConfig(HRTIM_TypeDef * HRTIM_, |
| mbed_official | 125:23cc3068a9e4 | 2024 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 2025 | uint32_t Output, |
| mbed_official | 125:23cc3068a9e4 | 2026 | HRTIM_OutputCfgTypeDef * pOutputCfg) |
| mbed_official | 125:23cc3068a9e4 | 2027 | { |
| mbed_official | 125:23cc3068a9e4 | 2028 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2029 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
| mbed_official | 125:23cc3068a9e4 | 2030 | assert_param(IS_HRTIM_OUTPUTPOLARITY(pOutputCfg->Polarity)); |
| mbed_official | 125:23cc3068a9e4 | 2031 | assert_param(IS_HRTIM_OUTPUTIDLESTATE(pOutputCfg->IdleState)); |
| mbed_official | 125:23cc3068a9e4 | 2032 | assert_param(IS_HRTIM_OUTPUTIDLEMODE(pOutputCfg->IdleMode)); |
| mbed_official | 125:23cc3068a9e4 | 2033 | assert_param(IS_HRTIM_OUTPUTFAULTSTATE(pOutputCfg->FaultState)); |
| mbed_official | 125:23cc3068a9e4 | 2034 | assert_param(IS_HRTIM_OUTPUTCHOPPERMODE(pOutputCfg->ChopperModeEnable)); |
| mbed_official | 125:23cc3068a9e4 | 2035 | assert_param(IS_HRTIM_OUTPUTBURSTMODEENTRY(pOutputCfg->BurstModeEntryDelayed)); |
| mbed_official | 125:23cc3068a9e4 | 2036 | |
| mbed_official | 125:23cc3068a9e4 | 2037 | /* Configure the timer output */ |
| mbed_official | 125:23cc3068a9e4 | 2038 | HRTIM_OutputConfig(HRTIM_, TimerIdx, Output, pOutputCfg); |
| mbed_official | 125:23cc3068a9e4 | 2039 | } |
| mbed_official | 125:23cc3068a9e4 | 2040 | |
| mbed_official | 125:23cc3068a9e4 | 2041 | /** |
| mbed_official | 125:23cc3068a9e4 | 2042 | * @brief Configures the event filtering capabilities of a timer (blanking, windowing) |
| mbed_official | 125:23cc3068a9e4 | 2043 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2044 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 2045 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2046 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 2047 | * @param Event: external event for which timer event filtering must be configured |
| mbed_official | 125:23cc3068a9e4 | 2048 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2049 | * @arg HRTIM_EVENT_1: External event 1 |
| mbed_official | 125:23cc3068a9e4 | 2050 | * @arg HRTIM_EVENT_2: External event 2 |
| mbed_official | 125:23cc3068a9e4 | 2051 | * @arg HRTIM_EVENT_3: External event 3 |
| mbed_official | 125:23cc3068a9e4 | 2052 | * @arg HRTIM_EVENT_4: External event 4 |
| mbed_official | 125:23cc3068a9e4 | 2053 | * @arg HRTIM_EVENT_5: External event 5 |
| mbed_official | 125:23cc3068a9e4 | 2054 | * @arg HRTIM_EVENT_6: External event 6 |
| mbed_official | 125:23cc3068a9e4 | 2055 | * @arg HRTIM_EVENT_7: External event 7 |
| mbed_official | 125:23cc3068a9e4 | 2056 | * @arg HRTIM_EVENT_8: External event 8 |
| mbed_official | 125:23cc3068a9e4 | 2057 | * @arg HRTIM_EVENT_9: External event 9 |
| mbed_official | 125:23cc3068a9e4 | 2058 | * @arg HRTIM_EVENT_10: External event 10 |
| mbed_official | 125:23cc3068a9e4 | 2059 | * @param pTimerEventFilteringCfg: pointer to the timer event filtering configuration structure |
| mbed_official | 125:23cc3068a9e4 | 2060 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2061 | */ |
| mbed_official | 125:23cc3068a9e4 | 2062 | void HRTIM_TimerEventFilteringConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2063 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 2064 | uint32_t Event, |
| mbed_official | 125:23cc3068a9e4 | 2065 | HRTIM_TimerEventFilteringCfgTypeDef* pTimerEventFilteringCfg) |
| mbed_official | 125:23cc3068a9e4 | 2066 | { |
| mbed_official | 125:23cc3068a9e4 | 2067 | uint32_t HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2068 | |
| mbed_official | 125:23cc3068a9e4 | 2069 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2070 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 2071 | assert_param(IS_HRTIM_EVENT(Event)); |
| mbed_official | 125:23cc3068a9e4 | 2072 | assert_param(IS_HRTIM_TIMEVENTFILTER(pTimerEventFilteringCfg->Filter)); |
| mbed_official | 125:23cc3068a9e4 | 2073 | assert_param(IS_HRTIM_TIMEVENTLATCH(pTimerEventFilteringCfg->Latch)); |
| mbed_official | 125:23cc3068a9e4 | 2074 | |
| mbed_official | 125:23cc3068a9e4 | 2075 | /* Configure timer event filtering capabilities */ |
| mbed_official | 125:23cc3068a9e4 | 2076 | switch (Event) |
| mbed_official | 125:23cc3068a9e4 | 2077 | { |
| mbed_official | 125:23cc3068a9e4 | 2078 | case HRTIM_TIMEVENTFILTER_NONE: |
| mbed_official | 125:23cc3068a9e4 | 2079 | { |
| mbed_official | 125:23cc3068a9e4 | 2080 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = 0; |
| mbed_official | 125:23cc3068a9e4 | 2081 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = 0; |
| mbed_official | 125:23cc3068a9e4 | 2082 | } |
| mbed_official | 125:23cc3068a9e4 | 2083 | break; |
| mbed_official | 125:23cc3068a9e4 | 2084 | case HRTIM_EVENT_1: |
| mbed_official | 125:23cc3068a9e4 | 2085 | { |
| mbed_official | 125:23cc3068a9e4 | 2086 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1; |
| mbed_official | 125:23cc3068a9e4 | 2087 | HRTIM_eefr &= ~(HRTIM_EEFR1_EE1FLTR | HRTIM_EEFR1_EE1LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2088 | HRTIM_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch); |
| mbed_official | 125:23cc3068a9e4 | 2089 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2090 | } |
| mbed_official | 125:23cc3068a9e4 | 2091 | break; |
| mbed_official | 125:23cc3068a9e4 | 2092 | case HRTIM_EVENT_2: |
| mbed_official | 125:23cc3068a9e4 | 2093 | { |
| mbed_official | 125:23cc3068a9e4 | 2094 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1; |
| mbed_official | 125:23cc3068a9e4 | 2095 | HRTIM_eefr &= ~(HRTIM_EEFR1_EE2FLTR | HRTIM_EEFR1_EE2LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2096 | HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6); |
| mbed_official | 125:23cc3068a9e4 | 2097 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2098 | } |
| mbed_official | 125:23cc3068a9e4 | 2099 | break; |
| mbed_official | 125:23cc3068a9e4 | 2100 | case HRTIM_EVENT_3: |
| mbed_official | 125:23cc3068a9e4 | 2101 | { |
| mbed_official | 125:23cc3068a9e4 | 2102 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1; |
| mbed_official | 125:23cc3068a9e4 | 2103 | HRTIM_eefr &= ~(HRTIM_EEFR1_EE3FLTR | HRTIM_EEFR1_EE3LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2104 | HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12); |
| mbed_official | 125:23cc3068a9e4 | 2105 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2106 | } |
| mbed_official | 125:23cc3068a9e4 | 2107 | break; |
| mbed_official | 125:23cc3068a9e4 | 2108 | case HRTIM_EVENT_4: |
| mbed_official | 125:23cc3068a9e4 | 2109 | { |
| mbed_official | 125:23cc3068a9e4 | 2110 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1; |
| mbed_official | 125:23cc3068a9e4 | 2111 | HRTIM_eefr &= ~(HRTIM_EEFR1_EE4FLTR | HRTIM_EEFR1_EE4LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2112 | HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18); |
| mbed_official | 125:23cc3068a9e4 | 2113 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2114 | } |
| mbed_official | 125:23cc3068a9e4 | 2115 | break; |
| mbed_official | 125:23cc3068a9e4 | 2116 | case HRTIM_EVENT_5: |
| mbed_official | 125:23cc3068a9e4 | 2117 | { |
| mbed_official | 125:23cc3068a9e4 | 2118 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1; |
| mbed_official | 125:23cc3068a9e4 | 2119 | HRTIM_eefr &= ~(HRTIM_EEFR1_EE5FLTR | HRTIM_EEFR1_EE5LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2120 | HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24); |
| mbed_official | 125:23cc3068a9e4 | 2121 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2122 | } |
| mbed_official | 125:23cc3068a9e4 | 2123 | break; |
| mbed_official | 125:23cc3068a9e4 | 2124 | case HRTIM_EVENT_6: |
| mbed_official | 125:23cc3068a9e4 | 2125 | { |
| mbed_official | 125:23cc3068a9e4 | 2126 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2; |
| mbed_official | 125:23cc3068a9e4 | 2127 | HRTIM_eefr &= ~(HRTIM_EEFR2_EE6FLTR | HRTIM_EEFR2_EE6LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2128 | HRTIM_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch); |
| mbed_official | 125:23cc3068a9e4 | 2129 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2130 | } |
| mbed_official | 125:23cc3068a9e4 | 2131 | break; |
| mbed_official | 125:23cc3068a9e4 | 2132 | case HRTIM_EVENT_7: |
| mbed_official | 125:23cc3068a9e4 | 2133 | { |
| mbed_official | 125:23cc3068a9e4 | 2134 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2; |
| mbed_official | 125:23cc3068a9e4 | 2135 | HRTIM_eefr &= ~(HRTIM_EEFR2_EE7FLTR | HRTIM_EEFR2_EE7LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2136 | HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6); |
| mbed_official | 125:23cc3068a9e4 | 2137 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2138 | } |
| mbed_official | 125:23cc3068a9e4 | 2139 | break; |
| mbed_official | 125:23cc3068a9e4 | 2140 | case HRTIM_EVENT_8: |
| mbed_official | 125:23cc3068a9e4 | 2141 | { |
| mbed_official | 125:23cc3068a9e4 | 2142 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2; |
| mbed_official | 125:23cc3068a9e4 | 2143 | HRTIM_eefr &= ~(HRTIM_EEFR2_EE8FLTR | HRTIM_EEFR2_EE8LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2144 | HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12); |
| mbed_official | 125:23cc3068a9e4 | 2145 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2146 | } |
| mbed_official | 125:23cc3068a9e4 | 2147 | break; |
| mbed_official | 125:23cc3068a9e4 | 2148 | case HRTIM_EVENT_9: |
| mbed_official | 125:23cc3068a9e4 | 2149 | { |
| mbed_official | 125:23cc3068a9e4 | 2150 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2; |
| mbed_official | 125:23cc3068a9e4 | 2151 | HRTIM_eefr &= ~(HRTIM_EEFR2_EE9FLTR | HRTIM_EEFR2_EE9LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2152 | HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18); |
| mbed_official | 125:23cc3068a9e4 | 2153 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2154 | } |
| mbed_official | 125:23cc3068a9e4 | 2155 | break; |
| mbed_official | 125:23cc3068a9e4 | 2156 | case HRTIM_EVENT_10: |
| mbed_official | 125:23cc3068a9e4 | 2157 | { |
| mbed_official | 125:23cc3068a9e4 | 2158 | HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2; |
| mbed_official | 125:23cc3068a9e4 | 2159 | HRTIM_eefr &= ~(HRTIM_EEFR2_EE10FLTR | HRTIM_EEFR2_EE10LTCH); |
| mbed_official | 125:23cc3068a9e4 | 2160 | HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24); |
| mbed_official | 125:23cc3068a9e4 | 2161 | HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr; |
| mbed_official | 125:23cc3068a9e4 | 2162 | } |
| mbed_official | 125:23cc3068a9e4 | 2163 | break; |
| mbed_official | 125:23cc3068a9e4 | 2164 | default: |
| mbed_official | 125:23cc3068a9e4 | 2165 | break; |
| mbed_official | 125:23cc3068a9e4 | 2166 | } |
| mbed_official | 125:23cc3068a9e4 | 2167 | } |
| mbed_official | 125:23cc3068a9e4 | 2168 | |
| mbed_official | 125:23cc3068a9e4 | 2169 | /** |
| mbed_official | 125:23cc3068a9e4 | 2170 | * @brief Configures the dead time insertion feature for a timer |
| mbed_official | 125:23cc3068a9e4 | 2171 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2172 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 2173 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2174 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 2175 | * @param pDeadTimeCfg: pointer to the dead time insertion configuration structure |
| mbed_official | 125:23cc3068a9e4 | 2176 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2177 | */ |
| mbed_official | 125:23cc3068a9e4 | 2178 | void HRTIM_DeadTimeConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2179 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 2180 | HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg) |
| mbed_official | 125:23cc3068a9e4 | 2181 | { |
| mbed_official | 125:23cc3068a9e4 | 2182 | uint32_t HRTIM_dtr; |
| mbed_official | 125:23cc3068a9e4 | 2183 | |
| mbed_official | 125:23cc3068a9e4 | 2184 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2185 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 2186 | assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGN(pDeadTimeCfg->RisingSign)); |
| mbed_official | 125:23cc3068a9e4 | 2187 | assert_param(IS_HRTIM_TIMDEADTIME_RISINGLOCK(pDeadTimeCfg->RisingLock)); |
| mbed_official | 125:23cc3068a9e4 | 2188 | assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(pDeadTimeCfg->RisingSignLock)); |
| mbed_official | 125:23cc3068a9e4 | 2189 | assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGN(pDeadTimeCfg->FallingSign)); |
| mbed_official | 125:23cc3068a9e4 | 2190 | assert_param(IS_HRTIM_TIMDEADTIME_FALLINGLOCK(pDeadTimeCfg->FallingLock)); |
| mbed_official | 125:23cc3068a9e4 | 2191 | assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(pDeadTimeCfg->FallingSignLock)); |
| mbed_official | 125:23cc3068a9e4 | 2192 | |
| mbed_official | 125:23cc3068a9e4 | 2193 | HRTIM_dtr = HRTIMx->HRTIM_TIMERx[TimerIdx].DTxR; |
| mbed_official | 125:23cc3068a9e4 | 2194 | |
| mbed_official | 125:23cc3068a9e4 | 2195 | /* Clear timer dead times configuration */ |
| mbed_official | 125:23cc3068a9e4 | 2196 | HRTIM_dtr &= ~(HRTIM_DTR_DTR | HRTIM_DTR_SDTR | HRTIM_DTR_DTPRSC | |
| mbed_official | 125:23cc3068a9e4 | 2197 | HRTIM_DTR_DTRSLK | HRTIM_DTR_DTRLK | HRTIM_DTR_SDTF | |
| mbed_official | 125:23cc3068a9e4 | 2198 | HRTIM_DTR_SDTR | HRTIM_DTR_DTFSLK | HRTIM_DTR_DTFLK); |
| mbed_official | 125:23cc3068a9e4 | 2199 | |
| mbed_official | 125:23cc3068a9e4 | 2200 | /* Set timer dead times configuration */ |
| mbed_official | 125:23cc3068a9e4 | 2201 | HRTIM_dtr |= (pDeadTimeCfg->Prescaler << 10); |
| mbed_official | 125:23cc3068a9e4 | 2202 | HRTIM_dtr |= pDeadTimeCfg->RisingValue; |
| mbed_official | 125:23cc3068a9e4 | 2203 | HRTIM_dtr |= pDeadTimeCfg->RisingSign; |
| mbed_official | 125:23cc3068a9e4 | 2204 | HRTIM_dtr |= pDeadTimeCfg->RisingSignLock; |
| mbed_official | 125:23cc3068a9e4 | 2205 | HRTIM_dtr |= pDeadTimeCfg->RisingLock; |
| mbed_official | 125:23cc3068a9e4 | 2206 | HRTIM_dtr |= (pDeadTimeCfg->FallingValue << 16); |
| mbed_official | 125:23cc3068a9e4 | 2207 | HRTIM_dtr |= pDeadTimeCfg->FallingSign; |
| mbed_official | 125:23cc3068a9e4 | 2208 | HRTIM_dtr |= pDeadTimeCfg->FallingSignLock; |
| mbed_official | 125:23cc3068a9e4 | 2209 | HRTIM_dtr |= pDeadTimeCfg->FallingLock; |
| mbed_official | 125:23cc3068a9e4 | 2210 | |
| mbed_official | 125:23cc3068a9e4 | 2211 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2212 | HRTIMx->HRTIM_TIMERx[TimerIdx].DTxR = HRTIM_dtr; |
| mbed_official | 125:23cc3068a9e4 | 2213 | } |
| mbed_official | 125:23cc3068a9e4 | 2214 | |
| mbed_official | 125:23cc3068a9e4 | 2215 | /** |
| mbed_official | 125:23cc3068a9e4 | 2216 | * @brief Configures the chopper mode feature for a timer |
| mbed_official | 125:23cc3068a9e4 | 2217 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2218 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 2219 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2220 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 2221 | * @param pChopperModeCfg: pointer to the chopper mode configuration structure |
| mbed_official | 125:23cc3068a9e4 | 2222 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2223 | */ |
| mbed_official | 125:23cc3068a9e4 | 2224 | void HRTIM_ChopperModeConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2225 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 2226 | HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg) |
| mbed_official | 125:23cc3068a9e4 | 2227 | { |
| mbed_official | 125:23cc3068a9e4 | 2228 | uint32_t HRTIM_chpr; |
| mbed_official | 125:23cc3068a9e4 | 2229 | |
| mbed_official | 125:23cc3068a9e4 | 2230 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2231 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 2232 | |
| mbed_official | 125:23cc3068a9e4 | 2233 | HRTIM_chpr = HRTIMx->HRTIM_TIMERx[TimerIdx].CHPxR; |
| mbed_official | 125:23cc3068a9e4 | 2234 | |
| mbed_official | 125:23cc3068a9e4 | 2235 | /* Clear timer chopper mode configuration */ |
| mbed_official | 125:23cc3068a9e4 | 2236 | HRTIM_chpr &= ~(HRTIM_CHPR_CARFRQ | HRTIM_CHPR_CARDTY | HRTIM_CHPR_STRPW); |
| mbed_official | 125:23cc3068a9e4 | 2237 | |
| mbed_official | 125:23cc3068a9e4 | 2238 | /* Set timer chopper mode configuration */ |
| mbed_official | 125:23cc3068a9e4 | 2239 | HRTIM_chpr |= pChopperModeCfg->CarrierFreq; |
| mbed_official | 125:23cc3068a9e4 | 2240 | HRTIM_chpr |= (pChopperModeCfg->DutyCycle << 4); |
| mbed_official | 125:23cc3068a9e4 | 2241 | HRTIM_chpr |= (pChopperModeCfg->StartPulse << 7); |
| mbed_official | 125:23cc3068a9e4 | 2242 | |
| mbed_official | 125:23cc3068a9e4 | 2243 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2244 | HRTIMx->HRTIM_TIMERx[TimerIdx].CHPxR = HRTIM_chpr; |
| mbed_official | 125:23cc3068a9e4 | 2245 | } |
| mbed_official | 125:23cc3068a9e4 | 2246 | |
| mbed_official | 125:23cc3068a9e4 | 2247 | /** |
| mbed_official | 125:23cc3068a9e4 | 2248 | * @brief Configures the burst DMA controller for a timer |
| mbed_official | 125:23cc3068a9e4 | 2249 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2250 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 2251 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2252 | * @arg 0x5 for master timer |
| mbed_official | 125:23cc3068a9e4 | 2253 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 2254 | * @param RegistersToUpdate: registers to be written by DMA |
| mbed_official | 125:23cc3068a9e4 | 2255 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2256 | * @arg HRTIM_BURSTDMA_CR: HRTIM_MCR or HRTIM_TIMxCR |
| mbed_official | 125:23cc3068a9e4 | 2257 | * @arg HRTIM_BURSTDMA_ICR: HRTIM_MICR or HRTIM_TIMxICR |
| mbed_official | 125:23cc3068a9e4 | 2258 | * @arg HRTIM_BURSTDMA_DIER: HRTIM_MDIER or HRTIM_TIMxDIER |
| mbed_official | 125:23cc3068a9e4 | 2259 | * @arg HRTIM_BURSTDMA_CNT: HRTIM_MCNT or HRTIM_TIMxCNT |
| mbed_official | 125:23cc3068a9e4 | 2260 | * @arg HRTIM_BURSTDMA_PER: HRTIM_MPER or HRTIM_TIMxPER |
| mbed_official | 125:23cc3068a9e4 | 2261 | * @arg HRTIM_BURSTDMA_REP: HRTIM_MREP or HRTIM_TIMxREP |
| mbed_official | 125:23cc3068a9e4 | 2262 | * @arg HRTIM_BURSTDMA_CMP1: HRTIM_MCMP1 or HRTIM_TIMxCMP1 |
| mbed_official | 125:23cc3068a9e4 | 2263 | * @arg HRTIM_BURSTDMA_CMP2: HRTIM_MCMP2 or HRTIM_TIMxCMP2 |
| mbed_official | 125:23cc3068a9e4 | 2264 | * @arg HRTIM_BURSTDMA_CMP3: HRTIM_MCMP3 or HRTIM_TIMxCMP3 |
| mbed_official | 125:23cc3068a9e4 | 2265 | * @arg HRTIM_BURSTDMA_CMP4: HRTIM_MCMP4 or HRTIM_TIMxCMP4 |
| mbed_official | 125:23cc3068a9e4 | 2266 | * @arg HRTIM_BURSTDMA_DTR: HRTIM_TIMxDTR |
| mbed_official | 125:23cc3068a9e4 | 2267 | * @arg HRTIM_BURSTDMA_SET1R: HRTIM_TIMxSET1R |
| mbed_official | 125:23cc3068a9e4 | 2268 | * @arg HRTIM_BURSTDMA_RST1R: HRTIM_TIMxRST1R |
| mbed_official | 125:23cc3068a9e4 | 2269 | * @arg HRTIM_BURSTDMA_SET2R: HRTIM_TIMxSET2R |
| mbed_official | 125:23cc3068a9e4 | 2270 | * @arg HRTIM_BURSTDMA_RST2R: HRTIM_TIMxRST2R |
| mbed_official | 125:23cc3068a9e4 | 2271 | * @arg HRTIM_BURSTDMA_EEFR1: HRTIM_TIMxEEFR1 |
| mbed_official | 125:23cc3068a9e4 | 2272 | * @arg HRTIM_BURSTDMA_EEFR2: HRTIM_TIMxEEFR2 |
| mbed_official | 125:23cc3068a9e4 | 2273 | * @arg HRTIM_BURSTDMA_RSTR: HRTIM_TIMxRSTR |
| mbed_official | 125:23cc3068a9e4 | 2274 | * @arg HRTIM_BURSTDMA_CHPR: HRTIM_TIMxCHPR |
| mbed_official | 125:23cc3068a9e4 | 2275 | * @arg HRTIM_BURSTDMA_OUTR: HRTIM_TIMxOUTR |
| mbed_official | 125:23cc3068a9e4 | 2276 | * @arg HRTIM_BURSTDMA_FLTR: HRTIM_TIMxFLTR |
| mbed_official | 125:23cc3068a9e4 | 2277 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2278 | */ |
| mbed_official | 125:23cc3068a9e4 | 2279 | void HRTIM_BurstDMAConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2280 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 2281 | uint32_t RegistersToUpdate) |
| mbed_official | 125:23cc3068a9e4 | 2282 | { |
| mbed_official | 125:23cc3068a9e4 | 2283 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2284 | assert_param(IS_HRTIM_TIMER_BURSTDMA(TimerIdx, RegistersToUpdate)); |
| mbed_official | 125:23cc3068a9e4 | 2285 | |
| mbed_official | 125:23cc3068a9e4 | 2286 | /* Set the burst DMA timer update register */ |
| mbed_official | 125:23cc3068a9e4 | 2287 | switch (TimerIdx) |
| mbed_official | 125:23cc3068a9e4 | 2288 | { |
| mbed_official | 125:23cc3068a9e4 | 2289 | case HRTIM_TIMERINDEX_TIMER_A: |
| mbed_official | 125:23cc3068a9e4 | 2290 | { |
| mbed_official | 125:23cc3068a9e4 | 2291 | HRTIMx->HRTIM_COMMON.BDTAUPR = RegistersToUpdate; |
| mbed_official | 125:23cc3068a9e4 | 2292 | } |
| mbed_official | 125:23cc3068a9e4 | 2293 | break; |
| mbed_official | 125:23cc3068a9e4 | 2294 | case HRTIM_TIMERINDEX_TIMER_B: |
| mbed_official | 125:23cc3068a9e4 | 2295 | { |
| mbed_official | 125:23cc3068a9e4 | 2296 | HRTIMx->HRTIM_COMMON.BDTBUPR = RegistersToUpdate; |
| mbed_official | 125:23cc3068a9e4 | 2297 | } |
| mbed_official | 125:23cc3068a9e4 | 2298 | break; |
| mbed_official | 125:23cc3068a9e4 | 2299 | case HRTIM_TIMERINDEX_TIMER_C: |
| mbed_official | 125:23cc3068a9e4 | 2300 | { |
| mbed_official | 125:23cc3068a9e4 | 2301 | HRTIMx->HRTIM_COMMON.BDTCUPR = RegistersToUpdate; |
| mbed_official | 125:23cc3068a9e4 | 2302 | } |
| mbed_official | 125:23cc3068a9e4 | 2303 | break; |
| mbed_official | 125:23cc3068a9e4 | 2304 | case HRTIM_TIMERINDEX_TIMER_D: |
| mbed_official | 125:23cc3068a9e4 | 2305 | { |
| mbed_official | 125:23cc3068a9e4 | 2306 | HRTIMx->HRTIM_COMMON.BDTDUPR = RegistersToUpdate; |
| mbed_official | 125:23cc3068a9e4 | 2307 | } |
| mbed_official | 125:23cc3068a9e4 | 2308 | break; |
| mbed_official | 125:23cc3068a9e4 | 2309 | case HRTIM_TIMERINDEX_TIMER_E: |
| mbed_official | 125:23cc3068a9e4 | 2310 | { |
| mbed_official | 125:23cc3068a9e4 | 2311 | HRTIMx->HRTIM_COMMON.BDTEUPR = RegistersToUpdate; |
| mbed_official | 125:23cc3068a9e4 | 2312 | } |
| mbed_official | 125:23cc3068a9e4 | 2313 | break; |
| mbed_official | 125:23cc3068a9e4 | 2314 | case HRTIM_TIMERINDEX_MASTER: |
| mbed_official | 125:23cc3068a9e4 | 2315 | { |
| mbed_official | 125:23cc3068a9e4 | 2316 | HRTIMx->HRTIM_COMMON.BDMUPDR = RegistersToUpdate; |
| mbed_official | 125:23cc3068a9e4 | 2317 | } |
| mbed_official | 125:23cc3068a9e4 | 2318 | break; |
| mbed_official | 125:23cc3068a9e4 | 2319 | default: |
| mbed_official | 125:23cc3068a9e4 | 2320 | break; |
| mbed_official | 125:23cc3068a9e4 | 2321 | } |
| mbed_official | 125:23cc3068a9e4 | 2322 | } |
| mbed_official | 125:23cc3068a9e4 | 2323 | |
| mbed_official | 125:23cc3068a9e4 | 2324 | /** |
| mbed_official | 125:23cc3068a9e4 | 2325 | * @brief Configures the external input/output synchronization of the HRTIMx |
| mbed_official | 125:23cc3068a9e4 | 2326 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2327 | * @param pSynchroCfg: pointer to the input/output synchronization configuration structure |
| mbed_official | 125:23cc3068a9e4 | 2328 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2329 | */ |
| mbed_official | 125:23cc3068a9e4 | 2330 | void HRTIM_SynchronizationConfig(HRTIM_TypeDef *HRTIMx, HRTIM_SynchroCfgTypeDef * pSynchroCfg) |
| mbed_official | 125:23cc3068a9e4 | 2331 | { |
| mbed_official | 125:23cc3068a9e4 | 2332 | uint32_t HRTIM_mcr; |
| mbed_official | 125:23cc3068a9e4 | 2333 | |
| mbed_official | 125:23cc3068a9e4 | 2334 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2335 | assert_param(IS_HRTIM_SYNCINPUTSOURCE(pSynchroCfg->SyncInputSource)); |
| mbed_official | 125:23cc3068a9e4 | 2336 | assert_param(IS_HRTIM_SYNCOUTPUTSOURCE(pSynchroCfg->SyncOutputSource)); |
| mbed_official | 125:23cc3068a9e4 | 2337 | assert_param(IS_HRTIM_SYNCOUTPUTPOLARITY(pSynchroCfg->SyncOutputPolarity)); |
| mbed_official | 125:23cc3068a9e4 | 2338 | |
| mbed_official | 125:23cc3068a9e4 | 2339 | HRTIM_mcr = HRTIMx->HRTIM_MASTER.MCR; |
| mbed_official | 125:23cc3068a9e4 | 2340 | |
| mbed_official | 125:23cc3068a9e4 | 2341 | /* Set the synchronization input source */ |
| mbed_official | 125:23cc3068a9e4 | 2342 | HRTIM_mcr &= ~(HRTIM_MCR_SYNC_IN); |
| mbed_official | 125:23cc3068a9e4 | 2343 | HRTIM_mcr |= pSynchroCfg->SyncInputSource; |
| mbed_official | 125:23cc3068a9e4 | 2344 | |
| mbed_official | 125:23cc3068a9e4 | 2345 | /* Set the event to be sent on the synchronization output */ |
| mbed_official | 125:23cc3068a9e4 | 2346 | HRTIM_mcr &= ~(HRTIM_MCR_SYNC_SRC); |
| mbed_official | 125:23cc3068a9e4 | 2347 | HRTIM_mcr |= pSynchroCfg->SyncOutputSource; |
| mbed_official | 125:23cc3068a9e4 | 2348 | |
| mbed_official | 125:23cc3068a9e4 | 2349 | /* Set the polarity of the synchronization output */ |
| mbed_official | 125:23cc3068a9e4 | 2350 | HRTIM_mcr &= ~(HRTIM_MCR_SYNC_OUT); |
| mbed_official | 125:23cc3068a9e4 | 2351 | HRTIM_mcr |= pSynchroCfg->SyncOutputPolarity; |
| mbed_official | 125:23cc3068a9e4 | 2352 | |
| mbed_official | 125:23cc3068a9e4 | 2353 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2354 | HRTIMx->HRTIM_MASTER.MCR = HRTIM_mcr; |
| mbed_official | 125:23cc3068a9e4 | 2355 | } |
| mbed_official | 125:23cc3068a9e4 | 2356 | |
| mbed_official | 125:23cc3068a9e4 | 2357 | /** |
| mbed_official | 125:23cc3068a9e4 | 2358 | * @brief Configures the burst mode feature of the HRTIMx |
| mbed_official | 125:23cc3068a9e4 | 2359 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2360 | * @param pBurstModeCfg: pointer to the burst mode configuration structure |
| mbed_official | 125:23cc3068a9e4 | 2361 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2362 | */ |
| mbed_official | 125:23cc3068a9e4 | 2363 | void HRTIM_BurstModeConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2364 | HRTIM_BurstModeCfgTypeDef* pBurstModeCfg) |
| mbed_official | 125:23cc3068a9e4 | 2365 | { |
| mbed_official | 125:23cc3068a9e4 | 2366 | uint32_t HRTIM_bmcr; |
| mbed_official | 125:23cc3068a9e4 | 2367 | |
| mbed_official | 125:23cc3068a9e4 | 2368 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2369 | assert_param(IS_HRTIM_BURSTMODE(pBurstModeCfg->Mode)); |
| mbed_official | 125:23cc3068a9e4 | 2370 | assert_param(IS_HRTIM_BURSTMODECLOCKSOURCE(pBurstModeCfg->ClockSource)); |
| mbed_official | 125:23cc3068a9e4 | 2371 | assert_param(IS_HRTIM_HRTIM_BURSTMODEPRESCALER(pBurstModeCfg->Prescaler)); |
| mbed_official | 125:23cc3068a9e4 | 2372 | assert_param(IS_HRTIM_BURSTMODEPRELOAD(pBurstModeCfg->PreloadEnable)); |
| mbed_official | 125:23cc3068a9e4 | 2373 | |
| mbed_official | 125:23cc3068a9e4 | 2374 | HRTIM_bmcr = HRTIMx->HRTIM_COMMON.BMCR; |
| mbed_official | 125:23cc3068a9e4 | 2375 | |
| mbed_official | 125:23cc3068a9e4 | 2376 | /* Set the burst mode operating mode */ |
| mbed_official | 125:23cc3068a9e4 | 2377 | HRTIM_bmcr &= ~(HRTIM_BMCR_BMOM); |
| mbed_official | 125:23cc3068a9e4 | 2378 | HRTIM_bmcr |= pBurstModeCfg->Mode; |
| mbed_official | 125:23cc3068a9e4 | 2379 | |
| mbed_official | 125:23cc3068a9e4 | 2380 | /* Set the burst mode clock source */ |
| mbed_official | 125:23cc3068a9e4 | 2381 | HRTIM_bmcr &= ~(HRTIM_BMCR_BMCLK); |
| mbed_official | 125:23cc3068a9e4 | 2382 | HRTIM_bmcr |= pBurstModeCfg->ClockSource; |
| mbed_official | 125:23cc3068a9e4 | 2383 | |
| mbed_official | 125:23cc3068a9e4 | 2384 | /* Set the burst mode prescaler */ |
| mbed_official | 125:23cc3068a9e4 | 2385 | HRTIM_bmcr &= ~(HRTIM_BMCR_BMPSC); |
| mbed_official | 125:23cc3068a9e4 | 2386 | HRTIM_bmcr |= pBurstModeCfg->Prescaler; |
| mbed_official | 125:23cc3068a9e4 | 2387 | |
| mbed_official | 125:23cc3068a9e4 | 2388 | /* Enable/disable burst mode registers preload */ |
| mbed_official | 125:23cc3068a9e4 | 2389 | HRTIM_bmcr &= ~(HRTIM_BMCR_BMPREN); |
| mbed_official | 125:23cc3068a9e4 | 2390 | HRTIM_bmcr |= pBurstModeCfg->PreloadEnable; |
| mbed_official | 125:23cc3068a9e4 | 2391 | |
| mbed_official | 125:23cc3068a9e4 | 2392 | /* Set the burst mode trigger */ |
| mbed_official | 125:23cc3068a9e4 | 2393 | HRTIMx->HRTIM_COMMON.BMTRGR = pBurstModeCfg->Trigger; |
| mbed_official | 125:23cc3068a9e4 | 2394 | |
| mbed_official | 125:23cc3068a9e4 | 2395 | /* Set the burst mode compare value */ |
| mbed_official | 125:23cc3068a9e4 | 2396 | HRTIMx->HRTIM_COMMON.BMCMPR = pBurstModeCfg->IdleDuration; |
| mbed_official | 125:23cc3068a9e4 | 2397 | |
| mbed_official | 125:23cc3068a9e4 | 2398 | /* Set the burst mode period */ |
| mbed_official | 125:23cc3068a9e4 | 2399 | HRTIMx->HRTIM_COMMON.BMPER = pBurstModeCfg->Period; |
| mbed_official | 125:23cc3068a9e4 | 2400 | |
| mbed_official | 125:23cc3068a9e4 | 2401 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2402 | HRTIMx->HRTIM_COMMON.BMCR = HRTIM_bmcr; |
| mbed_official | 125:23cc3068a9e4 | 2403 | } |
| mbed_official | 125:23cc3068a9e4 | 2404 | |
| mbed_official | 125:23cc3068a9e4 | 2405 | /** |
| mbed_official | 125:23cc3068a9e4 | 2406 | * @brief Configures the conditioning of an external event |
| mbed_official | 125:23cc3068a9e4 | 2407 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2408 | * @param Event: external event to configure |
| mbed_official | 125:23cc3068a9e4 | 2409 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2410 | * @arg HRTIM_EVENT_1: External event 1 |
| mbed_official | 125:23cc3068a9e4 | 2411 | * @arg HRTIM_EVENT_2: External event 2 |
| mbed_official | 125:23cc3068a9e4 | 2412 | * @arg HRTIM_EVENT_3: External event 3 |
| mbed_official | 125:23cc3068a9e4 | 2413 | * @arg HRTIM_EVENT_4: External event 4 |
| mbed_official | 125:23cc3068a9e4 | 2414 | * @arg HRTIM_EVENT_5: External event 5 |
| mbed_official | 125:23cc3068a9e4 | 2415 | * @arg HRTIM_EVENT_6: External event 6 |
| mbed_official | 125:23cc3068a9e4 | 2416 | * @arg HRTIM_EVENT_7: External event 7 |
| mbed_official | 125:23cc3068a9e4 | 2417 | * @arg HRTIM_EVENT_8: External event 8 |
| mbed_official | 125:23cc3068a9e4 | 2418 | * @arg HRTIM_EVENT_9: External event 9 |
| mbed_official | 125:23cc3068a9e4 | 2419 | * @arg HRTIM_EVENT_10: External event 10 |
| mbed_official | 125:23cc3068a9e4 | 2420 | * @param pEventCfg: pointer to the event conditioning configuration structure |
| mbed_official | 125:23cc3068a9e4 | 2421 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2422 | */ |
| mbed_official | 125:23cc3068a9e4 | 2423 | void HRTIM_EventConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2424 | uint32_t Event, |
| mbed_official | 125:23cc3068a9e4 | 2425 | HRTIM_EventCfgTypeDef* pEventCfg) |
| mbed_official | 125:23cc3068a9e4 | 2426 | { |
| mbed_official | 125:23cc3068a9e4 | 2427 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2428 | assert_param(IS_HRTIM_EVENTSRC(pEventCfg->Source)); |
| mbed_official | 125:23cc3068a9e4 | 2429 | assert_param(IS_HRTIM_EVENTPOLARITY(pEventCfg->Polarity)); |
| mbed_official | 125:23cc3068a9e4 | 2430 | assert_param(IS_HRTIM_EVENTSENSITIVITY(pEventCfg->Sensitivity)); |
| mbed_official | 125:23cc3068a9e4 | 2431 | assert_param(IS_HRTIM_EVENTFASTMODE(pEventCfg->FastMode)); |
| mbed_official | 125:23cc3068a9e4 | 2432 | assert_param(IS_HRTIM_EVENTFILTER(pEventCfg->Filter)); |
| mbed_official | 125:23cc3068a9e4 | 2433 | |
| mbed_official | 125:23cc3068a9e4 | 2434 | /* Configure the event channel */ |
| mbed_official | 125:23cc3068a9e4 | 2435 | HRTIM_ExternalEventConfig(HRTIMx, Event, pEventCfg); |
| mbed_official | 125:23cc3068a9e4 | 2436 | |
| mbed_official | 125:23cc3068a9e4 | 2437 | } |
| mbed_official | 125:23cc3068a9e4 | 2438 | |
| mbed_official | 125:23cc3068a9e4 | 2439 | /** |
| mbed_official | 125:23cc3068a9e4 | 2440 | * @brief Configures the external event conditioning block prescaler |
| mbed_official | 125:23cc3068a9e4 | 2441 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2442 | * @param Prescaler: Prescaler value |
| mbed_official | 125:23cc3068a9e4 | 2443 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2444 | * @arg HRTIM_EVENTPRESCALER_DIV1: fEEVS=fHRTIMx |
| mbed_official | 125:23cc3068a9e4 | 2445 | * @arg HRTIM_EVENTPRESCALER_DIV2: fEEVS=fHRTIMx / 2 |
| mbed_official | 125:23cc3068a9e4 | 2446 | * @arg HRTIM_EVENTPRESCALER_DIV4: fEEVS=fHRTIMx / 4 |
| mbed_official | 125:23cc3068a9e4 | 2447 | * @arg HRTIM_EVENTPRESCALER_DIV8: fEEVS=fHRTIMx / 8 |
| mbed_official | 125:23cc3068a9e4 | 2448 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2449 | */ |
| mbed_official | 125:23cc3068a9e4 | 2450 | void HRTIM_EventPrescalerConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2451 | uint32_t Prescaler) |
| mbed_official | 125:23cc3068a9e4 | 2452 | { |
| mbed_official | 125:23cc3068a9e4 | 2453 | uint32_t HRTIM_eecr3; |
| mbed_official | 125:23cc3068a9e4 | 2454 | |
| mbed_official | 125:23cc3068a9e4 | 2455 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2456 | assert_param(IS_HRTIM_EVENTPRESCALER(Prescaler)); |
| mbed_official | 125:23cc3068a9e4 | 2457 | |
| mbed_official | 125:23cc3068a9e4 | 2458 | /* Set the external event prescaler */ |
| mbed_official | 125:23cc3068a9e4 | 2459 | HRTIM_eecr3 = HRTIMx->HRTIM_COMMON.EECR3; |
| mbed_official | 125:23cc3068a9e4 | 2460 | HRTIM_eecr3 &= ~(HRTIM_EECR3_EEVSD); |
| mbed_official | 125:23cc3068a9e4 | 2461 | HRTIM_eecr3 |= Prescaler; |
| mbed_official | 125:23cc3068a9e4 | 2462 | |
| mbed_official | 125:23cc3068a9e4 | 2463 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2464 | HRTIMx->HRTIM_COMMON.EECR3 = HRTIM_eecr3; |
| mbed_official | 125:23cc3068a9e4 | 2465 | } |
| mbed_official | 125:23cc3068a9e4 | 2466 | |
| mbed_official | 125:23cc3068a9e4 | 2467 | /** |
| mbed_official | 125:23cc3068a9e4 | 2468 | * @brief Configures the conditioning of fault input |
| mbed_official | 125:23cc3068a9e4 | 2469 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2470 | * @param Fault: fault input to configure |
| mbed_official | 125:23cc3068a9e4 | 2471 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2472 | * @arg HRTIM_FAULT_1: Fault input 1 |
| mbed_official | 125:23cc3068a9e4 | 2473 | * @arg HRTIM_FAULT_2: Fault input 2 |
| mbed_official | 125:23cc3068a9e4 | 2474 | * @arg HRTIM_FAULT_3: Fault input 3 |
| mbed_official | 125:23cc3068a9e4 | 2475 | * @arg HRTIM_FAULT_4: Fault input 4 |
| mbed_official | 125:23cc3068a9e4 | 2476 | * @arg HRTIM_FAULT_5: Fault input 5 |
| mbed_official | 125:23cc3068a9e4 | 2477 | * @param pFaultCfg: pointer to the fault conditioning configuration structure |
| mbed_official | 125:23cc3068a9e4 | 2478 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2479 | */ |
| mbed_official | 125:23cc3068a9e4 | 2480 | void HRTIM_FaultConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2481 | HRTIM_FaultCfgTypeDef* pFaultCfg, |
| mbed_official | 125:23cc3068a9e4 | 2482 | uint32_t Fault) |
| mbed_official | 125:23cc3068a9e4 | 2483 | { |
| mbed_official | 125:23cc3068a9e4 | 2484 | uint32_t HRTIM_fltinr1; |
| mbed_official | 125:23cc3068a9e4 | 2485 | uint32_t HRTIM_fltinr2; |
| mbed_official | 125:23cc3068a9e4 | 2486 | |
| mbed_official | 125:23cc3068a9e4 | 2487 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2488 | assert_param(IS_HRTIM_FAULT(Fault)); |
| mbed_official | 125:23cc3068a9e4 | 2489 | assert_param(IS_HRTIM_FAULTSOURCE(pFaultCfg->Source)); |
| mbed_official | 125:23cc3068a9e4 | 2490 | assert_param(IS_HRTIM_FAULTPOLARITY(pFaultCfg->Polarity)); |
| mbed_official | 125:23cc3068a9e4 | 2491 | assert_param(IS_HRTIM_FAULTFILTER(pFaultCfg->Filter)); |
| mbed_official | 125:23cc3068a9e4 | 2492 | assert_param(IS_HRTIM_FAULTLOCK(pFaultCfg->Lock)); |
| mbed_official | 125:23cc3068a9e4 | 2493 | |
| mbed_official | 125:23cc3068a9e4 | 2494 | /* Configure fault channel */ |
| mbed_official | 125:23cc3068a9e4 | 2495 | HRTIM_fltinr1 = HRTIMx->HRTIM_COMMON.FLTINxR1; |
| mbed_official | 125:23cc3068a9e4 | 2496 | HRTIM_fltinr2 = HRTIMx->HRTIM_COMMON.FLTINxR2; |
| mbed_official | 125:23cc3068a9e4 | 2497 | |
| mbed_official | 125:23cc3068a9e4 | 2498 | switch (Fault) |
| mbed_official | 125:23cc3068a9e4 | 2499 | { |
| mbed_official | 125:23cc3068a9e4 | 2500 | case HRTIM_FAULT_1: |
| mbed_official | 125:23cc3068a9e4 | 2501 | { |
| mbed_official | 125:23cc3068a9e4 | 2502 | HRTIM_fltinr1 &= ~(HRTIM_FLTINR1_FLT1P | HRTIM_FLTINR1_FLT1SRC | HRTIM_FLTINR1_FLT1F | HRTIM_FLTINR1_FLT1LCK); |
| mbed_official | 125:23cc3068a9e4 | 2503 | HRTIM_fltinr1 |= pFaultCfg->Polarity; |
| mbed_official | 125:23cc3068a9e4 | 2504 | HRTIM_fltinr1 |= pFaultCfg->Source; |
| mbed_official | 125:23cc3068a9e4 | 2505 | HRTIM_fltinr1 |= pFaultCfg->Filter; |
| mbed_official | 125:23cc3068a9e4 | 2506 | HRTIM_fltinr1 |= pFaultCfg->Lock; |
| mbed_official | 125:23cc3068a9e4 | 2507 | } |
| mbed_official | 125:23cc3068a9e4 | 2508 | break; |
| mbed_official | 125:23cc3068a9e4 | 2509 | case HRTIM_FAULT_2: |
| mbed_official | 125:23cc3068a9e4 | 2510 | { |
| mbed_official | 125:23cc3068a9e4 | 2511 | HRTIM_fltinr1 &= ~(HRTIM_FLTINR1_FLT2P | HRTIM_FLTINR1_FLT2SRC | HRTIM_FLTINR1_FLT2F | HRTIM_FLTINR1_FLT2LCK); |
| mbed_official | 125:23cc3068a9e4 | 2512 | HRTIM_fltinr1 |= (pFaultCfg->Polarity << 8); |
| mbed_official | 125:23cc3068a9e4 | 2513 | HRTIM_fltinr1 |= (pFaultCfg->Source << 8); |
| mbed_official | 125:23cc3068a9e4 | 2514 | HRTIM_fltinr1 |= (pFaultCfg->Filter << 8); |
| mbed_official | 125:23cc3068a9e4 | 2515 | HRTIM_fltinr1 |= (pFaultCfg->Lock << 8); |
| mbed_official | 125:23cc3068a9e4 | 2516 | } |
| mbed_official | 125:23cc3068a9e4 | 2517 | break; |
| mbed_official | 125:23cc3068a9e4 | 2518 | case HRTIM_FAULT_3: |
| mbed_official | 125:23cc3068a9e4 | 2519 | { |
| mbed_official | 125:23cc3068a9e4 | 2520 | HRTIM_fltinr1 &= ~(HRTIM_FLTINR1_FLT3P | HRTIM_FLTINR1_FLT3SRC | HRTIM_FLTINR1_FLT3F | HRTIM_FLTINR1_FLT3LCK); |
| mbed_official | 125:23cc3068a9e4 | 2521 | HRTIM_fltinr1 |= (pFaultCfg->Polarity << 16); |
| mbed_official | 125:23cc3068a9e4 | 2522 | HRTIM_fltinr1 |= (pFaultCfg->Source << 16); |
| mbed_official | 125:23cc3068a9e4 | 2523 | HRTIM_fltinr1 |= (pFaultCfg->Filter << 16); |
| mbed_official | 125:23cc3068a9e4 | 2524 | HRTIM_fltinr1 |= (pFaultCfg->Lock << 16); |
| mbed_official | 125:23cc3068a9e4 | 2525 | } |
| mbed_official | 125:23cc3068a9e4 | 2526 | break; |
| mbed_official | 125:23cc3068a9e4 | 2527 | case HRTIM_FAULT_4: |
| mbed_official | 125:23cc3068a9e4 | 2528 | { |
| mbed_official | 125:23cc3068a9e4 | 2529 | HRTIM_fltinr1 &= ~(HRTIM_FLTINR1_FLT4P | HRTIM_FLTINR1_FLT4SRC | HRTIM_FLTINR1_FLT4F | HRTIM_FLTINR1_FLT4LCK); |
| mbed_official | 125:23cc3068a9e4 | 2530 | HRTIM_fltinr1 |= (pFaultCfg->Polarity << 24); |
| mbed_official | 125:23cc3068a9e4 | 2531 | HRTIM_fltinr1 |= (pFaultCfg->Source << 24); |
| mbed_official | 125:23cc3068a9e4 | 2532 | HRTIM_fltinr1 |= (pFaultCfg->Filter << 24); |
| mbed_official | 125:23cc3068a9e4 | 2533 | HRTIM_fltinr1 |= (pFaultCfg->Lock << 24); |
| mbed_official | 125:23cc3068a9e4 | 2534 | } |
| mbed_official | 125:23cc3068a9e4 | 2535 | break; |
| mbed_official | 125:23cc3068a9e4 | 2536 | case HRTIM_FAULT_5: |
| mbed_official | 125:23cc3068a9e4 | 2537 | { |
| mbed_official | 125:23cc3068a9e4 | 2538 | HRTIM_fltinr2 &= ~(HRTIM_FLTINR2_FLT5P | HRTIM_FLTINR2_FLT5SRC | HRTIM_FLTINR2_FLT5F | HRTIM_FLTINR2_FLT5LCK); |
| mbed_official | 125:23cc3068a9e4 | 2539 | HRTIM_fltinr2 |= pFaultCfg->Polarity; |
| mbed_official | 125:23cc3068a9e4 | 2540 | HRTIM_fltinr2 |= pFaultCfg->Source; |
| mbed_official | 125:23cc3068a9e4 | 2541 | HRTIM_fltinr2 |= pFaultCfg->Filter; |
| mbed_official | 125:23cc3068a9e4 | 2542 | HRTIM_fltinr2 |= pFaultCfg->Lock; |
| mbed_official | 125:23cc3068a9e4 | 2543 | } |
| mbed_official | 125:23cc3068a9e4 | 2544 | break; |
| mbed_official | 125:23cc3068a9e4 | 2545 | default: |
| mbed_official | 125:23cc3068a9e4 | 2546 | break; |
| mbed_official | 125:23cc3068a9e4 | 2547 | } |
| mbed_official | 125:23cc3068a9e4 | 2548 | |
| mbed_official | 125:23cc3068a9e4 | 2549 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2550 | HRTIMx->HRTIM_COMMON.FLTINxR1 = HRTIM_fltinr1; |
| mbed_official | 125:23cc3068a9e4 | 2551 | HRTIMx->HRTIM_COMMON.FLTINxR2 = HRTIM_fltinr2; |
| mbed_official | 125:23cc3068a9e4 | 2552 | } |
| mbed_official | 125:23cc3068a9e4 | 2553 | |
| mbed_official | 125:23cc3068a9e4 | 2554 | /** |
| mbed_official | 125:23cc3068a9e4 | 2555 | * @brief Configures the fault conditioning block prescaler |
| mbed_official | 125:23cc3068a9e4 | 2556 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2557 | * @param Prescaler: Prescaler value |
| mbed_official | 125:23cc3068a9e4 | 2558 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2559 | * @arg HRTIM_FAULTPRESCALER_DIV1: fFLTS=fHRTIMx |
| mbed_official | 125:23cc3068a9e4 | 2560 | * @arg HRTIM_FAULTPRESCALER_DIV2: fFLTS=fHRTIMx / 2 |
| mbed_official | 125:23cc3068a9e4 | 2561 | * @arg HRTIM_FAULTPRESCALER_DIV4: fFLTS=fHRTIMx / 4 |
| mbed_official | 125:23cc3068a9e4 | 2562 | * @arg HRTIM_FAULTPRESCALER_DIV8: fFLTS=fHRTIMx / 8 |
| mbed_official | 125:23cc3068a9e4 | 2563 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2564 | */ |
| mbed_official | 125:23cc3068a9e4 | 2565 | void HRTIM_FaultPrescalerConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2566 | uint32_t Prescaler) |
| mbed_official | 125:23cc3068a9e4 | 2567 | { |
| mbed_official | 125:23cc3068a9e4 | 2568 | uint32_t HRTIM_fltinr2; |
| mbed_official | 125:23cc3068a9e4 | 2569 | |
| mbed_official | 125:23cc3068a9e4 | 2570 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2571 | assert_param(IS_HRTIM_FAULTPRESCALER(Prescaler)); |
| mbed_official | 125:23cc3068a9e4 | 2572 | |
| mbed_official | 125:23cc3068a9e4 | 2573 | /* Set the external event prescaler */ |
| mbed_official | 125:23cc3068a9e4 | 2574 | HRTIM_fltinr2 = HRTIMx->HRTIM_COMMON.FLTINxR2; |
| mbed_official | 125:23cc3068a9e4 | 2575 | HRTIM_fltinr2 &= ~(HRTIM_FLTINR2_FLTSD); |
| mbed_official | 125:23cc3068a9e4 | 2576 | HRTIM_fltinr2 |= Prescaler; |
| mbed_official | 125:23cc3068a9e4 | 2577 | |
| mbed_official | 125:23cc3068a9e4 | 2578 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2579 | HRTIMx->HRTIM_COMMON.FLTINxR2 = HRTIM_fltinr2; |
| mbed_official | 125:23cc3068a9e4 | 2580 | } |
| mbed_official | 125:23cc3068a9e4 | 2581 | |
| mbed_official | 125:23cc3068a9e4 | 2582 | /** |
| mbed_official | 125:23cc3068a9e4 | 2583 | * @brief Enables or disables the HRTIMx Fault mode. |
| mbed_official | 125:23cc3068a9e4 | 2584 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2585 | * @param Fault: fault input to configure |
| mbed_official | 125:23cc3068a9e4 | 2586 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2587 | * @arg HRTIM_FAULT_1: Fault input 1 |
| mbed_official | 125:23cc3068a9e4 | 2588 | * @arg HRTIM_FAULT_2: Fault input 2 |
| mbed_official | 125:23cc3068a9e4 | 2589 | * @arg HRTIM_FAULT_3: Fault input 3 |
| mbed_official | 125:23cc3068a9e4 | 2590 | * @arg HRTIM_FAULT_4: Fault input 4 |
| mbed_official | 125:23cc3068a9e4 | 2591 | * @arg HRTIM_FAULT_5: Fault input 5 |
| mbed_official | 125:23cc3068a9e4 | 2592 | * @param Enable: Fault mode controller enabling |
| mbed_official | 125:23cc3068a9e4 | 2593 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2594 | * @arg HRTIM_FAULT_ENABLED: Fault mode enabled |
| mbed_official | 125:23cc3068a9e4 | 2595 | * @arg HRTIM_FAULT_DISABLED: Fault mode disabled |
| mbed_official | 125:23cc3068a9e4 | 2596 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2597 | */ |
| mbed_official | 125:23cc3068a9e4 | 2598 | void HRTIM_FaultModeCtl(HRTIM_TypeDef * HRTIMx, uint32_t Fault, uint32_t Enable) |
| mbed_official | 125:23cc3068a9e4 | 2599 | { |
| mbed_official | 125:23cc3068a9e4 | 2600 | uint32_t HRTIM_fltinr1; |
| mbed_official | 125:23cc3068a9e4 | 2601 | uint32_t HRTIM_fltinr2; |
| mbed_official | 125:23cc3068a9e4 | 2602 | |
| mbed_official | 125:23cc3068a9e4 | 2603 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2604 | assert_param(IS_HRTIM_FAULT(Fault)); |
| mbed_official | 125:23cc3068a9e4 | 2605 | assert_param(IS_HRTIM_FAULTCTL(Enable)); |
| mbed_official | 125:23cc3068a9e4 | 2606 | |
| mbed_official | 125:23cc3068a9e4 | 2607 | /* Configure fault channel */ |
| mbed_official | 125:23cc3068a9e4 | 2608 | HRTIM_fltinr1 = HRTIMx->HRTIM_COMMON.FLTINxR1; |
| mbed_official | 125:23cc3068a9e4 | 2609 | HRTIM_fltinr2 = HRTIMx->HRTIM_COMMON.FLTINxR2; |
| mbed_official | 125:23cc3068a9e4 | 2610 | |
| mbed_official | 125:23cc3068a9e4 | 2611 | switch (Fault) |
| mbed_official | 125:23cc3068a9e4 | 2612 | { |
| mbed_official | 125:23cc3068a9e4 | 2613 | case HRTIM_FAULT_1: |
| mbed_official | 125:23cc3068a9e4 | 2614 | { |
| mbed_official | 125:23cc3068a9e4 | 2615 | HRTIM_fltinr1 &= ~HRTIM_FLTINR1_FLT1E; |
| mbed_official | 125:23cc3068a9e4 | 2616 | HRTIM_fltinr1 |= Enable; |
| mbed_official | 125:23cc3068a9e4 | 2617 | } |
| mbed_official | 125:23cc3068a9e4 | 2618 | break; |
| mbed_official | 125:23cc3068a9e4 | 2619 | case HRTIM_FAULT_2: |
| mbed_official | 125:23cc3068a9e4 | 2620 | { |
| mbed_official | 125:23cc3068a9e4 | 2621 | HRTIM_fltinr1 &= ~HRTIM_FLTINR1_FLT2E; |
| mbed_official | 125:23cc3068a9e4 | 2622 | HRTIM_fltinr1 |= (Enable<< 8); |
| mbed_official | 125:23cc3068a9e4 | 2623 | } |
| mbed_official | 125:23cc3068a9e4 | 2624 | break; |
| mbed_official | 125:23cc3068a9e4 | 2625 | case HRTIM_FAULT_3: |
| mbed_official | 125:23cc3068a9e4 | 2626 | { |
| mbed_official | 125:23cc3068a9e4 | 2627 | HRTIM_fltinr1 &= ~HRTIM_FLTINR1_FLT3E; |
| mbed_official | 125:23cc3068a9e4 | 2628 | HRTIM_fltinr1 |= (Enable << 16); |
| mbed_official | 125:23cc3068a9e4 | 2629 | } |
| mbed_official | 125:23cc3068a9e4 | 2630 | break; |
| mbed_official | 125:23cc3068a9e4 | 2631 | case HRTIM_FAULT_4: |
| mbed_official | 125:23cc3068a9e4 | 2632 | { |
| mbed_official | 125:23cc3068a9e4 | 2633 | HRTIM_fltinr1 &= ~HRTIM_FLTINR1_FLT4E; |
| mbed_official | 125:23cc3068a9e4 | 2634 | HRTIM_fltinr1 |= (Enable << 24); |
| mbed_official | 125:23cc3068a9e4 | 2635 | } |
| mbed_official | 125:23cc3068a9e4 | 2636 | break; |
| mbed_official | 125:23cc3068a9e4 | 2637 | case HRTIM_FAULT_5: |
| mbed_official | 125:23cc3068a9e4 | 2638 | { |
| mbed_official | 125:23cc3068a9e4 | 2639 | HRTIM_fltinr2 &= ~HRTIM_FLTINR2_FLT5E; |
| mbed_official | 125:23cc3068a9e4 | 2640 | HRTIM_fltinr2 |= Enable; |
| mbed_official | 125:23cc3068a9e4 | 2641 | } |
| mbed_official | 125:23cc3068a9e4 | 2642 | break; |
| mbed_official | 125:23cc3068a9e4 | 2643 | default: |
| mbed_official | 125:23cc3068a9e4 | 2644 | break; |
| mbed_official | 125:23cc3068a9e4 | 2645 | } |
| mbed_official | 125:23cc3068a9e4 | 2646 | |
| mbed_official | 125:23cc3068a9e4 | 2647 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2648 | HRTIMx->HRTIM_COMMON.FLTINxR1 = HRTIM_fltinr1; |
| mbed_official | 125:23cc3068a9e4 | 2649 | HRTIMx->HRTIM_COMMON.FLTINxR2 = HRTIM_fltinr2; |
| mbed_official | 125:23cc3068a9e4 | 2650 | } |
| mbed_official | 125:23cc3068a9e4 | 2651 | |
| mbed_official | 125:23cc3068a9e4 | 2652 | /** |
| mbed_official | 125:23cc3068a9e4 | 2653 | * @brief Configures both the ADC trigger register update source and the ADC |
| mbed_official | 125:23cc3068a9e4 | 2654 | * trigger source. |
| mbed_official | 125:23cc3068a9e4 | 2655 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2656 | * @param ADC trigger: ADC trigger to configure |
| mbed_official | 125:23cc3068a9e4 | 2657 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2658 | * @arg HRTIM_ADCTRIGGER_1: ADC trigger 1 |
| mbed_official | 125:23cc3068a9e4 | 2659 | * @arg HRTIM_ADCTRIGGER_2: ADC trigger 2 |
| mbed_official | 125:23cc3068a9e4 | 2660 | * @arg HRTIM_ADCTRIGGER_3: ADC trigger 3 |
| mbed_official | 125:23cc3068a9e4 | 2661 | * @arg HRTIM_ADCTRIGGER_4: ADC trigger 4 |
| mbed_official | 125:23cc3068a9e4 | 2662 | * @param pADCTriggerCfg: pointer to the ADC trigger configuration structure |
| mbed_official | 125:23cc3068a9e4 | 2663 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2664 | */ |
| mbed_official | 125:23cc3068a9e4 | 2665 | void HRTIM_ADCTriggerConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2666 | uint32_t ADCTrigger, |
| mbed_official | 125:23cc3068a9e4 | 2667 | HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg) |
| mbed_official | 125:23cc3068a9e4 | 2668 | { |
| mbed_official | 125:23cc3068a9e4 | 2669 | uint32_t HRTIM_cr1; |
| mbed_official | 125:23cc3068a9e4 | 2670 | |
| mbed_official | 125:23cc3068a9e4 | 2671 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2672 | assert_param(IS_HRTIM_ADCTRIGGER(ADCTrigger)); |
| mbed_official | 125:23cc3068a9e4 | 2673 | assert_param(IS_HRTIM_ADCTRIGGERUPDATE(pADCTriggerCfg->UpdateSource)); |
| mbed_official | 125:23cc3068a9e4 | 2674 | |
| mbed_official | 125:23cc3068a9e4 | 2675 | /* Set the ADC trigger update source */ |
| mbed_official | 125:23cc3068a9e4 | 2676 | HRTIM_cr1 = HRTIMx->HRTIM_COMMON.CR1; |
| mbed_official | 125:23cc3068a9e4 | 2677 | |
| mbed_official | 125:23cc3068a9e4 | 2678 | switch (ADCTrigger) |
| mbed_official | 125:23cc3068a9e4 | 2679 | { |
| mbed_official | 125:23cc3068a9e4 | 2680 | case HRTIM_ADCTRIGGER_1: |
| mbed_official | 125:23cc3068a9e4 | 2681 | { |
| mbed_official | 125:23cc3068a9e4 | 2682 | HRTIM_cr1 &= ~(HRTIM_CR1_ADC1USRC); |
| mbed_official | 125:23cc3068a9e4 | 2683 | HRTIM_cr1 |= pADCTriggerCfg->UpdateSource; |
| mbed_official | 125:23cc3068a9e4 | 2684 | |
| mbed_official | 125:23cc3068a9e4 | 2685 | /* Set the ADC trigger 1 source */ |
| mbed_official | 125:23cc3068a9e4 | 2686 | HRTIMx->HRTIM_COMMON.ADC1R = pADCTriggerCfg->Trigger; |
| mbed_official | 125:23cc3068a9e4 | 2687 | } |
| mbed_official | 125:23cc3068a9e4 | 2688 | break; |
| mbed_official | 125:23cc3068a9e4 | 2689 | case HRTIM_ADCTRIGGER_2: |
| mbed_official | 125:23cc3068a9e4 | 2690 | { |
| mbed_official | 125:23cc3068a9e4 | 2691 | HRTIM_cr1 &= ~(HRTIM_CR1_ADC2USRC); |
| mbed_official | 125:23cc3068a9e4 | 2692 | HRTIM_cr1 |= (pADCTriggerCfg->UpdateSource << 3); |
| mbed_official | 125:23cc3068a9e4 | 2693 | |
| mbed_official | 125:23cc3068a9e4 | 2694 | /* Set the ADC trigger 2 source */ |
| mbed_official | 125:23cc3068a9e4 | 2695 | HRTIMx->HRTIM_COMMON.ADC2R = pADCTriggerCfg->Trigger; |
| mbed_official | 125:23cc3068a9e4 | 2696 | } |
| mbed_official | 125:23cc3068a9e4 | 2697 | break; |
| mbed_official | 125:23cc3068a9e4 | 2698 | case HRTIM_ADCTRIGGER_3: |
| mbed_official | 125:23cc3068a9e4 | 2699 | { |
| mbed_official | 125:23cc3068a9e4 | 2700 | HRTIM_cr1 &= ~(HRTIM_CR1_ADC3USRC); |
| mbed_official | 125:23cc3068a9e4 | 2701 | HRTIM_cr1 |= (pADCTriggerCfg->UpdateSource << 6); |
| mbed_official | 125:23cc3068a9e4 | 2702 | |
| mbed_official | 125:23cc3068a9e4 | 2703 | /* Set the ADC trigger 3 source */ |
| mbed_official | 125:23cc3068a9e4 | 2704 | HRTIMx->HRTIM_COMMON.ADC3R = pADCTriggerCfg->Trigger; |
| mbed_official | 125:23cc3068a9e4 | 2705 | } |
| mbed_official | 125:23cc3068a9e4 | 2706 | case HRTIM_ADCTRIGGER_4: |
| mbed_official | 125:23cc3068a9e4 | 2707 | { |
| mbed_official | 125:23cc3068a9e4 | 2708 | HRTIM_cr1 &= ~(HRTIM_CR1_ADC4USRC); |
| mbed_official | 125:23cc3068a9e4 | 2709 | HRTIM_cr1 |= (pADCTriggerCfg->UpdateSource << 9); |
| mbed_official | 125:23cc3068a9e4 | 2710 | |
| mbed_official | 125:23cc3068a9e4 | 2711 | /* Set the ADC trigger 4 source */ |
| mbed_official | 125:23cc3068a9e4 | 2712 | HRTIMx->HRTIM_COMMON.ADC4R = pADCTriggerCfg->Trigger; |
| mbed_official | 125:23cc3068a9e4 | 2713 | } |
| mbed_official | 125:23cc3068a9e4 | 2714 | break; |
| mbed_official | 125:23cc3068a9e4 | 2715 | default: |
| mbed_official | 125:23cc3068a9e4 | 2716 | break; |
| mbed_official | 125:23cc3068a9e4 | 2717 | } |
| mbed_official | 125:23cc3068a9e4 | 2718 | |
| mbed_official | 125:23cc3068a9e4 | 2719 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2720 | HRTIMx->HRTIM_COMMON.CR1 = HRTIM_cr1; |
| mbed_official | 125:23cc3068a9e4 | 2721 | } |
| mbed_official | 125:23cc3068a9e4 | 2722 | |
| mbed_official | 125:23cc3068a9e4 | 2723 | |
| mbed_official | 125:23cc3068a9e4 | 2724 | /** |
| mbed_official | 125:23cc3068a9e4 | 2725 | * @brief Enables or disables the HRTIMx burst mode controller. |
| mbed_official | 125:23cc3068a9e4 | 2726 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2727 | * @param Enable: Burst mode controller enabling |
| mbed_official | 125:23cc3068a9e4 | 2728 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2729 | * @arg HRTIM_BURSTMODECTL_ENABLED: Burst mode enabled |
| mbed_official | 125:23cc3068a9e4 | 2730 | * @arg HRTIM_BURSTMODECTL_DISABLED: Burst mode disabled |
| mbed_official | 125:23cc3068a9e4 | 2731 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2732 | */ |
| mbed_official | 125:23cc3068a9e4 | 2733 | void HRTIM_BurstModeCtl(HRTIM_TypeDef * HRTIMx, uint32_t Enable) |
| mbed_official | 125:23cc3068a9e4 | 2734 | { |
| mbed_official | 125:23cc3068a9e4 | 2735 | uint32_t HRTIM_bmcr; |
| mbed_official | 125:23cc3068a9e4 | 2736 | |
| mbed_official | 125:23cc3068a9e4 | 2737 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2738 | assert_param(IS_HRTIM_BURSTMODECTL(Enable)); |
| mbed_official | 125:23cc3068a9e4 | 2739 | |
| mbed_official | 125:23cc3068a9e4 | 2740 | /* Enable/Disable the burst mode controller */ |
| mbed_official | 125:23cc3068a9e4 | 2741 | HRTIM_bmcr = HRTIMx->HRTIM_COMMON.BMCR; |
| mbed_official | 125:23cc3068a9e4 | 2742 | HRTIM_bmcr &= ~(HRTIM_BMCR_BME); |
| mbed_official | 125:23cc3068a9e4 | 2743 | HRTIM_bmcr |= Enable; |
| mbed_official | 125:23cc3068a9e4 | 2744 | |
| mbed_official | 125:23cc3068a9e4 | 2745 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 2746 | HRTIMx->HRTIM_COMMON.BMCR = HRTIM_bmcr; |
| mbed_official | 125:23cc3068a9e4 | 2747 | } |
| mbed_official | 125:23cc3068a9e4 | 2748 | |
| mbed_official | 125:23cc3068a9e4 | 2749 | /** |
| mbed_official | 125:23cc3068a9e4 | 2750 | * @brief Triggers a software capture on the designed capture unit |
| mbed_official | 125:23cc3068a9e4 | 2751 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2752 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 2753 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2754 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 2755 | * @param CaptureUnit: Capture unit to trig |
| mbed_official | 125:23cc3068a9e4 | 2756 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2757 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| mbed_official | 125:23cc3068a9e4 | 2758 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| mbed_official | 125:23cc3068a9e4 | 2759 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2760 | * @note The 'software capture' bit in the capure configuration register is |
| mbed_official | 125:23cc3068a9e4 | 2761 | * automatically reset by hardware |
| mbed_official | 125:23cc3068a9e4 | 2762 | */ |
| mbed_official | 125:23cc3068a9e4 | 2763 | void HRTIM_SoftwareCapture(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2764 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 2765 | uint32_t CaptureUnit) |
| mbed_official | 125:23cc3068a9e4 | 2766 | { |
| mbed_official | 125:23cc3068a9e4 | 2767 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2768 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 2769 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit)); |
| mbed_official | 125:23cc3068a9e4 | 2770 | |
| mbed_official | 125:23cc3068a9e4 | 2771 | /* Force a software capture on concerned capture unit */ |
| mbed_official | 125:23cc3068a9e4 | 2772 | switch (CaptureUnit) |
| mbed_official | 125:23cc3068a9e4 | 2773 | { |
| mbed_official | 125:23cc3068a9e4 | 2774 | case HRTIM_CAPTUREUNIT_1: |
| mbed_official | 125:23cc3068a9e4 | 2775 | { |
| mbed_official | 125:23cc3068a9e4 | 2776 | HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR |= HRTIM_CPT1CR_SWCPT; |
| mbed_official | 125:23cc3068a9e4 | 2777 | } |
| mbed_official | 125:23cc3068a9e4 | 2778 | break; |
| mbed_official | 125:23cc3068a9e4 | 2779 | case HRTIM_CAPTUREUNIT_2: |
| mbed_official | 125:23cc3068a9e4 | 2780 | { |
| mbed_official | 125:23cc3068a9e4 | 2781 | HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR |= HRTIM_CPT2CR_SWCPT; |
| mbed_official | 125:23cc3068a9e4 | 2782 | } |
| mbed_official | 125:23cc3068a9e4 | 2783 | break; |
| mbed_official | 125:23cc3068a9e4 | 2784 | default: |
| mbed_official | 125:23cc3068a9e4 | 2785 | break; |
| mbed_official | 125:23cc3068a9e4 | 2786 | } |
| mbed_official | 125:23cc3068a9e4 | 2787 | } |
| mbed_official | 125:23cc3068a9e4 | 2788 | |
| mbed_official | 125:23cc3068a9e4 | 2789 | /** |
| mbed_official | 125:23cc3068a9e4 | 2790 | * @brief Triggers the update of the registers of one or several timers |
| mbed_official | 125:23cc3068a9e4 | 2791 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2792 | * @param TimersToUpdate: timers concerned with the software register update |
| mbed_official | 125:23cc3068a9e4 | 2793 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2794 | * @arg HRTIM_TIMERUPDATE_MASTER |
| mbed_official | 125:23cc3068a9e4 | 2795 | * @arg HRTIM_TIMERUPDATE_A |
| mbed_official | 125:23cc3068a9e4 | 2796 | * @arg HRTIM_TIMERUPDATE_B |
| mbed_official | 125:23cc3068a9e4 | 2797 | * @arg HRTIM_TIMERUPDATE_C |
| mbed_official | 125:23cc3068a9e4 | 2798 | * @arg HRTIM_TIMERUPDATE_D |
| mbed_official | 125:23cc3068a9e4 | 2799 | * @arg HRTIM_TIMERUPDATE_E |
| mbed_official | 125:23cc3068a9e4 | 2800 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2801 | * @note The 'software update' bits in the HRTIMx control register 2 register are |
| mbed_official | 125:23cc3068a9e4 | 2802 | * automatically reset by hardware |
| mbed_official | 125:23cc3068a9e4 | 2803 | */ |
| mbed_official | 125:23cc3068a9e4 | 2804 | void HRTIM_SoftwareUpdate(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2805 | uint32_t TimersToUpdate) |
| mbed_official | 125:23cc3068a9e4 | 2806 | { |
| mbed_official | 125:23cc3068a9e4 | 2807 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2808 | assert_param(IS_HRTIM_TIMERUPDATE(TimersToUpdate)); |
| mbed_official | 125:23cc3068a9e4 | 2809 | |
| mbed_official | 125:23cc3068a9e4 | 2810 | /* Force timer(s) registers update */ |
| mbed_official | 125:23cc3068a9e4 | 2811 | HRTIMx->HRTIM_COMMON.CR2 |= TimersToUpdate; |
| mbed_official | 125:23cc3068a9e4 | 2812 | |
| mbed_official | 125:23cc3068a9e4 | 2813 | } |
| mbed_official | 125:23cc3068a9e4 | 2814 | |
| mbed_official | 125:23cc3068a9e4 | 2815 | /** |
| mbed_official | 125:23cc3068a9e4 | 2816 | * @brief Triggers the reset of one or several timers |
| mbed_official | 125:23cc3068a9e4 | 2817 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2818 | * @param TimersToUpdate: timers concerned with the software counter reset |
| mbed_official | 125:23cc3068a9e4 | 2819 | * This parameter can be any combination of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2820 | * @arg HRTIM_TIMER_MASTER |
| mbed_official | 125:23cc3068a9e4 | 2821 | * @arg HRTIM_TIMER_A |
| mbed_official | 125:23cc3068a9e4 | 2822 | * @arg HRTIM_TIMER_B |
| mbed_official | 125:23cc3068a9e4 | 2823 | * @arg HRTIM_TIMER_C |
| mbed_official | 125:23cc3068a9e4 | 2824 | * @arg HRTIM_TIMER_D |
| mbed_official | 125:23cc3068a9e4 | 2825 | * @arg HRTIM_TIMER_E |
| mbed_official | 125:23cc3068a9e4 | 2826 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2827 | * @note The 'software reset' bits in the HRTIMx control register 2 are |
| mbed_official | 125:23cc3068a9e4 | 2828 | * automatically reset by hardware |
| mbed_official | 125:23cc3068a9e4 | 2829 | */ |
| mbed_official | 125:23cc3068a9e4 | 2830 | void HRTIM_SoftwareReset(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2831 | uint32_t TimersToReset) |
| mbed_official | 125:23cc3068a9e4 | 2832 | { |
| mbed_official | 125:23cc3068a9e4 | 2833 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2834 | assert_param(IS_HRTIM_TIMERRESET(TimersToReset)); |
| mbed_official | 125:23cc3068a9e4 | 2835 | |
| mbed_official | 125:23cc3068a9e4 | 2836 | /* Force timer(s) registers update */ |
| mbed_official | 125:23cc3068a9e4 | 2837 | HRTIMx->HRTIM_COMMON.CR2 |= TimersToReset; |
| mbed_official | 125:23cc3068a9e4 | 2838 | |
| mbed_official | 125:23cc3068a9e4 | 2839 | } |
| mbed_official | 125:23cc3068a9e4 | 2840 | |
| mbed_official | 125:23cc3068a9e4 | 2841 | /** |
| mbed_official | 125:23cc3068a9e4 | 2842 | * @brief Forces the timer output to its active or inactive state |
| mbed_official | 125:23cc3068a9e4 | 2843 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2844 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 2845 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2846 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 2847 | * @param Output: Timer output |
| mbed_official | 125:23cc3068a9e4 | 2848 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2849 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2850 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2851 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2852 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2853 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2854 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2855 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2856 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2857 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2858 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2859 | * @param OutputLevel: indicates whether the output is forced to its active or inactive state |
| mbed_official | 125:23cc3068a9e4 | 2860 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2861 | * @arg HRTIM_OUTPUTLEVEL_ACTIVE: output is forced to its active state |
| mbed_official | 125:23cc3068a9e4 | 2862 | * @arg HRTIM_OUTPUTLEVEL_INACTIVE: output is forced to its inactive state |
| mbed_official | 125:23cc3068a9e4 | 2863 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 2864 | * @note The 'software set/reset trigger' bit in the output set/reset registers |
| mbed_official | 125:23cc3068a9e4 | 2865 | * is automatically reset by hardware |
| mbed_official | 125:23cc3068a9e4 | 2866 | */ |
| mbed_official | 125:23cc3068a9e4 | 2867 | void HRTIM_WaveformSetOutputLevel(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2868 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 2869 | uint32_t Output, |
| mbed_official | 125:23cc3068a9e4 | 2870 | uint32_t OutputLevel) |
| mbed_official | 125:23cc3068a9e4 | 2871 | { |
| mbed_official | 125:23cc3068a9e4 | 2872 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2873 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
| mbed_official | 125:23cc3068a9e4 | 2874 | assert_param(IS_HRTIM_OUTPUTLEVEL(OutputLevel)); |
| mbed_official | 125:23cc3068a9e4 | 2875 | |
| mbed_official | 125:23cc3068a9e4 | 2876 | /* Force timer output level */ |
| mbed_official | 125:23cc3068a9e4 | 2877 | switch (Output) |
| mbed_official | 125:23cc3068a9e4 | 2878 | { |
| mbed_official | 125:23cc3068a9e4 | 2879 | case HRTIM_OUTPUT_TA1: |
| mbed_official | 125:23cc3068a9e4 | 2880 | case HRTIM_OUTPUT_TB1: |
| mbed_official | 125:23cc3068a9e4 | 2881 | case HRTIM_OUTPUT_TC1: |
| mbed_official | 125:23cc3068a9e4 | 2882 | case HRTIM_OUTPUT_TD1: |
| mbed_official | 125:23cc3068a9e4 | 2883 | case HRTIM_OUTPUT_TE1: |
| mbed_official | 125:23cc3068a9e4 | 2884 | { |
| mbed_official | 125:23cc3068a9e4 | 2885 | if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE) |
| mbed_official | 125:23cc3068a9e4 | 2886 | { |
| mbed_official | 125:23cc3068a9e4 | 2887 | /* Force output to its active state */ |
| mbed_official | 125:23cc3068a9e4 | 2888 | HRTIMx->HRTIM_TIMERx[TimerIdx].SETx1R |= HRTIM_SET1R_SST; |
| mbed_official | 125:23cc3068a9e4 | 2889 | } |
| mbed_official | 125:23cc3068a9e4 | 2890 | else |
| mbed_official | 125:23cc3068a9e4 | 2891 | { |
| mbed_official | 125:23cc3068a9e4 | 2892 | /* Force output to its inactive state */ |
| mbed_official | 125:23cc3068a9e4 | 2893 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTx1R |= HRTIM_RST1R_SRT; |
| mbed_official | 125:23cc3068a9e4 | 2894 | } |
| mbed_official | 125:23cc3068a9e4 | 2895 | } |
| mbed_official | 125:23cc3068a9e4 | 2896 | break; |
| mbed_official | 125:23cc3068a9e4 | 2897 | case HRTIM_OUTPUT_TA2: |
| mbed_official | 125:23cc3068a9e4 | 2898 | case HRTIM_OUTPUT_TB2: |
| mbed_official | 125:23cc3068a9e4 | 2899 | case HRTIM_OUTPUT_TC2: |
| mbed_official | 125:23cc3068a9e4 | 2900 | case HRTIM_OUTPUT_TD2: |
| mbed_official | 125:23cc3068a9e4 | 2901 | case HRTIM_OUTPUT_TE2: |
| mbed_official | 125:23cc3068a9e4 | 2902 | { |
| mbed_official | 125:23cc3068a9e4 | 2903 | if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE) |
| mbed_official | 125:23cc3068a9e4 | 2904 | { |
| mbed_official | 125:23cc3068a9e4 | 2905 | /* Force output to its active state */ |
| mbed_official | 125:23cc3068a9e4 | 2906 | HRTIMx->HRTIM_TIMERx[TimerIdx].SETx2R |= HRTIM_SET2R_SST; |
| mbed_official | 125:23cc3068a9e4 | 2907 | } |
| mbed_official | 125:23cc3068a9e4 | 2908 | else |
| mbed_official | 125:23cc3068a9e4 | 2909 | { |
| mbed_official | 125:23cc3068a9e4 | 2910 | /* Force output to its inactive state */ |
| mbed_official | 125:23cc3068a9e4 | 2911 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTx2R |= HRTIM_RST2R_SRT; |
| mbed_official | 125:23cc3068a9e4 | 2912 | } |
| mbed_official | 125:23cc3068a9e4 | 2913 | } |
| mbed_official | 125:23cc3068a9e4 | 2914 | break; |
| mbed_official | 125:23cc3068a9e4 | 2915 | default: |
| mbed_official | 125:23cc3068a9e4 | 2916 | break; |
| mbed_official | 125:23cc3068a9e4 | 2917 | } |
| mbed_official | 125:23cc3068a9e4 | 2918 | } |
| mbed_official | 125:23cc3068a9e4 | 2919 | |
| mbed_official | 125:23cc3068a9e4 | 2920 | |
| mbed_official | 125:23cc3068a9e4 | 2921 | /** |
| mbed_official | 125:23cc3068a9e4 | 2922 | * @} |
| mbed_official | 125:23cc3068a9e4 | 2923 | */ |
| mbed_official | 125:23cc3068a9e4 | 2924 | |
| mbed_official | 125:23cc3068a9e4 | 2925 | /** @defgroup HRTIM_Group4 Peripheral State methods |
| mbed_official | 125:23cc3068a9e4 | 2926 | * @brief Peripheral State functions |
| mbed_official | 125:23cc3068a9e4 | 2927 | * |
| mbed_official | 125:23cc3068a9e4 | 2928 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 2929 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 2930 | ##### Peripheral State methods ##### |
| mbed_official | 125:23cc3068a9e4 | 2931 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 2932 | [..] |
| mbed_official | 125:23cc3068a9e4 | 2933 | This subsection permit to get in run-time the status of the peripheral |
| mbed_official | 125:23cc3068a9e4 | 2934 | and the data flow. |
| mbed_official | 125:23cc3068a9e4 | 2935 | |
| mbed_official | 125:23cc3068a9e4 | 2936 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 2937 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 2938 | */ |
| mbed_official | 125:23cc3068a9e4 | 2939 | |
| mbed_official | 125:23cc3068a9e4 | 2940 | /** |
| mbed_official | 125:23cc3068a9e4 | 2941 | * @brief Returns actual value of the capture register of the designated capture unit |
| mbed_official | 125:23cc3068a9e4 | 2942 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2943 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 2944 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2945 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 2946 | * @param CaptureUnit: Capture unit to trig |
| mbed_official | 125:23cc3068a9e4 | 2947 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2948 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| mbed_official | 125:23cc3068a9e4 | 2949 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| mbed_official | 125:23cc3068a9e4 | 2950 | * @retval Captured value |
| mbed_official | 125:23cc3068a9e4 | 2951 | */ |
| mbed_official | 125:23cc3068a9e4 | 2952 | uint32_t HRTIM_GetCapturedValue(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 2953 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 2954 | uint32_t CaptureUnit) |
| mbed_official | 125:23cc3068a9e4 | 2955 | { |
| mbed_official | 125:23cc3068a9e4 | 2956 | uint32_t captured_value = 0; |
| mbed_official | 125:23cc3068a9e4 | 2957 | |
| mbed_official | 125:23cc3068a9e4 | 2958 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 2959 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 2960 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit)); |
| mbed_official | 125:23cc3068a9e4 | 2961 | |
| mbed_official | 125:23cc3068a9e4 | 2962 | /* Read captured value */ |
| mbed_official | 125:23cc3068a9e4 | 2963 | switch (CaptureUnit) |
| mbed_official | 125:23cc3068a9e4 | 2964 | { |
| mbed_official | 125:23cc3068a9e4 | 2965 | case HRTIM_CAPTUREUNIT_1: |
| mbed_official | 125:23cc3068a9e4 | 2966 | { |
| mbed_official | 125:23cc3068a9e4 | 2967 | captured_value = HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xR; |
| mbed_official | 125:23cc3068a9e4 | 2968 | } |
| mbed_official | 125:23cc3068a9e4 | 2969 | break; |
| mbed_official | 125:23cc3068a9e4 | 2970 | case HRTIM_CAPTUREUNIT_2: |
| mbed_official | 125:23cc3068a9e4 | 2971 | { |
| mbed_official | 125:23cc3068a9e4 | 2972 | captured_value = HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xR; |
| mbed_official | 125:23cc3068a9e4 | 2973 | } |
| mbed_official | 125:23cc3068a9e4 | 2974 | break; |
| mbed_official | 125:23cc3068a9e4 | 2975 | default: |
| mbed_official | 125:23cc3068a9e4 | 2976 | break; |
| mbed_official | 125:23cc3068a9e4 | 2977 | } |
| mbed_official | 125:23cc3068a9e4 | 2978 | |
| mbed_official | 125:23cc3068a9e4 | 2979 | return captured_value; |
| mbed_official | 125:23cc3068a9e4 | 2980 | } |
| mbed_official | 125:23cc3068a9e4 | 2981 | |
| mbed_official | 125:23cc3068a9e4 | 2982 | /** |
| mbed_official | 125:23cc3068a9e4 | 2983 | * @brief Returns actual level (active or inactive) of the designated output |
| mbed_official | 125:23cc3068a9e4 | 2984 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 2985 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 2986 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2987 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 2988 | * @param Output: Timer output |
| mbed_official | 125:23cc3068a9e4 | 2989 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 2990 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2991 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2992 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2993 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2994 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2995 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2996 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2997 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 2998 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 2999 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3000 | * @retval Output level |
| mbed_official | 125:23cc3068a9e4 | 3001 | * @note Returned output level is taken before the output stage (chopper, |
| mbed_official | 125:23cc3068a9e4 | 3002 | * polarity). |
| mbed_official | 125:23cc3068a9e4 | 3003 | */ |
| mbed_official | 125:23cc3068a9e4 | 3004 | uint32_t HRTIM_WaveformGetOutputLevel(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3005 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 3006 | uint32_t Output) |
| mbed_official | 125:23cc3068a9e4 | 3007 | { |
| mbed_official | 125:23cc3068a9e4 | 3008 | uint32_t output_level = HRTIM_OUTPUTLEVEL_INACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3009 | |
| mbed_official | 125:23cc3068a9e4 | 3010 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 3011 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
| mbed_official | 125:23cc3068a9e4 | 3012 | |
| mbed_official | 125:23cc3068a9e4 | 3013 | /* Read the output level */ |
| mbed_official | 125:23cc3068a9e4 | 3014 | switch (Output) |
| mbed_official | 125:23cc3068a9e4 | 3015 | { |
| mbed_official | 125:23cc3068a9e4 | 3016 | case HRTIM_OUTPUT_TA1: |
| mbed_official | 125:23cc3068a9e4 | 3017 | case HRTIM_OUTPUT_TB1: |
| mbed_official | 125:23cc3068a9e4 | 3018 | case HRTIM_OUTPUT_TC1: |
| mbed_official | 125:23cc3068a9e4 | 3019 | case HRTIM_OUTPUT_TD1: |
| mbed_official | 125:23cc3068a9e4 | 3020 | case HRTIM_OUTPUT_TE1: |
| mbed_official | 125:23cc3068a9e4 | 3021 | { |
| mbed_official | 125:23cc3068a9e4 | 3022 | if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_O1CPY) != RESET) |
| mbed_official | 125:23cc3068a9e4 | 3023 | { |
| mbed_official | 125:23cc3068a9e4 | 3024 | output_level = HRTIM_OUTPUTLEVEL_ACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3025 | } |
| mbed_official | 125:23cc3068a9e4 | 3026 | else |
| mbed_official | 125:23cc3068a9e4 | 3027 | { |
| mbed_official | 125:23cc3068a9e4 | 3028 | output_level = HRTIM_OUTPUTLEVEL_INACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3029 | } |
| mbed_official | 125:23cc3068a9e4 | 3030 | } |
| mbed_official | 125:23cc3068a9e4 | 3031 | break; |
| mbed_official | 125:23cc3068a9e4 | 3032 | case HRTIM_OUTPUT_TA2: |
| mbed_official | 125:23cc3068a9e4 | 3033 | case HRTIM_OUTPUT_TB2: |
| mbed_official | 125:23cc3068a9e4 | 3034 | case HRTIM_OUTPUT_TC2: |
| mbed_official | 125:23cc3068a9e4 | 3035 | case HRTIM_OUTPUT_TD2: |
| mbed_official | 125:23cc3068a9e4 | 3036 | case HRTIM_OUTPUT_TE2: |
| mbed_official | 125:23cc3068a9e4 | 3037 | { |
| mbed_official | 125:23cc3068a9e4 | 3038 | if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_O2CPY) != RESET) |
| mbed_official | 125:23cc3068a9e4 | 3039 | { |
| mbed_official | 125:23cc3068a9e4 | 3040 | output_level = HRTIM_OUTPUTLEVEL_ACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3041 | } |
| mbed_official | 125:23cc3068a9e4 | 3042 | else |
| mbed_official | 125:23cc3068a9e4 | 3043 | { |
| mbed_official | 125:23cc3068a9e4 | 3044 | output_level = HRTIM_OUTPUTLEVEL_INACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3045 | } |
| mbed_official | 125:23cc3068a9e4 | 3046 | } |
| mbed_official | 125:23cc3068a9e4 | 3047 | break; |
| mbed_official | 125:23cc3068a9e4 | 3048 | default: |
| mbed_official | 125:23cc3068a9e4 | 3049 | break; |
| mbed_official | 125:23cc3068a9e4 | 3050 | } |
| mbed_official | 125:23cc3068a9e4 | 3051 | |
| mbed_official | 125:23cc3068a9e4 | 3052 | return output_level; |
| mbed_official | 125:23cc3068a9e4 | 3053 | } |
| mbed_official | 125:23cc3068a9e4 | 3054 | |
| mbed_official | 125:23cc3068a9e4 | 3055 | /** |
| mbed_official | 125:23cc3068a9e4 | 3056 | * @brief Returns actual state (RUN, IDLE, FAULT) of the designated output |
| mbed_official | 125:23cc3068a9e4 | 3057 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3058 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3059 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 3060 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 3061 | * @param Output: Timer output |
| mbed_official | 125:23cc3068a9e4 | 3062 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 3063 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3064 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3065 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3066 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3067 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3068 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3069 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3070 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3071 | * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3072 | * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3073 | * @retval Output state |
| mbed_official | 125:23cc3068a9e4 | 3074 | */ |
| mbed_official | 125:23cc3068a9e4 | 3075 | uint32_t HRTIM_WaveformGetOutputState(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3076 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 3077 | uint32_t Output) |
| mbed_official | 125:23cc3068a9e4 | 3078 | { |
| mbed_official | 125:23cc3068a9e4 | 3079 | uint32_t output_bit = 0; |
| mbed_official | 125:23cc3068a9e4 | 3080 | uint32_t output_state = HRTIM_OUTPUTSTATE_IDLE; |
| mbed_official | 125:23cc3068a9e4 | 3081 | |
| mbed_official | 125:23cc3068a9e4 | 3082 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 3083 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
| mbed_official | 125:23cc3068a9e4 | 3084 | |
| mbed_official | 125:23cc3068a9e4 | 3085 | /* Set output state according to output control status and output disable status */ |
| mbed_official | 125:23cc3068a9e4 | 3086 | switch (Output) |
| mbed_official | 125:23cc3068a9e4 | 3087 | { |
| mbed_official | 125:23cc3068a9e4 | 3088 | case HRTIM_OUTPUT_TA1: |
| mbed_official | 125:23cc3068a9e4 | 3089 | { |
| mbed_official | 125:23cc3068a9e4 | 3090 | output_bit = HRTIM_OENR_TA1OEN; |
| mbed_official | 125:23cc3068a9e4 | 3091 | } |
| mbed_official | 125:23cc3068a9e4 | 3092 | break; |
| mbed_official | 125:23cc3068a9e4 | 3093 | case HRTIM_OUTPUT_TA2: |
| mbed_official | 125:23cc3068a9e4 | 3094 | { |
| mbed_official | 125:23cc3068a9e4 | 3095 | output_bit = HRTIM_OENR_TA2OEN; |
| mbed_official | 125:23cc3068a9e4 | 3096 | } |
| mbed_official | 125:23cc3068a9e4 | 3097 | break; |
| mbed_official | 125:23cc3068a9e4 | 3098 | case HRTIM_OUTPUT_TB1: |
| mbed_official | 125:23cc3068a9e4 | 3099 | { |
| mbed_official | 125:23cc3068a9e4 | 3100 | output_bit = HRTIM_OENR_TB1OEN; |
| mbed_official | 125:23cc3068a9e4 | 3101 | } |
| mbed_official | 125:23cc3068a9e4 | 3102 | break; |
| mbed_official | 125:23cc3068a9e4 | 3103 | case HRTIM_OUTPUT_TB2: |
| mbed_official | 125:23cc3068a9e4 | 3104 | { |
| mbed_official | 125:23cc3068a9e4 | 3105 | output_bit = HRTIM_OENR_TB2OEN; |
| mbed_official | 125:23cc3068a9e4 | 3106 | } |
| mbed_official | 125:23cc3068a9e4 | 3107 | break; |
| mbed_official | 125:23cc3068a9e4 | 3108 | case HRTIM_OUTPUT_TC1: |
| mbed_official | 125:23cc3068a9e4 | 3109 | { |
| mbed_official | 125:23cc3068a9e4 | 3110 | output_bit = HRTIM_OENR_TC1OEN; |
| mbed_official | 125:23cc3068a9e4 | 3111 | } |
| mbed_official | 125:23cc3068a9e4 | 3112 | break; |
| mbed_official | 125:23cc3068a9e4 | 3113 | case HRTIM_OUTPUT_TC2: |
| mbed_official | 125:23cc3068a9e4 | 3114 | { |
| mbed_official | 125:23cc3068a9e4 | 3115 | output_bit = HRTIM_OENR_TC2OEN; |
| mbed_official | 125:23cc3068a9e4 | 3116 | } |
| mbed_official | 125:23cc3068a9e4 | 3117 | break; |
| mbed_official | 125:23cc3068a9e4 | 3118 | case HRTIM_OUTPUT_TD1: |
| mbed_official | 125:23cc3068a9e4 | 3119 | { |
| mbed_official | 125:23cc3068a9e4 | 3120 | output_bit = HRTIM_OENR_TD1OEN; |
| mbed_official | 125:23cc3068a9e4 | 3121 | } |
| mbed_official | 125:23cc3068a9e4 | 3122 | break; |
| mbed_official | 125:23cc3068a9e4 | 3123 | case HRTIM_OUTPUT_TD2: |
| mbed_official | 125:23cc3068a9e4 | 3124 | { |
| mbed_official | 125:23cc3068a9e4 | 3125 | output_bit = HRTIM_OENR_TD2OEN; |
| mbed_official | 125:23cc3068a9e4 | 3126 | } |
| mbed_official | 125:23cc3068a9e4 | 3127 | break; |
| mbed_official | 125:23cc3068a9e4 | 3128 | case HRTIM_OUTPUT_TE1: |
| mbed_official | 125:23cc3068a9e4 | 3129 | { |
| mbed_official | 125:23cc3068a9e4 | 3130 | output_bit = HRTIM_OENR_TE1OEN; |
| mbed_official | 125:23cc3068a9e4 | 3131 | } |
| mbed_official | 125:23cc3068a9e4 | 3132 | break; |
| mbed_official | 125:23cc3068a9e4 | 3133 | case HRTIM_OUTPUT_TE2: |
| mbed_official | 125:23cc3068a9e4 | 3134 | { |
| mbed_official | 125:23cc3068a9e4 | 3135 | output_bit = HRTIM_OENR_TE2OEN; |
| mbed_official | 125:23cc3068a9e4 | 3136 | } |
| mbed_official | 125:23cc3068a9e4 | 3137 | break; |
| mbed_official | 125:23cc3068a9e4 | 3138 | default: |
| mbed_official | 125:23cc3068a9e4 | 3139 | break; |
| mbed_official | 125:23cc3068a9e4 | 3140 | } |
| mbed_official | 125:23cc3068a9e4 | 3141 | |
| mbed_official | 125:23cc3068a9e4 | 3142 | if ((HRTIMx->HRTIM_COMMON.OENR & output_bit) != RESET) |
| mbed_official | 125:23cc3068a9e4 | 3143 | { |
| mbed_official | 125:23cc3068a9e4 | 3144 | /* Output is enabled: output in RUN state (whatever ouput disable status is)*/ |
| mbed_official | 125:23cc3068a9e4 | 3145 | output_state = HRTIM_OUTPUTSTATE_RUN; |
| mbed_official | 125:23cc3068a9e4 | 3146 | } |
| mbed_official | 125:23cc3068a9e4 | 3147 | else |
| mbed_official | 125:23cc3068a9e4 | 3148 | { |
| mbed_official | 125:23cc3068a9e4 | 3149 | if ((HRTIMx->HRTIM_COMMON.ODSR & output_bit) != RESET) |
| mbed_official | 125:23cc3068a9e4 | 3150 | { |
| mbed_official | 125:23cc3068a9e4 | 3151 | /* Output is disabled: output in FAULT state */ |
| mbed_official | 125:23cc3068a9e4 | 3152 | output_state = HRTIM_OUTPUTSTATE_FAULT; |
| mbed_official | 125:23cc3068a9e4 | 3153 | } |
| mbed_official | 125:23cc3068a9e4 | 3154 | else |
| mbed_official | 125:23cc3068a9e4 | 3155 | { |
| mbed_official | 125:23cc3068a9e4 | 3156 | /* Output is disabled: output in IDLE state */ |
| mbed_official | 125:23cc3068a9e4 | 3157 | output_state = HRTIM_OUTPUTSTATE_IDLE; |
| mbed_official | 125:23cc3068a9e4 | 3158 | } |
| mbed_official | 125:23cc3068a9e4 | 3159 | } |
| mbed_official | 125:23cc3068a9e4 | 3160 | |
| mbed_official | 125:23cc3068a9e4 | 3161 | return(output_state); |
| mbed_official | 125:23cc3068a9e4 | 3162 | } |
| mbed_official | 125:23cc3068a9e4 | 3163 | |
| mbed_official | 125:23cc3068a9e4 | 3164 | /** |
| mbed_official | 125:23cc3068a9e4 | 3165 | * @brief Returns the level (active or inactive) of the designated output |
| mbed_official | 125:23cc3068a9e4 | 3166 | * when the delayed protection was triggered |
| mbed_official | 125:23cc3068a9e4 | 3167 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3168 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3169 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 3170 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 3171 | * @param Output: Timer output |
| mbed_official | 125:23cc3068a9e4 | 3172 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 3173 | * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3174 | * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3175 | * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3176 | * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3177 | * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3178 | * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3179 | * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3180 | * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3181 | * @arg HRTIM_OUTPUT_TD1: Timer E - Output 1 |
| mbed_official | 125:23cc3068a9e4 | 3182 | * @arg HRTIM_OUTPUT_TD2: Timer E - Output 2 |
| mbed_official | 125:23cc3068a9e4 | 3183 | * @retval Delayed protection status |
| mbed_official | 125:23cc3068a9e4 | 3184 | */ |
| mbed_official | 125:23cc3068a9e4 | 3185 | uint32_t HRTIM_GetDelayedProtectionStatus(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3186 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 3187 | uint32_t Output) |
| mbed_official | 125:23cc3068a9e4 | 3188 | { |
| mbed_official | 125:23cc3068a9e4 | 3189 | uint32_t delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3190 | |
| mbed_official | 125:23cc3068a9e4 | 3191 | /* Check parameters */ |
| mbed_official | 125:23cc3068a9e4 | 3192 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
| mbed_official | 125:23cc3068a9e4 | 3193 | |
| mbed_official | 125:23cc3068a9e4 | 3194 | /* Read the delayed protection status */ |
| mbed_official | 125:23cc3068a9e4 | 3195 | switch (Output) |
| mbed_official | 125:23cc3068a9e4 | 3196 | { |
| mbed_official | 125:23cc3068a9e4 | 3197 | case HRTIM_OUTPUT_TA1: |
| mbed_official | 125:23cc3068a9e4 | 3198 | case HRTIM_OUTPUT_TB1: |
| mbed_official | 125:23cc3068a9e4 | 3199 | case HRTIM_OUTPUT_TC1: |
| mbed_official | 125:23cc3068a9e4 | 3200 | case HRTIM_OUTPUT_TD1: |
| mbed_official | 125:23cc3068a9e4 | 3201 | case HRTIM_OUTPUT_TE1: |
| mbed_official | 125:23cc3068a9e4 | 3202 | { |
| mbed_official | 125:23cc3068a9e4 | 3203 | if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_O1STAT) != RESET) |
| mbed_official | 125:23cc3068a9e4 | 3204 | { |
| mbed_official | 125:23cc3068a9e4 | 3205 | /* Output 1 was active when the delayed idle protection was triggered */ |
| mbed_official | 125:23cc3068a9e4 | 3206 | delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3207 | } |
| mbed_official | 125:23cc3068a9e4 | 3208 | else |
| mbed_official | 125:23cc3068a9e4 | 3209 | { |
| mbed_official | 125:23cc3068a9e4 | 3210 | /* Output 1 was inactive when the delayed idle protection was triggered */ |
| mbed_official | 125:23cc3068a9e4 | 3211 | delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3212 | } |
| mbed_official | 125:23cc3068a9e4 | 3213 | } |
| mbed_official | 125:23cc3068a9e4 | 3214 | break; |
| mbed_official | 125:23cc3068a9e4 | 3215 | case HRTIM_OUTPUT_TA2: |
| mbed_official | 125:23cc3068a9e4 | 3216 | case HRTIM_OUTPUT_TB2: |
| mbed_official | 125:23cc3068a9e4 | 3217 | case HRTIM_OUTPUT_TC2: |
| mbed_official | 125:23cc3068a9e4 | 3218 | case HRTIM_OUTPUT_TD2: |
| mbed_official | 125:23cc3068a9e4 | 3219 | case HRTIM_OUTPUT_TE2: |
| mbed_official | 125:23cc3068a9e4 | 3220 | { |
| mbed_official | 125:23cc3068a9e4 | 3221 | if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_O2STAT) != RESET) |
| mbed_official | 125:23cc3068a9e4 | 3222 | { |
| mbed_official | 125:23cc3068a9e4 | 3223 | /* Output 2 was active when the delayed idle protection was triggered */ |
| mbed_official | 125:23cc3068a9e4 | 3224 | delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3225 | } |
| mbed_official | 125:23cc3068a9e4 | 3226 | else |
| mbed_official | 125:23cc3068a9e4 | 3227 | { |
| mbed_official | 125:23cc3068a9e4 | 3228 | /* Output 2 was inactive when the delayed idle protection was triggered */ |
| mbed_official | 125:23cc3068a9e4 | 3229 | delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE; |
| mbed_official | 125:23cc3068a9e4 | 3230 | } |
| mbed_official | 125:23cc3068a9e4 | 3231 | } |
| mbed_official | 125:23cc3068a9e4 | 3232 | break; |
| mbed_official | 125:23cc3068a9e4 | 3233 | default: |
| mbed_official | 125:23cc3068a9e4 | 3234 | break; |
| mbed_official | 125:23cc3068a9e4 | 3235 | } |
| mbed_official | 125:23cc3068a9e4 | 3236 | |
| mbed_official | 125:23cc3068a9e4 | 3237 | return delayed_protection_status; |
| mbed_official | 125:23cc3068a9e4 | 3238 | } |
| mbed_official | 125:23cc3068a9e4 | 3239 | |
| mbed_official | 125:23cc3068a9e4 | 3240 | /** |
| mbed_official | 125:23cc3068a9e4 | 3241 | * @brief Returns the actual status (active or inactive) of the burst mode controller |
| mbed_official | 125:23cc3068a9e4 | 3242 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3243 | * @retval Burst mode controller status |
| mbed_official | 125:23cc3068a9e4 | 3244 | */ |
| mbed_official | 125:23cc3068a9e4 | 3245 | uint32_t HRTIM_GetBurstStatus(HRTIM_TypeDef * HRTIMx) |
| mbed_official | 125:23cc3068a9e4 | 3246 | { |
| mbed_official | 125:23cc3068a9e4 | 3247 | uint32_t burst_mode_status; |
| mbed_official | 125:23cc3068a9e4 | 3248 | |
| mbed_official | 125:23cc3068a9e4 | 3249 | /* Read burst mode status */ |
| mbed_official | 125:23cc3068a9e4 | 3250 | burst_mode_status = (HRTIMx->HRTIM_COMMON.BMCR & HRTIM_BMCR_BMSTAT); |
| mbed_official | 125:23cc3068a9e4 | 3251 | |
| mbed_official | 125:23cc3068a9e4 | 3252 | return burst_mode_status; |
| mbed_official | 125:23cc3068a9e4 | 3253 | } |
| mbed_official | 125:23cc3068a9e4 | 3254 | |
| mbed_official | 125:23cc3068a9e4 | 3255 | /** |
| mbed_official | 125:23cc3068a9e4 | 3256 | * @brief Indicates on which output the signal is currently active (when the |
| mbed_official | 125:23cc3068a9e4 | 3257 | * push pull mode is enabled) |
| mbed_official | 125:23cc3068a9e4 | 3258 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3259 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3260 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 3261 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 3262 | * @retval Burst mode controller status |
| mbed_official | 125:23cc3068a9e4 | 3263 | */ |
| mbed_official | 125:23cc3068a9e4 | 3264 | uint32_t HRTIM_GetCurrentPushPullStatus(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3265 | uint32_t TimerIdx) |
| mbed_official | 125:23cc3068a9e4 | 3266 | { |
| mbed_official | 125:23cc3068a9e4 | 3267 | uint32_t current_pushpull_status; |
| mbed_official | 125:23cc3068a9e4 | 3268 | |
| mbed_official | 125:23cc3068a9e4 | 3269 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 3270 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 3271 | |
| mbed_official | 125:23cc3068a9e4 | 3272 | /* Read current push pull status */ |
| mbed_official | 125:23cc3068a9e4 | 3273 | current_pushpull_status = (HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_CPPSTAT); |
| mbed_official | 125:23cc3068a9e4 | 3274 | |
| mbed_official | 125:23cc3068a9e4 | 3275 | return current_pushpull_status; |
| mbed_official | 125:23cc3068a9e4 | 3276 | } |
| mbed_official | 125:23cc3068a9e4 | 3277 | |
| mbed_official | 125:23cc3068a9e4 | 3278 | |
| mbed_official | 125:23cc3068a9e4 | 3279 | /** |
| mbed_official | 125:23cc3068a9e4 | 3280 | * @brief Indicates on which output the signal was applied, in push-pull mode |
| mbed_official | 125:23cc3068a9e4 | 3281 | balanced fault mode or delayed idle mode, when the protection was triggered |
| mbed_official | 125:23cc3068a9e4 | 3282 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3283 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3284 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 3285 | * @arg 0x0 to 0x4 for timers A to E |
| mbed_official | 125:23cc3068a9e4 | 3286 | * @retval Idle Push Pull Status |
| mbed_official | 125:23cc3068a9e4 | 3287 | */ |
| mbed_official | 125:23cc3068a9e4 | 3288 | uint32_t HRTIM_GetIdlePushPullStatus(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3289 | uint32_t TimerIdx) |
| mbed_official | 125:23cc3068a9e4 | 3290 | { |
| mbed_official | 125:23cc3068a9e4 | 3291 | uint32_t idle_pushpull_status; |
| mbed_official | 125:23cc3068a9e4 | 3292 | |
| mbed_official | 125:23cc3068a9e4 | 3293 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 3294 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| mbed_official | 125:23cc3068a9e4 | 3295 | |
| mbed_official | 125:23cc3068a9e4 | 3296 | /* Read current push pull status */ |
| mbed_official | 125:23cc3068a9e4 | 3297 | idle_pushpull_status = (HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_IPPSTAT); |
| mbed_official | 125:23cc3068a9e4 | 3298 | |
| mbed_official | 125:23cc3068a9e4 | 3299 | return idle_pushpull_status; |
| mbed_official | 125:23cc3068a9e4 | 3300 | } |
| mbed_official | 125:23cc3068a9e4 | 3301 | |
| mbed_official | 125:23cc3068a9e4 | 3302 | /** |
| mbed_official | 125:23cc3068a9e4 | 3303 | * @brief Configures the master timer time base |
| mbed_official | 125:23cc3068a9e4 | 3304 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3305 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 3306 | */ |
| mbed_official | 125:23cc3068a9e4 | 3307 | void HRTIM_MasterBase_Config(HRTIM_TypeDef * HRTIMx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct) |
| mbed_official | 125:23cc3068a9e4 | 3308 | { |
| mbed_official | 125:23cc3068a9e4 | 3309 | /* Set the prescaler ratio */ |
| mbed_official | 125:23cc3068a9e4 | 3310 | HRTIMx->HRTIM_MASTER.MCR &= (uint32_t) ~(HRTIM_MCR_CK_PSC); |
| mbed_official | 125:23cc3068a9e4 | 3311 | HRTIMx->HRTIM_MASTER.MCR |= (uint32_t)HRTIM_BaseInitStruct->PrescalerRatio; |
| mbed_official | 125:23cc3068a9e4 | 3312 | |
| mbed_official | 125:23cc3068a9e4 | 3313 | /* Set the operating mode */ |
| mbed_official | 125:23cc3068a9e4 | 3314 | HRTIMx->HRTIM_MASTER.MCR &= (uint32_t) ~(HRTIM_MCR_CONT | HRTIM_MCR_RETRIG); |
| mbed_official | 125:23cc3068a9e4 | 3315 | HRTIMx->HRTIM_MASTER.MCR |= (uint32_t)HRTIM_BaseInitStruct->Mode; |
| mbed_official | 125:23cc3068a9e4 | 3316 | |
| mbed_official | 125:23cc3068a9e4 | 3317 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 3318 | HRTIMx->HRTIM_MASTER.MPER = HRTIM_BaseInitStruct->Period; |
| mbed_official | 125:23cc3068a9e4 | 3319 | HRTIMx->HRTIM_MASTER.MREP = HRTIM_BaseInitStruct->RepetitionCounter; |
| mbed_official | 125:23cc3068a9e4 | 3320 | } |
| mbed_official | 125:23cc3068a9e4 | 3321 | |
| mbed_official | 125:23cc3068a9e4 | 3322 | /** |
| mbed_official | 125:23cc3068a9e4 | 3323 | * @brief Configures timing unit (timer A to timer E) time base |
| mbed_official | 125:23cc3068a9e4 | 3324 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3325 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3326 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 3327 | */ |
| mbed_official | 125:23cc3068a9e4 | 3328 | void HRTIM_TimingUnitBase_Config(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct) |
| mbed_official | 125:23cc3068a9e4 | 3329 | { |
| mbed_official | 125:23cc3068a9e4 | 3330 | /* Set the prescaler ratio */ |
| mbed_official | 125:23cc3068a9e4 | 3331 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR &= (uint32_t) ~(HRTIM_TIMCR_CK_PSC); |
| mbed_official | 125:23cc3068a9e4 | 3332 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR |= (uint32_t)HRTIM_BaseInitStruct->PrescalerRatio; |
| mbed_official | 125:23cc3068a9e4 | 3333 | |
| mbed_official | 125:23cc3068a9e4 | 3334 | /* Set the operating mode */ |
| mbed_official | 125:23cc3068a9e4 | 3335 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR &= (uint32_t) ~(HRTIM_TIMCR_CONT | HRTIM_TIMCR_RETRIG); |
| mbed_official | 125:23cc3068a9e4 | 3336 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR |= (uint32_t)HRTIM_BaseInitStruct->Mode; |
| mbed_official | 125:23cc3068a9e4 | 3337 | |
| mbed_official | 125:23cc3068a9e4 | 3338 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 3339 | HRTIMx->HRTIM_TIMERx[TimerIdx].PERxR = HRTIM_BaseInitStruct->Period; |
| mbed_official | 125:23cc3068a9e4 | 3340 | HRTIMx->HRTIM_TIMERx[TimerIdx].REPxR = HRTIM_BaseInitStruct->RepetitionCounter; |
| mbed_official | 125:23cc3068a9e4 | 3341 | } |
| mbed_official | 125:23cc3068a9e4 | 3342 | |
| mbed_official | 125:23cc3068a9e4 | 3343 | /** |
| mbed_official | 125:23cc3068a9e4 | 3344 | * @brief Configures the master timer in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 3345 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3346 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3347 | * @param pTimerInit: pointer to the timer initialization data structure |
| mbed_official | 125:23cc3068a9e4 | 3348 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 3349 | */ |
| mbed_official | 125:23cc3068a9e4 | 3350 | void HRTIM_MasterWaveform_Config(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3351 | HRTIM_TimerInitTypeDef * pTimerInit) |
| mbed_official | 125:23cc3068a9e4 | 3352 | { |
| mbed_official | 125:23cc3068a9e4 | 3353 | uint32_t HRTIM_mcr; |
| mbed_official | 125:23cc3068a9e4 | 3354 | uint32_t HRTIM_bmcr; |
| mbed_official | 125:23cc3068a9e4 | 3355 | |
| mbed_official | 125:23cc3068a9e4 | 3356 | /* Configure master timer */ |
| mbed_official | 125:23cc3068a9e4 | 3357 | HRTIM_mcr = HRTIMx->HRTIM_MASTER.MCR; |
| mbed_official | 125:23cc3068a9e4 | 3358 | HRTIM_bmcr = HRTIMx->HRTIM_COMMON.BMCR; |
| mbed_official | 125:23cc3068a9e4 | 3359 | |
| mbed_official | 125:23cc3068a9e4 | 3360 | /* Enable/Disable the half mode */ |
| mbed_official | 125:23cc3068a9e4 | 3361 | HRTIM_mcr &= ~(HRTIM_MCR_HALF); |
| mbed_official | 125:23cc3068a9e4 | 3362 | HRTIM_mcr |= pTimerInit->HalfModeEnable; |
| mbed_official | 125:23cc3068a9e4 | 3363 | |
| mbed_official | 125:23cc3068a9e4 | 3364 | /* Enable/Disable the timer start upon synchronization event reception */ |
| mbed_official | 125:23cc3068a9e4 | 3365 | HRTIM_mcr &= ~(HRTIM_MCR_SYNCSTRTM); |
| mbed_official | 125:23cc3068a9e4 | 3366 | HRTIM_mcr |= pTimerInit->StartOnSync; |
| mbed_official | 125:23cc3068a9e4 | 3367 | |
| mbed_official | 125:23cc3068a9e4 | 3368 | /* Enable/Disable the timer reset upon synchronization event reception */ |
| mbed_official | 125:23cc3068a9e4 | 3369 | HRTIM_mcr &= ~(HRTIM_MCR_SYNCRSTM); |
| mbed_official | 125:23cc3068a9e4 | 3370 | HRTIM_mcr |= pTimerInit->ResetOnSync; |
| mbed_official | 125:23cc3068a9e4 | 3371 | |
| mbed_official | 125:23cc3068a9e4 | 3372 | /* Enable/Disable the DAC synchronization event generation */ |
| mbed_official | 125:23cc3068a9e4 | 3373 | HRTIM_mcr &= ~(HRTIM_MCR_DACSYNC); |
| mbed_official | 125:23cc3068a9e4 | 3374 | HRTIM_mcr |= pTimerInit->DACSynchro; |
| mbed_official | 125:23cc3068a9e4 | 3375 | |
| mbed_official | 125:23cc3068a9e4 | 3376 | /* Enable/Disable preload mechanism for timer registers */ |
| mbed_official | 125:23cc3068a9e4 | 3377 | HRTIM_mcr &= ~(HRTIM_MCR_PREEN); |
| mbed_official | 125:23cc3068a9e4 | 3378 | HRTIM_mcr |= pTimerInit->PreloadEnable; |
| mbed_official | 125:23cc3068a9e4 | 3379 | |
| mbed_official | 125:23cc3068a9e4 | 3380 | /* Master timer registers update handling */ |
| mbed_official | 125:23cc3068a9e4 | 3381 | HRTIM_mcr &= ~(HRTIM_MCR_BRSTDMA); |
| mbed_official | 125:23cc3068a9e4 | 3382 | HRTIM_mcr |= (pTimerInit->UpdateGating << 2); |
| mbed_official | 125:23cc3068a9e4 | 3383 | |
| mbed_official | 125:23cc3068a9e4 | 3384 | /* Enable/Disable registers update on repetition */ |
| mbed_official | 125:23cc3068a9e4 | 3385 | HRTIM_mcr &= ~(HRTIM_MCR_MREPU); |
| mbed_official | 125:23cc3068a9e4 | 3386 | HRTIM_mcr |= pTimerInit->RepetitionUpdate; |
| mbed_official | 125:23cc3068a9e4 | 3387 | |
| mbed_official | 125:23cc3068a9e4 | 3388 | /* Set the timer burst mode */ |
| mbed_official | 125:23cc3068a9e4 | 3389 | HRTIM_bmcr &= ~(HRTIM_BMCR_MTBM); |
| mbed_official | 125:23cc3068a9e4 | 3390 | HRTIM_bmcr |= pTimerInit->BurstMode; |
| mbed_official | 125:23cc3068a9e4 | 3391 | |
| mbed_official | 125:23cc3068a9e4 | 3392 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 3393 | HRTIMx->HRTIM_MASTER.MCR = HRTIM_mcr; |
| mbed_official | 125:23cc3068a9e4 | 3394 | HRTIMx->HRTIM_COMMON.BMCR = HRTIM_bmcr; |
| mbed_official | 125:23cc3068a9e4 | 3395 | |
| mbed_official | 125:23cc3068a9e4 | 3396 | } |
| mbed_official | 125:23cc3068a9e4 | 3397 | |
| mbed_official | 125:23cc3068a9e4 | 3398 | /** |
| mbed_official | 125:23cc3068a9e4 | 3399 | * @brief Configures timing unit (timer A to timer E) in waveform mode |
| mbed_official | 125:23cc3068a9e4 | 3400 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3401 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3402 | * @param pTimerInit: pointer to the timer initialization data structure |
| mbed_official | 125:23cc3068a9e4 | 3403 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 3404 | */ |
| mbed_official | 125:23cc3068a9e4 | 3405 | void HRTIM_TimingUnitWaveform_Config(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3406 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 3407 | HRTIM_TimerInitTypeDef * pTimerInit) |
| mbed_official | 125:23cc3068a9e4 | 3408 | { |
| mbed_official | 125:23cc3068a9e4 | 3409 | uint32_t HRTIM_timcr; |
| mbed_official | 125:23cc3068a9e4 | 3410 | uint32_t HRTIM_bmcr; |
| mbed_official | 125:23cc3068a9e4 | 3411 | |
| mbed_official | 125:23cc3068a9e4 | 3412 | /* Configure timing unit */ |
| mbed_official | 125:23cc3068a9e4 | 3413 | HRTIM_timcr = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR; |
| mbed_official | 125:23cc3068a9e4 | 3414 | HRTIM_bmcr = HRTIMx->HRTIM_COMMON.BMCR; |
| mbed_official | 125:23cc3068a9e4 | 3415 | |
| mbed_official | 125:23cc3068a9e4 | 3416 | /* Enable/Disable the half mode */ |
| mbed_official | 125:23cc3068a9e4 | 3417 | HRTIM_timcr &= ~(HRTIM_TIMCR_HALF); |
| mbed_official | 125:23cc3068a9e4 | 3418 | HRTIM_timcr |= pTimerInit->HalfModeEnable; |
| mbed_official | 125:23cc3068a9e4 | 3419 | |
| mbed_official | 125:23cc3068a9e4 | 3420 | /* Enable/Disable the timer start upon synchronization event reception */ |
| mbed_official | 125:23cc3068a9e4 | 3421 | HRTIM_timcr &= ~(HRTIM_TIMCR_SYNCSTRT); |
| mbed_official | 125:23cc3068a9e4 | 3422 | HRTIM_timcr |= pTimerInit->StartOnSync; |
| mbed_official | 125:23cc3068a9e4 | 3423 | |
| mbed_official | 125:23cc3068a9e4 | 3424 | /* Enable/Disable the timer reset upon synchronization event reception */ |
| mbed_official | 125:23cc3068a9e4 | 3425 | HRTIM_timcr &= ~(HRTIM_TIMCR_SYNCRST); |
| mbed_official | 125:23cc3068a9e4 | 3426 | HRTIM_timcr |= pTimerInit->ResetOnSync; |
| mbed_official | 125:23cc3068a9e4 | 3427 | |
| mbed_official | 125:23cc3068a9e4 | 3428 | /* Enable/Disable the DAC synchronization event generation */ |
| mbed_official | 125:23cc3068a9e4 | 3429 | HRTIM_timcr &= ~(HRTIM_TIMCR_DACSYNC); |
| mbed_official | 125:23cc3068a9e4 | 3430 | HRTIM_timcr |= pTimerInit->DACSynchro; |
| mbed_official | 125:23cc3068a9e4 | 3431 | |
| mbed_official | 125:23cc3068a9e4 | 3432 | /* Enable/Disable preload mechanism for timer registers */ |
| mbed_official | 125:23cc3068a9e4 | 3433 | HRTIM_timcr &= ~(HRTIM_TIMCR_PREEN); |
| mbed_official | 125:23cc3068a9e4 | 3434 | HRTIM_timcr |= pTimerInit->PreloadEnable; |
| mbed_official | 125:23cc3068a9e4 | 3435 | |
| mbed_official | 125:23cc3068a9e4 | 3436 | /* Timing unit registers update handling */ |
| mbed_official | 125:23cc3068a9e4 | 3437 | HRTIM_timcr &= ~(HRTIM_TIMCR_UPDGAT); |
| mbed_official | 125:23cc3068a9e4 | 3438 | HRTIM_timcr |= pTimerInit->UpdateGating; |
| mbed_official | 125:23cc3068a9e4 | 3439 | |
| mbed_official | 125:23cc3068a9e4 | 3440 | /* Enable/Disable registers update on repetition */ |
| mbed_official | 125:23cc3068a9e4 | 3441 | HRTIM_timcr &= ~(HRTIM_TIMCR_TREPU); |
| mbed_official | 125:23cc3068a9e4 | 3442 | if (pTimerInit->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED) |
| mbed_official | 125:23cc3068a9e4 | 3443 | { |
| mbed_official | 125:23cc3068a9e4 | 3444 | HRTIM_timcr |= HRTIM_TIMCR_TREPU; |
| mbed_official | 125:23cc3068a9e4 | 3445 | } |
| mbed_official | 125:23cc3068a9e4 | 3446 | |
| mbed_official | 125:23cc3068a9e4 | 3447 | /* Set the timer burst mode */ |
| mbed_official | 125:23cc3068a9e4 | 3448 | switch (TimerIdx) |
| mbed_official | 125:23cc3068a9e4 | 3449 | { |
| mbed_official | 125:23cc3068a9e4 | 3450 | case HRTIM_TIMERINDEX_TIMER_A: |
| mbed_official | 125:23cc3068a9e4 | 3451 | { |
| mbed_official | 125:23cc3068a9e4 | 3452 | HRTIM_bmcr &= ~(HRTIM_BMCR_TABM); |
| mbed_official | 125:23cc3068a9e4 | 3453 | HRTIM_bmcr |= ( pTimerInit->BurstMode << 1); |
| mbed_official | 125:23cc3068a9e4 | 3454 | } |
| mbed_official | 125:23cc3068a9e4 | 3455 | break; |
| mbed_official | 125:23cc3068a9e4 | 3456 | case HRTIM_TIMERINDEX_TIMER_B: |
| mbed_official | 125:23cc3068a9e4 | 3457 | { |
| mbed_official | 125:23cc3068a9e4 | 3458 | HRTIM_bmcr &= ~(HRTIM_BMCR_TBBM); |
| mbed_official | 125:23cc3068a9e4 | 3459 | HRTIM_bmcr |= ( pTimerInit->BurstMode << 2); |
| mbed_official | 125:23cc3068a9e4 | 3460 | } |
| mbed_official | 125:23cc3068a9e4 | 3461 | break; |
| mbed_official | 125:23cc3068a9e4 | 3462 | case HRTIM_TIMERINDEX_TIMER_C: |
| mbed_official | 125:23cc3068a9e4 | 3463 | { |
| mbed_official | 125:23cc3068a9e4 | 3464 | HRTIM_bmcr &= ~(HRTIM_BMCR_TCBM); |
| mbed_official | 125:23cc3068a9e4 | 3465 | HRTIM_bmcr |= ( pTimerInit->BurstMode << 3); |
| mbed_official | 125:23cc3068a9e4 | 3466 | } |
| mbed_official | 125:23cc3068a9e4 | 3467 | break; |
| mbed_official | 125:23cc3068a9e4 | 3468 | case HRTIM_TIMERINDEX_TIMER_D: |
| mbed_official | 125:23cc3068a9e4 | 3469 | { |
| mbed_official | 125:23cc3068a9e4 | 3470 | HRTIM_bmcr &= ~(HRTIM_BMCR_TDBM); |
| mbed_official | 125:23cc3068a9e4 | 3471 | HRTIM_bmcr |= ( pTimerInit->BurstMode << 4); |
| mbed_official | 125:23cc3068a9e4 | 3472 | } |
| mbed_official | 125:23cc3068a9e4 | 3473 | break; |
| mbed_official | 125:23cc3068a9e4 | 3474 | case HRTIM_TIMERINDEX_TIMER_E: |
| mbed_official | 125:23cc3068a9e4 | 3475 | { |
| mbed_official | 125:23cc3068a9e4 | 3476 | HRTIM_bmcr &= ~(HRTIM_BMCR_TEBM); |
| mbed_official | 125:23cc3068a9e4 | 3477 | HRTIM_bmcr |= ( pTimerInit->BurstMode << 5); |
| mbed_official | 125:23cc3068a9e4 | 3478 | } |
| mbed_official | 125:23cc3068a9e4 | 3479 | break; |
| mbed_official | 125:23cc3068a9e4 | 3480 | default: |
| mbed_official | 125:23cc3068a9e4 | 3481 | break; |
| mbed_official | 125:23cc3068a9e4 | 3482 | } |
| mbed_official | 125:23cc3068a9e4 | 3483 | |
| mbed_official | 125:23cc3068a9e4 | 3484 | /* Update the HRTIMx registers */ |
| mbed_official | 125:23cc3068a9e4 | 3485 | HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR = HRTIM_timcr; |
| mbed_official | 125:23cc3068a9e4 | 3486 | HRTIMx->HRTIM_COMMON.BMCR = HRTIM_bmcr; |
| mbed_official | 125:23cc3068a9e4 | 3487 | } |
| mbed_official | 125:23cc3068a9e4 | 3488 | |
| mbed_official | 125:23cc3068a9e4 | 3489 | /** |
| mbed_official | 125:23cc3068a9e4 | 3490 | * @brief Configures a compare unit |
| mbed_official | 125:23cc3068a9e4 | 3491 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3492 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3493 | * @param CompareUnit: Compare unit identifier |
| mbed_official | 125:23cc3068a9e4 | 3494 | * @param pCompareCfg: pointer to the compare unit configuration data structure |
| mbed_official | 125:23cc3068a9e4 | 3495 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 3496 | */ |
| mbed_official | 125:23cc3068a9e4 | 3497 | void HRTIM_CompareUnitConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3498 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 3499 | uint32_t CompareUnit, |
| mbed_official | 125:23cc3068a9e4 | 3500 | HRTIM_CompareCfgTypeDef * pCompareCfg) |
| mbed_official | 125:23cc3068a9e4 | 3501 | { |
| mbed_official | 125:23cc3068a9e4 | 3502 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
| mbed_official | 125:23cc3068a9e4 | 3503 | { |
| mbed_official | 125:23cc3068a9e4 | 3504 | /* Configure the compare unit of the master timer */ |
| mbed_official | 125:23cc3068a9e4 | 3505 | switch (CompareUnit) |
| mbed_official | 125:23cc3068a9e4 | 3506 | { |
| mbed_official | 125:23cc3068a9e4 | 3507 | case HRTIM_COMPAREUNIT_1: |
| mbed_official | 125:23cc3068a9e4 | 3508 | { |
| mbed_official | 125:23cc3068a9e4 | 3509 | HRTIMx->HRTIM_MASTER.MCMP1R = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 3510 | } |
| mbed_official | 125:23cc3068a9e4 | 3511 | break; |
| mbed_official | 125:23cc3068a9e4 | 3512 | case HRTIM_COMPAREUNIT_2: |
| mbed_official | 125:23cc3068a9e4 | 3513 | { |
| mbed_official | 125:23cc3068a9e4 | 3514 | HRTIMx->HRTIM_MASTER.MCMP2R = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 3515 | } |
| mbed_official | 125:23cc3068a9e4 | 3516 | break; |
| mbed_official | 125:23cc3068a9e4 | 3517 | case HRTIM_COMPAREUNIT_3: |
| mbed_official | 125:23cc3068a9e4 | 3518 | { |
| mbed_official | 125:23cc3068a9e4 | 3519 | HRTIMx->HRTIM_MASTER.MCMP3R = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 3520 | } |
| mbed_official | 125:23cc3068a9e4 | 3521 | break; |
| mbed_official | 125:23cc3068a9e4 | 3522 | case HRTIM_COMPAREUNIT_4: |
| mbed_official | 125:23cc3068a9e4 | 3523 | { |
| mbed_official | 125:23cc3068a9e4 | 3524 | HRTIMx->HRTIM_MASTER.MCMP4R = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 3525 | } |
| mbed_official | 125:23cc3068a9e4 | 3526 | break; |
| mbed_official | 125:23cc3068a9e4 | 3527 | default: |
| mbed_official | 125:23cc3068a9e4 | 3528 | break; |
| mbed_official | 125:23cc3068a9e4 | 3529 | } |
| mbed_official | 125:23cc3068a9e4 | 3530 | } |
| mbed_official | 125:23cc3068a9e4 | 3531 | else |
| mbed_official | 125:23cc3068a9e4 | 3532 | { |
| mbed_official | 125:23cc3068a9e4 | 3533 | /* Configure the compare unit of the timing unit */ |
| mbed_official | 125:23cc3068a9e4 | 3534 | switch (CompareUnit) |
| mbed_official | 125:23cc3068a9e4 | 3535 | { |
| mbed_official | 125:23cc3068a9e4 | 3536 | case HRTIM_COMPAREUNIT_1: |
| mbed_official | 125:23cc3068a9e4 | 3537 | { |
| mbed_official | 125:23cc3068a9e4 | 3538 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP1xR = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 3539 | } |
| mbed_official | 125:23cc3068a9e4 | 3540 | break; |
| mbed_official | 125:23cc3068a9e4 | 3541 | case HRTIM_COMPAREUNIT_2: |
| mbed_official | 125:23cc3068a9e4 | 3542 | { |
| mbed_official | 125:23cc3068a9e4 | 3543 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP2xR = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 3544 | } |
| mbed_official | 125:23cc3068a9e4 | 3545 | break; |
| mbed_official | 125:23cc3068a9e4 | 3546 | case HRTIM_COMPAREUNIT_3: |
| mbed_official | 125:23cc3068a9e4 | 3547 | { |
| mbed_official | 125:23cc3068a9e4 | 3548 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP3xR = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 3549 | } |
| mbed_official | 125:23cc3068a9e4 | 3550 | break; |
| mbed_official | 125:23cc3068a9e4 | 3551 | case HRTIM_COMPAREUNIT_4: |
| mbed_official | 125:23cc3068a9e4 | 3552 | { |
| mbed_official | 125:23cc3068a9e4 | 3553 | HRTIMx->HRTIM_TIMERx[TimerIdx].CMP4xR = pCompareCfg->CompareValue; |
| mbed_official | 125:23cc3068a9e4 | 3554 | } |
| mbed_official | 125:23cc3068a9e4 | 3555 | break; |
| mbed_official | 125:23cc3068a9e4 | 3556 | default: |
| mbed_official | 125:23cc3068a9e4 | 3557 | break; |
| mbed_official | 125:23cc3068a9e4 | 3558 | } |
| mbed_official | 125:23cc3068a9e4 | 3559 | } |
| mbed_official | 125:23cc3068a9e4 | 3560 | } |
| mbed_official | 125:23cc3068a9e4 | 3561 | |
| mbed_official | 125:23cc3068a9e4 | 3562 | /** |
| mbed_official | 125:23cc3068a9e4 | 3563 | * @brief Configures a capture unit |
| mbed_official | 125:23cc3068a9e4 | 3564 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3565 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3566 | * @param CaptureUnit: Capture unit identifier |
| mbed_official | 125:23cc3068a9e4 | 3567 | * @param pCaptureCfg: pointer to the compare unit configuration data structure |
| mbed_official | 125:23cc3068a9e4 | 3568 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 3569 | */ |
| mbed_official | 125:23cc3068a9e4 | 3570 | void HRTIM_CaptureUnitConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3571 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 3572 | uint32_t CaptureUnit, |
| mbed_official | 125:23cc3068a9e4 | 3573 | uint32_t Event) |
| mbed_official | 125:23cc3068a9e4 | 3574 | { |
| mbed_official | 125:23cc3068a9e4 | 3575 | uint32_t CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1; |
| mbed_official | 125:23cc3068a9e4 | 3576 | |
| mbed_official | 125:23cc3068a9e4 | 3577 | switch (Event) |
| mbed_official | 125:23cc3068a9e4 | 3578 | { |
| mbed_official | 125:23cc3068a9e4 | 3579 | case HRTIM_EVENT_1: |
| mbed_official | 125:23cc3068a9e4 | 3580 | { |
| mbed_official | 125:23cc3068a9e4 | 3581 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1; |
| mbed_official | 125:23cc3068a9e4 | 3582 | } |
| mbed_official | 125:23cc3068a9e4 | 3583 | break; |
| mbed_official | 125:23cc3068a9e4 | 3584 | case HRTIM_EVENT_2: |
| mbed_official | 125:23cc3068a9e4 | 3585 | { |
| mbed_official | 125:23cc3068a9e4 | 3586 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_2; |
| mbed_official | 125:23cc3068a9e4 | 3587 | } |
| mbed_official | 125:23cc3068a9e4 | 3588 | break; |
| mbed_official | 125:23cc3068a9e4 | 3589 | case HRTIM_EVENT_3: |
| mbed_official | 125:23cc3068a9e4 | 3590 | { |
| mbed_official | 125:23cc3068a9e4 | 3591 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_3; |
| mbed_official | 125:23cc3068a9e4 | 3592 | } |
| mbed_official | 125:23cc3068a9e4 | 3593 | break; |
| mbed_official | 125:23cc3068a9e4 | 3594 | case HRTIM_EVENT_4: |
| mbed_official | 125:23cc3068a9e4 | 3595 | { |
| mbed_official | 125:23cc3068a9e4 | 3596 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_4; |
| mbed_official | 125:23cc3068a9e4 | 3597 | } |
| mbed_official | 125:23cc3068a9e4 | 3598 | break; |
| mbed_official | 125:23cc3068a9e4 | 3599 | case HRTIM_EVENT_5: |
| mbed_official | 125:23cc3068a9e4 | 3600 | { |
| mbed_official | 125:23cc3068a9e4 | 3601 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_5; |
| mbed_official | 125:23cc3068a9e4 | 3602 | } |
| mbed_official | 125:23cc3068a9e4 | 3603 | break; |
| mbed_official | 125:23cc3068a9e4 | 3604 | case HRTIM_EVENT_6: |
| mbed_official | 125:23cc3068a9e4 | 3605 | { |
| mbed_official | 125:23cc3068a9e4 | 3606 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_6; |
| mbed_official | 125:23cc3068a9e4 | 3607 | } |
| mbed_official | 125:23cc3068a9e4 | 3608 | break; |
| mbed_official | 125:23cc3068a9e4 | 3609 | case HRTIM_EVENT_7: |
| mbed_official | 125:23cc3068a9e4 | 3610 | { |
| mbed_official | 125:23cc3068a9e4 | 3611 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_7; |
| mbed_official | 125:23cc3068a9e4 | 3612 | } |
| mbed_official | 125:23cc3068a9e4 | 3613 | break; |
| mbed_official | 125:23cc3068a9e4 | 3614 | case HRTIM_EVENT_8: |
| mbed_official | 125:23cc3068a9e4 | 3615 | { |
| mbed_official | 125:23cc3068a9e4 | 3616 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_8; |
| mbed_official | 125:23cc3068a9e4 | 3617 | } |
| mbed_official | 125:23cc3068a9e4 | 3618 | break; |
| mbed_official | 125:23cc3068a9e4 | 3619 | case HRTIM_EVENT_9: |
| mbed_official | 125:23cc3068a9e4 | 3620 | { |
| mbed_official | 125:23cc3068a9e4 | 3621 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_9; |
| mbed_official | 125:23cc3068a9e4 | 3622 | } |
| mbed_official | 125:23cc3068a9e4 | 3623 | break; |
| mbed_official | 125:23cc3068a9e4 | 3624 | case HRTIM_EVENT_10: |
| mbed_official | 125:23cc3068a9e4 | 3625 | { |
| mbed_official | 125:23cc3068a9e4 | 3626 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_10; |
| mbed_official | 125:23cc3068a9e4 | 3627 | } |
| mbed_official | 125:23cc3068a9e4 | 3628 | break; |
| mbed_official | 125:23cc3068a9e4 | 3629 | default: |
| mbed_official | 125:23cc3068a9e4 | 3630 | break; |
| mbed_official | 125:23cc3068a9e4 | 3631 | |
| mbed_official | 125:23cc3068a9e4 | 3632 | } |
| mbed_official | 125:23cc3068a9e4 | 3633 | switch (CaptureUnit) |
| mbed_official | 125:23cc3068a9e4 | 3634 | { |
| mbed_official | 125:23cc3068a9e4 | 3635 | case HRTIM_CAPTUREUNIT_1: |
| mbed_official | 125:23cc3068a9e4 | 3636 | { |
| mbed_official | 125:23cc3068a9e4 | 3637 | HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR = CaptureTrigger; |
| mbed_official | 125:23cc3068a9e4 | 3638 | } |
| mbed_official | 125:23cc3068a9e4 | 3639 | break; |
| mbed_official | 125:23cc3068a9e4 | 3640 | case HRTIM_CAPTUREUNIT_2: |
| mbed_official | 125:23cc3068a9e4 | 3641 | { |
| mbed_official | 125:23cc3068a9e4 | 3642 | HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR = CaptureTrigger; |
| mbed_official | 125:23cc3068a9e4 | 3643 | } |
| mbed_official | 125:23cc3068a9e4 | 3644 | break; |
| mbed_official | 125:23cc3068a9e4 | 3645 | default: |
| mbed_official | 125:23cc3068a9e4 | 3646 | break; |
| mbed_official | 125:23cc3068a9e4 | 3647 | } |
| mbed_official | 125:23cc3068a9e4 | 3648 | } |
| mbed_official | 125:23cc3068a9e4 | 3649 | |
| mbed_official | 125:23cc3068a9e4 | 3650 | /** |
| mbed_official | 125:23cc3068a9e4 | 3651 | * @brief Configures the output of a timing unit |
| mbed_official | 125:23cc3068a9e4 | 3652 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3653 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3654 | * @param Output: timing unit output identifier |
| mbed_official | 125:23cc3068a9e4 | 3655 | * @param pOutputCfg: pointer to the output configuration data structure |
| mbed_official | 125:23cc3068a9e4 | 3656 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 3657 | */ |
| mbed_official | 125:23cc3068a9e4 | 3658 | void HRTIM_OutputConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3659 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 3660 | uint32_t Output, |
| mbed_official | 125:23cc3068a9e4 | 3661 | HRTIM_OutputCfgTypeDef * pOutputCfg) |
| mbed_official | 125:23cc3068a9e4 | 3662 | { |
| mbed_official | 125:23cc3068a9e4 | 3663 | uint32_t HRTIM_outr; |
| mbed_official | 125:23cc3068a9e4 | 3664 | uint32_t shift = 0; |
| mbed_official | 125:23cc3068a9e4 | 3665 | |
| mbed_official | 125:23cc3068a9e4 | 3666 | HRTIM_outr = HRTIMx->HRTIM_TIMERx[TimerIdx].OUTxR; |
| mbed_official | 125:23cc3068a9e4 | 3667 | |
| mbed_official | 125:23cc3068a9e4 | 3668 | switch (Output) |
| mbed_official | 125:23cc3068a9e4 | 3669 | { |
| mbed_official | 125:23cc3068a9e4 | 3670 | case HRTIM_OUTPUT_TA1: |
| mbed_official | 125:23cc3068a9e4 | 3671 | case HRTIM_OUTPUT_TB1: |
| mbed_official | 125:23cc3068a9e4 | 3672 | case HRTIM_OUTPUT_TC1: |
| mbed_official | 125:23cc3068a9e4 | 3673 | case HRTIM_OUTPUT_TD1: |
| mbed_official | 125:23cc3068a9e4 | 3674 | case HRTIM_OUTPUT_TE1: |
| mbed_official | 125:23cc3068a9e4 | 3675 | { |
| mbed_official | 125:23cc3068a9e4 | 3676 | /* Set the output set/reset crossbar */ |
| mbed_official | 125:23cc3068a9e4 | 3677 | HRTIMx->HRTIM_TIMERx[TimerIdx].SETx1R = pOutputCfg->SetSource; |
| mbed_official | 125:23cc3068a9e4 | 3678 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTx1R = pOutputCfg->ResetSource; |
| mbed_official | 125:23cc3068a9e4 | 3679 | |
| mbed_official | 125:23cc3068a9e4 | 3680 | shift = 0; |
| mbed_official | 125:23cc3068a9e4 | 3681 | } |
| mbed_official | 125:23cc3068a9e4 | 3682 | break; |
| mbed_official | 125:23cc3068a9e4 | 3683 | case HRTIM_OUTPUT_TA2: |
| mbed_official | 125:23cc3068a9e4 | 3684 | case HRTIM_OUTPUT_TB2: |
| mbed_official | 125:23cc3068a9e4 | 3685 | case HRTIM_OUTPUT_TC2: |
| mbed_official | 125:23cc3068a9e4 | 3686 | case HRTIM_OUTPUT_TD2: |
| mbed_official | 125:23cc3068a9e4 | 3687 | case HRTIM_OUTPUT_TE2: |
| mbed_official | 125:23cc3068a9e4 | 3688 | { |
| mbed_official | 125:23cc3068a9e4 | 3689 | /* Set the output set/reset crossbar */ |
| mbed_official | 125:23cc3068a9e4 | 3690 | HRTIMx->HRTIM_TIMERx[TimerIdx].SETx2R = pOutputCfg->SetSource; |
| mbed_official | 125:23cc3068a9e4 | 3691 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTx2R = pOutputCfg->ResetSource; |
| mbed_official | 125:23cc3068a9e4 | 3692 | |
| mbed_official | 125:23cc3068a9e4 | 3693 | shift = 16; |
| mbed_official | 125:23cc3068a9e4 | 3694 | } |
| mbed_official | 125:23cc3068a9e4 | 3695 | break; |
| mbed_official | 125:23cc3068a9e4 | 3696 | default: |
| mbed_official | 125:23cc3068a9e4 | 3697 | break; |
| mbed_official | 125:23cc3068a9e4 | 3698 | } |
| mbed_official | 125:23cc3068a9e4 | 3699 | |
| mbed_official | 125:23cc3068a9e4 | 3700 | /* Clear output config */ |
| mbed_official | 125:23cc3068a9e4 | 3701 | HRTIM_outr &= ~((HRTIM_OUTR_POL1 | |
| mbed_official | 125:23cc3068a9e4 | 3702 | HRTIM_OUTR_IDLM1 | |
| mbed_official | 125:23cc3068a9e4 | 3703 | HRTIM_OUTR_IDLES1| |
| mbed_official | 125:23cc3068a9e4 | 3704 | HRTIM_OUTR_FAULT1| |
| mbed_official | 125:23cc3068a9e4 | 3705 | HRTIM_OUTR_CHP1 | |
| mbed_official | 125:23cc3068a9e4 | 3706 | HRTIM_OUTR_DIDL1) << shift); |
| mbed_official | 125:23cc3068a9e4 | 3707 | |
| mbed_official | 125:23cc3068a9e4 | 3708 | /* Set the polarity */ |
| mbed_official | 125:23cc3068a9e4 | 3709 | HRTIM_outr |= (pOutputCfg->Polarity << shift); |
| mbed_official | 125:23cc3068a9e4 | 3710 | |
| mbed_official | 125:23cc3068a9e4 | 3711 | /* Set the IDLE mode */ |
| mbed_official | 125:23cc3068a9e4 | 3712 | HRTIM_outr |= (pOutputCfg->IdleMode << shift); |
| mbed_official | 125:23cc3068a9e4 | 3713 | |
| mbed_official | 125:23cc3068a9e4 | 3714 | /* Set the IDLE state */ |
| mbed_official | 125:23cc3068a9e4 | 3715 | HRTIM_outr |= (pOutputCfg->IdleState << shift); |
| mbed_official | 125:23cc3068a9e4 | 3716 | |
| mbed_official | 125:23cc3068a9e4 | 3717 | /* Set the FAULT state */ |
| mbed_official | 125:23cc3068a9e4 | 3718 | HRTIM_outr |= (pOutputCfg->FaultState << shift); |
| mbed_official | 125:23cc3068a9e4 | 3719 | |
| mbed_official | 125:23cc3068a9e4 | 3720 | /* Set the chopper mode */ |
| mbed_official | 125:23cc3068a9e4 | 3721 | HRTIM_outr |= (pOutputCfg->ChopperModeEnable << shift); |
| mbed_official | 125:23cc3068a9e4 | 3722 | |
| mbed_official | 125:23cc3068a9e4 | 3723 | /* Set the burst mode entry mode */ |
| mbed_official | 125:23cc3068a9e4 | 3724 | HRTIM_outr |= (pOutputCfg->BurstModeEntryDelayed << shift); |
| mbed_official | 125:23cc3068a9e4 | 3725 | |
| mbed_official | 125:23cc3068a9e4 | 3726 | /* Update HRTIMx register */ |
| mbed_official | 125:23cc3068a9e4 | 3727 | HRTIMx->HRTIM_TIMERx[TimerIdx].OUTxR = HRTIM_outr; |
| mbed_official | 125:23cc3068a9e4 | 3728 | } |
| mbed_official | 125:23cc3068a9e4 | 3729 | |
| mbed_official | 125:23cc3068a9e4 | 3730 | /** |
| mbed_official | 125:23cc3068a9e4 | 3731 | * @brief Configures an external event channel |
| mbed_official | 125:23cc3068a9e4 | 3732 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3733 | * @param Event: Event channel identifier |
| mbed_official | 125:23cc3068a9e4 | 3734 | * @param pEventCfg: pointer to the event channel configuration data structure |
| mbed_official | 125:23cc3068a9e4 | 3735 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 3736 | */ |
| mbed_official | 125:23cc3068a9e4 | 3737 | static void HRTIM_ExternalEventConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3738 | uint32_t Event, |
| mbed_official | 125:23cc3068a9e4 | 3739 | HRTIM_EventCfgTypeDef *pEventCfg) |
| mbed_official | 125:23cc3068a9e4 | 3740 | { |
| mbed_official | 125:23cc3068a9e4 | 3741 | uint32_t hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3742 | uint32_t hrtim_eecr2; |
| mbed_official | 125:23cc3068a9e4 | 3743 | uint32_t hrtim_eecr3; |
| mbed_official | 125:23cc3068a9e4 | 3744 | |
| mbed_official | 125:23cc3068a9e4 | 3745 | /* Configure external event channel */ |
| mbed_official | 125:23cc3068a9e4 | 3746 | hrtim_eecr1 = HRTIMx->HRTIM_COMMON.EECR1; |
| mbed_official | 125:23cc3068a9e4 | 3747 | hrtim_eecr2 = HRTIMx->HRTIM_COMMON.EECR2; |
| mbed_official | 125:23cc3068a9e4 | 3748 | hrtim_eecr3 = HRTIMx->HRTIM_COMMON.EECR3; |
| mbed_official | 125:23cc3068a9e4 | 3749 | |
| mbed_official | 125:23cc3068a9e4 | 3750 | switch (Event) |
| mbed_official | 125:23cc3068a9e4 | 3751 | { |
| mbed_official | 125:23cc3068a9e4 | 3752 | case HRTIM_EVENT_1: |
| mbed_official | 125:23cc3068a9e4 | 3753 | { |
| mbed_official | 125:23cc3068a9e4 | 3754 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE1SRC | HRTIM_EECR1_EE1POL | HRTIM_EECR1_EE1SNS | HRTIM_EECR1_EE1FAST); |
| mbed_official | 125:23cc3068a9e4 | 3755 | hrtim_eecr1 |= pEventCfg->Source; |
| mbed_official | 125:23cc3068a9e4 | 3756 | hrtim_eecr1 |= pEventCfg->Polarity; |
| mbed_official | 125:23cc3068a9e4 | 3757 | hrtim_eecr1 |= pEventCfg->Sensitivity; |
| mbed_official | 125:23cc3068a9e4 | 3758 | /* Update the HRTIM registers (all bit fields but EE1FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3759 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3760 | /* Update the HRTIM registers (EE1FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3761 | hrtim_eecr1 |= pEventCfg->FastMode; |
| mbed_official | 125:23cc3068a9e4 | 3762 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3763 | } |
| mbed_official | 125:23cc3068a9e4 | 3764 | break; |
| mbed_official | 125:23cc3068a9e4 | 3765 | case HRTIM_EVENT_2: |
| mbed_official | 125:23cc3068a9e4 | 3766 | { |
| mbed_official | 125:23cc3068a9e4 | 3767 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE2SRC | HRTIM_EECR1_EE2POL | HRTIM_EECR1_EE2SNS | HRTIM_EECR1_EE2FAST); |
| mbed_official | 125:23cc3068a9e4 | 3768 | hrtim_eecr1 |= (pEventCfg->Source << 6); |
| mbed_official | 125:23cc3068a9e4 | 3769 | hrtim_eecr1 |= (pEventCfg->Polarity << 6); |
| mbed_official | 125:23cc3068a9e4 | 3770 | hrtim_eecr1 |= (pEventCfg->Sensitivity << 6); |
| mbed_official | 125:23cc3068a9e4 | 3771 | /* Update the HRTIM registers (all bit fields but EE2FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3772 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3773 | /* Update the HRTIM registers (EE2FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3774 | hrtim_eecr1 |= (pEventCfg->FastMode << 6); |
| mbed_official | 125:23cc3068a9e4 | 3775 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3776 | } |
| mbed_official | 125:23cc3068a9e4 | 3777 | break; |
| mbed_official | 125:23cc3068a9e4 | 3778 | case HRTIM_EVENT_3: |
| mbed_official | 125:23cc3068a9e4 | 3779 | { |
| mbed_official | 125:23cc3068a9e4 | 3780 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE3SRC | HRTIM_EECR1_EE3POL | HRTIM_EECR1_EE3SNS | HRTIM_EECR1_EE3FAST); |
| mbed_official | 125:23cc3068a9e4 | 3781 | hrtim_eecr1 |= (pEventCfg->Source << 12); |
| mbed_official | 125:23cc3068a9e4 | 3782 | hrtim_eecr1 |= (pEventCfg->Polarity << 12); |
| mbed_official | 125:23cc3068a9e4 | 3783 | hrtim_eecr1 |= (pEventCfg->Sensitivity << 12); |
| mbed_official | 125:23cc3068a9e4 | 3784 | /* Update the HRTIM registers (all bit fields but EE3FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3785 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3786 | /* Update the HRTIM registers (EE3FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3787 | hrtim_eecr1 |= (pEventCfg->FastMode << 12); |
| mbed_official | 125:23cc3068a9e4 | 3788 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3789 | } |
| mbed_official | 125:23cc3068a9e4 | 3790 | break; |
| mbed_official | 125:23cc3068a9e4 | 3791 | case HRTIM_EVENT_4: |
| mbed_official | 125:23cc3068a9e4 | 3792 | { |
| mbed_official | 125:23cc3068a9e4 | 3793 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE4SRC | HRTIM_EECR1_EE4POL | HRTIM_EECR1_EE4SNS | HRTIM_EECR1_EE4FAST); |
| mbed_official | 125:23cc3068a9e4 | 3794 | hrtim_eecr1 |= (pEventCfg->Source << 18); |
| mbed_official | 125:23cc3068a9e4 | 3795 | hrtim_eecr1 |= (pEventCfg->Polarity << 18); |
| mbed_official | 125:23cc3068a9e4 | 3796 | hrtim_eecr1 |= (pEventCfg->Sensitivity << 18); |
| mbed_official | 125:23cc3068a9e4 | 3797 | /* Update the HRTIM registers (all bit fields but EE4FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3798 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3799 | /* Update the HRTIM registers (EE4FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3800 | hrtim_eecr1 |= (pEventCfg->FastMode << 18); |
| mbed_official | 125:23cc3068a9e4 | 3801 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3802 | } |
| mbed_official | 125:23cc3068a9e4 | 3803 | break; |
| mbed_official | 125:23cc3068a9e4 | 3804 | case HRTIM_EVENT_5: |
| mbed_official | 125:23cc3068a9e4 | 3805 | { |
| mbed_official | 125:23cc3068a9e4 | 3806 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE5SRC | HRTIM_EECR1_EE5POL | HRTIM_EECR1_EE5SNS | HRTIM_EECR1_EE5FAST); |
| mbed_official | 125:23cc3068a9e4 | 3807 | hrtim_eecr1 |= (pEventCfg->Source << 24); |
| mbed_official | 125:23cc3068a9e4 | 3808 | hrtim_eecr1 |= (pEventCfg->Polarity << 24); |
| mbed_official | 125:23cc3068a9e4 | 3809 | hrtim_eecr1 |= (pEventCfg->Sensitivity << 24); |
| mbed_official | 125:23cc3068a9e4 | 3810 | /* Update the HRTIM registers (all bit fields but EE5FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3811 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3812 | /* Update the HRTIM registers (EE5FAST bit) */ |
| mbed_official | 125:23cc3068a9e4 | 3813 | hrtim_eecr1 |= (pEventCfg->FastMode << 24); |
| mbed_official | 125:23cc3068a9e4 | 3814 | HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1; |
| mbed_official | 125:23cc3068a9e4 | 3815 | } |
| mbed_official | 125:23cc3068a9e4 | 3816 | break; |
| mbed_official | 125:23cc3068a9e4 | 3817 | case HRTIM_EVENT_6: |
| mbed_official | 125:23cc3068a9e4 | 3818 | { |
| mbed_official | 125:23cc3068a9e4 | 3819 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE6SRC | HRTIM_EECR2_EE6POL | HRTIM_EECR2_EE6SNS); |
| mbed_official | 125:23cc3068a9e4 | 3820 | hrtim_eecr2 |= pEventCfg->Source; |
| mbed_official | 125:23cc3068a9e4 | 3821 | hrtim_eecr2 |= pEventCfg->Polarity; |
| mbed_official | 125:23cc3068a9e4 | 3822 | hrtim_eecr2 |= pEventCfg->Sensitivity; |
| mbed_official | 125:23cc3068a9e4 | 3823 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE6F); |
| mbed_official | 125:23cc3068a9e4 | 3824 | hrtim_eecr3 |= pEventCfg->Filter; |
| mbed_official | 125:23cc3068a9e4 | 3825 | /* Update the HRTIM registers */ |
| mbed_official | 125:23cc3068a9e4 | 3826 | HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2; |
| mbed_official | 125:23cc3068a9e4 | 3827 | HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3; |
| mbed_official | 125:23cc3068a9e4 | 3828 | } |
| mbed_official | 125:23cc3068a9e4 | 3829 | break; |
| mbed_official | 125:23cc3068a9e4 | 3830 | case HRTIM_EVENT_7: |
| mbed_official | 125:23cc3068a9e4 | 3831 | { |
| mbed_official | 125:23cc3068a9e4 | 3832 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE7SRC | HRTIM_EECR2_EE7POL | HRTIM_EECR2_EE7SNS); |
| mbed_official | 125:23cc3068a9e4 | 3833 | hrtim_eecr2 |= (pEventCfg->Source << 6); |
| mbed_official | 125:23cc3068a9e4 | 3834 | hrtim_eecr2 |= (pEventCfg->Polarity << 6); |
| mbed_official | 125:23cc3068a9e4 | 3835 | hrtim_eecr2 |= (pEventCfg->Sensitivity << 6); |
| mbed_official | 125:23cc3068a9e4 | 3836 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE7F); |
| mbed_official | 125:23cc3068a9e4 | 3837 | hrtim_eecr3 |= (pEventCfg->Filter << 6); |
| mbed_official | 125:23cc3068a9e4 | 3838 | /* Update the HRTIM registers */ |
| mbed_official | 125:23cc3068a9e4 | 3839 | HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2; |
| mbed_official | 125:23cc3068a9e4 | 3840 | HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3; |
| mbed_official | 125:23cc3068a9e4 | 3841 | } |
| mbed_official | 125:23cc3068a9e4 | 3842 | break; |
| mbed_official | 125:23cc3068a9e4 | 3843 | case HRTIM_EVENT_8: |
| mbed_official | 125:23cc3068a9e4 | 3844 | { |
| mbed_official | 125:23cc3068a9e4 | 3845 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE8SRC | HRTIM_EECR2_EE8POL | HRTIM_EECR2_EE8SNS); |
| mbed_official | 125:23cc3068a9e4 | 3846 | hrtim_eecr2 |= (pEventCfg->Source << 12); |
| mbed_official | 125:23cc3068a9e4 | 3847 | hrtim_eecr2 |= (pEventCfg->Polarity << 12); |
| mbed_official | 125:23cc3068a9e4 | 3848 | hrtim_eecr2 |= (pEventCfg->Sensitivity << 12); |
| mbed_official | 125:23cc3068a9e4 | 3849 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE8F); |
| mbed_official | 125:23cc3068a9e4 | 3850 | hrtim_eecr3 |= (pEventCfg->Filter << 12); |
| mbed_official | 125:23cc3068a9e4 | 3851 | /* Update the HRTIM registers */ |
| mbed_official | 125:23cc3068a9e4 | 3852 | HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2; |
| mbed_official | 125:23cc3068a9e4 | 3853 | HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3; |
| mbed_official | 125:23cc3068a9e4 | 3854 | } |
| mbed_official | 125:23cc3068a9e4 | 3855 | break; |
| mbed_official | 125:23cc3068a9e4 | 3856 | case HRTIM_EVENT_9: |
| mbed_official | 125:23cc3068a9e4 | 3857 | { |
| mbed_official | 125:23cc3068a9e4 | 3858 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE9SRC | HRTIM_EECR2_EE9POL | HRTIM_EECR2_EE9SNS); |
| mbed_official | 125:23cc3068a9e4 | 3859 | hrtim_eecr2 |= (pEventCfg->Source << 18); |
| mbed_official | 125:23cc3068a9e4 | 3860 | hrtim_eecr2 |= (pEventCfg->Polarity << 18); |
| mbed_official | 125:23cc3068a9e4 | 3861 | hrtim_eecr2 |= (pEventCfg->Sensitivity << 18); |
| mbed_official | 125:23cc3068a9e4 | 3862 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE9F); |
| mbed_official | 125:23cc3068a9e4 | 3863 | hrtim_eecr3 |= (pEventCfg->Filter << 18); |
| mbed_official | 125:23cc3068a9e4 | 3864 | /* Update the HRTIM registers */ |
| mbed_official | 125:23cc3068a9e4 | 3865 | HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2; |
| mbed_official | 125:23cc3068a9e4 | 3866 | HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3; |
| mbed_official | 125:23cc3068a9e4 | 3867 | } |
| mbed_official | 125:23cc3068a9e4 | 3868 | break; |
| mbed_official | 125:23cc3068a9e4 | 3869 | case HRTIM_EVENT_10: |
| mbed_official | 125:23cc3068a9e4 | 3870 | { |
| mbed_official | 125:23cc3068a9e4 | 3871 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE10SRC | HRTIM_EECR2_EE10POL | HRTIM_EECR2_EE10SNS); |
| mbed_official | 125:23cc3068a9e4 | 3872 | hrtim_eecr2 |= (pEventCfg->Source << 24); |
| mbed_official | 125:23cc3068a9e4 | 3873 | hrtim_eecr2 |= (pEventCfg->Polarity << 24); |
| mbed_official | 125:23cc3068a9e4 | 3874 | hrtim_eecr2 |= (pEventCfg->Sensitivity << 24); |
| mbed_official | 125:23cc3068a9e4 | 3875 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE10F); |
| mbed_official | 125:23cc3068a9e4 | 3876 | hrtim_eecr3 |= (pEventCfg->Filter << 24); |
| mbed_official | 125:23cc3068a9e4 | 3877 | /* Update the HRTIM registers */ |
| mbed_official | 125:23cc3068a9e4 | 3878 | HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2; |
| mbed_official | 125:23cc3068a9e4 | 3879 | HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3; |
| mbed_official | 125:23cc3068a9e4 | 3880 | } |
| mbed_official | 125:23cc3068a9e4 | 3881 | break; |
| mbed_official | 125:23cc3068a9e4 | 3882 | default: |
| mbed_official | 125:23cc3068a9e4 | 3883 | break; |
| mbed_official | 125:23cc3068a9e4 | 3884 | } |
| mbed_official | 125:23cc3068a9e4 | 3885 | } |
| mbed_official | 125:23cc3068a9e4 | 3886 | |
| mbed_official | 125:23cc3068a9e4 | 3887 | /** |
| mbed_official | 125:23cc3068a9e4 | 3888 | * @brief Configures the timer counter reset |
| mbed_official | 125:23cc3068a9e4 | 3889 | * @param HRTIMx: pointer to HRTIMx peripheral |
| mbed_official | 125:23cc3068a9e4 | 3890 | * @param TimerIdx: Timer index |
| mbed_official | 125:23cc3068a9e4 | 3891 | * @param Event: Event channel identifier |
| mbed_official | 125:23cc3068a9e4 | 3892 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 3893 | */ |
| mbed_official | 125:23cc3068a9e4 | 3894 | void HRTIM_TIM_ResetConfig(HRTIM_TypeDef * HRTIMx, |
| mbed_official | 125:23cc3068a9e4 | 3895 | uint32_t TimerIdx, |
| mbed_official | 125:23cc3068a9e4 | 3896 | uint32_t Event) |
| mbed_official | 125:23cc3068a9e4 | 3897 | { |
| mbed_official | 125:23cc3068a9e4 | 3898 | switch (Event) |
| mbed_official | 125:23cc3068a9e4 | 3899 | { |
| mbed_official | 125:23cc3068a9e4 | 3900 | case HRTIM_EVENT_1: |
| mbed_official | 125:23cc3068a9e4 | 3901 | { |
| mbed_official | 125:23cc3068a9e4 | 3902 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_1; |
| mbed_official | 125:23cc3068a9e4 | 3903 | } |
| mbed_official | 125:23cc3068a9e4 | 3904 | break; |
| mbed_official | 125:23cc3068a9e4 | 3905 | case HRTIM_EVENT_2: |
| mbed_official | 125:23cc3068a9e4 | 3906 | { |
| mbed_official | 125:23cc3068a9e4 | 3907 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_2; |
| mbed_official | 125:23cc3068a9e4 | 3908 | } |
| mbed_official | 125:23cc3068a9e4 | 3909 | break; |
| mbed_official | 125:23cc3068a9e4 | 3910 | case HRTIM_EVENT_3: |
| mbed_official | 125:23cc3068a9e4 | 3911 | { |
| mbed_official | 125:23cc3068a9e4 | 3912 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_3; |
| mbed_official | 125:23cc3068a9e4 | 3913 | } |
| mbed_official | 125:23cc3068a9e4 | 3914 | break; |
| mbed_official | 125:23cc3068a9e4 | 3915 | case HRTIM_EVENT_4: |
| mbed_official | 125:23cc3068a9e4 | 3916 | { |
| mbed_official | 125:23cc3068a9e4 | 3917 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_4; |
| mbed_official | 125:23cc3068a9e4 | 3918 | } |
| mbed_official | 125:23cc3068a9e4 | 3919 | break; |
| mbed_official | 125:23cc3068a9e4 | 3920 | case HRTIM_EVENT_5: |
| mbed_official | 125:23cc3068a9e4 | 3921 | { |
| mbed_official | 125:23cc3068a9e4 | 3922 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_5; |
| mbed_official | 125:23cc3068a9e4 | 3923 | } |
| mbed_official | 125:23cc3068a9e4 | 3924 | break; |
| mbed_official | 125:23cc3068a9e4 | 3925 | case HRTIM_EVENT_6: |
| mbed_official | 125:23cc3068a9e4 | 3926 | { |
| mbed_official | 125:23cc3068a9e4 | 3927 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_6; |
| mbed_official | 125:23cc3068a9e4 | 3928 | } |
| mbed_official | 125:23cc3068a9e4 | 3929 | break; |
| mbed_official | 125:23cc3068a9e4 | 3930 | case HRTIM_EVENT_7: |
| mbed_official | 125:23cc3068a9e4 | 3931 | { |
| mbed_official | 125:23cc3068a9e4 | 3932 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_7; |
| mbed_official | 125:23cc3068a9e4 | 3933 | } |
| mbed_official | 125:23cc3068a9e4 | 3934 | break; |
| mbed_official | 125:23cc3068a9e4 | 3935 | case HRTIM_EVENT_8: |
| mbed_official | 125:23cc3068a9e4 | 3936 | { |
| mbed_official | 125:23cc3068a9e4 | 3937 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_8; |
| mbed_official | 125:23cc3068a9e4 | 3938 | } |
| mbed_official | 125:23cc3068a9e4 | 3939 | break; |
| mbed_official | 125:23cc3068a9e4 | 3940 | case HRTIM_EVENT_9: |
| mbed_official | 125:23cc3068a9e4 | 3941 | { |
| mbed_official | 125:23cc3068a9e4 | 3942 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_9; |
| mbed_official | 125:23cc3068a9e4 | 3943 | } |
| mbed_official | 125:23cc3068a9e4 | 3944 | break; |
| mbed_official | 125:23cc3068a9e4 | 3945 | case HRTIM_EVENT_10: |
| mbed_official | 125:23cc3068a9e4 | 3946 | { |
| mbed_official | 125:23cc3068a9e4 | 3947 | HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_10; |
| mbed_official | 125:23cc3068a9e4 | 3948 | } |
| mbed_official | 125:23cc3068a9e4 | 3949 | break; |
| mbed_official | 125:23cc3068a9e4 | 3950 | default: |
| mbed_official | 125:23cc3068a9e4 | 3951 | break; |
| mbed_official | 125:23cc3068a9e4 | 3952 | } |
| mbed_official | 125:23cc3068a9e4 | 3953 | } |
| mbed_official | 125:23cc3068a9e4 | 3954 | /** |
| mbed_official | 125:23cc3068a9e4 | 3955 | * @} |
| mbed_official | 125:23cc3068a9e4 | 3956 | */ |
| mbed_official | 125:23cc3068a9e4 | 3957 | /** |
| mbed_official | 125:23cc3068a9e4 | 3958 | * @} |
| mbed_official | 125:23cc3068a9e4 | 3959 | */ |
| mbed_official | 125:23cc3068a9e4 | 3960 | |
| mbed_official | 125:23cc3068a9e4 | 3961 | /** |
| mbed_official | 125:23cc3068a9e4 | 3962 | * @} |
| mbed_official | 125:23cc3068a9e4 | 3963 | */ |
| mbed_official | 125:23cc3068a9e4 | 3964 | |
| mbed_official | 125:23cc3068a9e4 | 3965 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| mbed_official | 125:23cc3068a9e4 | 3966 | |
| mbed_official | 125:23cc3068a9e4 | 3967 | |
| mbed_official | 125:23cc3068a9e4 | 3968 |