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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_spi.h@87:085cde657901, 2014-02-08 (annotated)

Committer:
mbed_official
Date:
Sat Feb 08 19:45:06 2014 +0000
Revision:
87:085cde657901
Child:
106:ced8cbb51063
Synchronized with git revision 9272cdeb45ec7e6077641536509413da8fd2ebc2



Full URL: https://github.com/mbedmicro/mbed/commit/9272cdeb45ec7e6077641536509413da8fd2ebc2/



Add NUCLEO_F401RE, improvements

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UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_spi.h
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 87:085cde657901 5 * @version V1.0.0RC2
mbed_official 87:085cde657901 6 * @date 04-February-2014
mbed_official 87:085cde657901 7 * @brief Header file of SPI HAL module.
mbed_official 87:085cde657901 8 ******************************************************************************
mbed_official 87:085cde657901 9 * @attention
mbed_official 87:085cde657901 10 *
mbed_official 87:085cde657901 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 12 *
mbed_official 87:085cde657901 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 14 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 16 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 19 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 21 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 22 * without specific prior written permission.
mbed_official 87:085cde657901 23 *
mbed_official 87:085cde657901 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 34 *
mbed_official 87:085cde657901 35 ******************************************************************************
mbed_official 87:085cde657901 36 */
mbed_official 87:085cde657901 37
mbed_official 87:085cde657901 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 87:085cde657901 39 #ifndef __STM32F4xx_HAL_SPI_H
mbed_official 87:085cde657901 40 #define __STM32F4xx_HAL_SPI_H
mbed_official 87:085cde657901 41
mbed_official 87:085cde657901 42 #ifdef __cplusplus
mbed_official 87:085cde657901 43 extern "C" {
mbed_official 87:085cde657901 44 #endif
mbed_official 87:085cde657901 45
mbed_official 87:085cde657901 46 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 47 #include "stm32f4xx_hal_def.h"
mbed_official 87:085cde657901 48
mbed_official 87:085cde657901 49 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 50 * @{
mbed_official 87:085cde657901 51 */
mbed_official 87:085cde657901 52
mbed_official 87:085cde657901 53 /** @addtogroup SPI
mbed_official 87:085cde657901 54 * @{
mbed_official 87:085cde657901 55 */
mbed_official 87:085cde657901 56
mbed_official 87:085cde657901 57 /* Exported types ------------------------------------------------------------*/
mbed_official 87:085cde657901 58
mbed_official 87:085cde657901 59 /**
mbed_official 87:085cde657901 60 * @brief SPI Configuration Structure definition
mbed_official 87:085cde657901 61 */
mbed_official 87:085cde657901 62 typedef struct
mbed_official 87:085cde657901 63 {
mbed_official 87:085cde657901 64 uint32_t Mode; /*!< Specifies the SPI operating mode.
mbed_official 87:085cde657901 65 This parameter can be a value of @ref SPI_mode */
mbed_official 87:085cde657901 66
mbed_official 87:085cde657901 67 uint32_t Direction; /*!< Specifies the SPI Directional mode state.
mbed_official 87:085cde657901 68 This parameter can be a value of @ref SPI_Direction_mode */
mbed_official 87:085cde657901 69
mbed_official 87:085cde657901 70 uint32_t DataSize; /*!< Specifies the SPI data size.
mbed_official 87:085cde657901 71 This parameter can be a value of @ref SPI_data_size */
mbed_official 87:085cde657901 72
mbed_official 87:085cde657901 73 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
mbed_official 87:085cde657901 74 This parameter can be a value of @ref SPI_Clock_Polarity */
mbed_official 87:085cde657901 75
mbed_official 87:085cde657901 76 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
mbed_official 87:085cde657901 77 This parameter can be a value of @ref SPI_Clock_Phase */
mbed_official 87:085cde657901 78
mbed_official 87:085cde657901 79 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
mbed_official 87:085cde657901 80 hardware (NSS pin) or by software using the SSI bit.
mbed_official 87:085cde657901 81 This parameter can be a value of @ref SPI_Slave_Select_management */
mbed_official 87:085cde657901 82
mbed_official 87:085cde657901 83 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
mbed_official 87:085cde657901 84 used to configure the transmit and receive SCK clock.
mbed_official 87:085cde657901 85 This parameter can be a value of @ref SPI_BaudRate_Prescaler
mbed_official 87:085cde657901 86 @note The communication clock is derived from the master
mbed_official 87:085cde657901 87 clock. The slave clock does not need to be set */
mbed_official 87:085cde657901 88
mbed_official 87:085cde657901 89 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
mbed_official 87:085cde657901 90 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
mbed_official 87:085cde657901 91
mbed_official 87:085cde657901 92 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
mbed_official 87:085cde657901 93 This parameter can be a value of @ref SPI_TI_mode */
mbed_official 87:085cde657901 94
mbed_official 87:085cde657901 95 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
mbed_official 87:085cde657901 96 This parameter can be a value of @ref SPI_CRC_Calculation */
mbed_official 87:085cde657901 97
mbed_official 87:085cde657901 98 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
mbed_official 87:085cde657901 99 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
mbed_official 87:085cde657901 100
mbed_official 87:085cde657901 101 }SPI_InitTypeDef;
mbed_official 87:085cde657901 102
mbed_official 87:085cde657901 103 /**
mbed_official 87:085cde657901 104 * @brief HAL SPI State structure definition
mbed_official 87:085cde657901 105 */
mbed_official 87:085cde657901 106 typedef enum
mbed_official 87:085cde657901 107 {
mbed_official 87:085cde657901 108 HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */
mbed_official 87:085cde657901 109 HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */
mbed_official 87:085cde657901 110 HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */
mbed_official 87:085cde657901 111 HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
mbed_official 87:085cde657901 112 HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
mbed_official 87:085cde657901 113 HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
mbed_official 87:085cde657901 114 HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */
mbed_official 87:085cde657901 115
mbed_official 87:085cde657901 116 }HAL_SPI_StateTypeDef;
mbed_official 87:085cde657901 117
mbed_official 87:085cde657901 118 /**
mbed_official 87:085cde657901 119 * @brief HAL SPI Error Code structure definition
mbed_official 87:085cde657901 120 */
mbed_official 87:085cde657901 121 typedef enum
mbed_official 87:085cde657901 122 {
mbed_official 87:085cde657901 123 HAL_SPI_ERROR_NONE = 0x00, /*!< No error */
mbed_official 87:085cde657901 124 HAL_SPI_ERROR_MODF = 0x01, /*!< MODF error */
mbed_official 87:085cde657901 125 HAL_SPI_ERROR_CRC = 0x02, /*!< CRC error */
mbed_official 87:085cde657901 126 HAL_SPI_ERROR_OVR = 0x04, /*!< OVR error */
mbed_official 87:085cde657901 127 HAL_SPI_ERROR_FRE = 0x08, /*!< FRE error */
mbed_official 87:085cde657901 128 HAL_SPI_ERROR_DMA = 0x10, /*!< DMA transfer error */
mbed_official 87:085cde657901 129 HAL_SPI_ERROR_FLAG = 0x20 /*!< Flag: RXNE,TXE, BSY */
mbed_official 87:085cde657901 130
mbed_official 87:085cde657901 131 }HAL_SPI_ErrorTypeDef;
mbed_official 87:085cde657901 132
mbed_official 87:085cde657901 133 /**
mbed_official 87:085cde657901 134 * @brief SPI handle Structure definition
mbed_official 87:085cde657901 135 */
mbed_official 87:085cde657901 136 typedef struct __SPI_HandleTypeDef
mbed_official 87:085cde657901 137 {
mbed_official 87:085cde657901 138 SPI_TypeDef *Instance; /* SPI registers base address */
mbed_official 87:085cde657901 139
mbed_official 87:085cde657901 140 SPI_InitTypeDef Init; /* SPI communication parameters */
mbed_official 87:085cde657901 141
mbed_official 87:085cde657901 142 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
mbed_official 87:085cde657901 143
mbed_official 87:085cde657901 144 uint16_t TxXferSize; /* SPI Tx transfer size */
mbed_official 87:085cde657901 145
mbed_official 87:085cde657901 146 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
mbed_official 87:085cde657901 147
mbed_official 87:085cde657901 148 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
mbed_official 87:085cde657901 149
mbed_official 87:085cde657901 150 uint16_t RxXferSize; /* SPI Rx transfer size */
mbed_official 87:085cde657901 151
mbed_official 87:085cde657901 152 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
mbed_official 87:085cde657901 153
mbed_official 87:085cde657901 154 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA handle parameters */
mbed_official 87:085cde657901 155
mbed_official 87:085cde657901 156 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA handle parameters */
mbed_official 87:085cde657901 157
mbed_official 87:085cde657901 158 void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */
mbed_official 87:085cde657901 159
mbed_official 87:085cde657901 160 void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */
mbed_official 87:085cde657901 161
mbed_official 87:085cde657901 162 HAL_LockTypeDef Lock; /* SPI locking object */
mbed_official 87:085cde657901 163
mbed_official 87:085cde657901 164 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
mbed_official 87:085cde657901 165
mbed_official 87:085cde657901 166 __IO HAL_SPI_ErrorTypeDef ErrorCode; /* SPI Error code */
mbed_official 87:085cde657901 167
mbed_official 87:085cde657901 168 }SPI_HandleTypeDef;
mbed_official 87:085cde657901 169
mbed_official 87:085cde657901 170 /* Exported constants --------------------------------------------------------*/
mbed_official 87:085cde657901 171
mbed_official 87:085cde657901 172 /** @defgroup SPI_Exported_Constants
mbed_official 87:085cde657901 173 * @{
mbed_official 87:085cde657901 174 */
mbed_official 87:085cde657901 175
mbed_official 87:085cde657901 176 /** @defgroup SPI_mode
mbed_official 87:085cde657901 177 * @{
mbed_official 87:085cde657901 178 */
mbed_official 87:085cde657901 179 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
mbed_official 87:085cde657901 180 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
mbed_official 87:085cde657901 181
mbed_official 87:085cde657901 182 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
mbed_official 87:085cde657901 183 ((MODE) == SPI_MODE_MASTER))
mbed_official 87:085cde657901 184 /**
mbed_official 87:085cde657901 185 * @}
mbed_official 87:085cde657901 186 */
mbed_official 87:085cde657901 187
mbed_official 87:085cde657901 188 /** @defgroup SPI_Direction_mode
mbed_official 87:085cde657901 189 * @{
mbed_official 87:085cde657901 190 */
mbed_official 87:085cde657901 191 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
mbed_official 87:085cde657901 192 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
mbed_official 87:085cde657901 193 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
mbed_official 87:085cde657901 194
mbed_official 87:085cde657901 195 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
mbed_official 87:085cde657901 196 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
mbed_official 87:085cde657901 197 ((MODE) == SPI_DIRECTION_1LINE))
mbed_official 87:085cde657901 198
mbed_official 87:085cde657901 199 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
mbed_official 87:085cde657901 200 ((MODE) == SPI_DIRECTION_1LINE))
mbed_official 87:085cde657901 201
mbed_official 87:085cde657901 202 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
mbed_official 87:085cde657901 203
mbed_official 87:085cde657901 204 /**
mbed_official 87:085cde657901 205 * @}
mbed_official 87:085cde657901 206 */
mbed_official 87:085cde657901 207
mbed_official 87:085cde657901 208 /** @defgroup SPI_data_size
mbed_official 87:085cde657901 209 * @{
mbed_official 87:085cde657901 210 */
mbed_official 87:085cde657901 211 #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
mbed_official 87:085cde657901 212 #define SPI_DATASIZE_16BIT SPI_CR1_DFF
mbed_official 87:085cde657901 213
mbed_official 87:085cde657901 214 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
mbed_official 87:085cde657901 215 ((DATASIZE) == SPI_DATASIZE_8BIT))
mbed_official 87:085cde657901 216 /**
mbed_official 87:085cde657901 217 * @}
mbed_official 87:085cde657901 218 */
mbed_official 87:085cde657901 219
mbed_official 87:085cde657901 220 /** @defgroup SPI_Clock_Polarity
mbed_official 87:085cde657901 221 * @{
mbed_official 87:085cde657901 222 */
mbed_official 87:085cde657901 223 #define SPI_POLARITY_LOW ((uint32_t)0x00000000)
mbed_official 87:085cde657901 224 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
mbed_official 87:085cde657901 225
mbed_official 87:085cde657901 226 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
mbed_official 87:085cde657901 227 ((CPOL) == SPI_POLARITY_HIGH))
mbed_official 87:085cde657901 228 /**
mbed_official 87:085cde657901 229 * @}
mbed_official 87:085cde657901 230 */
mbed_official 87:085cde657901 231
mbed_official 87:085cde657901 232 /** @defgroup SPI_Clock_Phase
mbed_official 87:085cde657901 233 * @{
mbed_official 87:085cde657901 234 */
mbed_official 87:085cde657901 235 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
mbed_official 87:085cde657901 236 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
mbed_official 87:085cde657901 237
mbed_official 87:085cde657901 238 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
mbed_official 87:085cde657901 239 ((CPHA) == SPI_PHASE_2EDGE))
mbed_official 87:085cde657901 240 /**
mbed_official 87:085cde657901 241 * @}
mbed_official 87:085cde657901 242 */
mbed_official 87:085cde657901 243
mbed_official 87:085cde657901 244 /** @defgroup SPI_Slave_Select_management
mbed_official 87:085cde657901 245 * @{
mbed_official 87:085cde657901 246 */
mbed_official 87:085cde657901 247 #define SPI_NSS_SOFT SPI_CR1_SSM
mbed_official 87:085cde657901 248 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
mbed_official 87:085cde657901 249 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
mbed_official 87:085cde657901 250
mbed_official 87:085cde657901 251 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
mbed_official 87:085cde657901 252 ((NSS) == SPI_NSS_HARD_INPUT) || \
mbed_official 87:085cde657901 253 ((NSS) == SPI_NSS_HARD_OUTPUT))
mbed_official 87:085cde657901 254 /**
mbed_official 87:085cde657901 255 * @}
mbed_official 87:085cde657901 256 */
mbed_official 87:085cde657901 257
mbed_official 87:085cde657901 258 /** @defgroup SPI_BaudRate_Prescaler
mbed_official 87:085cde657901 259 * @{
mbed_official 87:085cde657901 260 */
mbed_official 87:085cde657901 261 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
mbed_official 87:085cde657901 262 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
mbed_official 87:085cde657901 263 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
mbed_official 87:085cde657901 264 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
mbed_official 87:085cde657901 265 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
mbed_official 87:085cde657901 266 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
mbed_official 87:085cde657901 267 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
mbed_official 87:085cde657901 268 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
mbed_official 87:085cde657901 269
mbed_official 87:085cde657901 270 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
mbed_official 87:085cde657901 271 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
mbed_official 87:085cde657901 272 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
mbed_official 87:085cde657901 273 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
mbed_official 87:085cde657901 274 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
mbed_official 87:085cde657901 275 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
mbed_official 87:085cde657901 276 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
mbed_official 87:085cde657901 277 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
mbed_official 87:085cde657901 278 /**
mbed_official 87:085cde657901 279 * @}
mbed_official 87:085cde657901 280 */
mbed_official 87:085cde657901 281
mbed_official 87:085cde657901 282 /** @defgroup SPI_MSB_LSB_transmission
mbed_official 87:085cde657901 283 * @{
mbed_official 87:085cde657901 284 */
mbed_official 87:085cde657901 285 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
mbed_official 87:085cde657901 286 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
mbed_official 87:085cde657901 287
mbed_official 87:085cde657901 288 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
mbed_official 87:085cde657901 289 ((BIT) == SPI_FIRSTBIT_LSB))
mbed_official 87:085cde657901 290 /**
mbed_official 87:085cde657901 291 * @}
mbed_official 87:085cde657901 292 */
mbed_official 87:085cde657901 293
mbed_official 87:085cde657901 294 /** @defgroup SPI_TI_mode
mbed_official 87:085cde657901 295 * @{
mbed_official 87:085cde657901 296 */
mbed_official 87:085cde657901 297 #define SPI_TIMODE_DISABLED ((uint32_t)0x00000000)
mbed_official 87:085cde657901 298 #define SPI_TIMODE_ENABLED SPI_CR2_FRF
mbed_official 87:085cde657901 299
mbed_official 87:085cde657901 300 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLED) || \
mbed_official 87:085cde657901 301 ((MODE) == SPI_TIMODE_ENABLED))
mbed_official 87:085cde657901 302 /**
mbed_official 87:085cde657901 303 * @}
mbed_official 87:085cde657901 304 */
mbed_official 87:085cde657901 305
mbed_official 87:085cde657901 306 /** @defgroup SPI_CRC_Calculation
mbed_official 87:085cde657901 307 * @{
mbed_official 87:085cde657901 308 */
mbed_official 87:085cde657901 309 #define SPI_CRCCALCULATION_DISABLED ((uint32_t)0x00000000)
mbed_official 87:085cde657901 310 #define SPI_CRCCALCULATION_ENABLED SPI_CR1_CRCEN
mbed_official 87:085cde657901 311
mbed_official 87:085cde657901 312 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLED) || \
mbed_official 87:085cde657901 313 ((CALCULATION) == SPI_CRCCALCULATION_ENABLED))
mbed_official 87:085cde657901 314 /**
mbed_official 87:085cde657901 315 * @}
mbed_official 87:085cde657901 316 */
mbed_official 87:085cde657901 317
mbed_official 87:085cde657901 318 /** @defgroup SPI_Interrupt_configuration_definition
mbed_official 87:085cde657901 319 * @{
mbed_official 87:085cde657901 320 */
mbed_official 87:085cde657901 321 #define SPI_IT_TXE SPI_CR2_TXEIE
mbed_official 87:085cde657901 322 #define SPI_IT_RXNE SPI_CR2_RXNEIE
mbed_official 87:085cde657901 323 #define SPI_IT_ERR SPI_CR2_ERRIE
mbed_official 87:085cde657901 324 /**
mbed_official 87:085cde657901 325 * @}
mbed_official 87:085cde657901 326 */
mbed_official 87:085cde657901 327
mbed_official 87:085cde657901 328 /** @defgroup SPI_Flag_definition
mbed_official 87:085cde657901 329 * @{
mbed_official 87:085cde657901 330 */
mbed_official 87:085cde657901 331 #define SPI_FLAG_RXNE SPI_SR_RXNE
mbed_official 87:085cde657901 332 #define SPI_FLAG_TXE SPI_SR_TXE
mbed_official 87:085cde657901 333 #define SPI_FLAG_CRCERR SPI_SR_CRCERR
mbed_official 87:085cde657901 334 #define SPI_FLAG_MODF SPI_SR_MODF
mbed_official 87:085cde657901 335 #define SPI_FLAG_OVR SPI_SR_OVR
mbed_official 87:085cde657901 336 #define SPI_FLAG_BSY SPI_SR_BSY
mbed_official 87:085cde657901 337 #define SPI_FLAG_FRE SPI_SR_FRE
mbed_official 87:085cde657901 338
mbed_official 87:085cde657901 339 /**
mbed_official 87:085cde657901 340 * @}
mbed_official 87:085cde657901 341 */
mbed_official 87:085cde657901 342
mbed_official 87:085cde657901 343 /**
mbed_official 87:085cde657901 344 * @}
mbed_official 87:085cde657901 345 */
mbed_official 87:085cde657901 346
mbed_official 87:085cde657901 347 /* Exported macro ------------------------------------------------------------*/
mbed_official 87:085cde657901 348
mbed_official 87:085cde657901 349 /** @brief Enable or disable the specified SPI interrupts.
mbed_official 87:085cde657901 350 * @param __HANDLE__: specifies the SPI handle.
mbed_official 87:085cde657901 351 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
mbed_official 87:085cde657901 352 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
mbed_official 87:085cde657901 353 * This parameter can be one of the following values:
mbed_official 87:085cde657901 354 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
mbed_official 87:085cde657901 355 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
mbed_official 87:085cde657901 356 * @arg SPI_IT_ERR: Error interrupt enable
mbed_official 87:085cde657901 357 * @retval None
mbed_official 87:085cde657901 358 */
mbed_official 87:085cde657901 359 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
mbed_official 87:085cde657901 360 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
mbed_official 87:085cde657901 361
mbed_official 87:085cde657901 362 /** @brief Check if the specified SPI interrupt source is enabled or disabled.
mbed_official 87:085cde657901 363 * @param __HANDLE__: specifies the SPI handle.
mbed_official 87:085cde657901 364 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
mbed_official 87:085cde657901 365 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
mbed_official 87:085cde657901 366 * This parameter can be one of the following values:
mbed_official 87:085cde657901 367 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
mbed_official 87:085cde657901 368 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
mbed_official 87:085cde657901 369 * @arg SPI_IT_ERR: Error interrupt enable
mbed_official 87:085cde657901 370 * @retval The new state of __IT__ (TRUE or FALSE).
mbed_official 87:085cde657901 371 */
mbed_official 87:085cde657901 372 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official 87:085cde657901 373
mbed_official 87:085cde657901 374 /** @brief Check whether the specified SPI flag is set or not.
mbed_official 87:085cde657901 375 * @param __HANDLE__: specifies the SPI handle.
mbed_official 87:085cde657901 376 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
mbed_official 87:085cde657901 377 * @param __FLAG__: specifies the flag to check.
mbed_official 87:085cde657901 378 * This parameter can be one of the following values:
mbed_official 87:085cde657901 379 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
mbed_official 87:085cde657901 380 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
mbed_official 87:085cde657901 381 * @arg SPI_FLAG_CRCERR: CRC error flag
mbed_official 87:085cde657901 382 * @arg SPI_FLAG_MODF: Mode fault flag
mbed_official 87:085cde657901 383 * @arg SPI_FLAG_OVR: Overrun flag
mbed_official 87:085cde657901 384 * @arg SPI_FLAG_BSY: Busy flag
mbed_official 87:085cde657901 385 * @arg SPI_FLAG_FRE: Frame format error flag
mbed_official 87:085cde657901 386 * @retval The new state of __FLAG__ (TRUE or FALSE).
mbed_official 87:085cde657901 387 */
mbed_official 87:085cde657901 388 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
mbed_official 87:085cde657901 389
mbed_official 87:085cde657901 390 /** @brief Clear the SPI CRCERR pending flag.
mbed_official 87:085cde657901 391 * @param __HANDLE__: specifies the SPI handle.
mbed_official 87:085cde657901 392 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
mbed_official 87:085cde657901 393 * @retval None
mbed_official 87:085cde657901 394 */
mbed_official 87:085cde657901 395 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR &= ~(SPI_FLAG_CRCERR))
mbed_official 87:085cde657901 396
mbed_official 87:085cde657901 397 /** @brief Clear the SPI MODF pending flag.
mbed_official 87:085cde657901 398 * @param __HANDLE__: specifies the SPI handle.
mbed_official 87:085cde657901 399 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
mbed_official 87:085cde657901 400 * @retval None
mbed_official 87:085cde657901 401 */
mbed_official 87:085cde657901 402 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\
mbed_official 87:085cde657901 403 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE);}while(0)
mbed_official 87:085cde657901 404
mbed_official 87:085cde657901 405 /** @brief Clear the SPI OVR pending flag.
mbed_official 87:085cde657901 406 * @param __HANDLE__: specifies the SPI handle.
mbed_official 87:085cde657901 407 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
mbed_official 87:085cde657901 408 * @retval None
mbed_official 87:085cde657901 409 */
mbed_official 87:085cde657901 410 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
mbed_official 87:085cde657901 411 (__HANDLE__)->Instance->SR;}while(0)
mbed_official 87:085cde657901 412
mbed_official 87:085cde657901 413 /** @brief Clear the SPI FRE pending flag.
mbed_official 87:085cde657901 414 * @param __HANDLE__: specifies the SPI handle.
mbed_official 87:085cde657901 415 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
mbed_official 87:085cde657901 416 * @retval None
mbed_official 87:085cde657901 417 */
mbed_official 87:085cde657901 418 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR)
mbed_official 87:085cde657901 419
mbed_official 87:085cde657901 420 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
mbed_official 87:085cde657901 421 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE)
mbed_official 87:085cde657901 422
mbed_official 87:085cde657901 423 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
mbed_official 87:085cde657901 424
mbed_official 87:085cde657901 425 #define __HAL_SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
mbed_official 87:085cde657901 426
mbed_official 87:085cde657901 427 #define __HAL_SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE)
mbed_official 87:085cde657901 428
mbed_official 87:085cde657901 429 #define __HAL_SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\
mbed_official 87:085cde657901 430 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
mbed_official 87:085cde657901 431
mbed_official 87:085cde657901 432 /* Exported functions --------------------------------------------------------*/
mbed_official 87:085cde657901 433
mbed_official 87:085cde657901 434 /* Initialization/de-initialization functions **********************************/
mbed_official 87:085cde657901 435 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 436 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 437 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 438 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 439
mbed_official 87:085cde657901 440 /* I/O operation functions *****************************************************/
mbed_official 87:085cde657901 441 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
mbed_official 87:085cde657901 442 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
mbed_official 87:085cde657901 443 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
mbed_official 87:085cde657901 444 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
mbed_official 87:085cde657901 445 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
mbed_official 87:085cde657901 446 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
mbed_official 87:085cde657901 447 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
mbed_official 87:085cde657901 448 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
mbed_official 87:085cde657901 449 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
mbed_official 87:085cde657901 450 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 451 __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 452 __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 453 __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 454 __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 455
mbed_official 87:085cde657901 456 /* Peripheral State and Control functions **************************************/
mbed_official 87:085cde657901 457 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 458 HAL_SPI_ErrorTypeDef HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
mbed_official 87:085cde657901 459
mbed_official 87:085cde657901 460 /**
mbed_official 87:085cde657901 461 * @}
mbed_official 87:085cde657901 462 */
mbed_official 87:085cde657901 463
mbed_official 87:085cde657901 464 /**
mbed_official 87:085cde657901 465 * @}
mbed_official 87:085cde657901 466 */
mbed_official 87:085cde657901 467
mbed_official 87:085cde657901 468 #ifdef __cplusplus
mbed_official 87:085cde657901 469 }
mbed_official 87:085cde657901 470 #endif
mbed_official 87:085cde657901 471
mbed_official 87:085cde657901 472 #endif /* __STM32F4xx_HAL_SPI_H */
mbed_official 87:085cde657901 473
mbed_official 87:085cde657901 474 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/