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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_biquad_cascade_df1_fast_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Fast processing function for the
emilmont 2:da51fb522205 11 * Q15 Biquad cascade filter.
emilmont 1:fdd22bb7aa52 12 *
emilmont 1:fdd22bb7aa52 13 * Target Processor: Cortex-M4/Cortex-M3
emilmont 1:fdd22bb7aa52 14 *
emilmont 1:fdd22bb7aa52 15 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 16 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 17 *
emilmont 1:fdd22bb7aa52 18 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 19 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 20 *
emilmont 1:fdd22bb7aa52 21 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 22 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 23 *
emilmont 1:fdd22bb7aa52 24 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 25 * Documentation updated.
emilmont 1:fdd22bb7aa52 26 *
emilmont 1:fdd22bb7aa52 27 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 28 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 29 *
emilmont 1:fdd22bb7aa52 30 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 31 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 32 *
emilmont 1:fdd22bb7aa52 33 * Version 0.0.9 2010/08/16
emilmont 1:fdd22bb7aa52 34 * Initial version
emilmont 1:fdd22bb7aa52 35 *
emilmont 1:fdd22bb7aa52 36 *
emilmont 1:fdd22bb7aa52 37 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 /**
emilmont 1:fdd22bb7aa52 42 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 43 */
emilmont 1:fdd22bb7aa52 44
emilmont 1:fdd22bb7aa52 45 /**
emilmont 1:fdd22bb7aa52 46 * @addtogroup BiquadCascadeDF1
emilmont 1:fdd22bb7aa52 47 * @{
emilmont 1:fdd22bb7aa52 48 */
emilmont 1:fdd22bb7aa52 49
emilmont 1:fdd22bb7aa52 50 /**
emilmont 1:fdd22bb7aa52 51 * @details
emilmont 1:fdd22bb7aa52 52 * @param[in] *S points to an instance of the Q15 Biquad cascade structure.
emilmont 1:fdd22bb7aa52 53 * @param[in] *pSrc points to the block of input data.
emilmont 1:fdd22bb7aa52 54 * @param[out] *pDst points to the block of output data.
emilmont 1:fdd22bb7aa52 55 * @param[in] blockSize number of samples to process per call.
emilmont 1:fdd22bb7aa52 56 * @return none.
emilmont 1:fdd22bb7aa52 57 *
emilmont 1:fdd22bb7aa52 58 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 59 * \par
emilmont 1:fdd22bb7aa52 60 * This fast version uses a 32-bit accumulator with 2.30 format.
emilmont 1:fdd22bb7aa52 61 * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
emilmont 1:fdd22bb7aa52 62 * Thus, if the accumulator result overflows it wraps around and distorts the result.
emilmont 1:fdd22bb7aa52 63 * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).
emilmont 1:fdd22bb7aa52 64 * The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits.
emilmont 1:fdd22bb7aa52 65 *
emilmont 1:fdd22bb7aa52 66 * \par
emilmont 1:fdd22bb7aa52 67 * Refer to the function <code>arm_biquad_cascade_df1_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
emilmont 1:fdd22bb7aa52 68 * Use the function <code>arm_biquad_cascade_df1_init_q15()</code> to initialize the filter structure.
emilmont 1:fdd22bb7aa52 69 *
emilmont 1:fdd22bb7aa52 70 */
emilmont 1:fdd22bb7aa52 71
emilmont 1:fdd22bb7aa52 72 void arm_biquad_cascade_df1_fast_q15(
emilmont 1:fdd22bb7aa52 73 const arm_biquad_casd_df1_inst_q15 * S,
emilmont 1:fdd22bb7aa52 74 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 75 q15_t * pDst,
emilmont 1:fdd22bb7aa52 76 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 77 {
emilmont 1:fdd22bb7aa52 78 q15_t *pIn = pSrc; /* Source pointer */
emilmont 1:fdd22bb7aa52 79 q15_t *pOut = pDst; /* Destination pointer */
emilmont 1:fdd22bb7aa52 80 q31_t in; /* Temporary variable to hold input value */
emilmont 1:fdd22bb7aa52 81 q31_t out; /* Temporary variable to hold output value */
emilmont 1:fdd22bb7aa52 82 q31_t b0; /* Temporary variable to hold bo value */
emilmont 1:fdd22bb7aa52 83 q31_t b1, a1; /* Filter coefficients */
emilmont 1:fdd22bb7aa52 84 q31_t state_in, state_out; /* Filter state variables */
emilmont 1:fdd22bb7aa52 85 q31_t acc; /* Accumulator */
emilmont 1:fdd22bb7aa52 86 int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */
emilmont 1:fdd22bb7aa52 87 q15_t *pState = S->pState; /* State pointer */
emilmont 1:fdd22bb7aa52 88 q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
emilmont 1:fdd22bb7aa52 89 uint32_t sample, stage = S->numStages; /* Stage loop counter */
emilmont 1:fdd22bb7aa52 90
emilmont 1:fdd22bb7aa52 91
emilmont 1:fdd22bb7aa52 92
emilmont 1:fdd22bb7aa52 93 do
emilmont 1:fdd22bb7aa52 94 {
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 /* Read the b0 and 0 coefficients using SIMD */
emilmont 1:fdd22bb7aa52 97 b0 = *__SIMD32(pCoeffs)++;
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 /* Read the b1 and b2 coefficients using SIMD */
emilmont 1:fdd22bb7aa52 100 b1 = *__SIMD32(pCoeffs)++;
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* Read the a1 and a2 coefficients using SIMD */
emilmont 1:fdd22bb7aa52 103 a1 = *__SIMD32(pCoeffs)++;
emilmont 1:fdd22bb7aa52 104
emilmont 1:fdd22bb7aa52 105 /* Read the input state values from the state buffer: x[n-1], x[n-2] */
emilmont 1:fdd22bb7aa52 106 state_in = *__SIMD32(pState)++;
emilmont 1:fdd22bb7aa52 107
emilmont 1:fdd22bb7aa52 108 /* Read the output state values from the state buffer: y[n-1], y[n-2] */
emilmont 1:fdd22bb7aa52 109 state_out = *__SIMD32(pState)--;
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111 /* Apply loop unrolling and compute 2 output values simultaneously. */
emilmont 1:fdd22bb7aa52 112 /* The variable acc hold output values that are being computed:
emilmont 1:fdd22bb7aa52 113 *
emilmont 1:fdd22bb7aa52 114 * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emilmont 1:fdd22bb7aa52 115 * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emilmont 1:fdd22bb7aa52 116 */
emilmont 1:fdd22bb7aa52 117 sample = blockSize >> 1u;
emilmont 1:fdd22bb7aa52 118
emilmont 1:fdd22bb7aa52 119 /* First part of the processing with loop unrolling. Compute 2 outputs at a time.
emilmont 1:fdd22bb7aa52 120 ** a second loop below computes the remaining 1 sample. */
emilmont 1:fdd22bb7aa52 121 while(sample > 0u)
emilmont 1:fdd22bb7aa52 122 {
emilmont 1:fdd22bb7aa52 123
emilmont 1:fdd22bb7aa52 124 /* Read the input */
emilmont 1:fdd22bb7aa52 125 in = *__SIMD32(pIn)++;
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* out = b0 * x[n] + 0 * 0 */
emilmont 1:fdd22bb7aa52 128 out = __SMUAD(b0, in);
emilmont 1:fdd22bb7aa52 129 /* acc = b1 * x[n-1] + acc += b2 * x[n-2] + out */
emilmont 1:fdd22bb7aa52 130 acc = __SMLAD(b1, state_in, out);
emilmont 1:fdd22bb7aa52 131 /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */
emilmont 1:fdd22bb7aa52 132 acc = __SMLAD(a1, state_out, acc);
emilmont 1:fdd22bb7aa52 133
emilmont 1:fdd22bb7aa52 134 /* The result is converted from 3.29 to 1.31 and then saturation is applied */
emilmont 1:fdd22bb7aa52 135 out = __SSAT((acc >> shift), 16);
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 /* Every time after the output is computed state should be updated. */
emilmont 1:fdd22bb7aa52 138 /* The states should be updated as: */
emilmont 1:fdd22bb7aa52 139 /* Xn2 = Xn1 */
emilmont 1:fdd22bb7aa52 140 /* Xn1 = Xn */
emilmont 1:fdd22bb7aa52 141 /* Yn2 = Yn1 */
emilmont 1:fdd22bb7aa52 142 /* Yn1 = acc */
emilmont 1:fdd22bb7aa52 143 /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
emilmont 1:fdd22bb7aa52 144 /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 147
emilmont 1:fdd22bb7aa52 148 state_in = __PKHBT(in, state_in, 16);
emilmont 1:fdd22bb7aa52 149 state_out = __PKHBT(out, state_out, 16);
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 #else
emilmont 1:fdd22bb7aa52 152
emilmont 1:fdd22bb7aa52 153 state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
emilmont 1:fdd22bb7aa52 154 state_out = __PKHBT(state_out >> 16, (out), 16);
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 157
emilmont 1:fdd22bb7aa52 158 /* out = b0 * x[n] + 0 * 0 */
emilmont 1:fdd22bb7aa52 159 out = __SMUADX(b0, in);
emilmont 1:fdd22bb7aa52 160 /* acc0 = b1 * x[n-1] , acc0 += b2 * x[n-2] + out */
emilmont 1:fdd22bb7aa52 161 acc = __SMLAD(b1, state_in, out);
emilmont 1:fdd22bb7aa52 162 /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */
emilmont 1:fdd22bb7aa52 163 acc = __SMLAD(a1, state_out, acc);
emilmont 1:fdd22bb7aa52 164
emilmont 1:fdd22bb7aa52 165 /* The result is converted from 3.29 to 1.31 and then saturation is applied */
emilmont 1:fdd22bb7aa52 166 out = __SSAT((acc >> shift), 16);
emilmont 1:fdd22bb7aa52 167
emilmont 1:fdd22bb7aa52 168
emilmont 1:fdd22bb7aa52 169 /* Store the output in the destination buffer. */
emilmont 1:fdd22bb7aa52 170
emilmont 1:fdd22bb7aa52 171 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 172
emilmont 1:fdd22bb7aa52 173 *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
emilmont 1:fdd22bb7aa52 174
emilmont 1:fdd22bb7aa52 175 #else
emilmont 1:fdd22bb7aa52 176
emilmont 1:fdd22bb7aa52 177 *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
emilmont 1:fdd22bb7aa52 178
emilmont 1:fdd22bb7aa52 179 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 180
emilmont 1:fdd22bb7aa52 181 /* Every time after the output is computed state should be updated. */
emilmont 1:fdd22bb7aa52 182 /* The states should be updated as: */
emilmont 1:fdd22bb7aa52 183 /* Xn2 = Xn1 */
emilmont 1:fdd22bb7aa52 184 /* Xn1 = Xn */
emilmont 1:fdd22bb7aa52 185 /* Yn2 = Yn1 */
emilmont 1:fdd22bb7aa52 186 /* Yn1 = acc */
emilmont 1:fdd22bb7aa52 187 /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
emilmont 1:fdd22bb7aa52 188 /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
emilmont 1:fdd22bb7aa52 189
emilmont 1:fdd22bb7aa52 190 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 191
emilmont 1:fdd22bb7aa52 192 state_in = __PKHBT(in >> 16, state_in, 16);
emilmont 1:fdd22bb7aa52 193 state_out = __PKHBT(out, state_out, 16);
emilmont 1:fdd22bb7aa52 194
emilmont 1:fdd22bb7aa52 195 #else
emilmont 1:fdd22bb7aa52 196
emilmont 1:fdd22bb7aa52 197 state_in = __PKHBT(state_in >> 16, in, 16);
emilmont 1:fdd22bb7aa52 198 state_out = __PKHBT(state_out >> 16, out, 16);
emilmont 1:fdd22bb7aa52 199
emilmont 1:fdd22bb7aa52 200 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 201
emilmont 1:fdd22bb7aa52 202
emilmont 1:fdd22bb7aa52 203 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 204 sample--;
emilmont 1:fdd22bb7aa52 205
emilmont 1:fdd22bb7aa52 206 }
emilmont 1:fdd22bb7aa52 207
emilmont 1:fdd22bb7aa52 208 /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 209 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 210
emilmont 1:fdd22bb7aa52 211 if((blockSize & 0x1u) != 0u)
emilmont 1:fdd22bb7aa52 212 {
emilmont 1:fdd22bb7aa52 213 /* Read the input */
emilmont 1:fdd22bb7aa52 214 in = *pIn++;
emilmont 1:fdd22bb7aa52 215
emilmont 1:fdd22bb7aa52 216 /* out = b0 * x[n] + 0 * 0 */
emilmont 1:fdd22bb7aa52 217
emilmont 1:fdd22bb7aa52 218 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 219
emilmont 1:fdd22bb7aa52 220 out = __SMUAD(b0, in);
emilmont 1:fdd22bb7aa52 221
emilmont 1:fdd22bb7aa52 222 #else
emilmont 1:fdd22bb7aa52 223
emilmont 1:fdd22bb7aa52 224 out = __SMUADX(b0, in);
emilmont 1:fdd22bb7aa52 225
emilmont 1:fdd22bb7aa52 226 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 227
emilmont 1:fdd22bb7aa52 228 /* acc = b1 * x[n-1], acc += b2 * x[n-2] + out */
emilmont 1:fdd22bb7aa52 229 acc = __SMLAD(b1, state_in, out);
emilmont 1:fdd22bb7aa52 230 /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */
emilmont 1:fdd22bb7aa52 231 acc = __SMLAD(a1, state_out, acc);
emilmont 1:fdd22bb7aa52 232
emilmont 1:fdd22bb7aa52 233 /* The result is converted from 3.29 to 1.31 and then saturation is applied */
emilmont 1:fdd22bb7aa52 234 out = __SSAT((acc >> shift), 16);
emilmont 1:fdd22bb7aa52 235
emilmont 1:fdd22bb7aa52 236 /* Store the output in the destination buffer. */
emilmont 1:fdd22bb7aa52 237 *pOut++ = (q15_t) out;
emilmont 1:fdd22bb7aa52 238
emilmont 1:fdd22bb7aa52 239 /* Every time after the output is computed state should be updated. */
emilmont 1:fdd22bb7aa52 240 /* The states should be updated as: */
emilmont 1:fdd22bb7aa52 241 /* Xn2 = Xn1 */
emilmont 1:fdd22bb7aa52 242 /* Xn1 = Xn */
emilmont 1:fdd22bb7aa52 243 /* Yn2 = Yn1 */
emilmont 1:fdd22bb7aa52 244 /* Yn1 = acc */
emilmont 1:fdd22bb7aa52 245 /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
emilmont 1:fdd22bb7aa52 246 /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
emilmont 1:fdd22bb7aa52 247
emilmont 1:fdd22bb7aa52 248 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 249
emilmont 1:fdd22bb7aa52 250 state_in = __PKHBT(in, state_in, 16);
emilmont 1:fdd22bb7aa52 251 state_out = __PKHBT(out, state_out, 16);
emilmont 1:fdd22bb7aa52 252
emilmont 1:fdd22bb7aa52 253 #else
emilmont 1:fdd22bb7aa52 254
emilmont 1:fdd22bb7aa52 255 state_in = __PKHBT(state_in >> 16, in, 16);
emilmont 1:fdd22bb7aa52 256 state_out = __PKHBT(state_out >> 16, out, 16);
emilmont 1:fdd22bb7aa52 257
emilmont 1:fdd22bb7aa52 258 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 259
emilmont 1:fdd22bb7aa52 260 }
emilmont 1:fdd22bb7aa52 261
emilmont 1:fdd22bb7aa52 262 /* The first stage goes from the input buffer to the output buffer. */
emilmont 1:fdd22bb7aa52 263 /* Subsequent (numStages - 1) occur in-place in the output buffer */
emilmont 1:fdd22bb7aa52 264 pIn = pDst;
emilmont 1:fdd22bb7aa52 265
emilmont 1:fdd22bb7aa52 266 /* Reset the output pointer */
emilmont 1:fdd22bb7aa52 267 pOut = pDst;
emilmont 1:fdd22bb7aa52 268
emilmont 1:fdd22bb7aa52 269 /* Store the updated state variables back into the state array */
emilmont 1:fdd22bb7aa52 270 *__SIMD32(pState)++ = state_in;
emilmont 1:fdd22bb7aa52 271 *__SIMD32(pState)++ = state_out;
emilmont 1:fdd22bb7aa52 272
emilmont 1:fdd22bb7aa52 273
emilmont 1:fdd22bb7aa52 274 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 275 stage--;
emilmont 1:fdd22bb7aa52 276
emilmont 1:fdd22bb7aa52 277 } while(stage > 0u);
emilmont 1:fdd22bb7aa52 278 }
emilmont 1:fdd22bb7aa52 279
emilmont 1:fdd22bb7aa52 280
emilmont 1:fdd22bb7aa52 281 /**
emilmont 1:fdd22bb7aa52 282 * @} end of BiquadCascadeDF1 group
emilmont 1:fdd22bb7aa52 283 */