来自中国的硬件平台
Dependents: mbed_in_china_blink_led
Fork of mbed-src by
targets/hal/TARGET_STM/TARGET_DISCO_F407VG/gpio_irq_api.c@133:d4dda5c437f0, 2014-03-24 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 24 17:45:07 2014 +0000
- Revision:
- 133:d4dda5c437f0
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61
Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/
[STM32F4-Discovery (STM32F407VG)] initial port
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 133:d4dda5c437f0 | 1 | /* mbed Microcontroller Library |
mbed_official | 133:d4dda5c437f0 | 2 | ******************************************************************************* |
mbed_official | 133:d4dda5c437f0 | 3 | * Copyright (c) 2014, STMicroelectronics |
mbed_official | 133:d4dda5c437f0 | 4 | * All rights reserved. |
mbed_official | 133:d4dda5c437f0 | 5 | * |
mbed_official | 133:d4dda5c437f0 | 6 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 133:d4dda5c437f0 | 7 | * modification, are permitted provided that the following conditions are met: |
mbed_official | 133:d4dda5c437f0 | 8 | * |
mbed_official | 133:d4dda5c437f0 | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 10 | * this list of conditions and the following disclaimer. |
mbed_official | 133:d4dda5c437f0 | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 12 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 133:d4dda5c437f0 | 13 | * and/or other materials provided with the distribution. |
mbed_official | 133:d4dda5c437f0 | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 133:d4dda5c437f0 | 15 | * may be used to endorse or promote products derived from this software |
mbed_official | 133:d4dda5c437f0 | 16 | * without specific prior written permission. |
mbed_official | 133:d4dda5c437f0 | 17 | * |
mbed_official | 133:d4dda5c437f0 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 133:d4dda5c437f0 | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 133:d4dda5c437f0 | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 133:d4dda5c437f0 | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 133:d4dda5c437f0 | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 133:d4dda5c437f0 | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 133:d4dda5c437f0 | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 133:d4dda5c437f0 | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 133:d4dda5c437f0 | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 133:d4dda5c437f0 | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 133:d4dda5c437f0 | 28 | ******************************************************************************* |
mbed_official | 133:d4dda5c437f0 | 29 | */ |
mbed_official | 133:d4dda5c437f0 | 30 | #include <stddef.h> |
mbed_official | 133:d4dda5c437f0 | 31 | #include "cmsis.h" |
mbed_official | 133:d4dda5c437f0 | 32 | |
mbed_official | 133:d4dda5c437f0 | 33 | #include "gpio_irq_api.h" |
mbed_official | 133:d4dda5c437f0 | 34 | #include "pinmap.h" |
mbed_official | 133:d4dda5c437f0 | 35 | #include "stm32f4xx_hal.h" |
mbed_official | 133:d4dda5c437f0 | 36 | #include "error.h" |
mbed_official | 133:d4dda5c437f0 | 37 | |
mbed_official | 133:d4dda5c437f0 | 38 | #define EDGE_NONE (0) |
mbed_official | 133:d4dda5c437f0 | 39 | #define EDGE_RISE (1) |
mbed_official | 133:d4dda5c437f0 | 40 | #define EDGE_FALL (2) |
mbed_official | 133:d4dda5c437f0 | 41 | #define EDGE_BOTH (3) |
mbed_official | 133:d4dda5c437f0 | 42 | |
mbed_official | 133:d4dda5c437f0 | 43 | #define CHANNEL_NUM (7) |
mbed_official | 133:d4dda5c437f0 | 44 | |
mbed_official | 133:d4dda5c437f0 | 45 | static uint32_t channel_ids[CHANNEL_NUM] = {0, 0, 0, 0, 0, 0, 0}; |
mbed_official | 133:d4dda5c437f0 | 46 | static uint32_t channel_gpio[CHANNEL_NUM] = {0, 0, 0, 0, 0, 0, 0}; |
mbed_official | 133:d4dda5c437f0 | 47 | static uint32_t channel_pin[CHANNEL_NUM] = {0, 0, 0, 0, 0, 0, 0}; |
mbed_official | 133:d4dda5c437f0 | 48 | |
mbed_official | 133:d4dda5c437f0 | 49 | static gpio_irq_handler irq_handler; |
mbed_official | 133:d4dda5c437f0 | 50 | |
mbed_official | 133:d4dda5c437f0 | 51 | static void handle_interrupt_in(uint32_t irq_index) { |
mbed_official | 133:d4dda5c437f0 | 52 | // Retrieve the gpio and pin that generate the irq |
mbed_official | 133:d4dda5c437f0 | 53 | GPIO_TypeDef *gpio = (GPIO_TypeDef *)(channel_gpio[irq_index]); |
mbed_official | 133:d4dda5c437f0 | 54 | uint32_t pin = (uint32_t)(1 << channel_pin[irq_index]); |
mbed_official | 133:d4dda5c437f0 | 55 | |
mbed_official | 133:d4dda5c437f0 | 56 | // Clear interrupt flag |
mbed_official | 133:d4dda5c437f0 | 57 | if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) |
mbed_official | 133:d4dda5c437f0 | 58 | { |
mbed_official | 133:d4dda5c437f0 | 59 | __HAL_GPIO_EXTI_CLEAR_FLAG(pin); |
mbed_official | 133:d4dda5c437f0 | 60 | } |
mbed_official | 133:d4dda5c437f0 | 61 | |
mbed_official | 133:d4dda5c437f0 | 62 | if (channel_ids[irq_index] == 0) return; |
mbed_official | 133:d4dda5c437f0 | 63 | |
mbed_official | 133:d4dda5c437f0 | 64 | // Check which edge has generated the irq |
mbed_official | 133:d4dda5c437f0 | 65 | if ((gpio->IDR & pin) == 0) { |
mbed_official | 133:d4dda5c437f0 | 66 | irq_handler(channel_ids[irq_index], IRQ_FALL); |
mbed_official | 133:d4dda5c437f0 | 67 | } |
mbed_official | 133:d4dda5c437f0 | 68 | else { |
mbed_official | 133:d4dda5c437f0 | 69 | irq_handler(channel_ids[irq_index], IRQ_RISE); |
mbed_official | 133:d4dda5c437f0 | 70 | } |
mbed_official | 133:d4dda5c437f0 | 71 | } |
mbed_official | 133:d4dda5c437f0 | 72 | |
mbed_official | 133:d4dda5c437f0 | 73 | // The irq_index is passed to the function |
mbed_official | 133:d4dda5c437f0 | 74 | static void gpio_irq0(void) {handle_interrupt_in(0);} // EXTI line 0 |
mbed_official | 133:d4dda5c437f0 | 75 | static void gpio_irq1(void) {handle_interrupt_in(1);} // EXTI line 1 |
mbed_official | 133:d4dda5c437f0 | 76 | static void gpio_irq2(void) {handle_interrupt_in(2);} // EXTI line 2 |
mbed_official | 133:d4dda5c437f0 | 77 | static void gpio_irq3(void) {handle_interrupt_in(3);} // EXTI line 3 |
mbed_official | 133:d4dda5c437f0 | 78 | static void gpio_irq4(void) {handle_interrupt_in(4);} // EXTI line 4 |
mbed_official | 133:d4dda5c437f0 | 79 | static void gpio_irq5(void) {handle_interrupt_in(5);} // EXTI lines 5 to 9 |
mbed_official | 133:d4dda5c437f0 | 80 | static void gpio_irq6(void) {handle_interrupt_in(6);} // EXTI lines 10 to 15 |
mbed_official | 133:d4dda5c437f0 | 81 | |
mbed_official | 133:d4dda5c437f0 | 82 | extern uint32_t Set_GPIO_Clock(uint32_t port_idx); |
mbed_official | 133:d4dda5c437f0 | 83 | |
mbed_official | 133:d4dda5c437f0 | 84 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { |
mbed_official | 133:d4dda5c437f0 | 85 | IRQn_Type irq_n = (IRQn_Type)0; |
mbed_official | 133:d4dda5c437f0 | 86 | uint32_t vector = 0; |
mbed_official | 133:d4dda5c437f0 | 87 | uint32_t irq_index; |
mbed_official | 133:d4dda5c437f0 | 88 | |
mbed_official | 133:d4dda5c437f0 | 89 | if (pin == NC) return -1; |
mbed_official | 133:d4dda5c437f0 | 90 | |
mbed_official | 133:d4dda5c437f0 | 91 | uint32_t port_index = STM_PORT(pin); |
mbed_official | 133:d4dda5c437f0 | 92 | uint32_t pin_index = STM_PIN(pin); |
mbed_official | 133:d4dda5c437f0 | 93 | |
mbed_official | 133:d4dda5c437f0 | 94 | // Select irq number and interrupt routine |
mbed_official | 133:d4dda5c437f0 | 95 | switch (pin_index) { |
mbed_official | 133:d4dda5c437f0 | 96 | case 0: |
mbed_official | 133:d4dda5c437f0 | 97 | irq_n = EXTI0_IRQn; |
mbed_official | 133:d4dda5c437f0 | 98 | vector = (uint32_t)&gpio_irq0; |
mbed_official | 133:d4dda5c437f0 | 99 | irq_index = 0; |
mbed_official | 133:d4dda5c437f0 | 100 | break; |
mbed_official | 133:d4dda5c437f0 | 101 | case 1: |
mbed_official | 133:d4dda5c437f0 | 102 | irq_n = EXTI1_IRQn; |
mbed_official | 133:d4dda5c437f0 | 103 | vector = (uint32_t)&gpio_irq1; |
mbed_official | 133:d4dda5c437f0 | 104 | irq_index = 1; |
mbed_official | 133:d4dda5c437f0 | 105 | break; |
mbed_official | 133:d4dda5c437f0 | 106 | case 2: |
mbed_official | 133:d4dda5c437f0 | 107 | irq_n = EXTI2_IRQn; |
mbed_official | 133:d4dda5c437f0 | 108 | vector = (uint32_t)&gpio_irq2; |
mbed_official | 133:d4dda5c437f0 | 109 | irq_index = 2; |
mbed_official | 133:d4dda5c437f0 | 110 | break; |
mbed_official | 133:d4dda5c437f0 | 111 | case 3: |
mbed_official | 133:d4dda5c437f0 | 112 | irq_n = EXTI3_IRQn; |
mbed_official | 133:d4dda5c437f0 | 113 | vector = (uint32_t)&gpio_irq3; |
mbed_official | 133:d4dda5c437f0 | 114 | irq_index = 3; |
mbed_official | 133:d4dda5c437f0 | 115 | break; |
mbed_official | 133:d4dda5c437f0 | 116 | case 4: |
mbed_official | 133:d4dda5c437f0 | 117 | irq_n = EXTI4_IRQn; |
mbed_official | 133:d4dda5c437f0 | 118 | vector = (uint32_t)&gpio_irq4; |
mbed_official | 133:d4dda5c437f0 | 119 | irq_index = 4; |
mbed_official | 133:d4dda5c437f0 | 120 | break; |
mbed_official | 133:d4dda5c437f0 | 121 | case 5: |
mbed_official | 133:d4dda5c437f0 | 122 | case 6: |
mbed_official | 133:d4dda5c437f0 | 123 | case 7: |
mbed_official | 133:d4dda5c437f0 | 124 | case 8: |
mbed_official | 133:d4dda5c437f0 | 125 | case 9: |
mbed_official | 133:d4dda5c437f0 | 126 | irq_n = EXTI9_5_IRQn; |
mbed_official | 133:d4dda5c437f0 | 127 | vector = (uint32_t)&gpio_irq5; |
mbed_official | 133:d4dda5c437f0 | 128 | irq_index = 5; |
mbed_official | 133:d4dda5c437f0 | 129 | break; |
mbed_official | 133:d4dda5c437f0 | 130 | case 10: |
mbed_official | 133:d4dda5c437f0 | 131 | case 11: |
mbed_official | 133:d4dda5c437f0 | 132 | case 12: |
mbed_official | 133:d4dda5c437f0 | 133 | case 13: |
mbed_official | 133:d4dda5c437f0 | 134 | case 14: |
mbed_official | 133:d4dda5c437f0 | 135 | case 15: |
mbed_official | 133:d4dda5c437f0 | 136 | irq_n = EXTI15_10_IRQn; |
mbed_official | 133:d4dda5c437f0 | 137 | vector = (uint32_t)&gpio_irq6; |
mbed_official | 133:d4dda5c437f0 | 138 | irq_index = 6; |
mbed_official | 133:d4dda5c437f0 | 139 | break; |
mbed_official | 133:d4dda5c437f0 | 140 | default: |
mbed_official | 133:d4dda5c437f0 | 141 | error("InterruptIn error: pin not supported.\n"); |
mbed_official | 133:d4dda5c437f0 | 142 | return -1; |
mbed_official | 133:d4dda5c437f0 | 143 | } |
mbed_official | 133:d4dda5c437f0 | 144 | |
mbed_official | 133:d4dda5c437f0 | 145 | // Enable GPIO clock |
mbed_official | 133:d4dda5c437f0 | 146 | uint32_t gpio_add = Set_GPIO_Clock(port_index); |
mbed_official | 133:d4dda5c437f0 | 147 | |
mbed_official | 133:d4dda5c437f0 | 148 | // Configure GPIO |
mbed_official | 133:d4dda5c437f0 | 149 | pin_function(pin, STM_PIN_DATA(STM_MODE_IT_FALLING, GPIO_NOPULL, 0)); |
mbed_official | 133:d4dda5c437f0 | 150 | |
mbed_official | 133:d4dda5c437f0 | 151 | // Enable EXTI interrupt |
mbed_official | 133:d4dda5c437f0 | 152 | NVIC_SetVector(irq_n, vector); |
mbed_official | 133:d4dda5c437f0 | 153 | NVIC_EnableIRQ(irq_n); |
mbed_official | 133:d4dda5c437f0 | 154 | |
mbed_official | 133:d4dda5c437f0 | 155 | // Save informations for future use |
mbed_official | 133:d4dda5c437f0 | 156 | obj->irq_n = irq_n; |
mbed_official | 133:d4dda5c437f0 | 157 | obj->irq_index = irq_index; |
mbed_official | 133:d4dda5c437f0 | 158 | obj->event = EDGE_NONE; |
mbed_official | 133:d4dda5c437f0 | 159 | obj->pin = pin; |
mbed_official | 133:d4dda5c437f0 | 160 | channel_ids[irq_index] = id; |
mbed_official | 133:d4dda5c437f0 | 161 | channel_gpio[irq_index] = gpio_add; |
mbed_official | 133:d4dda5c437f0 | 162 | channel_pin[irq_index] = pin_index; |
mbed_official | 133:d4dda5c437f0 | 163 | |
mbed_official | 133:d4dda5c437f0 | 164 | irq_handler = handler; |
mbed_official | 133:d4dda5c437f0 | 165 | |
mbed_official | 133:d4dda5c437f0 | 166 | return 0; |
mbed_official | 133:d4dda5c437f0 | 167 | } |
mbed_official | 133:d4dda5c437f0 | 168 | |
mbed_official | 133:d4dda5c437f0 | 169 | void gpio_irq_free(gpio_irq_t *obj) { |
mbed_official | 133:d4dda5c437f0 | 170 | channel_ids[obj->irq_index] = 0; |
mbed_official | 133:d4dda5c437f0 | 171 | channel_gpio[obj->irq_index] = 0; |
mbed_official | 133:d4dda5c437f0 | 172 | channel_pin[obj->irq_index] = 0; |
mbed_official | 133:d4dda5c437f0 | 173 | // Disable EXTI line |
mbed_official | 133:d4dda5c437f0 | 174 | pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
mbed_official | 133:d4dda5c437f0 | 175 | obj->event = EDGE_NONE; |
mbed_official | 133:d4dda5c437f0 | 176 | } |
mbed_official | 133:d4dda5c437f0 | 177 | |
mbed_official | 133:d4dda5c437f0 | 178 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { |
mbed_official | 133:d4dda5c437f0 | 179 | uint32_t mode = STM_MODE_INPUT; |
mbed_official | 133:d4dda5c437f0 | 180 | uint32_t pull = GPIO_NOPULL; |
mbed_official | 133:d4dda5c437f0 | 181 | |
mbed_official | 133:d4dda5c437f0 | 182 | if (enable) { |
mbed_official | 133:d4dda5c437f0 | 183 | |
mbed_official | 133:d4dda5c437f0 | 184 | pull = GPIO_NOPULL; |
mbed_official | 133:d4dda5c437f0 | 185 | |
mbed_official | 133:d4dda5c437f0 | 186 | if (event == IRQ_RISE) { |
mbed_official | 133:d4dda5c437f0 | 187 | if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) { |
mbed_official | 133:d4dda5c437f0 | 188 | mode = STM_MODE_IT_RISING_FALLING; |
mbed_official | 133:d4dda5c437f0 | 189 | obj->event = EDGE_BOTH; |
mbed_official | 133:d4dda5c437f0 | 190 | } |
mbed_official | 133:d4dda5c437f0 | 191 | else { // NONE or RISE |
mbed_official | 133:d4dda5c437f0 | 192 | mode = STM_MODE_IT_RISING; |
mbed_official | 133:d4dda5c437f0 | 193 | obj->event = EDGE_RISE; |
mbed_official | 133:d4dda5c437f0 | 194 | } |
mbed_official | 133:d4dda5c437f0 | 195 | } |
mbed_official | 133:d4dda5c437f0 | 196 | |
mbed_official | 133:d4dda5c437f0 | 197 | if (event == IRQ_FALL) { |
mbed_official | 133:d4dda5c437f0 | 198 | if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) { |
mbed_official | 133:d4dda5c437f0 | 199 | mode = STM_MODE_IT_RISING_FALLING; |
mbed_official | 133:d4dda5c437f0 | 200 | obj->event = EDGE_BOTH; |
mbed_official | 133:d4dda5c437f0 | 201 | } |
mbed_official | 133:d4dda5c437f0 | 202 | else { // NONE or FALL |
mbed_official | 133:d4dda5c437f0 | 203 | mode = STM_MODE_IT_FALLING; |
mbed_official | 133:d4dda5c437f0 | 204 | obj->event = EDGE_FALL; |
mbed_official | 133:d4dda5c437f0 | 205 | } |
mbed_official | 133:d4dda5c437f0 | 206 | } |
mbed_official | 133:d4dda5c437f0 | 207 | } |
mbed_official | 133:d4dda5c437f0 | 208 | else { |
mbed_official | 133:d4dda5c437f0 | 209 | mode = STM_MODE_INPUT; |
mbed_official | 133:d4dda5c437f0 | 210 | pull = GPIO_NOPULL; |
mbed_official | 133:d4dda5c437f0 | 211 | obj->event = EDGE_NONE; |
mbed_official | 133:d4dda5c437f0 | 212 | } |
mbed_official | 133:d4dda5c437f0 | 213 | |
mbed_official | 133:d4dda5c437f0 | 214 | pin_function(obj->pin, STM_PIN_DATA(mode, pull, 0)); |
mbed_official | 133:d4dda5c437f0 | 215 | } |
mbed_official | 133:d4dda5c437f0 | 216 | |
mbed_official | 133:d4dda5c437f0 | 217 | void gpio_irq_enable(gpio_irq_t *obj) { |
mbed_official | 133:d4dda5c437f0 | 218 | NVIC_EnableIRQ(obj->irq_n); |
mbed_official | 133:d4dda5c437f0 | 219 | } |
mbed_official | 133:d4dda5c437f0 | 220 | |
mbed_official | 133:d4dda5c437f0 | 221 | void gpio_irq_disable(gpio_irq_t *obj) { |
mbed_official | 133:d4dda5c437f0 | 222 | NVIC_DisableIRQ(obj->irq_n); |
mbed_official | 133:d4dda5c437f0 | 223 | obj->event = EDGE_NONE; |
mbed_official | 133:d4dda5c437f0 | 224 | } |