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mbed official
targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_ll_sdmmc.c@133:d4dda5c437f0, 2014-03-24 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 24 17:45:07 2014 +0000
- Revision:
- 133:d4dda5c437f0
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61
Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/
[STM32F4-Discovery (STM32F407VG)] initial port
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 133:d4dda5c437f0 | 1 | /** |
| mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_ll_sdmmc.c |
| mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
| mbed_official | 133:d4dda5c437f0 | 5 | * @version V1.0.0 |
| mbed_official | 133:d4dda5c437f0 | 6 | * @date 18-February-2014 |
| mbed_official | 133:d4dda5c437f0 | 7 | * @brief SDMMC Low Layer HAL module driver. |
| mbed_official | 133:d4dda5c437f0 | 8 | * |
| mbed_official | 133:d4dda5c437f0 | 9 | * This file provides firmware functions to manage the following |
| mbed_official | 133:d4dda5c437f0 | 10 | * functionalities of the SDMMC peripheral: |
| mbed_official | 133:d4dda5c437f0 | 11 | * + Initialization/de-initialization functions |
| mbed_official | 133:d4dda5c437f0 | 12 | * + I/O operation functions |
| mbed_official | 133:d4dda5c437f0 | 13 | * + Peripheral Control functions |
| mbed_official | 133:d4dda5c437f0 | 14 | * + Peripheral State functions |
| mbed_official | 133:d4dda5c437f0 | 15 | * |
| mbed_official | 133:d4dda5c437f0 | 16 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 17 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 18 | ##### SDMMC peripheral features ##### |
| mbed_official | 133:d4dda5c437f0 | 19 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 20 | [..] The SD/SDIO MMC card host interface (SDIO) provides an interface between the APB2 |
| mbed_official | 133:d4dda5c437f0 | 21 | peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDIO cards and CE-ATA |
| mbed_official | 133:d4dda5c437f0 | 22 | devices. |
| mbed_official | 133:d4dda5c437f0 | 23 | |
| mbed_official | 133:d4dda5c437f0 | 24 | [..] The MultiMedia Card system specifications are available through the MultiMedia Card |
| mbed_official | 133:d4dda5c437f0 | 25 | Association website at www.mmca.org, published by the MMCA technical committee. |
| mbed_official | 133:d4dda5c437f0 | 26 | SD memory card and SD I/O card system specifications are available through the SD card |
| mbed_official | 133:d4dda5c437f0 | 27 | Association website at www.sdcard.org. |
| mbed_official | 133:d4dda5c437f0 | 28 | CE-ATA system specifications are available through the CE-ATA work group web site at |
| mbed_official | 133:d4dda5c437f0 | 29 | www.ce-ata.org. |
| mbed_official | 133:d4dda5c437f0 | 30 | |
| mbed_official | 133:d4dda5c437f0 | 31 | [..] The SDIO features include the following: |
| mbed_official | 133:d4dda5c437f0 | 32 | (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support |
| mbed_official | 133:d4dda5c437f0 | 33 | for three different databus modes: 1-bit (default), 4-bit and 8-bit |
| mbed_official | 133:d4dda5c437f0 | 34 | (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility) |
| mbed_official | 133:d4dda5c437f0 | 35 | (+) Full compliance with SD Memory Card Specifications Version 2.0 |
| mbed_official | 133:d4dda5c437f0 | 36 | (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two |
| mbed_official | 133:d4dda5c437f0 | 37 | different data bus modes: 1-bit (default) and 4-bit |
| mbed_official | 133:d4dda5c437f0 | 38 | (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol |
| mbed_official | 133:d4dda5c437f0 | 39 | Rev1.1) |
| mbed_official | 133:d4dda5c437f0 | 40 | (+) Data transfer up to 48 MHz for the 8 bit mode |
| mbed_official | 133:d4dda5c437f0 | 41 | (+) Data and command output enable signals to control external bidirectional drivers. |
| mbed_official | 133:d4dda5c437f0 | 42 | |
| mbed_official | 133:d4dda5c437f0 | 43 | |
| mbed_official | 133:d4dda5c437f0 | 44 | ##### How to use this driver ##### |
| mbed_official | 133:d4dda5c437f0 | 45 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 46 | [..] |
| mbed_official | 133:d4dda5c437f0 | 47 | This driver is a considered as a driver of service for external devices drivers |
| mbed_official | 133:d4dda5c437f0 | 48 | that interfaces with the SDIO peripheral. |
| mbed_official | 133:d4dda5c437f0 | 49 | According to the device used (SD card/ MMC card / SDIO card ...), a set of APIs |
| mbed_official | 133:d4dda5c437f0 | 50 | is used in the device's driver to perform SDIO operations and functionalities. |
| mbed_official | 133:d4dda5c437f0 | 51 | |
| mbed_official | 133:d4dda5c437f0 | 52 | This driver is almost transparent for the final user, it is only used to implement other |
| mbed_official | 133:d4dda5c437f0 | 53 | functionalities of the external device. |
| mbed_official | 133:d4dda5c437f0 | 54 | |
| mbed_official | 133:d4dda5c437f0 | 55 | [..] |
| mbed_official | 133:d4dda5c437f0 | 56 | (+) The SDIO clock (SDIOCLK = 48 MHz) is coming from a specific output of PLL |
| mbed_official | 133:d4dda5c437f0 | 57 | (PLL48CLK). Before start working with SDIO peripheral make sure that the |
| mbed_official | 133:d4dda5c437f0 | 58 | PLL is well configured. |
| mbed_official | 133:d4dda5c437f0 | 59 | The SDIO peripheral uses two clock signals: |
| mbed_official | 133:d4dda5c437f0 | 60 | (++) SDIO adapter clock (SDIOCLK = 48 MHz) |
| mbed_official | 133:d4dda5c437f0 | 61 | (++) APB2 bus clock (PCLK2) |
| mbed_official | 133:d4dda5c437f0 | 62 | |
| mbed_official | 133:d4dda5c437f0 | 63 | -@@- PCLK2 and SDIO_CK clock frequencies must respect the following condition: |
| mbed_official | 133:d4dda5c437f0 | 64 | Frequency(PCLK2) >= (3 / 8 x Frequency(SDIO_CK)) |
| mbed_official | 133:d4dda5c437f0 | 65 | |
| mbed_official | 133:d4dda5c437f0 | 66 | (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDIO |
| mbed_official | 133:d4dda5c437f0 | 67 | peripheral. |
| mbed_official | 133:d4dda5c437f0 | 68 | |
| mbed_official | 133:d4dda5c437f0 | 69 | (+) Enable the Power ON State using the HAL_SDIO_PowerState_ON(hsdio) |
| mbed_official | 133:d4dda5c437f0 | 70 | function and disable it using the function HAL_SDIO_PowerState_OFF(hsdio). |
| mbed_official | 133:d4dda5c437f0 | 71 | |
| mbed_official | 133:d4dda5c437f0 | 72 | (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros. |
| mbed_official | 133:d4dda5c437f0 | 73 | |
| mbed_official | 133:d4dda5c437f0 | 74 | (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hsdio, IT) |
| mbed_official | 133:d4dda5c437f0 | 75 | and __SDIO_DISABLE_IT(hsdio, IT) if you need to use interrupt mode. |
| mbed_official | 133:d4dda5c437f0 | 76 | |
| mbed_official | 133:d4dda5c437f0 | 77 | (+) When using the DMA mode |
| mbed_official | 133:d4dda5c437f0 | 78 | (++) Configure the DMA in the MSP layer of the external device |
| mbed_official | 133:d4dda5c437f0 | 79 | (++) Active the needed channel Request |
| mbed_official | 133:d4dda5c437f0 | 80 | (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro |
| mbed_official | 133:d4dda5c437f0 | 81 | __SDIO_DMA_DISABLE(). |
| mbed_official | 133:d4dda5c437f0 | 82 | |
| mbed_official | 133:d4dda5c437f0 | 83 | (+) To control the CPSM (Command Path State Machine) and send |
| mbed_official | 133:d4dda5c437f0 | 84 | commands to the card use the HAL_SDIO_SendCommand(), |
| mbed_official | 133:d4dda5c437f0 | 85 | HAL_SDIO_GetCommandResponse() and HAL_SDIO_GetResponse() functions. First, user has |
| mbed_official | 133:d4dda5c437f0 | 86 | to fill the command structure (pointer to SDIO_CmdInitTypeDef) according |
| mbed_official | 133:d4dda5c437f0 | 87 | to the selected command to be sent. |
| mbed_official | 133:d4dda5c437f0 | 88 | The parameters that should be filled are: |
| mbed_official | 133:d4dda5c437f0 | 89 | (++) Command Argument |
| mbed_official | 133:d4dda5c437f0 | 90 | (++) Command Index |
| mbed_official | 133:d4dda5c437f0 | 91 | (++) Command Response type |
| mbed_official | 133:d4dda5c437f0 | 92 | (++) Command Wait |
| mbed_official | 133:d4dda5c437f0 | 93 | (++) CPSM Status (Enable or Disable). |
| mbed_official | 133:d4dda5c437f0 | 94 | |
| mbed_official | 133:d4dda5c437f0 | 95 | -@@- To check if the command is well received, read the SDIO_CMDRESP |
| mbed_official | 133:d4dda5c437f0 | 96 | register using the HAL_SDIO_GetCommandResponse(). |
| mbed_official | 133:d4dda5c437f0 | 97 | The SDIO responses registers (SDIO_RESP1 to SDIO_RESP2), use the |
| mbed_official | 133:d4dda5c437f0 | 98 | HAL_SDIO_GetResponse() function. |
| mbed_official | 133:d4dda5c437f0 | 99 | |
| mbed_official | 133:d4dda5c437f0 | 100 | (+) To control the DPSM (Data Path State Machine) and send/receive |
| mbed_official | 133:d4dda5c437f0 | 101 | data to/from the card use the HAL_SDIO_DataConfig(), HAL_SDIO_GetDataCounter(), |
| mbed_official | 133:d4dda5c437f0 | 102 | HAL_SDIO_ReadFIFO(), HAL_SDIO_WriteFIFO() and HAL_SDIO_GetFIFOCount() functions. |
| mbed_official | 133:d4dda5c437f0 | 103 | |
| mbed_official | 133:d4dda5c437f0 | 104 | *** Read Operations *** |
| mbed_official | 133:d4dda5c437f0 | 105 | ======================= |
| mbed_official | 133:d4dda5c437f0 | 106 | [..] |
| mbed_official | 133:d4dda5c437f0 | 107 | (#) First, user has to fill the data structure (pointer to |
| mbed_official | 133:d4dda5c437f0 | 108 | SDIO_DataInitTypeDef) according to the selected data type to be received. |
| mbed_official | 133:d4dda5c437f0 | 109 | The parameters that should be filled are: |
| mbed_official | 133:d4dda5c437f0 | 110 | (++) Data TimeOut |
| mbed_official | 133:d4dda5c437f0 | 111 | (++) Data Length |
| mbed_official | 133:d4dda5c437f0 | 112 | (++) Data Block size |
| mbed_official | 133:d4dda5c437f0 | 113 | (++) Data Transfer direction: should be from card (To SDIO) |
| mbed_official | 133:d4dda5c437f0 | 114 | (++) Data Transfer mode |
| mbed_official | 133:d4dda5c437f0 | 115 | (++) DPSM Status (Enable or Disable) |
| mbed_official | 133:d4dda5c437f0 | 116 | |
| mbed_official | 133:d4dda5c437f0 | 117 | (#) Configure the SDIO resources to receive the data from the card |
| mbed_official | 133:d4dda5c437f0 | 118 | according to selected transfer mode (Refer to Step 8, 9 and 10). |
| mbed_official | 133:d4dda5c437f0 | 119 | |
| mbed_official | 133:d4dda5c437f0 | 120 | (#) Send the selected Read command (refer to step 11). |
| mbed_official | 133:d4dda5c437f0 | 121 | |
| mbed_official | 133:d4dda5c437f0 | 122 | (#) Use the SDIO flags/interrupts to check the transfer status. |
| mbed_official | 133:d4dda5c437f0 | 123 | |
| mbed_official | 133:d4dda5c437f0 | 124 | *** Write Operations *** |
| mbed_official | 133:d4dda5c437f0 | 125 | ======================== |
| mbed_official | 133:d4dda5c437f0 | 126 | [..] |
| mbed_official | 133:d4dda5c437f0 | 127 | (#) First, user has to fill the data structure (pointer to |
| mbed_official | 133:d4dda5c437f0 | 128 | SDIO_DataInitTypeDef) according to the selected data type to be received. |
| mbed_official | 133:d4dda5c437f0 | 129 | The parameters that should be filled are: |
| mbed_official | 133:d4dda5c437f0 | 130 | (++) Data TimeOut |
| mbed_official | 133:d4dda5c437f0 | 131 | (++) Data Length |
| mbed_official | 133:d4dda5c437f0 | 132 | (++) Data Block size |
| mbed_official | 133:d4dda5c437f0 | 133 | (++) Data Transfer direction: should be to card (To CARD) |
| mbed_official | 133:d4dda5c437f0 | 134 | (++) Data Transfer mode |
| mbed_official | 133:d4dda5c437f0 | 135 | (++) DPSM Status (Enable or Disable) |
| mbed_official | 133:d4dda5c437f0 | 136 | |
| mbed_official | 133:d4dda5c437f0 | 137 | (#) Configure the SDIO resources to send the data to the card according to |
| mbed_official | 133:d4dda5c437f0 | 138 | selected transfer mode (Refer to Step 8, 9 and 10). |
| mbed_official | 133:d4dda5c437f0 | 139 | |
| mbed_official | 133:d4dda5c437f0 | 140 | (#) Send the selected Write command (refer to step 11). |
| mbed_official | 133:d4dda5c437f0 | 141 | |
| mbed_official | 133:d4dda5c437f0 | 142 | (#) Use the SDIO flags/interrupts to check the transfer status. |
| mbed_official | 133:d4dda5c437f0 | 143 | |
| mbed_official | 133:d4dda5c437f0 | 144 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 145 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 146 | * @attention |
| mbed_official | 133:d4dda5c437f0 | 147 | * |
| mbed_official | 133:d4dda5c437f0 | 148 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 133:d4dda5c437f0 | 149 | * |
| mbed_official | 133:d4dda5c437f0 | 150 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 133:d4dda5c437f0 | 151 | * are permitted provided that the following conditions are met: |
| mbed_official | 133:d4dda5c437f0 | 152 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 153 | * this list of conditions and the following disclaimer. |
| mbed_official | 133:d4dda5c437f0 | 154 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 155 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 133:d4dda5c437f0 | 156 | * and/or other materials provided with the distribution. |
| mbed_official | 133:d4dda5c437f0 | 157 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 133:d4dda5c437f0 | 158 | * may be used to endorse or promote products derived from this software |
| mbed_official | 133:d4dda5c437f0 | 159 | * without specific prior written permission. |
| mbed_official | 133:d4dda5c437f0 | 160 | * |
| mbed_official | 133:d4dda5c437f0 | 161 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 133:d4dda5c437f0 | 162 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 133:d4dda5c437f0 | 163 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 133:d4dda5c437f0 | 164 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 133:d4dda5c437f0 | 165 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 133:d4dda5c437f0 | 166 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 133:d4dda5c437f0 | 167 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 133:d4dda5c437f0 | 168 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 133:d4dda5c437f0 | 169 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 133:d4dda5c437f0 | 170 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 133:d4dda5c437f0 | 171 | * |
| mbed_official | 133:d4dda5c437f0 | 172 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 173 | */ |
| mbed_official | 133:d4dda5c437f0 | 174 | |
| mbed_official | 133:d4dda5c437f0 | 175 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 176 | #include "stm32f4xx_hal.h" |
| mbed_official | 133:d4dda5c437f0 | 177 | |
| mbed_official | 133:d4dda5c437f0 | 178 | /** @addtogroup STM32F4xx_HAL_Driver |
| mbed_official | 133:d4dda5c437f0 | 179 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 180 | */ |
| mbed_official | 133:d4dda5c437f0 | 181 | |
| mbed_official | 133:d4dda5c437f0 | 182 | /** @defgroup SDMMC |
| mbed_official | 133:d4dda5c437f0 | 183 | * @brief SDMMC HAL module driver |
| mbed_official | 133:d4dda5c437f0 | 184 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 185 | */ |
| mbed_official | 133:d4dda5c437f0 | 186 | |
| mbed_official | 133:d4dda5c437f0 | 187 | #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED) |
| mbed_official | 133:d4dda5c437f0 | 188 | |
| mbed_official | 133:d4dda5c437f0 | 189 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 190 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 191 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 192 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 193 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 194 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 195 | |
| mbed_official | 133:d4dda5c437f0 | 196 | /** @defgroup SDIO_Private_Functions |
| mbed_official | 133:d4dda5c437f0 | 197 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 198 | */ |
| mbed_official | 133:d4dda5c437f0 | 199 | |
| mbed_official | 133:d4dda5c437f0 | 200 | /** @defgroup HAL_SDIO_Group1 Initialization/de-initialization functions |
| mbed_official | 133:d4dda5c437f0 | 201 | * @brief Initialization and Configuration functions |
| mbed_official | 133:d4dda5c437f0 | 202 | * |
| mbed_official | 133:d4dda5c437f0 | 203 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 204 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 205 | ##### Initialization/de-initialization functions ##### |
| mbed_official | 133:d4dda5c437f0 | 206 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 207 | [..] This section provides functions allowing to: |
| mbed_official | 133:d4dda5c437f0 | 208 | |
| mbed_official | 133:d4dda5c437f0 | 209 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 210 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 211 | */ |
| mbed_official | 133:d4dda5c437f0 | 212 | |
| mbed_official | 133:d4dda5c437f0 | 213 | /** |
| mbed_official | 133:d4dda5c437f0 | 214 | * @brief Initializes the SDIO according to the specified |
| mbed_official | 133:d4dda5c437f0 | 215 | * parameters in the SDIO_InitTypeDef and create the associated handle. |
| mbed_official | 133:d4dda5c437f0 | 216 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 217 | * @param Init: SDIO initialization structure |
| mbed_official | 133:d4dda5c437f0 | 218 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 219 | */ |
| mbed_official | 133:d4dda5c437f0 | 220 | HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init) |
| mbed_official | 133:d4dda5c437f0 | 221 | { |
| mbed_official | 133:d4dda5c437f0 | 222 | __IO uint32_t tmpreg = 0; |
| mbed_official | 133:d4dda5c437f0 | 223 | |
| mbed_official | 133:d4dda5c437f0 | 224 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 225 | assert_param(IS_SDIO_ALL_INSTANCE(SDIOx)); |
| mbed_official | 133:d4dda5c437f0 | 226 | assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge)); |
| mbed_official | 133:d4dda5c437f0 | 227 | assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass)); |
| mbed_official | 133:d4dda5c437f0 | 228 | assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave)); |
| mbed_official | 133:d4dda5c437f0 | 229 | assert_param(IS_SDIO_BUS_WIDE(Init.BusWide)); |
| mbed_official | 133:d4dda5c437f0 | 230 | assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl)); |
| mbed_official | 133:d4dda5c437f0 | 231 | assert_param(IS_SDIO_CLKDIV(Init.ClockDiv)); |
| mbed_official | 133:d4dda5c437f0 | 232 | |
| mbed_official | 133:d4dda5c437f0 | 233 | /* Get the SDIO CLKCR value */ |
| mbed_official | 133:d4dda5c437f0 | 234 | tmpreg = SDIOx->CLKCR; |
| mbed_official | 133:d4dda5c437f0 | 235 | |
| mbed_official | 133:d4dda5c437f0 | 236 | /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ |
| mbed_official | 133:d4dda5c437f0 | 237 | tmpreg &= CLKCR_CLEAR_MASK; |
| mbed_official | 133:d4dda5c437f0 | 238 | |
| mbed_official | 133:d4dda5c437f0 | 239 | /* Set SDIO configuration parameters */ |
| mbed_official | 133:d4dda5c437f0 | 240 | tmpreg |= (Init.ClockEdge |\ |
| mbed_official | 133:d4dda5c437f0 | 241 | Init.ClockBypass |\ |
| mbed_official | 133:d4dda5c437f0 | 242 | Init.ClockPowerSave |\ |
| mbed_official | 133:d4dda5c437f0 | 243 | Init.BusWide |\ |
| mbed_official | 133:d4dda5c437f0 | 244 | Init.HardwareFlowControl |\ |
| mbed_official | 133:d4dda5c437f0 | 245 | Init.ClockDiv |
| mbed_official | 133:d4dda5c437f0 | 246 | ); |
| mbed_official | 133:d4dda5c437f0 | 247 | |
| mbed_official | 133:d4dda5c437f0 | 248 | /* Write to SDIO CLKCR */ |
| mbed_official | 133:d4dda5c437f0 | 249 | SDIOx->CLKCR = tmpreg; |
| mbed_official | 133:d4dda5c437f0 | 250 | |
| mbed_official | 133:d4dda5c437f0 | 251 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 252 | } |
| mbed_official | 133:d4dda5c437f0 | 253 | |
| mbed_official | 133:d4dda5c437f0 | 254 | |
| mbed_official | 133:d4dda5c437f0 | 255 | |
| mbed_official | 133:d4dda5c437f0 | 256 | /** |
| mbed_official | 133:d4dda5c437f0 | 257 | * @} |
| mbed_official | 133:d4dda5c437f0 | 258 | */ |
| mbed_official | 133:d4dda5c437f0 | 259 | |
| mbed_official | 133:d4dda5c437f0 | 260 | /** @defgroup HAL_SDIO_Group2 I/O operation functions |
| mbed_official | 133:d4dda5c437f0 | 261 | * @brief Data transfers functions |
| mbed_official | 133:d4dda5c437f0 | 262 | * |
| mbed_official | 133:d4dda5c437f0 | 263 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 264 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 265 | ##### I/O operation functions ##### |
| mbed_official | 133:d4dda5c437f0 | 266 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 267 | [..] |
| mbed_official | 133:d4dda5c437f0 | 268 | This subsection provides a set of functions allowing to manage the SDIO data |
| mbed_official | 133:d4dda5c437f0 | 269 | transfers. |
| mbed_official | 133:d4dda5c437f0 | 270 | |
| mbed_official | 133:d4dda5c437f0 | 271 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 272 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 273 | */ |
| mbed_official | 133:d4dda5c437f0 | 274 | |
| mbed_official | 133:d4dda5c437f0 | 275 | /** |
| mbed_official | 133:d4dda5c437f0 | 276 | * @brief Read data (word) from Rx FIFO in blocking mode (polling) |
| mbed_official | 133:d4dda5c437f0 | 277 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 278 | * @param ReadData: Data to read |
| mbed_official | 133:d4dda5c437f0 | 279 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 280 | */ |
| mbed_official | 133:d4dda5c437f0 | 281 | uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx) |
| mbed_official | 133:d4dda5c437f0 | 282 | { |
| mbed_official | 133:d4dda5c437f0 | 283 | /* Read data from Rx FIFO */ |
| mbed_official | 133:d4dda5c437f0 | 284 | return (SDIOx->FIFO); |
| mbed_official | 133:d4dda5c437f0 | 285 | } |
| mbed_official | 133:d4dda5c437f0 | 286 | |
| mbed_official | 133:d4dda5c437f0 | 287 | /** |
| mbed_official | 133:d4dda5c437f0 | 288 | * @brief Write data (word) to Tx FIFO in blocking mode (polling) |
| mbed_official | 133:d4dda5c437f0 | 289 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 290 | * @param pWriteData: pointer to data to write |
| mbed_official | 133:d4dda5c437f0 | 291 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 292 | */ |
| mbed_official | 133:d4dda5c437f0 | 293 | HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData) |
| mbed_official | 133:d4dda5c437f0 | 294 | { |
| mbed_official | 133:d4dda5c437f0 | 295 | /* Write data to FIFO */ |
| mbed_official | 133:d4dda5c437f0 | 296 | SDIOx->FIFO = *pWriteData; |
| mbed_official | 133:d4dda5c437f0 | 297 | |
| mbed_official | 133:d4dda5c437f0 | 298 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 299 | } |
| mbed_official | 133:d4dda5c437f0 | 300 | |
| mbed_official | 133:d4dda5c437f0 | 301 | /** |
| mbed_official | 133:d4dda5c437f0 | 302 | * @} |
| mbed_official | 133:d4dda5c437f0 | 303 | */ |
| mbed_official | 133:d4dda5c437f0 | 304 | |
| mbed_official | 133:d4dda5c437f0 | 305 | /** @defgroup HAL_SDIO_Group3 Peripheral Control functions |
| mbed_official | 133:d4dda5c437f0 | 306 | * @brief management functions |
| mbed_official | 133:d4dda5c437f0 | 307 | * |
| mbed_official | 133:d4dda5c437f0 | 308 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 309 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 310 | ##### Peripheral Control functions ##### |
| mbed_official | 133:d4dda5c437f0 | 311 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 312 | [..] |
| mbed_official | 133:d4dda5c437f0 | 313 | This subsection provides a set of functions allowing to control the SDIO data |
| mbed_official | 133:d4dda5c437f0 | 314 | transfers. |
| mbed_official | 133:d4dda5c437f0 | 315 | |
| mbed_official | 133:d4dda5c437f0 | 316 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 317 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 318 | */ |
| mbed_official | 133:d4dda5c437f0 | 319 | |
| mbed_official | 133:d4dda5c437f0 | 320 | /** |
| mbed_official | 133:d4dda5c437f0 | 321 | * @brief Set SDIO Power state to ON. |
| mbed_official | 133:d4dda5c437f0 | 322 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 323 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 324 | */ |
| mbed_official | 133:d4dda5c437f0 | 325 | HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx) |
| mbed_official | 133:d4dda5c437f0 | 326 | { |
| mbed_official | 133:d4dda5c437f0 | 327 | /* Set power state to ON */ |
| mbed_official | 133:d4dda5c437f0 | 328 | SDIOx->POWER = (uint32_t)0x00000003; |
| mbed_official | 133:d4dda5c437f0 | 329 | |
| mbed_official | 133:d4dda5c437f0 | 330 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 331 | } |
| mbed_official | 133:d4dda5c437f0 | 332 | |
| mbed_official | 133:d4dda5c437f0 | 333 | /** |
| mbed_official | 133:d4dda5c437f0 | 334 | * @brief Set SDIO Power state to OFF. |
| mbed_official | 133:d4dda5c437f0 | 335 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 336 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 337 | */ |
| mbed_official | 133:d4dda5c437f0 | 338 | HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx) |
| mbed_official | 133:d4dda5c437f0 | 339 | { |
| mbed_official | 133:d4dda5c437f0 | 340 | /* Set power state to OFF */ |
| mbed_official | 133:d4dda5c437f0 | 341 | SDIOx->POWER = (uint32_t)0x00000000; |
| mbed_official | 133:d4dda5c437f0 | 342 | |
| mbed_official | 133:d4dda5c437f0 | 343 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 344 | } |
| mbed_official | 133:d4dda5c437f0 | 345 | |
| mbed_official | 133:d4dda5c437f0 | 346 | /** |
| mbed_official | 133:d4dda5c437f0 | 347 | * @brief Get SDIO Power state. |
| mbed_official | 133:d4dda5c437f0 | 348 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 349 | * @retval Power status of the controller. The returned value can be one of the |
| mbed_official | 133:d4dda5c437f0 | 350 | * following values: |
| mbed_official | 133:d4dda5c437f0 | 351 | * - 0x00: Power OFF |
| mbed_official | 133:d4dda5c437f0 | 352 | * - 0x02: Power UP |
| mbed_official | 133:d4dda5c437f0 | 353 | * - 0x03: Power ON |
| mbed_official | 133:d4dda5c437f0 | 354 | */ |
| mbed_official | 133:d4dda5c437f0 | 355 | uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx) |
| mbed_official | 133:d4dda5c437f0 | 356 | { |
| mbed_official | 133:d4dda5c437f0 | 357 | return (SDIOx->POWER & (~PWR_PWRCTRL_MASK)); |
| mbed_official | 133:d4dda5c437f0 | 358 | } |
| mbed_official | 133:d4dda5c437f0 | 359 | |
| mbed_official | 133:d4dda5c437f0 | 360 | /** |
| mbed_official | 133:d4dda5c437f0 | 361 | * @brief Configure the SDIO command path according to the specified parameters in |
| mbed_official | 133:d4dda5c437f0 | 362 | * SDIO_CmdInitTypeDef structure and send the command |
| mbed_official | 133:d4dda5c437f0 | 363 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 364 | * @param SDIO_CmdInitStruct: pointer to a SDIO_CmdInitTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 365 | * the configuration information for the SDIO command |
| mbed_official | 133:d4dda5c437f0 | 366 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 367 | */ |
| mbed_official | 133:d4dda5c437f0 | 368 | HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct) |
| mbed_official | 133:d4dda5c437f0 | 369 | { |
| mbed_official | 133:d4dda5c437f0 | 370 | uint32_t tmpreg = 0; |
| mbed_official | 133:d4dda5c437f0 | 371 | |
| mbed_official | 133:d4dda5c437f0 | 372 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 373 | assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->CmdIndex)); |
| mbed_official | 133:d4dda5c437f0 | 374 | assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->Response)); |
| mbed_official | 133:d4dda5c437f0 | 375 | assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->WaitForInterrupt)); |
| mbed_official | 133:d4dda5c437f0 | 376 | assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->CPSM)); |
| mbed_official | 133:d4dda5c437f0 | 377 | |
| mbed_official | 133:d4dda5c437f0 | 378 | /* Set the SDIO Argument value */ |
| mbed_official | 133:d4dda5c437f0 | 379 | SDIOx->ARG = SDIO_CmdInitStruct->Argument; |
| mbed_official | 133:d4dda5c437f0 | 380 | |
| mbed_official | 133:d4dda5c437f0 | 381 | /* SDIO CMD Configuration */ |
| mbed_official | 133:d4dda5c437f0 | 382 | /* Get the SDIO CMD value */ |
| mbed_official | 133:d4dda5c437f0 | 383 | tmpreg = SDIOx->CMD; |
| mbed_official | 133:d4dda5c437f0 | 384 | |
| mbed_official | 133:d4dda5c437f0 | 385 | /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */ |
| mbed_official | 133:d4dda5c437f0 | 386 | tmpreg &= CMD_CLEAR_MASK; |
| mbed_official | 133:d4dda5c437f0 | 387 | |
| mbed_official | 133:d4dda5c437f0 | 388 | /* Set SDIO command parameters */ |
| mbed_official | 133:d4dda5c437f0 | 389 | tmpreg |= (uint32_t)(SDIO_CmdInitStruct->CmdIndex |\ |
| mbed_official | 133:d4dda5c437f0 | 390 | SDIO_CmdInitStruct->Response |\ |
| mbed_official | 133:d4dda5c437f0 | 391 | SDIO_CmdInitStruct->WaitForInterrupt |\ |
| mbed_official | 133:d4dda5c437f0 | 392 | SDIO_CmdInitStruct->CPSM); |
| mbed_official | 133:d4dda5c437f0 | 393 | |
| mbed_official | 133:d4dda5c437f0 | 394 | /* Write to SDIO CMD register */ |
| mbed_official | 133:d4dda5c437f0 | 395 | SDIOx->CMD = tmpreg; |
| mbed_official | 133:d4dda5c437f0 | 396 | |
| mbed_official | 133:d4dda5c437f0 | 397 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 398 | } |
| mbed_official | 133:d4dda5c437f0 | 399 | |
| mbed_official | 133:d4dda5c437f0 | 400 | /** |
| mbed_official | 133:d4dda5c437f0 | 401 | * @brief Return the command index of last command for which response received |
| mbed_official | 133:d4dda5c437f0 | 402 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 403 | * @retval Command index of the last command response received |
| mbed_official | 133:d4dda5c437f0 | 404 | */ |
| mbed_official | 133:d4dda5c437f0 | 405 | uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx) |
| mbed_official | 133:d4dda5c437f0 | 406 | { |
| mbed_official | 133:d4dda5c437f0 | 407 | return (uint8_t)(SDIOx->RESPCMD); |
| mbed_official | 133:d4dda5c437f0 | 408 | } |
| mbed_official | 133:d4dda5c437f0 | 409 | |
| mbed_official | 133:d4dda5c437f0 | 410 | |
| mbed_official | 133:d4dda5c437f0 | 411 | /** |
| mbed_official | 133:d4dda5c437f0 | 412 | * @brief Return the response received from the card for the last command |
| mbed_official | 133:d4dda5c437f0 | 413 | * @param SDIO_RESP: Specifies the SDIO response register. |
| mbed_official | 133:d4dda5c437f0 | 414 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 415 | * @arg SDIO_RESP1: Response Register 1 |
| mbed_official | 133:d4dda5c437f0 | 416 | * @arg SDIO_RESP2: Response Register 2 |
| mbed_official | 133:d4dda5c437f0 | 417 | * @arg SDIO_RESP3: Response Register 3 |
| mbed_official | 133:d4dda5c437f0 | 418 | * @arg SDIO_RESP4: Response Register 4 |
| mbed_official | 133:d4dda5c437f0 | 419 | * @retval The Corresponding response register value |
| mbed_official | 133:d4dda5c437f0 | 420 | */ |
| mbed_official | 133:d4dda5c437f0 | 421 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP) |
| mbed_official | 133:d4dda5c437f0 | 422 | { |
| mbed_official | 133:d4dda5c437f0 | 423 | __IO uint32_t tmp = 0; |
| mbed_official | 133:d4dda5c437f0 | 424 | |
| mbed_official | 133:d4dda5c437f0 | 425 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 426 | assert_param(IS_SDIO_RESP(SDIO_RESP)); |
| mbed_official | 133:d4dda5c437f0 | 427 | |
| mbed_official | 133:d4dda5c437f0 | 428 | /* Get the response */ |
| mbed_official | 133:d4dda5c437f0 | 429 | tmp = SDIO_RESP_ADDR + SDIO_RESP; |
| mbed_official | 133:d4dda5c437f0 | 430 | |
| mbed_official | 133:d4dda5c437f0 | 431 | return (*(__IO uint32_t *) tmp); |
| mbed_official | 133:d4dda5c437f0 | 432 | } |
| mbed_official | 133:d4dda5c437f0 | 433 | |
| mbed_official | 133:d4dda5c437f0 | 434 | /** |
| mbed_official | 133:d4dda5c437f0 | 435 | * @brief Configure the SDIO data path according to the specified |
| mbed_official | 133:d4dda5c437f0 | 436 | * parameters in the SDIO_DataInitTypeDef. |
| mbed_official | 133:d4dda5c437f0 | 437 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 438 | * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure |
| mbed_official | 133:d4dda5c437f0 | 439 | * that contains the configuration information for the SDIO command. |
| mbed_official | 133:d4dda5c437f0 | 440 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 441 | */ |
| mbed_official | 133:d4dda5c437f0 | 442 | HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct) |
| mbed_official | 133:d4dda5c437f0 | 443 | { |
| mbed_official | 133:d4dda5c437f0 | 444 | uint32_t tmpreg = 0; |
| mbed_official | 133:d4dda5c437f0 | 445 | |
| mbed_official | 133:d4dda5c437f0 | 446 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 447 | assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->DataLength)); |
| mbed_official | 133:d4dda5c437f0 | 448 | assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->DataBlockSize)); |
| mbed_official | 133:d4dda5c437f0 | 449 | assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->TransferDir)); |
| mbed_official | 133:d4dda5c437f0 | 450 | assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->TransferMode)); |
| mbed_official | 133:d4dda5c437f0 | 451 | assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->DPSM)); |
| mbed_official | 133:d4dda5c437f0 | 452 | |
| mbed_official | 133:d4dda5c437f0 | 453 | /* Set the SDIO Data TimeOut value */ |
| mbed_official | 133:d4dda5c437f0 | 454 | SDIOx->DTIMER = SDIO_DataInitStruct->DataTimeOut; |
| mbed_official | 133:d4dda5c437f0 | 455 | |
| mbed_official | 133:d4dda5c437f0 | 456 | /* Set the SDIO DataLength value */ |
| mbed_official | 133:d4dda5c437f0 | 457 | SDIOx->DLEN = SDIO_DataInitStruct->DataLength; |
| mbed_official | 133:d4dda5c437f0 | 458 | |
| mbed_official | 133:d4dda5c437f0 | 459 | /* SDIO DCTRL Configuration */ |
| mbed_official | 133:d4dda5c437f0 | 460 | /* Get the SDIO DCTRL value */ |
| mbed_official | 133:d4dda5c437f0 | 461 | tmpreg = SDIOx->DCTRL; |
| mbed_official | 133:d4dda5c437f0 | 462 | |
| mbed_official | 133:d4dda5c437f0 | 463 | /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */ |
| mbed_official | 133:d4dda5c437f0 | 464 | tmpreg &= DCTRL_CLEAR_MASK; |
| mbed_official | 133:d4dda5c437f0 | 465 | |
| mbed_official | 133:d4dda5c437f0 | 466 | /* Set the SDIO data configuration parameters */ |
| mbed_official | 133:d4dda5c437f0 | 467 | tmpreg |= (uint32_t)(SDIO_DataInitStruct->DataBlockSize |\ |
| mbed_official | 133:d4dda5c437f0 | 468 | SDIO_DataInitStruct->TransferDir |\ |
| mbed_official | 133:d4dda5c437f0 | 469 | SDIO_DataInitStruct->TransferMode |\ |
| mbed_official | 133:d4dda5c437f0 | 470 | SDIO_DataInitStruct->DPSM); |
| mbed_official | 133:d4dda5c437f0 | 471 | |
| mbed_official | 133:d4dda5c437f0 | 472 | /* Write to SDIO DCTRL */ |
| mbed_official | 133:d4dda5c437f0 | 473 | SDIOx->DCTRL = tmpreg; |
| mbed_official | 133:d4dda5c437f0 | 474 | |
| mbed_official | 133:d4dda5c437f0 | 475 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 476 | |
| mbed_official | 133:d4dda5c437f0 | 477 | } |
| mbed_official | 133:d4dda5c437f0 | 478 | |
| mbed_official | 133:d4dda5c437f0 | 479 | /** |
| mbed_official | 133:d4dda5c437f0 | 480 | * @brief Returns number of remaining data bytes to be transferred. |
| mbed_official | 133:d4dda5c437f0 | 481 | * @param SDIOx: Pointer to SDIO register base |
| mbed_official | 133:d4dda5c437f0 | 482 | * @retval Number of remaining data bytes to be transferred |
| mbed_official | 133:d4dda5c437f0 | 483 | */ |
| mbed_official | 133:d4dda5c437f0 | 484 | uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx) |
| mbed_official | 133:d4dda5c437f0 | 485 | { |
| mbed_official | 133:d4dda5c437f0 | 486 | return (SDIOx->DCOUNT); |
| mbed_official | 133:d4dda5c437f0 | 487 | } |
| mbed_official | 133:d4dda5c437f0 | 488 | |
| mbed_official | 133:d4dda5c437f0 | 489 | /** |
| mbed_official | 133:d4dda5c437f0 | 490 | * @brief Get the FIFO data |
| mbed_official | 133:d4dda5c437f0 | 491 | * @param hsdio: SDIO handle |
| mbed_official | 133:d4dda5c437f0 | 492 | * @retval Data received |
| mbed_official | 133:d4dda5c437f0 | 493 | */ |
| mbed_official | 133:d4dda5c437f0 | 494 | uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx) |
| mbed_official | 133:d4dda5c437f0 | 495 | { |
| mbed_official | 133:d4dda5c437f0 | 496 | return (SDIOx->FIFO); |
| mbed_official | 133:d4dda5c437f0 | 497 | } |
| mbed_official | 133:d4dda5c437f0 | 498 | |
| mbed_official | 133:d4dda5c437f0 | 499 | |
| mbed_official | 133:d4dda5c437f0 | 500 | /** |
| mbed_official | 133:d4dda5c437f0 | 501 | * @brief Sets one of the two options of inserting read wait interval. |
| mbed_official | 133:d4dda5c437f0 | 502 | * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode. |
| mbed_official | 133:d4dda5c437f0 | 503 | * This parameter can be: |
| mbed_official | 133:d4dda5c437f0 | 504 | * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDIOCLK |
| mbed_official | 133:d4dda5c437f0 | 505 | * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDIO_DATA2 |
| mbed_official | 133:d4dda5c437f0 | 506 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 507 | */ |
| mbed_official | 133:d4dda5c437f0 | 508 | HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode) |
| mbed_official | 133:d4dda5c437f0 | 509 | { |
| mbed_official | 133:d4dda5c437f0 | 510 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 511 | assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode)); |
| mbed_official | 133:d4dda5c437f0 | 512 | |
| mbed_official | 133:d4dda5c437f0 | 513 | *(__IO uint32_t *)DCTRL_RWMOD_BB = SDIO_ReadWaitMode; |
| mbed_official | 133:d4dda5c437f0 | 514 | |
| mbed_official | 133:d4dda5c437f0 | 515 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 516 | } |
| mbed_official | 133:d4dda5c437f0 | 517 | |
| mbed_official | 133:d4dda5c437f0 | 518 | |
| mbed_official | 133:d4dda5c437f0 | 519 | /** |
| mbed_official | 133:d4dda5c437f0 | 520 | * @} |
| mbed_official | 133:d4dda5c437f0 | 521 | */ |
| mbed_official | 133:d4dda5c437f0 | 522 | |
| mbed_official | 133:d4dda5c437f0 | 523 | /** @defgroup HAL_SDIO_Group3 Peripheral State functions |
| mbed_official | 133:d4dda5c437f0 | 524 | * @brief Peripheral State functions |
| mbed_official | 133:d4dda5c437f0 | 525 | * |
| mbed_official | 133:d4dda5c437f0 | 526 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 527 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 528 | ##### Peripheral State functions ##### |
| mbed_official | 133:d4dda5c437f0 | 529 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 530 | [..] |
| mbed_official | 133:d4dda5c437f0 | 531 | This subsection permit to get in runtime the status of the SDIO peripheral |
| mbed_official | 133:d4dda5c437f0 | 532 | and the data flow. |
| mbed_official | 133:d4dda5c437f0 | 533 | |
| mbed_official | 133:d4dda5c437f0 | 534 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 535 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 536 | */ |
| mbed_official | 133:d4dda5c437f0 | 537 | |
| mbed_official | 133:d4dda5c437f0 | 538 | /** |
| mbed_official | 133:d4dda5c437f0 | 539 | * @} |
| mbed_official | 133:d4dda5c437f0 | 540 | */ |
| mbed_official | 133:d4dda5c437f0 | 541 | |
| mbed_official | 133:d4dda5c437f0 | 542 | /** |
| mbed_official | 133:d4dda5c437f0 | 543 | * @} |
| mbed_official | 133:d4dda5c437f0 | 544 | */ |
| mbed_official | 133:d4dda5c437f0 | 545 | |
| mbed_official | 133:d4dda5c437f0 | 546 | #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */ |
| mbed_official | 133:d4dda5c437f0 | 547 | /** |
| mbed_official | 133:d4dda5c437f0 | 548 | * @} |
| mbed_official | 133:d4dda5c437f0 | 549 | */ |
| mbed_official | 133:d4dda5c437f0 | 550 | |
| mbed_official | 133:d4dda5c437f0 | 551 | /** |
| mbed_official | 133:d4dda5c437f0 | 552 | * @} |
| mbed_official | 133:d4dda5c437f0 | 553 | */ |
| mbed_official | 133:d4dda5c437f0 | 554 | |
| mbed_official | 133:d4dda5c437f0 | 555 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |