test
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mbed official
targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_tim_ex.c@133:d4dda5c437f0, 2014-03-24 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 24 17:45:07 2014 +0000
- Revision:
- 133:d4dda5c437f0
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61
Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/
[STM32F4-Discovery (STM32F407VG)] initial port
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 133:d4dda5c437f0 | 1 | /** |
| mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_tim_ex.c |
| mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
| mbed_official | 133:d4dda5c437f0 | 5 | * @version V1.0.0 |
| mbed_official | 133:d4dda5c437f0 | 6 | * @date 18-February-2014 |
| mbed_official | 133:d4dda5c437f0 | 7 | * @brief TIM HAL module driver. |
| mbed_official | 133:d4dda5c437f0 | 8 | * This file provides firmware functions to manage the following |
| mbed_official | 133:d4dda5c437f0 | 9 | * functionalities of the Timer extension peripheral: |
| mbed_official | 133:d4dda5c437f0 | 10 | * + Time Hall Sensor Interface Initialization |
| mbed_official | 133:d4dda5c437f0 | 11 | * + Time Hall Sensor Interface Start |
| mbed_official | 133:d4dda5c437f0 | 12 | * + Time Complementary signal bread and dead time configuration |
| mbed_official | 133:d4dda5c437f0 | 13 | * + Time Master and Slave synchronization configuration |
| mbed_official | 133:d4dda5c437f0 | 14 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 15 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 16 | ##### TIMER Extended features ##### |
| mbed_official | 133:d4dda5c437f0 | 17 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 18 | [..] |
| mbed_official | 133:d4dda5c437f0 | 19 | The Timer Extension features include: |
| mbed_official | 133:d4dda5c437f0 | 20 | (#) Complementary outputs with programmable dead-time for : |
| mbed_official | 133:d4dda5c437f0 | 21 | (++) Input Capture |
| mbed_official | 133:d4dda5c437f0 | 22 | (++) Output Compare |
| mbed_official | 133:d4dda5c437f0 | 23 | (++) PWM generation (Edge and Center-aligned Mode) |
| mbed_official | 133:d4dda5c437f0 | 24 | (++) One-pulse mode output |
| mbed_official | 133:d4dda5c437f0 | 25 | (#) Synchronization circuit to control the timer with external signals and to |
| mbed_official | 133:d4dda5c437f0 | 26 | interconnect several timers together. |
| mbed_official | 133:d4dda5c437f0 | 27 | (#) Break input to put the timer output signals in reset state or in a known state. |
| mbed_official | 133:d4dda5c437f0 | 28 | (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for |
| mbed_official | 133:d4dda5c437f0 | 29 | positioning purposes |
| mbed_official | 133:d4dda5c437f0 | 30 | |
| mbed_official | 133:d4dda5c437f0 | 31 | ##### How to use this driver ##### |
| mbed_official | 133:d4dda5c437f0 | 32 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 33 | [..] |
| mbed_official | 133:d4dda5c437f0 | 34 | (#) Initialize the TIM low level resources by implementing the following functions |
| mbed_official | 133:d4dda5c437f0 | 35 | depending from feature used : |
| mbed_official | 133:d4dda5c437f0 | 36 | (++) Complementary Output Compare : HAL_TIM_OC_MspInit() |
| mbed_official | 133:d4dda5c437f0 | 37 | (++) Complementary PWM generation : HAL_TIM_PWM_MspInit() |
| mbed_official | 133:d4dda5c437f0 | 38 | (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit() |
| mbed_official | 133:d4dda5c437f0 | 39 | (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit() |
| mbed_official | 133:d4dda5c437f0 | 40 | |
| mbed_official | 133:d4dda5c437f0 | 41 | (#) Initialize the TIM low level resources : |
| mbed_official | 133:d4dda5c437f0 | 42 | (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE(); |
| mbed_official | 133:d4dda5c437f0 | 43 | (##) TIM pins configuration |
| mbed_official | 133:d4dda5c437f0 | 44 | (+++) Enable the clock for the TIM GPIOs using the following function: |
| mbed_official | 133:d4dda5c437f0 | 45 | __GPIOx_CLK_ENABLE(); |
| mbed_official | 133:d4dda5c437f0 | 46 | (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); |
| mbed_official | 133:d4dda5c437f0 | 47 | |
| mbed_official | 133:d4dda5c437f0 | 48 | (#) The external Clock can be configured, if needed (the default clock is the |
| mbed_official | 133:d4dda5c437f0 | 49 | internal clock from the APBx), using the following function: |
| mbed_official | 133:d4dda5c437f0 | 50 | HAL_TIM_ConfigClockSource, the clock configuration should be done before |
| mbed_official | 133:d4dda5c437f0 | 51 | any start function. |
| mbed_official | 133:d4dda5c437f0 | 52 | |
| mbed_official | 133:d4dda5c437f0 | 53 | (#) Configure the TIM in the desired functioning mode using one of the |
| mbed_official | 133:d4dda5c437f0 | 54 | initialization function of this driver: |
| mbed_official | 133:d4dda5c437f0 | 55 | (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the |
| mbed_official | 133:d4dda5c437f0 | 56 | Timer Hall Sensor Interface and the commutation event with the corresponding |
| mbed_official | 133:d4dda5c437f0 | 57 | Interrupt and DMA request if needed (Note that One Timer is used to interface |
| mbed_official | 133:d4dda5c437f0 | 58 | with the Hall sensor Interface and another Timer should be used to use |
| mbed_official | 133:d4dda5c437f0 | 59 | the commutation event). |
| mbed_official | 133:d4dda5c437f0 | 60 | |
| mbed_official | 133:d4dda5c437f0 | 61 | (#) Activate the TIM peripheral using one of the start functions: |
| mbed_official | 133:d4dda5c437f0 | 62 | (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() |
| mbed_official | 133:d4dda5c437f0 | 63 | (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() |
| mbed_official | 133:d4dda5c437f0 | 64 | (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() |
| mbed_official | 133:d4dda5c437f0 | 65 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). |
| mbed_official | 133:d4dda5c437f0 | 66 | |
| mbed_official | 133:d4dda5c437f0 | 67 | |
| mbed_official | 133:d4dda5c437f0 | 68 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 69 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 70 | * @attention |
| mbed_official | 133:d4dda5c437f0 | 71 | * |
| mbed_official | 133:d4dda5c437f0 | 72 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 133:d4dda5c437f0 | 73 | * |
| mbed_official | 133:d4dda5c437f0 | 74 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 133:d4dda5c437f0 | 75 | * are permitted provided that the following conditions are met: |
| mbed_official | 133:d4dda5c437f0 | 76 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 77 | * this list of conditions and the following disclaimer. |
| mbed_official | 133:d4dda5c437f0 | 78 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 79 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 133:d4dda5c437f0 | 80 | * and/or other materials provided with the distribution. |
| mbed_official | 133:d4dda5c437f0 | 81 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 133:d4dda5c437f0 | 82 | * may be used to endorse or promote products derived from this software |
| mbed_official | 133:d4dda5c437f0 | 83 | * without specific prior written permission. |
| mbed_official | 133:d4dda5c437f0 | 84 | * |
| mbed_official | 133:d4dda5c437f0 | 85 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 133:d4dda5c437f0 | 86 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 133:d4dda5c437f0 | 87 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 133:d4dda5c437f0 | 88 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 133:d4dda5c437f0 | 89 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 133:d4dda5c437f0 | 90 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 133:d4dda5c437f0 | 91 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 133:d4dda5c437f0 | 92 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 133:d4dda5c437f0 | 93 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 133:d4dda5c437f0 | 94 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 133:d4dda5c437f0 | 95 | * |
| mbed_official | 133:d4dda5c437f0 | 96 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 97 | */ |
| mbed_official | 133:d4dda5c437f0 | 98 | |
| mbed_official | 133:d4dda5c437f0 | 99 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 100 | #include "stm32f4xx_hal.h" |
| mbed_official | 133:d4dda5c437f0 | 101 | |
| mbed_official | 133:d4dda5c437f0 | 102 | /** @addtogroup STM32F4xx_HAL_Driver |
| mbed_official | 133:d4dda5c437f0 | 103 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 104 | */ |
| mbed_official | 133:d4dda5c437f0 | 105 | |
| mbed_official | 133:d4dda5c437f0 | 106 | /** @defgroup TIMEx |
| mbed_official | 133:d4dda5c437f0 | 107 | * @brief TIM HAL module driver |
| mbed_official | 133:d4dda5c437f0 | 108 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 109 | */ |
| mbed_official | 133:d4dda5c437f0 | 110 | |
| mbed_official | 133:d4dda5c437f0 | 111 | #ifdef HAL_TIM_MODULE_ENABLED |
| mbed_official | 133:d4dda5c437f0 | 112 | |
| mbed_official | 133:d4dda5c437f0 | 113 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 114 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 115 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 116 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 117 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 118 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); |
| mbed_official | 133:d4dda5c437f0 | 119 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 120 | |
| mbed_official | 133:d4dda5c437f0 | 121 | /** @defgroup TIMEx_Private_Functions |
| mbed_official | 133:d4dda5c437f0 | 122 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 123 | */ |
| mbed_official | 133:d4dda5c437f0 | 124 | |
| mbed_official | 133:d4dda5c437f0 | 125 | /** @defgroup TIMEx_Group1 Timer Hall Sensor functions |
| mbed_official | 133:d4dda5c437f0 | 126 | * @brief Timer Hall Sensor functions |
| mbed_official | 133:d4dda5c437f0 | 127 | * |
| mbed_official | 133:d4dda5c437f0 | 128 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 129 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 130 | ##### Timer Hall Sensor functions ##### |
| mbed_official | 133:d4dda5c437f0 | 131 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 132 | [..] |
| mbed_official | 133:d4dda5c437f0 | 133 | This section provides functions allowing to: |
| mbed_official | 133:d4dda5c437f0 | 134 | (+) Initialize and configure TIM HAL Sensor. |
| mbed_official | 133:d4dda5c437f0 | 135 | (+) De-initialize TIM HAL Sensor. |
| mbed_official | 133:d4dda5c437f0 | 136 | (+) Start the Hall Sensor Interface. |
| mbed_official | 133:d4dda5c437f0 | 137 | (+) Stop the Hall Sensor Interface. |
| mbed_official | 133:d4dda5c437f0 | 138 | (+) Start the Hall Sensor Interface and enable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 139 | (+) Stop the Hall Sensor Interface and disable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 140 | (+) Start the Hall Sensor Interface and enable DMA transfers. |
| mbed_official | 133:d4dda5c437f0 | 141 | (+) Stop the Hall Sensor Interface and disable DMA transfers. |
| mbed_official | 133:d4dda5c437f0 | 142 | |
| mbed_official | 133:d4dda5c437f0 | 143 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 144 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 145 | */ |
| mbed_official | 133:d4dda5c437f0 | 146 | /** |
| mbed_official | 133:d4dda5c437f0 | 147 | * @brief Initializes the TIM Hall Sensor Interface and create the associated handle. |
| mbed_official | 133:d4dda5c437f0 | 148 | * @param htim: TIM Encoder Interface handle |
| mbed_official | 133:d4dda5c437f0 | 149 | * @param sConfig: TIM Hall Sensor configuration structure |
| mbed_official | 133:d4dda5c437f0 | 150 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 151 | */ |
| mbed_official | 133:d4dda5c437f0 | 152 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) |
| mbed_official | 133:d4dda5c437f0 | 153 | { |
| mbed_official | 133:d4dda5c437f0 | 154 | TIM_OC_InitTypeDef OC_Config; |
| mbed_official | 133:d4dda5c437f0 | 155 | |
| mbed_official | 133:d4dda5c437f0 | 156 | /* Check the TIM handle allocation */ |
| mbed_official | 133:d4dda5c437f0 | 157 | if(htim == NULL) |
| mbed_official | 133:d4dda5c437f0 | 158 | { |
| mbed_official | 133:d4dda5c437f0 | 159 | return HAL_ERROR; |
| mbed_official | 133:d4dda5c437f0 | 160 | } |
| mbed_official | 133:d4dda5c437f0 | 161 | |
| mbed_official | 133:d4dda5c437f0 | 162 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 163 | assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); |
| mbed_official | 133:d4dda5c437f0 | 164 | assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); |
| mbed_official | 133:d4dda5c437f0 | 165 | assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); |
| mbed_official | 133:d4dda5c437f0 | 166 | assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); |
| mbed_official | 133:d4dda5c437f0 | 167 | assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); |
| mbed_official | 133:d4dda5c437f0 | 168 | |
| mbed_official | 133:d4dda5c437f0 | 169 | /* Set the TIM state */ |
| mbed_official | 133:d4dda5c437f0 | 170 | htim->State= HAL_TIM_STATE_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 171 | |
| mbed_official | 133:d4dda5c437f0 | 172 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
| mbed_official | 133:d4dda5c437f0 | 173 | HAL_TIMEx_HallSensor_MspInit(htim); |
| mbed_official | 133:d4dda5c437f0 | 174 | |
| mbed_official | 133:d4dda5c437f0 | 175 | /* Configure the Time base in the Encoder Mode */ |
| mbed_official | 133:d4dda5c437f0 | 176 | TIM_Base_SetConfig(htim->Instance, &htim->Init); |
| mbed_official | 133:d4dda5c437f0 | 177 | |
| mbed_official | 133:d4dda5c437f0 | 178 | /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ |
| mbed_official | 133:d4dda5c437f0 | 179 | TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); |
| mbed_official | 133:d4dda5c437f0 | 180 | |
| mbed_official | 133:d4dda5c437f0 | 181 | /* Reset the IC1PSC Bits */ |
| mbed_official | 133:d4dda5c437f0 | 182 | htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; |
| mbed_official | 133:d4dda5c437f0 | 183 | /* Set the IC1PSC value */ |
| mbed_official | 133:d4dda5c437f0 | 184 | htim->Instance->CCMR1 |= sConfig->IC1Prescaler; |
| mbed_official | 133:d4dda5c437f0 | 185 | |
| mbed_official | 133:d4dda5c437f0 | 186 | /* Enable the Hall sensor interface (XOR function of the three inputs) */ |
| mbed_official | 133:d4dda5c437f0 | 187 | htim->Instance->CR2 |= TIM_CR2_TI1S; |
| mbed_official | 133:d4dda5c437f0 | 188 | |
| mbed_official | 133:d4dda5c437f0 | 189 | /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ |
| mbed_official | 133:d4dda5c437f0 | 190 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| mbed_official | 133:d4dda5c437f0 | 191 | htim->Instance->SMCR |= TIM_TS_TI1F_ED; |
| mbed_official | 133:d4dda5c437f0 | 192 | |
| mbed_official | 133:d4dda5c437f0 | 193 | /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ |
| mbed_official | 133:d4dda5c437f0 | 194 | htim->Instance->SMCR &= ~TIM_SMCR_SMS; |
| mbed_official | 133:d4dda5c437f0 | 195 | htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; |
| mbed_official | 133:d4dda5c437f0 | 196 | |
| mbed_official | 133:d4dda5c437f0 | 197 | /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ |
| mbed_official | 133:d4dda5c437f0 | 198 | OC_Config.OCFastMode = TIM_OCFAST_DISABLE; |
| mbed_official | 133:d4dda5c437f0 | 199 | OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; |
| mbed_official | 133:d4dda5c437f0 | 200 | OC_Config.OCMode = TIM_OCMODE_PWM2; |
| mbed_official | 133:d4dda5c437f0 | 201 | OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
| mbed_official | 133:d4dda5c437f0 | 202 | OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; |
| mbed_official | 133:d4dda5c437f0 | 203 | OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; |
| mbed_official | 133:d4dda5c437f0 | 204 | OC_Config.Pulse = sConfig->Commutation_Delay; |
| mbed_official | 133:d4dda5c437f0 | 205 | |
| mbed_official | 133:d4dda5c437f0 | 206 | TIM_OC2_SetConfig(htim->Instance, &OC_Config); |
| mbed_official | 133:d4dda5c437f0 | 207 | |
| mbed_official | 133:d4dda5c437f0 | 208 | /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 |
| mbed_official | 133:d4dda5c437f0 | 209 | register to 101 */ |
| mbed_official | 133:d4dda5c437f0 | 210 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
| mbed_official | 133:d4dda5c437f0 | 211 | htim->Instance->CR2 |= TIM_TRGO_OC2REF; |
| mbed_official | 133:d4dda5c437f0 | 212 | |
| mbed_official | 133:d4dda5c437f0 | 213 | /* Initialize the TIM state*/ |
| mbed_official | 133:d4dda5c437f0 | 214 | htim->State= HAL_TIM_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 215 | |
| mbed_official | 133:d4dda5c437f0 | 216 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 217 | } |
| mbed_official | 133:d4dda5c437f0 | 218 | |
| mbed_official | 133:d4dda5c437f0 | 219 | /** |
| mbed_official | 133:d4dda5c437f0 | 220 | * @brief DeInitializes the TIM Hall Sensor interface |
| mbed_official | 133:d4dda5c437f0 | 221 | * @param htim: TIM Hall Sensor handle |
| mbed_official | 133:d4dda5c437f0 | 222 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 223 | */ |
| mbed_official | 133:d4dda5c437f0 | 224 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 225 | { |
| mbed_official | 133:d4dda5c437f0 | 226 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 227 | assert_param(IS_TIM_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 228 | |
| mbed_official | 133:d4dda5c437f0 | 229 | htim->State = HAL_TIM_STATE_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 230 | |
| mbed_official | 133:d4dda5c437f0 | 231 | /* Disable the TIM Peripheral Clock */ |
| mbed_official | 133:d4dda5c437f0 | 232 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 233 | |
| mbed_official | 133:d4dda5c437f0 | 234 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
| mbed_official | 133:d4dda5c437f0 | 235 | HAL_TIMEx_HallSensor_MspDeInit(htim); |
| mbed_official | 133:d4dda5c437f0 | 236 | |
| mbed_official | 133:d4dda5c437f0 | 237 | /* Change TIM state */ |
| mbed_official | 133:d4dda5c437f0 | 238 | htim->State = HAL_TIM_STATE_RESET; |
| mbed_official | 133:d4dda5c437f0 | 239 | |
| mbed_official | 133:d4dda5c437f0 | 240 | /* Release Lock */ |
| mbed_official | 133:d4dda5c437f0 | 241 | __HAL_UNLOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 242 | |
| mbed_official | 133:d4dda5c437f0 | 243 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 244 | } |
| mbed_official | 133:d4dda5c437f0 | 245 | |
| mbed_official | 133:d4dda5c437f0 | 246 | /** |
| mbed_official | 133:d4dda5c437f0 | 247 | * @brief Initializes the TIM Hall Sensor MSP. |
| mbed_official | 133:d4dda5c437f0 | 248 | * @param htim: TIM handle |
| mbed_official | 133:d4dda5c437f0 | 249 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 250 | */ |
| mbed_official | 133:d4dda5c437f0 | 251 | __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 252 | { |
| mbed_official | 133:d4dda5c437f0 | 253 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 133:d4dda5c437f0 | 254 | the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file |
| mbed_official | 133:d4dda5c437f0 | 255 | */ |
| mbed_official | 133:d4dda5c437f0 | 256 | } |
| mbed_official | 133:d4dda5c437f0 | 257 | |
| mbed_official | 133:d4dda5c437f0 | 258 | /** |
| mbed_official | 133:d4dda5c437f0 | 259 | * @brief DeInitializes TIM Hall Sensor MSP. |
| mbed_official | 133:d4dda5c437f0 | 260 | * @param htim: TIM handle |
| mbed_official | 133:d4dda5c437f0 | 261 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 262 | */ |
| mbed_official | 133:d4dda5c437f0 | 263 | __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 264 | { |
| mbed_official | 133:d4dda5c437f0 | 265 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 133:d4dda5c437f0 | 266 | the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file |
| mbed_official | 133:d4dda5c437f0 | 267 | */ |
| mbed_official | 133:d4dda5c437f0 | 268 | } |
| mbed_official | 133:d4dda5c437f0 | 269 | |
| mbed_official | 133:d4dda5c437f0 | 270 | /** |
| mbed_official | 133:d4dda5c437f0 | 271 | * @brief Starts the TIM Hall Sensor Interface. |
| mbed_official | 133:d4dda5c437f0 | 272 | * @param htim : TIM Hall Sensor handle |
| mbed_official | 133:d4dda5c437f0 | 273 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 274 | */ |
| mbed_official | 133:d4dda5c437f0 | 275 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 276 | { |
| mbed_official | 133:d4dda5c437f0 | 277 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 278 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 279 | |
| mbed_official | 133:d4dda5c437f0 | 280 | /* Enable the Input Capture channels 1 |
| mbed_official | 133:d4dda5c437f0 | 281 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| mbed_official | 133:d4dda5c437f0 | 282 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 283 | |
| mbed_official | 133:d4dda5c437f0 | 284 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 285 | __HAL_TIM_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 286 | |
| mbed_official | 133:d4dda5c437f0 | 287 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 288 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 289 | } |
| mbed_official | 133:d4dda5c437f0 | 290 | |
| mbed_official | 133:d4dda5c437f0 | 291 | /** |
| mbed_official | 133:d4dda5c437f0 | 292 | * @brief Stops the TIM Hall sensor Interface. |
| mbed_official | 133:d4dda5c437f0 | 293 | * @param htim : TIM Hall Sensor handle |
| mbed_official | 133:d4dda5c437f0 | 294 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 295 | */ |
| mbed_official | 133:d4dda5c437f0 | 296 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 297 | { |
| mbed_official | 133:d4dda5c437f0 | 298 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 299 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 300 | |
| mbed_official | 133:d4dda5c437f0 | 301 | /* Disable the Input Capture channels 1, 2 and 3 |
| mbed_official | 133:d4dda5c437f0 | 302 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| mbed_official | 133:d4dda5c437f0 | 303 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 304 | |
| mbed_official | 133:d4dda5c437f0 | 305 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 306 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 307 | |
| mbed_official | 133:d4dda5c437f0 | 308 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 309 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 310 | } |
| mbed_official | 133:d4dda5c437f0 | 311 | |
| mbed_official | 133:d4dda5c437f0 | 312 | /** |
| mbed_official | 133:d4dda5c437f0 | 313 | * @brief Starts the TIM Hall Sensor Interface in interrupt mode. |
| mbed_official | 133:d4dda5c437f0 | 314 | * @param htim : TIM Hall Sensor handle |
| mbed_official | 133:d4dda5c437f0 | 315 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 316 | */ |
| mbed_official | 133:d4dda5c437f0 | 317 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 318 | { |
| mbed_official | 133:d4dda5c437f0 | 319 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 320 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 321 | |
| mbed_official | 133:d4dda5c437f0 | 322 | /* Enable the capture compare Interrupts 1 event */ |
| mbed_official | 133:d4dda5c437f0 | 323 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| mbed_official | 133:d4dda5c437f0 | 324 | |
| mbed_official | 133:d4dda5c437f0 | 325 | /* Enable the Input Capture channels 1 |
| mbed_official | 133:d4dda5c437f0 | 326 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| mbed_official | 133:d4dda5c437f0 | 327 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 328 | |
| mbed_official | 133:d4dda5c437f0 | 329 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 330 | __HAL_TIM_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 331 | |
| mbed_official | 133:d4dda5c437f0 | 332 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 333 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 334 | } |
| mbed_official | 133:d4dda5c437f0 | 335 | |
| mbed_official | 133:d4dda5c437f0 | 336 | /** |
| mbed_official | 133:d4dda5c437f0 | 337 | * @brief Stops the TIM Hall Sensor Interface in interrupt mode. |
| mbed_official | 133:d4dda5c437f0 | 338 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 339 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 340 | */ |
| mbed_official | 133:d4dda5c437f0 | 341 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 342 | { |
| mbed_official | 133:d4dda5c437f0 | 343 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 344 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 345 | |
| mbed_official | 133:d4dda5c437f0 | 346 | /* Disable the Input Capture channels 1 |
| mbed_official | 133:d4dda5c437f0 | 347 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| mbed_official | 133:d4dda5c437f0 | 348 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 349 | |
| mbed_official | 133:d4dda5c437f0 | 350 | /* Disable the capture compare Interrupts event */ |
| mbed_official | 133:d4dda5c437f0 | 351 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| mbed_official | 133:d4dda5c437f0 | 352 | |
| mbed_official | 133:d4dda5c437f0 | 353 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 354 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 355 | |
| mbed_official | 133:d4dda5c437f0 | 356 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 357 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 358 | } |
| mbed_official | 133:d4dda5c437f0 | 359 | |
| mbed_official | 133:d4dda5c437f0 | 360 | /** |
| mbed_official | 133:d4dda5c437f0 | 361 | * @brief Starts the TIM Hall Sensor Interface in DMA mode. |
| mbed_official | 133:d4dda5c437f0 | 362 | * @param htim : TIM Hall Sensor handle |
| mbed_official | 133:d4dda5c437f0 | 363 | * @param pData: The destination Buffer address. |
| mbed_official | 133:d4dda5c437f0 | 364 | * @param Length: The length of data to be transferred from TIM peripheral to memory. |
| mbed_official | 133:d4dda5c437f0 | 365 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 366 | */ |
| mbed_official | 133:d4dda5c437f0 | 367 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) |
| mbed_official | 133:d4dda5c437f0 | 368 | { |
| mbed_official | 133:d4dda5c437f0 | 369 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 370 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 371 | |
| mbed_official | 133:d4dda5c437f0 | 372 | if((htim->State == HAL_TIM_STATE_BUSY)) |
| mbed_official | 133:d4dda5c437f0 | 373 | { |
| mbed_official | 133:d4dda5c437f0 | 374 | return HAL_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 375 | } |
| mbed_official | 133:d4dda5c437f0 | 376 | else if((htim->State == HAL_TIM_STATE_READY)) |
| mbed_official | 133:d4dda5c437f0 | 377 | { |
| mbed_official | 133:d4dda5c437f0 | 378 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
| mbed_official | 133:d4dda5c437f0 | 379 | { |
| mbed_official | 133:d4dda5c437f0 | 380 | return HAL_ERROR; |
| mbed_official | 133:d4dda5c437f0 | 381 | } |
| mbed_official | 133:d4dda5c437f0 | 382 | else |
| mbed_official | 133:d4dda5c437f0 | 383 | { |
| mbed_official | 133:d4dda5c437f0 | 384 | htim->State = HAL_TIM_STATE_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 385 | } |
| mbed_official | 133:d4dda5c437f0 | 386 | } |
| mbed_official | 133:d4dda5c437f0 | 387 | /* Enable the Input Capture channels 1 |
| mbed_official | 133:d4dda5c437f0 | 388 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| mbed_official | 133:d4dda5c437f0 | 389 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 390 | |
| mbed_official | 133:d4dda5c437f0 | 391 | /* Set the DMA Input Capture 1 Callback */ |
| mbed_official | 133:d4dda5c437f0 | 392 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt; |
| mbed_official | 133:d4dda5c437f0 | 393 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 394 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
| mbed_official | 133:d4dda5c437f0 | 395 | |
| mbed_official | 133:d4dda5c437f0 | 396 | /* Enable the DMA Stream for Capture 1*/ |
| mbed_official | 133:d4dda5c437f0 | 397 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); |
| mbed_official | 133:d4dda5c437f0 | 398 | |
| mbed_official | 133:d4dda5c437f0 | 399 | /* Enable the capture compare 1 Interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 400 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
| mbed_official | 133:d4dda5c437f0 | 401 | |
| mbed_official | 133:d4dda5c437f0 | 402 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 403 | __HAL_TIM_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 404 | |
| mbed_official | 133:d4dda5c437f0 | 405 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 406 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 407 | } |
| mbed_official | 133:d4dda5c437f0 | 408 | |
| mbed_official | 133:d4dda5c437f0 | 409 | /** |
| mbed_official | 133:d4dda5c437f0 | 410 | * @brief Stops the TIM Hall Sensor Interface in DMA mode. |
| mbed_official | 133:d4dda5c437f0 | 411 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 412 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 413 | */ |
| mbed_official | 133:d4dda5c437f0 | 414 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 415 | { |
| mbed_official | 133:d4dda5c437f0 | 416 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 417 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 418 | |
| mbed_official | 133:d4dda5c437f0 | 419 | /* Disable the Input Capture channels 1 |
| mbed_official | 133:d4dda5c437f0 | 420 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| mbed_official | 133:d4dda5c437f0 | 421 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 422 | |
| mbed_official | 133:d4dda5c437f0 | 423 | |
| mbed_official | 133:d4dda5c437f0 | 424 | /* Disable the capture compare Interrupts 1 event */ |
| mbed_official | 133:d4dda5c437f0 | 425 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
| mbed_official | 133:d4dda5c437f0 | 426 | |
| mbed_official | 133:d4dda5c437f0 | 427 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 428 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 429 | |
| mbed_official | 133:d4dda5c437f0 | 430 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 431 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 432 | } |
| mbed_official | 133:d4dda5c437f0 | 433 | |
| mbed_official | 133:d4dda5c437f0 | 434 | /** |
| mbed_official | 133:d4dda5c437f0 | 435 | * @} |
| mbed_official | 133:d4dda5c437f0 | 436 | */ |
| mbed_official | 133:d4dda5c437f0 | 437 | |
| mbed_official | 133:d4dda5c437f0 | 438 | /** @defgroup TIMEx_Group2 Timer Complementary Output Compare functions |
| mbed_official | 133:d4dda5c437f0 | 439 | * @brief Timer Complementary Output Compare functions |
| mbed_official | 133:d4dda5c437f0 | 440 | * |
| mbed_official | 133:d4dda5c437f0 | 441 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 442 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 443 | ##### Timer Complementary Output Compare functions ##### |
| mbed_official | 133:d4dda5c437f0 | 444 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 445 | [..] |
| mbed_official | 133:d4dda5c437f0 | 446 | This section provides functions allowing to: |
| mbed_official | 133:d4dda5c437f0 | 447 | (+) Start the Complementary Output Compare/PWM. |
| mbed_official | 133:d4dda5c437f0 | 448 | (+) Stop the Complementary Output Compare/PWM. |
| mbed_official | 133:d4dda5c437f0 | 449 | (+) Start the Complementary Output Compare/PWM and enable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 450 | (+) Stop the Complementary Output Compare/PWM and disable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 451 | (+) Start the Complementary Output Compare/PWM and enable DMA transfers. |
| mbed_official | 133:d4dda5c437f0 | 452 | (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. |
| mbed_official | 133:d4dda5c437f0 | 453 | |
| mbed_official | 133:d4dda5c437f0 | 454 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 455 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 456 | */ |
| mbed_official | 133:d4dda5c437f0 | 457 | |
| mbed_official | 133:d4dda5c437f0 | 458 | /** |
| mbed_official | 133:d4dda5c437f0 | 459 | * @brief Starts the TIM Output Compare signal generation on the complementary |
| mbed_official | 133:d4dda5c437f0 | 460 | * output. |
| mbed_official | 133:d4dda5c437f0 | 461 | * @param htim : TIM Output Compare handle |
| mbed_official | 133:d4dda5c437f0 | 462 | * @param Channel : TIM Channel to be enabled |
| mbed_official | 133:d4dda5c437f0 | 463 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 464 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 465 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 466 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 467 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 468 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 469 | */ |
| mbed_official | 133:d4dda5c437f0 | 470 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 471 | { |
| mbed_official | 133:d4dda5c437f0 | 472 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 473 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 474 | |
| mbed_official | 133:d4dda5c437f0 | 475 | /* Enable the Capture compare channel N */ |
| mbed_official | 133:d4dda5c437f0 | 476 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 477 | |
| mbed_official | 133:d4dda5c437f0 | 478 | /* Enable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 479 | __HAL_TIM_MOE_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 480 | |
| mbed_official | 133:d4dda5c437f0 | 481 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 482 | __HAL_TIM_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 483 | |
| mbed_official | 133:d4dda5c437f0 | 484 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 485 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 486 | } |
| mbed_official | 133:d4dda5c437f0 | 487 | |
| mbed_official | 133:d4dda5c437f0 | 488 | /** |
| mbed_official | 133:d4dda5c437f0 | 489 | * @brief Stops the TIM Output Compare signal generation on the complementary |
| mbed_official | 133:d4dda5c437f0 | 490 | * output. |
| mbed_official | 133:d4dda5c437f0 | 491 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 492 | * @param Channel : TIM Channel to be disabled |
| mbed_official | 133:d4dda5c437f0 | 493 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 494 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 495 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 496 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 497 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 498 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 499 | */ |
| mbed_official | 133:d4dda5c437f0 | 500 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 501 | { |
| mbed_official | 133:d4dda5c437f0 | 502 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 503 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 504 | |
| mbed_official | 133:d4dda5c437f0 | 505 | /* Disable the Capture compare channel N */ |
| mbed_official | 133:d4dda5c437f0 | 506 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 507 | |
| mbed_official | 133:d4dda5c437f0 | 508 | /* Disable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 509 | __HAL_TIM_MOE_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 510 | |
| mbed_official | 133:d4dda5c437f0 | 511 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 512 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 513 | |
| mbed_official | 133:d4dda5c437f0 | 514 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 515 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 516 | } |
| mbed_official | 133:d4dda5c437f0 | 517 | |
| mbed_official | 133:d4dda5c437f0 | 518 | /** |
| mbed_official | 133:d4dda5c437f0 | 519 | * @brief Starts the TIM Output Compare signal generation in interrupt mode |
| mbed_official | 133:d4dda5c437f0 | 520 | * on the complementary output. |
| mbed_official | 133:d4dda5c437f0 | 521 | * @param htim : TIM OC handle |
| mbed_official | 133:d4dda5c437f0 | 522 | * @param Channel : TIM Channel to be enabled |
| mbed_official | 133:d4dda5c437f0 | 523 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 524 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 525 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 526 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 527 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 528 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 529 | */ |
| mbed_official | 133:d4dda5c437f0 | 530 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 531 | { |
| mbed_official | 133:d4dda5c437f0 | 532 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 533 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 534 | |
| mbed_official | 133:d4dda5c437f0 | 535 | switch (Channel) |
| mbed_official | 133:d4dda5c437f0 | 536 | { |
| mbed_official | 133:d4dda5c437f0 | 537 | case TIM_CHANNEL_1: |
| mbed_official | 133:d4dda5c437f0 | 538 | { |
| mbed_official | 133:d4dda5c437f0 | 539 | /* Enable the TIM Output Compare interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 540 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| mbed_official | 133:d4dda5c437f0 | 541 | } |
| mbed_official | 133:d4dda5c437f0 | 542 | break; |
| mbed_official | 133:d4dda5c437f0 | 543 | |
| mbed_official | 133:d4dda5c437f0 | 544 | case TIM_CHANNEL_2: |
| mbed_official | 133:d4dda5c437f0 | 545 | { |
| mbed_official | 133:d4dda5c437f0 | 546 | /* Enable the TIM Output Compare interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 547 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
| mbed_official | 133:d4dda5c437f0 | 548 | } |
| mbed_official | 133:d4dda5c437f0 | 549 | break; |
| mbed_official | 133:d4dda5c437f0 | 550 | |
| mbed_official | 133:d4dda5c437f0 | 551 | case TIM_CHANNEL_3: |
| mbed_official | 133:d4dda5c437f0 | 552 | { |
| mbed_official | 133:d4dda5c437f0 | 553 | /* Enable the TIM Output Compare interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 554 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
| mbed_official | 133:d4dda5c437f0 | 555 | } |
| mbed_official | 133:d4dda5c437f0 | 556 | break; |
| mbed_official | 133:d4dda5c437f0 | 557 | |
| mbed_official | 133:d4dda5c437f0 | 558 | case TIM_CHANNEL_4: |
| mbed_official | 133:d4dda5c437f0 | 559 | { |
| mbed_official | 133:d4dda5c437f0 | 560 | /* Enable the TIM Output Compare interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 561 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
| mbed_official | 133:d4dda5c437f0 | 562 | } |
| mbed_official | 133:d4dda5c437f0 | 563 | break; |
| mbed_official | 133:d4dda5c437f0 | 564 | |
| mbed_official | 133:d4dda5c437f0 | 565 | default: |
| mbed_official | 133:d4dda5c437f0 | 566 | break; |
| mbed_official | 133:d4dda5c437f0 | 567 | } |
| mbed_official | 133:d4dda5c437f0 | 568 | |
| mbed_official | 133:d4dda5c437f0 | 569 | /* Enable the Capture compare channel N */ |
| mbed_official | 133:d4dda5c437f0 | 570 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 571 | |
| mbed_official | 133:d4dda5c437f0 | 572 | /* Enable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 573 | __HAL_TIM_MOE_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 574 | |
| mbed_official | 133:d4dda5c437f0 | 575 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 576 | __HAL_TIM_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 577 | |
| mbed_official | 133:d4dda5c437f0 | 578 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 579 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 580 | } |
| mbed_official | 133:d4dda5c437f0 | 581 | |
| mbed_official | 133:d4dda5c437f0 | 582 | /** |
| mbed_official | 133:d4dda5c437f0 | 583 | * @brief Stops the TIM Output Compare signal generation in interrupt mode |
| mbed_official | 133:d4dda5c437f0 | 584 | * on the complementary output. |
| mbed_official | 133:d4dda5c437f0 | 585 | * @param htim : TIM Output Compare handle |
| mbed_official | 133:d4dda5c437f0 | 586 | * @param Channel : TIM Channel to be disabled |
| mbed_official | 133:d4dda5c437f0 | 587 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 588 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 589 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 590 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 591 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 592 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 593 | */ |
| mbed_official | 133:d4dda5c437f0 | 594 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 595 | { |
| mbed_official | 133:d4dda5c437f0 | 596 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 597 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 598 | |
| mbed_official | 133:d4dda5c437f0 | 599 | switch (Channel) |
| mbed_official | 133:d4dda5c437f0 | 600 | { |
| mbed_official | 133:d4dda5c437f0 | 601 | case TIM_CHANNEL_1: |
| mbed_official | 133:d4dda5c437f0 | 602 | { |
| mbed_official | 133:d4dda5c437f0 | 603 | /* Disable the TIM Output Compare interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 604 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| mbed_official | 133:d4dda5c437f0 | 605 | } |
| mbed_official | 133:d4dda5c437f0 | 606 | break; |
| mbed_official | 133:d4dda5c437f0 | 607 | |
| mbed_official | 133:d4dda5c437f0 | 608 | case TIM_CHANNEL_2: |
| mbed_official | 133:d4dda5c437f0 | 609 | { |
| mbed_official | 133:d4dda5c437f0 | 610 | /* Disable the TIM Output Compare interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 611 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
| mbed_official | 133:d4dda5c437f0 | 612 | } |
| mbed_official | 133:d4dda5c437f0 | 613 | break; |
| mbed_official | 133:d4dda5c437f0 | 614 | |
| mbed_official | 133:d4dda5c437f0 | 615 | case TIM_CHANNEL_3: |
| mbed_official | 133:d4dda5c437f0 | 616 | { |
| mbed_official | 133:d4dda5c437f0 | 617 | /* Disable the TIM Output Compare interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 618 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
| mbed_official | 133:d4dda5c437f0 | 619 | } |
| mbed_official | 133:d4dda5c437f0 | 620 | break; |
| mbed_official | 133:d4dda5c437f0 | 621 | |
| mbed_official | 133:d4dda5c437f0 | 622 | case TIM_CHANNEL_4: |
| mbed_official | 133:d4dda5c437f0 | 623 | { |
| mbed_official | 133:d4dda5c437f0 | 624 | /* Disable the TIM Output Compare interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 625 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
| mbed_official | 133:d4dda5c437f0 | 626 | } |
| mbed_official | 133:d4dda5c437f0 | 627 | break; |
| mbed_official | 133:d4dda5c437f0 | 628 | |
| mbed_official | 133:d4dda5c437f0 | 629 | default: |
| mbed_official | 133:d4dda5c437f0 | 630 | break; |
| mbed_official | 133:d4dda5c437f0 | 631 | } |
| mbed_official | 133:d4dda5c437f0 | 632 | |
| mbed_official | 133:d4dda5c437f0 | 633 | /* Disable the Capture compare channel N */ |
| mbed_official | 133:d4dda5c437f0 | 634 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 635 | |
| mbed_official | 133:d4dda5c437f0 | 636 | /* Disable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 637 | __HAL_TIM_MOE_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 638 | |
| mbed_official | 133:d4dda5c437f0 | 639 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 640 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 641 | |
| mbed_official | 133:d4dda5c437f0 | 642 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 643 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 644 | } |
| mbed_official | 133:d4dda5c437f0 | 645 | |
| mbed_official | 133:d4dda5c437f0 | 646 | /** |
| mbed_official | 133:d4dda5c437f0 | 647 | * @brief Starts the TIM Output Compare signal generation in DMA mode |
| mbed_official | 133:d4dda5c437f0 | 648 | * on the complementary output. |
| mbed_official | 133:d4dda5c437f0 | 649 | * @param htim : TIM Output Compare handle |
| mbed_official | 133:d4dda5c437f0 | 650 | * @param Channel : TIM Channel to be enabled |
| mbed_official | 133:d4dda5c437f0 | 651 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 652 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 653 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 654 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 655 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 656 | * @param pData: The source Buffer address. |
| mbed_official | 133:d4dda5c437f0 | 657 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
| mbed_official | 133:d4dda5c437f0 | 658 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 659 | */ |
| mbed_official | 133:d4dda5c437f0 | 660 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
| mbed_official | 133:d4dda5c437f0 | 661 | { |
| mbed_official | 133:d4dda5c437f0 | 662 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 663 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 664 | |
| mbed_official | 133:d4dda5c437f0 | 665 | if((htim->State == HAL_TIM_STATE_BUSY)) |
| mbed_official | 133:d4dda5c437f0 | 666 | { |
| mbed_official | 133:d4dda5c437f0 | 667 | return HAL_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 668 | } |
| mbed_official | 133:d4dda5c437f0 | 669 | else if((htim->State == HAL_TIM_STATE_READY)) |
| mbed_official | 133:d4dda5c437f0 | 670 | { |
| mbed_official | 133:d4dda5c437f0 | 671 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
| mbed_official | 133:d4dda5c437f0 | 672 | { |
| mbed_official | 133:d4dda5c437f0 | 673 | return HAL_ERROR; |
| mbed_official | 133:d4dda5c437f0 | 674 | } |
| mbed_official | 133:d4dda5c437f0 | 675 | else |
| mbed_official | 133:d4dda5c437f0 | 676 | { |
| mbed_official | 133:d4dda5c437f0 | 677 | htim->State = HAL_TIM_STATE_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 678 | } |
| mbed_official | 133:d4dda5c437f0 | 679 | } |
| mbed_official | 133:d4dda5c437f0 | 680 | switch (Channel) |
| mbed_official | 133:d4dda5c437f0 | 681 | { |
| mbed_official | 133:d4dda5c437f0 | 682 | case TIM_CHANNEL_1: |
| mbed_official | 133:d4dda5c437f0 | 683 | { |
| mbed_official | 133:d4dda5c437f0 | 684 | /* Set the DMA Period elapsed callback */ |
| mbed_official | 133:d4dda5c437f0 | 685 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| mbed_official | 133:d4dda5c437f0 | 686 | |
| mbed_official | 133:d4dda5c437f0 | 687 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 688 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
| mbed_official | 133:d4dda5c437f0 | 689 | |
| mbed_official | 133:d4dda5c437f0 | 690 | /* Enable the DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 691 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
| mbed_official | 133:d4dda5c437f0 | 692 | |
| mbed_official | 133:d4dda5c437f0 | 693 | /* Enable the TIM Output Compare DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 694 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
| mbed_official | 133:d4dda5c437f0 | 695 | } |
| mbed_official | 133:d4dda5c437f0 | 696 | break; |
| mbed_official | 133:d4dda5c437f0 | 697 | |
| mbed_official | 133:d4dda5c437f0 | 698 | case TIM_CHANNEL_2: |
| mbed_official | 133:d4dda5c437f0 | 699 | { |
| mbed_official | 133:d4dda5c437f0 | 700 | /* Set the DMA Period elapsed callback */ |
| mbed_official | 133:d4dda5c437f0 | 701 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| mbed_official | 133:d4dda5c437f0 | 702 | |
| mbed_official | 133:d4dda5c437f0 | 703 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 704 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ; |
| mbed_official | 133:d4dda5c437f0 | 705 | |
| mbed_official | 133:d4dda5c437f0 | 706 | /* Enable the DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 707 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
| mbed_official | 133:d4dda5c437f0 | 708 | |
| mbed_official | 133:d4dda5c437f0 | 709 | /* Enable the TIM Output Compare DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 710 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
| mbed_official | 133:d4dda5c437f0 | 711 | } |
| mbed_official | 133:d4dda5c437f0 | 712 | break; |
| mbed_official | 133:d4dda5c437f0 | 713 | |
| mbed_official | 133:d4dda5c437f0 | 714 | case TIM_CHANNEL_3: |
| mbed_official | 133:d4dda5c437f0 | 715 | { |
| mbed_official | 133:d4dda5c437f0 | 716 | /* Set the DMA Period elapsed callback */ |
| mbed_official | 133:d4dda5c437f0 | 717 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| mbed_official | 133:d4dda5c437f0 | 718 | |
| mbed_official | 133:d4dda5c437f0 | 719 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 720 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ; |
| mbed_official | 133:d4dda5c437f0 | 721 | |
| mbed_official | 133:d4dda5c437f0 | 722 | /* Enable the DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 723 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
| mbed_official | 133:d4dda5c437f0 | 724 | |
| mbed_official | 133:d4dda5c437f0 | 725 | /* Enable the TIM Output Compare DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 726 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
| mbed_official | 133:d4dda5c437f0 | 727 | } |
| mbed_official | 133:d4dda5c437f0 | 728 | break; |
| mbed_official | 133:d4dda5c437f0 | 729 | |
| mbed_official | 133:d4dda5c437f0 | 730 | case TIM_CHANNEL_4: |
| mbed_official | 133:d4dda5c437f0 | 731 | { |
| mbed_official | 133:d4dda5c437f0 | 732 | /* Set the DMA Period elapsed callback */ |
| mbed_official | 133:d4dda5c437f0 | 733 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| mbed_official | 133:d4dda5c437f0 | 734 | |
| mbed_official | 133:d4dda5c437f0 | 735 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 736 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ; |
| mbed_official | 133:d4dda5c437f0 | 737 | |
| mbed_official | 133:d4dda5c437f0 | 738 | /* Enable the DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 739 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
| mbed_official | 133:d4dda5c437f0 | 740 | |
| mbed_official | 133:d4dda5c437f0 | 741 | /* Enable the TIM Output Compare DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 742 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
| mbed_official | 133:d4dda5c437f0 | 743 | } |
| mbed_official | 133:d4dda5c437f0 | 744 | break; |
| mbed_official | 133:d4dda5c437f0 | 745 | |
| mbed_official | 133:d4dda5c437f0 | 746 | default: |
| mbed_official | 133:d4dda5c437f0 | 747 | break; |
| mbed_official | 133:d4dda5c437f0 | 748 | } |
| mbed_official | 133:d4dda5c437f0 | 749 | |
| mbed_official | 133:d4dda5c437f0 | 750 | /* Enable the Capture compare channel N */ |
| mbed_official | 133:d4dda5c437f0 | 751 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 752 | |
| mbed_official | 133:d4dda5c437f0 | 753 | /* Enable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 754 | __HAL_TIM_MOE_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 755 | |
| mbed_official | 133:d4dda5c437f0 | 756 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 757 | __HAL_TIM_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 758 | |
| mbed_official | 133:d4dda5c437f0 | 759 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 760 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 761 | } |
| mbed_official | 133:d4dda5c437f0 | 762 | |
| mbed_official | 133:d4dda5c437f0 | 763 | /** |
| mbed_official | 133:d4dda5c437f0 | 764 | * @brief Stops the TIM Output Compare signal generation in DMA mode |
| mbed_official | 133:d4dda5c437f0 | 765 | * on the complementary output. |
| mbed_official | 133:d4dda5c437f0 | 766 | * @param htim : TIM Output Compare handle |
| mbed_official | 133:d4dda5c437f0 | 767 | * @param Channel : TIM Channel to be disabled |
| mbed_official | 133:d4dda5c437f0 | 768 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 769 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 770 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 771 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 772 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 773 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 774 | */ |
| mbed_official | 133:d4dda5c437f0 | 775 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 776 | { |
| mbed_official | 133:d4dda5c437f0 | 777 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 778 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 779 | |
| mbed_official | 133:d4dda5c437f0 | 780 | switch (Channel) |
| mbed_official | 133:d4dda5c437f0 | 781 | { |
| mbed_official | 133:d4dda5c437f0 | 782 | case TIM_CHANNEL_1: |
| mbed_official | 133:d4dda5c437f0 | 783 | { |
| mbed_official | 133:d4dda5c437f0 | 784 | /* Disable the TIM Output Compare DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 785 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
| mbed_official | 133:d4dda5c437f0 | 786 | } |
| mbed_official | 133:d4dda5c437f0 | 787 | break; |
| mbed_official | 133:d4dda5c437f0 | 788 | |
| mbed_official | 133:d4dda5c437f0 | 789 | case TIM_CHANNEL_2: |
| mbed_official | 133:d4dda5c437f0 | 790 | { |
| mbed_official | 133:d4dda5c437f0 | 791 | /* Disable the TIM Output Compare DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 792 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
| mbed_official | 133:d4dda5c437f0 | 793 | } |
| mbed_official | 133:d4dda5c437f0 | 794 | break; |
| mbed_official | 133:d4dda5c437f0 | 795 | |
| mbed_official | 133:d4dda5c437f0 | 796 | case TIM_CHANNEL_3: |
| mbed_official | 133:d4dda5c437f0 | 797 | { |
| mbed_official | 133:d4dda5c437f0 | 798 | /* Disable the TIM Output Compare DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 799 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
| mbed_official | 133:d4dda5c437f0 | 800 | } |
| mbed_official | 133:d4dda5c437f0 | 801 | break; |
| mbed_official | 133:d4dda5c437f0 | 802 | |
| mbed_official | 133:d4dda5c437f0 | 803 | case TIM_CHANNEL_4: |
| mbed_official | 133:d4dda5c437f0 | 804 | { |
| mbed_official | 133:d4dda5c437f0 | 805 | /* Disable the TIM Output Compare interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 806 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
| mbed_official | 133:d4dda5c437f0 | 807 | } |
| mbed_official | 133:d4dda5c437f0 | 808 | break; |
| mbed_official | 133:d4dda5c437f0 | 809 | |
| mbed_official | 133:d4dda5c437f0 | 810 | default: |
| mbed_official | 133:d4dda5c437f0 | 811 | break; |
| mbed_official | 133:d4dda5c437f0 | 812 | } |
| mbed_official | 133:d4dda5c437f0 | 813 | |
| mbed_official | 133:d4dda5c437f0 | 814 | /* Disable the Capture compare channel N */ |
| mbed_official | 133:d4dda5c437f0 | 815 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 816 | |
| mbed_official | 133:d4dda5c437f0 | 817 | /* Disable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 818 | __HAL_TIM_MOE_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 819 | |
| mbed_official | 133:d4dda5c437f0 | 820 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 821 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 822 | |
| mbed_official | 133:d4dda5c437f0 | 823 | /* Change the htim state */ |
| mbed_official | 133:d4dda5c437f0 | 824 | htim->State = HAL_TIM_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 825 | |
| mbed_official | 133:d4dda5c437f0 | 826 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 827 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 828 | } |
| mbed_official | 133:d4dda5c437f0 | 829 | |
| mbed_official | 133:d4dda5c437f0 | 830 | /** |
| mbed_official | 133:d4dda5c437f0 | 831 | * @} |
| mbed_official | 133:d4dda5c437f0 | 832 | */ |
| mbed_official | 133:d4dda5c437f0 | 833 | |
| mbed_official | 133:d4dda5c437f0 | 834 | /** @defgroup TIMEx_Group3 Timer Complementary PWM functions |
| mbed_official | 133:d4dda5c437f0 | 835 | * @brief Timer Complementary PWM functions |
| mbed_official | 133:d4dda5c437f0 | 836 | * |
| mbed_official | 133:d4dda5c437f0 | 837 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 838 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 839 | ##### Timer Complementary PWM functions ##### |
| mbed_official | 133:d4dda5c437f0 | 840 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 841 | [..] |
| mbed_official | 133:d4dda5c437f0 | 842 | This section provides functions allowing to: |
| mbed_official | 133:d4dda5c437f0 | 843 | (+) Start the Complementary PWM. |
| mbed_official | 133:d4dda5c437f0 | 844 | (+) Stop the Complementary PWM. |
| mbed_official | 133:d4dda5c437f0 | 845 | (+) Start the Complementary PWM and enable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 846 | (+) Stop the Complementary PWM and disable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 847 | (+) Start the Complementary PWM and enable DMA transfers. |
| mbed_official | 133:d4dda5c437f0 | 848 | (+) Stop the Complementary PWM and disable DMA transfers. |
| mbed_official | 133:d4dda5c437f0 | 849 | (+) Start the Complementary Input Capture measurement. |
| mbed_official | 133:d4dda5c437f0 | 850 | (+) Stop the Complementary Input Capture. |
| mbed_official | 133:d4dda5c437f0 | 851 | (+) Start the Complementary Input Capture and enable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 852 | (+) Stop the Complementary Input Capture and disable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 853 | (+) Start the Complementary Input Capture and enable DMA transfers. |
| mbed_official | 133:d4dda5c437f0 | 854 | (+) Stop the Complementary Input Capture and disable DMA transfers. |
| mbed_official | 133:d4dda5c437f0 | 855 | (+) Start the Complementary One Pulse generation. |
| mbed_official | 133:d4dda5c437f0 | 856 | (+) Stop the Complementary One Pulse. |
| mbed_official | 133:d4dda5c437f0 | 857 | (+) Start the Complementary One Pulse and enable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 858 | (+) Stop the Complementary One Pulse and disable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 859 | |
| mbed_official | 133:d4dda5c437f0 | 860 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 861 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 862 | */ |
| mbed_official | 133:d4dda5c437f0 | 863 | |
| mbed_official | 133:d4dda5c437f0 | 864 | /** |
| mbed_official | 133:d4dda5c437f0 | 865 | * @brief Starts the PWM signal generation on the complementary output. |
| mbed_official | 133:d4dda5c437f0 | 866 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 867 | * @param Channel : TIM Channel to be enabled |
| mbed_official | 133:d4dda5c437f0 | 868 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 869 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 870 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 871 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 872 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 873 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 874 | */ |
| mbed_official | 133:d4dda5c437f0 | 875 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 876 | { |
| mbed_official | 133:d4dda5c437f0 | 877 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 878 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 879 | |
| mbed_official | 133:d4dda5c437f0 | 880 | /* Enable the complementary PWM output */ |
| mbed_official | 133:d4dda5c437f0 | 881 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 882 | |
| mbed_official | 133:d4dda5c437f0 | 883 | /* Enable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 884 | __HAL_TIM_MOE_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 885 | |
| mbed_official | 133:d4dda5c437f0 | 886 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 887 | __HAL_TIM_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 888 | |
| mbed_official | 133:d4dda5c437f0 | 889 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 890 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 891 | } |
| mbed_official | 133:d4dda5c437f0 | 892 | |
| mbed_official | 133:d4dda5c437f0 | 893 | /** |
| mbed_official | 133:d4dda5c437f0 | 894 | * @brief Stops the PWM signal generation on the complementary output. |
| mbed_official | 133:d4dda5c437f0 | 895 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 896 | * @param Channel : TIM Channel to be disabled |
| mbed_official | 133:d4dda5c437f0 | 897 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 898 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 899 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 900 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 901 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 902 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 903 | */ |
| mbed_official | 133:d4dda5c437f0 | 904 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 905 | { |
| mbed_official | 133:d4dda5c437f0 | 906 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 907 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 908 | |
| mbed_official | 133:d4dda5c437f0 | 909 | /* Disable the complementary PWM output */ |
| mbed_official | 133:d4dda5c437f0 | 910 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 911 | |
| mbed_official | 133:d4dda5c437f0 | 912 | /* Disable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 913 | __HAL_TIM_MOE_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 914 | |
| mbed_official | 133:d4dda5c437f0 | 915 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 916 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 917 | |
| mbed_official | 133:d4dda5c437f0 | 918 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 919 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 920 | } |
| mbed_official | 133:d4dda5c437f0 | 921 | |
| mbed_official | 133:d4dda5c437f0 | 922 | /** |
| mbed_official | 133:d4dda5c437f0 | 923 | * @brief Starts the PWM signal generation in interrupt mode on the |
| mbed_official | 133:d4dda5c437f0 | 924 | * complementary output. |
| mbed_official | 133:d4dda5c437f0 | 925 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 926 | * @param Channel : TIM Channel to be disabled |
| mbed_official | 133:d4dda5c437f0 | 927 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 928 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 929 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 930 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 931 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 932 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 933 | */ |
| mbed_official | 133:d4dda5c437f0 | 934 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 935 | { |
| mbed_official | 133:d4dda5c437f0 | 936 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 937 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 938 | |
| mbed_official | 133:d4dda5c437f0 | 939 | switch (Channel) |
| mbed_official | 133:d4dda5c437f0 | 940 | { |
| mbed_official | 133:d4dda5c437f0 | 941 | case TIM_CHANNEL_1: |
| mbed_official | 133:d4dda5c437f0 | 942 | { |
| mbed_official | 133:d4dda5c437f0 | 943 | /* Enable the TIM Capture/Compare 1 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 944 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| mbed_official | 133:d4dda5c437f0 | 945 | } |
| mbed_official | 133:d4dda5c437f0 | 946 | break; |
| mbed_official | 133:d4dda5c437f0 | 947 | |
| mbed_official | 133:d4dda5c437f0 | 948 | case TIM_CHANNEL_2: |
| mbed_official | 133:d4dda5c437f0 | 949 | { |
| mbed_official | 133:d4dda5c437f0 | 950 | /* Enable the TIM Capture/Compare 2 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 951 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
| mbed_official | 133:d4dda5c437f0 | 952 | } |
| mbed_official | 133:d4dda5c437f0 | 953 | break; |
| mbed_official | 133:d4dda5c437f0 | 954 | |
| mbed_official | 133:d4dda5c437f0 | 955 | case TIM_CHANNEL_3: |
| mbed_official | 133:d4dda5c437f0 | 956 | { |
| mbed_official | 133:d4dda5c437f0 | 957 | /* Enable the TIM Capture/Compare 3 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 958 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
| mbed_official | 133:d4dda5c437f0 | 959 | } |
| mbed_official | 133:d4dda5c437f0 | 960 | break; |
| mbed_official | 133:d4dda5c437f0 | 961 | |
| mbed_official | 133:d4dda5c437f0 | 962 | case TIM_CHANNEL_4: |
| mbed_official | 133:d4dda5c437f0 | 963 | { |
| mbed_official | 133:d4dda5c437f0 | 964 | /* Enable the TIM Capture/Compare 4 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 965 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
| mbed_official | 133:d4dda5c437f0 | 966 | } |
| mbed_official | 133:d4dda5c437f0 | 967 | break; |
| mbed_official | 133:d4dda5c437f0 | 968 | |
| mbed_official | 133:d4dda5c437f0 | 969 | default: |
| mbed_official | 133:d4dda5c437f0 | 970 | break; |
| mbed_official | 133:d4dda5c437f0 | 971 | } |
| mbed_official | 133:d4dda5c437f0 | 972 | |
| mbed_official | 133:d4dda5c437f0 | 973 | /* Enable the TIM Break interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 974 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
| mbed_official | 133:d4dda5c437f0 | 975 | |
| mbed_official | 133:d4dda5c437f0 | 976 | /* Enable the complementary PWM output */ |
| mbed_official | 133:d4dda5c437f0 | 977 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 978 | |
| mbed_official | 133:d4dda5c437f0 | 979 | /* Enable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 980 | __HAL_TIM_MOE_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 981 | |
| mbed_official | 133:d4dda5c437f0 | 982 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 983 | __HAL_TIM_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 984 | |
| mbed_official | 133:d4dda5c437f0 | 985 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 986 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 987 | } |
| mbed_official | 133:d4dda5c437f0 | 988 | |
| mbed_official | 133:d4dda5c437f0 | 989 | /** |
| mbed_official | 133:d4dda5c437f0 | 990 | * @brief Stops the PWM signal generation in interrupt mode on the |
| mbed_official | 133:d4dda5c437f0 | 991 | * complementary output. |
| mbed_official | 133:d4dda5c437f0 | 992 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 993 | * @param Channel : TIM Channel to be disabled |
| mbed_official | 133:d4dda5c437f0 | 994 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 995 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 996 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 997 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 998 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 999 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1000 | */ |
| mbed_official | 133:d4dda5c437f0 | 1001 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 1002 | { |
| mbed_official | 133:d4dda5c437f0 | 1003 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1004 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 1005 | |
| mbed_official | 133:d4dda5c437f0 | 1006 | switch (Channel) |
| mbed_official | 133:d4dda5c437f0 | 1007 | { |
| mbed_official | 133:d4dda5c437f0 | 1008 | case TIM_CHANNEL_1: |
| mbed_official | 133:d4dda5c437f0 | 1009 | { |
| mbed_official | 133:d4dda5c437f0 | 1010 | /* Disable the TIM Capture/Compare 1 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 1011 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| mbed_official | 133:d4dda5c437f0 | 1012 | } |
| mbed_official | 133:d4dda5c437f0 | 1013 | break; |
| mbed_official | 133:d4dda5c437f0 | 1014 | |
| mbed_official | 133:d4dda5c437f0 | 1015 | case TIM_CHANNEL_2: |
| mbed_official | 133:d4dda5c437f0 | 1016 | { |
| mbed_official | 133:d4dda5c437f0 | 1017 | /* Disable the TIM Capture/Compare 2 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 1018 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
| mbed_official | 133:d4dda5c437f0 | 1019 | } |
| mbed_official | 133:d4dda5c437f0 | 1020 | break; |
| mbed_official | 133:d4dda5c437f0 | 1021 | |
| mbed_official | 133:d4dda5c437f0 | 1022 | case TIM_CHANNEL_3: |
| mbed_official | 133:d4dda5c437f0 | 1023 | { |
| mbed_official | 133:d4dda5c437f0 | 1024 | /* Disable the TIM Capture/Compare 3 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 1025 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
| mbed_official | 133:d4dda5c437f0 | 1026 | } |
| mbed_official | 133:d4dda5c437f0 | 1027 | break; |
| mbed_official | 133:d4dda5c437f0 | 1028 | |
| mbed_official | 133:d4dda5c437f0 | 1029 | case TIM_CHANNEL_4: |
| mbed_official | 133:d4dda5c437f0 | 1030 | { |
| mbed_official | 133:d4dda5c437f0 | 1031 | /* Disable the TIM Capture/Compare 3 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 1032 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
| mbed_official | 133:d4dda5c437f0 | 1033 | } |
| mbed_official | 133:d4dda5c437f0 | 1034 | break; |
| mbed_official | 133:d4dda5c437f0 | 1035 | |
| mbed_official | 133:d4dda5c437f0 | 1036 | default: |
| mbed_official | 133:d4dda5c437f0 | 1037 | break; |
| mbed_official | 133:d4dda5c437f0 | 1038 | } |
| mbed_official | 133:d4dda5c437f0 | 1039 | |
| mbed_official | 133:d4dda5c437f0 | 1040 | /* Disable the TIM Break interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 1041 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
| mbed_official | 133:d4dda5c437f0 | 1042 | |
| mbed_official | 133:d4dda5c437f0 | 1043 | /* Disable the complementary PWM output */ |
| mbed_official | 133:d4dda5c437f0 | 1044 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 1045 | |
| mbed_official | 133:d4dda5c437f0 | 1046 | /* Disable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 1047 | __HAL_TIM_MOE_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1048 | |
| mbed_official | 133:d4dda5c437f0 | 1049 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 1050 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1051 | |
| mbed_official | 133:d4dda5c437f0 | 1052 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 1053 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1054 | } |
| mbed_official | 133:d4dda5c437f0 | 1055 | |
| mbed_official | 133:d4dda5c437f0 | 1056 | /** |
| mbed_official | 133:d4dda5c437f0 | 1057 | * @brief Starts the TIM PWM signal generation in DMA mode on the |
| mbed_official | 133:d4dda5c437f0 | 1058 | * complementary output |
| mbed_official | 133:d4dda5c437f0 | 1059 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 1060 | * @param Channel : TIM Channel to be enabled |
| mbed_official | 133:d4dda5c437f0 | 1061 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1062 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 1063 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 1064 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 1065 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 1066 | * @param pData: The source Buffer address. |
| mbed_official | 133:d4dda5c437f0 | 1067 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
| mbed_official | 133:d4dda5c437f0 | 1068 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1069 | */ |
| mbed_official | 133:d4dda5c437f0 | 1070 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
| mbed_official | 133:d4dda5c437f0 | 1071 | { |
| mbed_official | 133:d4dda5c437f0 | 1072 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1073 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 1074 | |
| mbed_official | 133:d4dda5c437f0 | 1075 | if((htim->State == HAL_TIM_STATE_BUSY)) |
| mbed_official | 133:d4dda5c437f0 | 1076 | { |
| mbed_official | 133:d4dda5c437f0 | 1077 | return HAL_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 1078 | } |
| mbed_official | 133:d4dda5c437f0 | 1079 | else if((htim->State == HAL_TIM_STATE_READY)) |
| mbed_official | 133:d4dda5c437f0 | 1080 | { |
| mbed_official | 133:d4dda5c437f0 | 1081 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
| mbed_official | 133:d4dda5c437f0 | 1082 | { |
| mbed_official | 133:d4dda5c437f0 | 1083 | return HAL_ERROR; |
| mbed_official | 133:d4dda5c437f0 | 1084 | } |
| mbed_official | 133:d4dda5c437f0 | 1085 | else |
| mbed_official | 133:d4dda5c437f0 | 1086 | { |
| mbed_official | 133:d4dda5c437f0 | 1087 | htim->State = HAL_TIM_STATE_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 1088 | } |
| mbed_official | 133:d4dda5c437f0 | 1089 | } |
| mbed_official | 133:d4dda5c437f0 | 1090 | switch (Channel) |
| mbed_official | 133:d4dda5c437f0 | 1091 | { |
| mbed_official | 133:d4dda5c437f0 | 1092 | case TIM_CHANNEL_1: |
| mbed_official | 133:d4dda5c437f0 | 1093 | { |
| mbed_official | 133:d4dda5c437f0 | 1094 | /* Set the DMA Period elapsed callback */ |
| mbed_official | 133:d4dda5c437f0 | 1095 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| mbed_official | 133:d4dda5c437f0 | 1096 | |
| mbed_official | 133:d4dda5c437f0 | 1097 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 1098 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
| mbed_official | 133:d4dda5c437f0 | 1099 | |
| mbed_official | 133:d4dda5c437f0 | 1100 | /* Enable the DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 1101 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
| mbed_official | 133:d4dda5c437f0 | 1102 | |
| mbed_official | 133:d4dda5c437f0 | 1103 | /* Enable the TIM Capture/Compare 1 DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 1104 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
| mbed_official | 133:d4dda5c437f0 | 1105 | } |
| mbed_official | 133:d4dda5c437f0 | 1106 | break; |
| mbed_official | 133:d4dda5c437f0 | 1107 | |
| mbed_official | 133:d4dda5c437f0 | 1108 | case TIM_CHANNEL_2: |
| mbed_official | 133:d4dda5c437f0 | 1109 | { |
| mbed_official | 133:d4dda5c437f0 | 1110 | /* Set the DMA Period elapsed callback */ |
| mbed_official | 133:d4dda5c437f0 | 1111 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| mbed_official | 133:d4dda5c437f0 | 1112 | |
| mbed_official | 133:d4dda5c437f0 | 1113 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 1114 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ; |
| mbed_official | 133:d4dda5c437f0 | 1115 | |
| mbed_official | 133:d4dda5c437f0 | 1116 | /* Enable the DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 1117 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
| mbed_official | 133:d4dda5c437f0 | 1118 | |
| mbed_official | 133:d4dda5c437f0 | 1119 | /* Enable the TIM Capture/Compare 2 DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 1120 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
| mbed_official | 133:d4dda5c437f0 | 1121 | } |
| mbed_official | 133:d4dda5c437f0 | 1122 | break; |
| mbed_official | 133:d4dda5c437f0 | 1123 | |
| mbed_official | 133:d4dda5c437f0 | 1124 | case TIM_CHANNEL_3: |
| mbed_official | 133:d4dda5c437f0 | 1125 | { |
| mbed_official | 133:d4dda5c437f0 | 1126 | /* Set the DMA Period elapsed callback */ |
| mbed_official | 133:d4dda5c437f0 | 1127 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| mbed_official | 133:d4dda5c437f0 | 1128 | |
| mbed_official | 133:d4dda5c437f0 | 1129 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 1130 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ; |
| mbed_official | 133:d4dda5c437f0 | 1131 | |
| mbed_official | 133:d4dda5c437f0 | 1132 | /* Enable the DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 1133 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
| mbed_official | 133:d4dda5c437f0 | 1134 | |
| mbed_official | 133:d4dda5c437f0 | 1135 | /* Enable the TIM Capture/Compare 3 DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 1136 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
| mbed_official | 133:d4dda5c437f0 | 1137 | } |
| mbed_official | 133:d4dda5c437f0 | 1138 | break; |
| mbed_official | 133:d4dda5c437f0 | 1139 | |
| mbed_official | 133:d4dda5c437f0 | 1140 | case TIM_CHANNEL_4: |
| mbed_official | 133:d4dda5c437f0 | 1141 | { |
| mbed_official | 133:d4dda5c437f0 | 1142 | /* Set the DMA Period elapsed callback */ |
| mbed_official | 133:d4dda5c437f0 | 1143 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| mbed_official | 133:d4dda5c437f0 | 1144 | |
| mbed_official | 133:d4dda5c437f0 | 1145 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 1146 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ; |
| mbed_official | 133:d4dda5c437f0 | 1147 | |
| mbed_official | 133:d4dda5c437f0 | 1148 | /* Enable the DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 1149 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
| mbed_official | 133:d4dda5c437f0 | 1150 | |
| mbed_official | 133:d4dda5c437f0 | 1151 | /* Enable the TIM Capture/Compare 4 DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 1152 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
| mbed_official | 133:d4dda5c437f0 | 1153 | } |
| mbed_official | 133:d4dda5c437f0 | 1154 | break; |
| mbed_official | 133:d4dda5c437f0 | 1155 | |
| mbed_official | 133:d4dda5c437f0 | 1156 | default: |
| mbed_official | 133:d4dda5c437f0 | 1157 | break; |
| mbed_official | 133:d4dda5c437f0 | 1158 | } |
| mbed_official | 133:d4dda5c437f0 | 1159 | |
| mbed_official | 133:d4dda5c437f0 | 1160 | /* Enable the complementary PWM output */ |
| mbed_official | 133:d4dda5c437f0 | 1161 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 1162 | |
| mbed_official | 133:d4dda5c437f0 | 1163 | /* Enable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 1164 | __HAL_TIM_MOE_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1165 | |
| mbed_official | 133:d4dda5c437f0 | 1166 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 1167 | __HAL_TIM_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1168 | |
| mbed_official | 133:d4dda5c437f0 | 1169 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 1170 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1171 | } |
| mbed_official | 133:d4dda5c437f0 | 1172 | |
| mbed_official | 133:d4dda5c437f0 | 1173 | /** |
| mbed_official | 133:d4dda5c437f0 | 1174 | * @brief Stops the TIM PWM signal generation in DMA mode on the complementary |
| mbed_official | 133:d4dda5c437f0 | 1175 | * output |
| mbed_official | 133:d4dda5c437f0 | 1176 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 1177 | * @param Channel : TIM Channel to be disabled |
| mbed_official | 133:d4dda5c437f0 | 1178 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1179 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 1180 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 1181 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| mbed_official | 133:d4dda5c437f0 | 1182 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| mbed_official | 133:d4dda5c437f0 | 1183 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1184 | */ |
| mbed_official | 133:d4dda5c437f0 | 1185 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
| mbed_official | 133:d4dda5c437f0 | 1186 | { |
| mbed_official | 133:d4dda5c437f0 | 1187 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1188 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| mbed_official | 133:d4dda5c437f0 | 1189 | |
| mbed_official | 133:d4dda5c437f0 | 1190 | switch (Channel) |
| mbed_official | 133:d4dda5c437f0 | 1191 | { |
| mbed_official | 133:d4dda5c437f0 | 1192 | case TIM_CHANNEL_1: |
| mbed_official | 133:d4dda5c437f0 | 1193 | { |
| mbed_official | 133:d4dda5c437f0 | 1194 | /* Disable the TIM Capture/Compare 1 DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 1195 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
| mbed_official | 133:d4dda5c437f0 | 1196 | } |
| mbed_official | 133:d4dda5c437f0 | 1197 | break; |
| mbed_official | 133:d4dda5c437f0 | 1198 | |
| mbed_official | 133:d4dda5c437f0 | 1199 | case TIM_CHANNEL_2: |
| mbed_official | 133:d4dda5c437f0 | 1200 | { |
| mbed_official | 133:d4dda5c437f0 | 1201 | /* Disable the TIM Capture/Compare 2 DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 1202 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
| mbed_official | 133:d4dda5c437f0 | 1203 | } |
| mbed_official | 133:d4dda5c437f0 | 1204 | break; |
| mbed_official | 133:d4dda5c437f0 | 1205 | |
| mbed_official | 133:d4dda5c437f0 | 1206 | case TIM_CHANNEL_3: |
| mbed_official | 133:d4dda5c437f0 | 1207 | { |
| mbed_official | 133:d4dda5c437f0 | 1208 | /* Disable the TIM Capture/Compare 3 DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 1209 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
| mbed_official | 133:d4dda5c437f0 | 1210 | } |
| mbed_official | 133:d4dda5c437f0 | 1211 | break; |
| mbed_official | 133:d4dda5c437f0 | 1212 | |
| mbed_official | 133:d4dda5c437f0 | 1213 | case TIM_CHANNEL_4: |
| mbed_official | 133:d4dda5c437f0 | 1214 | { |
| mbed_official | 133:d4dda5c437f0 | 1215 | /* Disable the TIM Capture/Compare 4 DMA request */ |
| mbed_official | 133:d4dda5c437f0 | 1216 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
| mbed_official | 133:d4dda5c437f0 | 1217 | } |
| mbed_official | 133:d4dda5c437f0 | 1218 | break; |
| mbed_official | 133:d4dda5c437f0 | 1219 | |
| mbed_official | 133:d4dda5c437f0 | 1220 | default: |
| mbed_official | 133:d4dda5c437f0 | 1221 | break; |
| mbed_official | 133:d4dda5c437f0 | 1222 | } |
| mbed_official | 133:d4dda5c437f0 | 1223 | |
| mbed_official | 133:d4dda5c437f0 | 1224 | /* Disable the complementary PWM output */ |
| mbed_official | 133:d4dda5c437f0 | 1225 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 1226 | |
| mbed_official | 133:d4dda5c437f0 | 1227 | /* Disable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 1228 | __HAL_TIM_MOE_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1229 | |
| mbed_official | 133:d4dda5c437f0 | 1230 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 1231 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1232 | |
| mbed_official | 133:d4dda5c437f0 | 1233 | /* Change the htim state */ |
| mbed_official | 133:d4dda5c437f0 | 1234 | htim->State = HAL_TIM_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 1235 | |
| mbed_official | 133:d4dda5c437f0 | 1236 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 1237 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1238 | } |
| mbed_official | 133:d4dda5c437f0 | 1239 | |
| mbed_official | 133:d4dda5c437f0 | 1240 | /** |
| mbed_official | 133:d4dda5c437f0 | 1241 | * @} |
| mbed_official | 133:d4dda5c437f0 | 1242 | */ |
| mbed_official | 133:d4dda5c437f0 | 1243 | |
| mbed_official | 133:d4dda5c437f0 | 1244 | /** @defgroup TIMEx_Group4 Timer Complementary One Pulse functions |
| mbed_official | 133:d4dda5c437f0 | 1245 | * @brief Timer Complementary One Pulse functions |
| mbed_official | 133:d4dda5c437f0 | 1246 | * |
| mbed_official | 133:d4dda5c437f0 | 1247 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 1248 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 1249 | ##### Timer Complementary One Pulse functions ##### |
| mbed_official | 133:d4dda5c437f0 | 1250 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 1251 | [..] |
| mbed_official | 133:d4dda5c437f0 | 1252 | This section provides functions allowing to: |
| mbed_official | 133:d4dda5c437f0 | 1253 | (+) Start the Complementary One Pulse generation. |
| mbed_official | 133:d4dda5c437f0 | 1254 | (+) Stop the Complementary One Pulse. |
| mbed_official | 133:d4dda5c437f0 | 1255 | (+) Start the Complementary One Pulse and enable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 1256 | (+) Stop the Complementary One Pulse and disable interrupts. |
| mbed_official | 133:d4dda5c437f0 | 1257 | |
| mbed_official | 133:d4dda5c437f0 | 1258 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 1259 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 1260 | */ |
| mbed_official | 133:d4dda5c437f0 | 1261 | |
| mbed_official | 133:d4dda5c437f0 | 1262 | /** |
| mbed_official | 133:d4dda5c437f0 | 1263 | * @brief Starts the TIM One Pulse signal generation on the complemetary |
| mbed_official | 133:d4dda5c437f0 | 1264 | * output. |
| mbed_official | 133:d4dda5c437f0 | 1265 | * @param htim : TIM One Pulse handle |
| mbed_official | 133:d4dda5c437f0 | 1266 | * @param OutputChannel : TIM Channel to be enabled |
| mbed_official | 133:d4dda5c437f0 | 1267 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1268 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 1269 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 1270 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1271 | */ |
| mbed_official | 133:d4dda5c437f0 | 1272 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| mbed_official | 133:d4dda5c437f0 | 1273 | { |
| mbed_official | 133:d4dda5c437f0 | 1274 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1275 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| mbed_official | 133:d4dda5c437f0 | 1276 | |
| mbed_official | 133:d4dda5c437f0 | 1277 | /* Enable the complementary One Pulse output */ |
| mbed_official | 133:d4dda5c437f0 | 1278 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 1279 | |
| mbed_official | 133:d4dda5c437f0 | 1280 | /* Enable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 1281 | __HAL_TIM_MOE_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1282 | |
| mbed_official | 133:d4dda5c437f0 | 1283 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 1284 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1285 | } |
| mbed_official | 133:d4dda5c437f0 | 1286 | |
| mbed_official | 133:d4dda5c437f0 | 1287 | /** |
| mbed_official | 133:d4dda5c437f0 | 1288 | * @brief Stops the TIM One Pulse signal generation on the complementary |
| mbed_official | 133:d4dda5c437f0 | 1289 | * output. |
| mbed_official | 133:d4dda5c437f0 | 1290 | * @param htim : TIM One Pulse handle |
| mbed_official | 133:d4dda5c437f0 | 1291 | * @param OutputChannel : TIM Channel to be disabled |
| mbed_official | 133:d4dda5c437f0 | 1292 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1293 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 1294 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 1295 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1296 | */ |
| mbed_official | 133:d4dda5c437f0 | 1297 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| mbed_official | 133:d4dda5c437f0 | 1298 | { |
| mbed_official | 133:d4dda5c437f0 | 1299 | |
| mbed_official | 133:d4dda5c437f0 | 1300 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1301 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| mbed_official | 133:d4dda5c437f0 | 1302 | |
| mbed_official | 133:d4dda5c437f0 | 1303 | /* Disable the complementary One Pulse output */ |
| mbed_official | 133:d4dda5c437f0 | 1304 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 1305 | |
| mbed_official | 133:d4dda5c437f0 | 1306 | /* Disable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 1307 | __HAL_TIM_MOE_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1308 | |
| mbed_official | 133:d4dda5c437f0 | 1309 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 1310 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1311 | |
| mbed_official | 133:d4dda5c437f0 | 1312 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 1313 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1314 | } |
| mbed_official | 133:d4dda5c437f0 | 1315 | |
| mbed_official | 133:d4dda5c437f0 | 1316 | /** |
| mbed_official | 133:d4dda5c437f0 | 1317 | * @brief Starts the TIM One Pulse signal generation in interrupt mode on the |
| mbed_official | 133:d4dda5c437f0 | 1318 | * complementary channel. |
| mbed_official | 133:d4dda5c437f0 | 1319 | * @param htim : TIM One Pulse handle |
| mbed_official | 133:d4dda5c437f0 | 1320 | * @param OutputChannel : TIM Channel to be enabled |
| mbed_official | 133:d4dda5c437f0 | 1321 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1322 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 1323 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 1324 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1325 | */ |
| mbed_official | 133:d4dda5c437f0 | 1326 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| mbed_official | 133:d4dda5c437f0 | 1327 | { |
| mbed_official | 133:d4dda5c437f0 | 1328 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1329 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| mbed_official | 133:d4dda5c437f0 | 1330 | |
| mbed_official | 133:d4dda5c437f0 | 1331 | /* Enable the TIM Capture/Compare 1 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 1332 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| mbed_official | 133:d4dda5c437f0 | 1333 | |
| mbed_official | 133:d4dda5c437f0 | 1334 | /* Enable the TIM Capture/Compare 2 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 1335 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
| mbed_official | 133:d4dda5c437f0 | 1336 | |
| mbed_official | 133:d4dda5c437f0 | 1337 | /* Enable the complementary One Pulse output */ |
| mbed_official | 133:d4dda5c437f0 | 1338 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
| mbed_official | 133:d4dda5c437f0 | 1339 | |
| mbed_official | 133:d4dda5c437f0 | 1340 | /* Enable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 1341 | __HAL_TIM_MOE_ENABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1342 | |
| mbed_official | 133:d4dda5c437f0 | 1343 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 1344 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1345 | } |
| mbed_official | 133:d4dda5c437f0 | 1346 | |
| mbed_official | 133:d4dda5c437f0 | 1347 | /** |
| mbed_official | 133:d4dda5c437f0 | 1348 | * @brief Stops the TIM One Pulse signal generation in interrupt mode on the |
| mbed_official | 133:d4dda5c437f0 | 1349 | * complementary channel. |
| mbed_official | 133:d4dda5c437f0 | 1350 | * @param htim : TIM One Pulse handle |
| mbed_official | 133:d4dda5c437f0 | 1351 | * @param OutputChannel : TIM Channel to be disabled |
| mbed_official | 133:d4dda5c437f0 | 1352 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1353 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| mbed_official | 133:d4dda5c437f0 | 1354 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| mbed_official | 133:d4dda5c437f0 | 1355 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1356 | */ |
| mbed_official | 133:d4dda5c437f0 | 1357 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| mbed_official | 133:d4dda5c437f0 | 1358 | { |
| mbed_official | 133:d4dda5c437f0 | 1359 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1360 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| mbed_official | 133:d4dda5c437f0 | 1361 | |
| mbed_official | 133:d4dda5c437f0 | 1362 | /* Disable the TIM Capture/Compare 1 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 1363 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| mbed_official | 133:d4dda5c437f0 | 1364 | |
| mbed_official | 133:d4dda5c437f0 | 1365 | /* Disable the TIM Capture/Compare 2 interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 1366 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
| mbed_official | 133:d4dda5c437f0 | 1367 | |
| mbed_official | 133:d4dda5c437f0 | 1368 | /* Disable the complementary One Pulse output */ |
| mbed_official | 133:d4dda5c437f0 | 1369 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
| mbed_official | 133:d4dda5c437f0 | 1370 | |
| mbed_official | 133:d4dda5c437f0 | 1371 | /* Disable the Main Ouput */ |
| mbed_official | 133:d4dda5c437f0 | 1372 | __HAL_TIM_MOE_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1373 | |
| mbed_official | 133:d4dda5c437f0 | 1374 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 1375 | __HAL_TIM_DISABLE(htim); |
| mbed_official | 133:d4dda5c437f0 | 1376 | |
| mbed_official | 133:d4dda5c437f0 | 1377 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 1378 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1379 | } |
| mbed_official | 133:d4dda5c437f0 | 1380 | |
| mbed_official | 133:d4dda5c437f0 | 1381 | /** |
| mbed_official | 133:d4dda5c437f0 | 1382 | * @} |
| mbed_official | 133:d4dda5c437f0 | 1383 | */ |
| mbed_official | 133:d4dda5c437f0 | 1384 | /** @defgroup TIMEx_Group5 Peripheral Control functions |
| mbed_official | 133:d4dda5c437f0 | 1385 | * @brief Peripheral Control functions |
| mbed_official | 133:d4dda5c437f0 | 1386 | * |
| mbed_official | 133:d4dda5c437f0 | 1387 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 1388 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 1389 | ##### Peripheral Control functions ##### |
| mbed_official | 133:d4dda5c437f0 | 1390 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 1391 | [..] |
| mbed_official | 133:d4dda5c437f0 | 1392 | This section provides functions allowing to: |
| mbed_official | 133:d4dda5c437f0 | 1393 | (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. |
| mbed_official | 133:d4dda5c437f0 | 1394 | (+) Configure External Clock source. |
| mbed_official | 133:d4dda5c437f0 | 1395 | (+) Configure Complementary channels, break features and dead time. |
| mbed_official | 133:d4dda5c437f0 | 1396 | (+) Configure Master and the Slave synchronization. |
| mbed_official | 133:d4dda5c437f0 | 1397 | (+) Configure the commutation event in case of use of the Hall sensor interface. |
| mbed_official | 133:d4dda5c437f0 | 1398 | (+) Configure the DMA Burst Mode. |
| mbed_official | 133:d4dda5c437f0 | 1399 | |
| mbed_official | 133:d4dda5c437f0 | 1400 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 1401 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 1402 | */ |
| mbed_official | 133:d4dda5c437f0 | 1403 | /** |
| mbed_official | 133:d4dda5c437f0 | 1404 | * @brief Configure the TIM commutation event sequence. |
| mbed_official | 133:d4dda5c437f0 | 1405 | * @note: this function is mandatory to use the commutation event in order to |
| mbed_official | 133:d4dda5c437f0 | 1406 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
| mbed_official | 133:d4dda5c437f0 | 1407 | * the typical use of this feature is with the use of another Timer(interface Timer) |
| mbed_official | 133:d4dda5c437f0 | 1408 | * configured in Hall sensor interface, this interface Timer will generate the |
| mbed_official | 133:d4dda5c437f0 | 1409 | * commutation at its TRGO output (connected to Timer used in this function) each time |
| mbed_official | 133:d4dda5c437f0 | 1410 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
| mbed_official | 133:d4dda5c437f0 | 1411 | * @param htim: TIM handle |
| mbed_official | 133:d4dda5c437f0 | 1412 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
| mbed_official | 133:d4dda5c437f0 | 1413 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1414 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
| mbed_official | 133:d4dda5c437f0 | 1415 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
| mbed_official | 133:d4dda5c437f0 | 1416 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
| mbed_official | 133:d4dda5c437f0 | 1417 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
| mbed_official | 133:d4dda5c437f0 | 1418 | * @arg TIM_TS_NONE: No trigger is needed |
| mbed_official | 133:d4dda5c437f0 | 1419 | * @param CommutationSource : the Commutation Event source |
| mbed_official | 133:d4dda5c437f0 | 1420 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1421 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
| mbed_official | 133:d4dda5c437f0 | 1422 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
| mbed_official | 133:d4dda5c437f0 | 1423 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1424 | */ |
| mbed_official | 133:d4dda5c437f0 | 1425 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
| mbed_official | 133:d4dda5c437f0 | 1426 | { |
| mbed_official | 133:d4dda5c437f0 | 1427 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1428 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 1429 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
| mbed_official | 133:d4dda5c437f0 | 1430 | |
| mbed_official | 133:d4dda5c437f0 | 1431 | __HAL_LOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1432 | |
| mbed_official | 133:d4dda5c437f0 | 1433 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
| mbed_official | 133:d4dda5c437f0 | 1434 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
| mbed_official | 133:d4dda5c437f0 | 1435 | { |
| mbed_official | 133:d4dda5c437f0 | 1436 | /* Select the Input trigger */ |
| mbed_official | 133:d4dda5c437f0 | 1437 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| mbed_official | 133:d4dda5c437f0 | 1438 | htim->Instance->SMCR |= InputTrigger; |
| mbed_official | 133:d4dda5c437f0 | 1439 | } |
| mbed_official | 133:d4dda5c437f0 | 1440 | |
| mbed_official | 133:d4dda5c437f0 | 1441 | /* Select the Capture Compare preload feature */ |
| mbed_official | 133:d4dda5c437f0 | 1442 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
| mbed_official | 133:d4dda5c437f0 | 1443 | /* Select the Commutation event source */ |
| mbed_official | 133:d4dda5c437f0 | 1444 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
| mbed_official | 133:d4dda5c437f0 | 1445 | htim->Instance->CR2 |= CommutationSource; |
| mbed_official | 133:d4dda5c437f0 | 1446 | |
| mbed_official | 133:d4dda5c437f0 | 1447 | __HAL_UNLOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1448 | |
| mbed_official | 133:d4dda5c437f0 | 1449 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1450 | } |
| mbed_official | 133:d4dda5c437f0 | 1451 | |
| mbed_official | 133:d4dda5c437f0 | 1452 | /** |
| mbed_official | 133:d4dda5c437f0 | 1453 | * @brief Configure the TIM commutation event sequence with interrupt. |
| mbed_official | 133:d4dda5c437f0 | 1454 | * @note: this function is mandatory to use the commutation event in order to |
| mbed_official | 133:d4dda5c437f0 | 1455 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
| mbed_official | 133:d4dda5c437f0 | 1456 | * the typical use of this feature is with the use of another Timer(interface Timer) |
| mbed_official | 133:d4dda5c437f0 | 1457 | * configured in Hall sensor interface, this interface Timer will generate the |
| mbed_official | 133:d4dda5c437f0 | 1458 | * commutation at its TRGO output (connected to Timer used in this function) each time |
| mbed_official | 133:d4dda5c437f0 | 1459 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
| mbed_official | 133:d4dda5c437f0 | 1460 | * @param htim: TIM handle |
| mbed_official | 133:d4dda5c437f0 | 1461 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
| mbed_official | 133:d4dda5c437f0 | 1462 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1463 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
| mbed_official | 133:d4dda5c437f0 | 1464 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
| mbed_official | 133:d4dda5c437f0 | 1465 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
| mbed_official | 133:d4dda5c437f0 | 1466 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
| mbed_official | 133:d4dda5c437f0 | 1467 | * @arg TIM_TS_NONE: No trigger is needed |
| mbed_official | 133:d4dda5c437f0 | 1468 | * @param CommutationSource : the Commutation Event source |
| mbed_official | 133:d4dda5c437f0 | 1469 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1470 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
| mbed_official | 133:d4dda5c437f0 | 1471 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
| mbed_official | 133:d4dda5c437f0 | 1472 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1473 | */ |
| mbed_official | 133:d4dda5c437f0 | 1474 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
| mbed_official | 133:d4dda5c437f0 | 1475 | { |
| mbed_official | 133:d4dda5c437f0 | 1476 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1477 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 1478 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
| mbed_official | 133:d4dda5c437f0 | 1479 | |
| mbed_official | 133:d4dda5c437f0 | 1480 | __HAL_LOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1481 | |
| mbed_official | 133:d4dda5c437f0 | 1482 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
| mbed_official | 133:d4dda5c437f0 | 1483 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
| mbed_official | 133:d4dda5c437f0 | 1484 | { |
| mbed_official | 133:d4dda5c437f0 | 1485 | /* Select the Input trigger */ |
| mbed_official | 133:d4dda5c437f0 | 1486 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| mbed_official | 133:d4dda5c437f0 | 1487 | htim->Instance->SMCR |= InputTrigger; |
| mbed_official | 133:d4dda5c437f0 | 1488 | } |
| mbed_official | 133:d4dda5c437f0 | 1489 | |
| mbed_official | 133:d4dda5c437f0 | 1490 | /* Select the Capture Compare preload feature */ |
| mbed_official | 133:d4dda5c437f0 | 1491 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
| mbed_official | 133:d4dda5c437f0 | 1492 | /* Select the Commutation event source */ |
| mbed_official | 133:d4dda5c437f0 | 1493 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
| mbed_official | 133:d4dda5c437f0 | 1494 | htim->Instance->CR2 |= CommutationSource; |
| mbed_official | 133:d4dda5c437f0 | 1495 | |
| mbed_official | 133:d4dda5c437f0 | 1496 | /* Enable the Commutation Interrupt Request */ |
| mbed_official | 133:d4dda5c437f0 | 1497 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); |
| mbed_official | 133:d4dda5c437f0 | 1498 | |
| mbed_official | 133:d4dda5c437f0 | 1499 | __HAL_UNLOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1500 | |
| mbed_official | 133:d4dda5c437f0 | 1501 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1502 | } |
| mbed_official | 133:d4dda5c437f0 | 1503 | |
| mbed_official | 133:d4dda5c437f0 | 1504 | /** |
| mbed_official | 133:d4dda5c437f0 | 1505 | * @brief Configure the TIM commutation event sequence with DMA. |
| mbed_official | 133:d4dda5c437f0 | 1506 | * @note: this function is mandatory to use the commutation event in order to |
| mbed_official | 133:d4dda5c437f0 | 1507 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
| mbed_official | 133:d4dda5c437f0 | 1508 | * the typical use of this feature is with the use of another Timer(interface Timer) |
| mbed_official | 133:d4dda5c437f0 | 1509 | * configured in Hall sensor interface, this interface Timer will generate the |
| mbed_official | 133:d4dda5c437f0 | 1510 | * commutation at its TRGO output (connected to Timer used in this function) each time |
| mbed_official | 133:d4dda5c437f0 | 1511 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
| mbed_official | 133:d4dda5c437f0 | 1512 | * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set |
| mbed_official | 133:d4dda5c437f0 | 1513 | * @param htim: TIM handle |
| mbed_official | 133:d4dda5c437f0 | 1514 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
| mbed_official | 133:d4dda5c437f0 | 1515 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1516 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
| mbed_official | 133:d4dda5c437f0 | 1517 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
| mbed_official | 133:d4dda5c437f0 | 1518 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
| mbed_official | 133:d4dda5c437f0 | 1519 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
| mbed_official | 133:d4dda5c437f0 | 1520 | * @arg TIM_TS_NONE: No trigger is needed |
| mbed_official | 133:d4dda5c437f0 | 1521 | * @param CommutationSource : the Commutation Event source |
| mbed_official | 133:d4dda5c437f0 | 1522 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1523 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
| mbed_official | 133:d4dda5c437f0 | 1524 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
| mbed_official | 133:d4dda5c437f0 | 1525 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1526 | */ |
| mbed_official | 133:d4dda5c437f0 | 1527 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
| mbed_official | 133:d4dda5c437f0 | 1528 | { |
| mbed_official | 133:d4dda5c437f0 | 1529 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1530 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 1531 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
| mbed_official | 133:d4dda5c437f0 | 1532 | |
| mbed_official | 133:d4dda5c437f0 | 1533 | __HAL_LOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1534 | |
| mbed_official | 133:d4dda5c437f0 | 1535 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
| mbed_official | 133:d4dda5c437f0 | 1536 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
| mbed_official | 133:d4dda5c437f0 | 1537 | { |
| mbed_official | 133:d4dda5c437f0 | 1538 | /* Select the Input trigger */ |
| mbed_official | 133:d4dda5c437f0 | 1539 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| mbed_official | 133:d4dda5c437f0 | 1540 | htim->Instance->SMCR |= InputTrigger; |
| mbed_official | 133:d4dda5c437f0 | 1541 | } |
| mbed_official | 133:d4dda5c437f0 | 1542 | |
| mbed_official | 133:d4dda5c437f0 | 1543 | /* Select the Capture Compare preload feature */ |
| mbed_official | 133:d4dda5c437f0 | 1544 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
| mbed_official | 133:d4dda5c437f0 | 1545 | /* Select the Commutation event source */ |
| mbed_official | 133:d4dda5c437f0 | 1546 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
| mbed_official | 133:d4dda5c437f0 | 1547 | htim->Instance->CR2 |= CommutationSource; |
| mbed_official | 133:d4dda5c437f0 | 1548 | |
| mbed_official | 133:d4dda5c437f0 | 1549 | /* Enable the Commutation DMA Request */ |
| mbed_official | 133:d4dda5c437f0 | 1550 | /* Set the DMA Commutation Callback */ |
| mbed_official | 133:d4dda5c437f0 | 1551 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt; |
| mbed_official | 133:d4dda5c437f0 | 1552 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 1553 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError; |
| mbed_official | 133:d4dda5c437f0 | 1554 | |
| mbed_official | 133:d4dda5c437f0 | 1555 | /* Enable the Commutation DMA Request */ |
| mbed_official | 133:d4dda5c437f0 | 1556 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); |
| mbed_official | 133:d4dda5c437f0 | 1557 | |
| mbed_official | 133:d4dda5c437f0 | 1558 | __HAL_UNLOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1559 | |
| mbed_official | 133:d4dda5c437f0 | 1560 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1561 | } |
| mbed_official | 133:d4dda5c437f0 | 1562 | |
| mbed_official | 133:d4dda5c437f0 | 1563 | /** |
| mbed_official | 133:d4dda5c437f0 | 1564 | * @brief Configures the TIM in master mode. |
| mbed_official | 133:d4dda5c437f0 | 1565 | * @param htim: TIM handle. |
| mbed_official | 133:d4dda5c437f0 | 1566 | * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that |
| mbed_official | 133:d4dda5c437f0 | 1567 | * contains the selected trigger output (TRGO) and the Master/Slave |
| mbed_official | 133:d4dda5c437f0 | 1568 | * mode. |
| mbed_official | 133:d4dda5c437f0 | 1569 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1570 | */ |
| mbed_official | 133:d4dda5c437f0 | 1571 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig) |
| mbed_official | 133:d4dda5c437f0 | 1572 | { |
| mbed_official | 133:d4dda5c437f0 | 1573 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1574 | assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 1575 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
| mbed_official | 133:d4dda5c437f0 | 1576 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
| mbed_official | 133:d4dda5c437f0 | 1577 | |
| mbed_official | 133:d4dda5c437f0 | 1578 | __HAL_LOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1579 | |
| mbed_official | 133:d4dda5c437f0 | 1580 | htim->State = HAL_TIM_STATE_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 1581 | |
| mbed_official | 133:d4dda5c437f0 | 1582 | /* Reset the MMS Bits */ |
| mbed_official | 133:d4dda5c437f0 | 1583 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
| mbed_official | 133:d4dda5c437f0 | 1584 | /* Select the TRGO source */ |
| mbed_official | 133:d4dda5c437f0 | 1585 | htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; |
| mbed_official | 133:d4dda5c437f0 | 1586 | |
| mbed_official | 133:d4dda5c437f0 | 1587 | /* Reset the MSM Bit */ |
| mbed_official | 133:d4dda5c437f0 | 1588 | htim->Instance->SMCR &= ~TIM_SMCR_MSM; |
| mbed_official | 133:d4dda5c437f0 | 1589 | /* Set or Reset the MSM Bit */ |
| mbed_official | 133:d4dda5c437f0 | 1590 | htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; |
| mbed_official | 133:d4dda5c437f0 | 1591 | |
| mbed_official | 133:d4dda5c437f0 | 1592 | htim->State = HAL_TIM_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 1593 | |
| mbed_official | 133:d4dda5c437f0 | 1594 | __HAL_UNLOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1595 | |
| mbed_official | 133:d4dda5c437f0 | 1596 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1597 | } |
| mbed_official | 133:d4dda5c437f0 | 1598 | |
| mbed_official | 133:d4dda5c437f0 | 1599 | /** |
| mbed_official | 133:d4dda5c437f0 | 1600 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
| mbed_official | 133:d4dda5c437f0 | 1601 | * and the AOE(automatic output enable). |
| mbed_official | 133:d4dda5c437f0 | 1602 | * @param htim: TIM handle |
| mbed_official | 133:d4dda5c437f0 | 1603 | * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfig_TypeDef structure that |
| mbed_official | 133:d4dda5c437f0 | 1604 | * contains the BDTR Register configuration information for the TIM peripheral. |
| mbed_official | 133:d4dda5c437f0 | 1605 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1606 | */ |
| mbed_official | 133:d4dda5c437f0 | 1607 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
| mbed_official | 133:d4dda5c437f0 | 1608 | TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) |
| mbed_official | 133:d4dda5c437f0 | 1609 | { |
| mbed_official | 133:d4dda5c437f0 | 1610 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1611 | assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 1612 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
| mbed_official | 133:d4dda5c437f0 | 1613 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
| mbed_official | 133:d4dda5c437f0 | 1614 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
| mbed_official | 133:d4dda5c437f0 | 1615 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
| mbed_official | 133:d4dda5c437f0 | 1616 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
| mbed_official | 133:d4dda5c437f0 | 1617 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
| mbed_official | 133:d4dda5c437f0 | 1618 | |
| mbed_official | 133:d4dda5c437f0 | 1619 | /* Process Locked */ |
| mbed_official | 133:d4dda5c437f0 | 1620 | __HAL_LOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1621 | |
| mbed_official | 133:d4dda5c437f0 | 1622 | htim->State = HAL_TIM_STATE_BUSY; |
| mbed_official | 133:d4dda5c437f0 | 1623 | |
| mbed_official | 133:d4dda5c437f0 | 1624 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
| mbed_official | 133:d4dda5c437f0 | 1625 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
| mbed_official | 133:d4dda5c437f0 | 1626 | htim->Instance->BDTR = (uint32_t)sBreakDeadTimeConfig->OffStateRunMode | |
| mbed_official | 133:d4dda5c437f0 | 1627 | sBreakDeadTimeConfig->OffStateIDLEMode | |
| mbed_official | 133:d4dda5c437f0 | 1628 | sBreakDeadTimeConfig->LockLevel | |
| mbed_official | 133:d4dda5c437f0 | 1629 | sBreakDeadTimeConfig->DeadTime | |
| mbed_official | 133:d4dda5c437f0 | 1630 | sBreakDeadTimeConfig->BreakState | |
| mbed_official | 133:d4dda5c437f0 | 1631 | sBreakDeadTimeConfig->BreakPolarity | |
| mbed_official | 133:d4dda5c437f0 | 1632 | sBreakDeadTimeConfig->AutomaticOutput; |
| mbed_official | 133:d4dda5c437f0 | 1633 | |
| mbed_official | 133:d4dda5c437f0 | 1634 | |
| mbed_official | 133:d4dda5c437f0 | 1635 | htim->State = HAL_TIM_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 1636 | |
| mbed_official | 133:d4dda5c437f0 | 1637 | __HAL_UNLOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1638 | |
| mbed_official | 133:d4dda5c437f0 | 1639 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1640 | } |
| mbed_official | 133:d4dda5c437f0 | 1641 | |
| mbed_official | 133:d4dda5c437f0 | 1642 | /** |
| mbed_official | 133:d4dda5c437f0 | 1643 | * @brief Configures the TIM2, TIM5 and TIM11 Remapping input capabilities. |
| mbed_official | 133:d4dda5c437f0 | 1644 | * @param htim: TIM handle. |
| mbed_official | 133:d4dda5c437f0 | 1645 | * @param TIM_Remap: specifies the TIM input remapping source. |
| mbed_official | 133:d4dda5c437f0 | 1646 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1647 | * @arg TIM_TIM2_TIM8_TRGO: TIM2 ITR1 input is connected to TIM8 Trigger output(default) |
| mbed_official | 133:d4dda5c437f0 | 1648 | * @arg TIM_TIM2_ETH_PTP: TIM2 ITR1 input is connected to ETH PTP trogger output. |
| mbed_official | 133:d4dda5c437f0 | 1649 | * @arg TIM_TIM2_USBFS_SOF: TIM2 ITR1 input is connected to USB FS SOF. |
| mbed_official | 133:d4dda5c437f0 | 1650 | * @arg TIM_TIM2_USBHS_SOF: TIM2 ITR1 input is connected to USB HS SOF. |
| mbed_official | 133:d4dda5c437f0 | 1651 | * @arg TIM_TIM5_GPIO: TIM5 CH4 input is connected to dedicated Timer pin(default) |
| mbed_official | 133:d4dda5c437f0 | 1652 | * @arg TIM_TIM5_LSI: TIM5 CH4 input is connected to LSI clock. |
| mbed_official | 133:d4dda5c437f0 | 1653 | * @arg TIM_TIM5_LSE: TIM5 CH4 input is connected to LSE clock. |
| mbed_official | 133:d4dda5c437f0 | 1654 | * @arg TIM_TIM5_RTC: TIM5 CH4 input is connected to RTC Output event. |
| mbed_official | 133:d4dda5c437f0 | 1655 | * @arg TIM_TIM11_GPIO: TIM11 CH4 input is connected to dedicated Timer pin(default) |
| mbed_official | 133:d4dda5c437f0 | 1656 | * @arg TIM_TIM11_HSE: TIM11 CH4 input is connected to HSE_RTC clock |
| mbed_official | 133:d4dda5c437f0 | 1657 | * (HSE divided by a programmable prescaler) |
| mbed_official | 133:d4dda5c437f0 | 1658 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 1659 | */ |
| mbed_official | 133:d4dda5c437f0 | 1660 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) |
| mbed_official | 133:d4dda5c437f0 | 1661 | { |
| mbed_official | 133:d4dda5c437f0 | 1662 | __HAL_LOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1663 | |
| mbed_official | 133:d4dda5c437f0 | 1664 | /* Check parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1665 | assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); |
| mbed_official | 133:d4dda5c437f0 | 1666 | assert_param(IS_TIM_REMAP(Remap)); |
| mbed_official | 133:d4dda5c437f0 | 1667 | |
| mbed_official | 133:d4dda5c437f0 | 1668 | /* Set the Timer remapping configuration */ |
| mbed_official | 133:d4dda5c437f0 | 1669 | htim->Instance->OR = Remap; |
| mbed_official | 133:d4dda5c437f0 | 1670 | |
| mbed_official | 133:d4dda5c437f0 | 1671 | htim->State = HAL_TIM_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 1672 | |
| mbed_official | 133:d4dda5c437f0 | 1673 | __HAL_UNLOCK(htim); |
| mbed_official | 133:d4dda5c437f0 | 1674 | |
| mbed_official | 133:d4dda5c437f0 | 1675 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 1676 | } |
| mbed_official | 133:d4dda5c437f0 | 1677 | |
| mbed_official | 133:d4dda5c437f0 | 1678 | /** |
| mbed_official | 133:d4dda5c437f0 | 1679 | * @} |
| mbed_official | 133:d4dda5c437f0 | 1680 | */ |
| mbed_official | 133:d4dda5c437f0 | 1681 | |
| mbed_official | 133:d4dda5c437f0 | 1682 | /** @defgroup TIMEx_Group6 Extension Callbacks functions |
| mbed_official | 133:d4dda5c437f0 | 1683 | * @brief Extension Callbacks functions |
| mbed_official | 133:d4dda5c437f0 | 1684 | * |
| mbed_official | 133:d4dda5c437f0 | 1685 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 1686 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 1687 | ##### Extension Callbacks functions ##### |
| mbed_official | 133:d4dda5c437f0 | 1688 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 1689 | [..] |
| mbed_official | 133:d4dda5c437f0 | 1690 | This section provides Extension TIM callback functions: |
| mbed_official | 133:d4dda5c437f0 | 1691 | (+) Timer Commutation callback |
| mbed_official | 133:d4dda5c437f0 | 1692 | (+) Timer Break callback |
| mbed_official | 133:d4dda5c437f0 | 1693 | |
| mbed_official | 133:d4dda5c437f0 | 1694 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 1695 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 1696 | */ |
| mbed_official | 133:d4dda5c437f0 | 1697 | |
| mbed_official | 133:d4dda5c437f0 | 1698 | /** |
| mbed_official | 133:d4dda5c437f0 | 1699 | * @brief Hall commutation changed callback in non blocking mode |
| mbed_official | 133:d4dda5c437f0 | 1700 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 1701 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 1702 | */ |
| mbed_official | 133:d4dda5c437f0 | 1703 | __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 1704 | { |
| mbed_official | 133:d4dda5c437f0 | 1705 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 133:d4dda5c437f0 | 1706 | the HAL_TIMEx_CommutationCallback could be implemented in the user file |
| mbed_official | 133:d4dda5c437f0 | 1707 | */ |
| mbed_official | 133:d4dda5c437f0 | 1708 | } |
| mbed_official | 133:d4dda5c437f0 | 1709 | |
| mbed_official | 133:d4dda5c437f0 | 1710 | /** |
| mbed_official | 133:d4dda5c437f0 | 1711 | * @brief Hall Break detection callback in non blocking mode |
| mbed_official | 133:d4dda5c437f0 | 1712 | * @param htim : TIM handle |
| mbed_official | 133:d4dda5c437f0 | 1713 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 1714 | */ |
| mbed_official | 133:d4dda5c437f0 | 1715 | __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 1716 | { |
| mbed_official | 133:d4dda5c437f0 | 1717 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 133:d4dda5c437f0 | 1718 | the HAL_TIMEx_BreakCallback could be implemented in the user file |
| mbed_official | 133:d4dda5c437f0 | 1719 | */ |
| mbed_official | 133:d4dda5c437f0 | 1720 | } |
| mbed_official | 133:d4dda5c437f0 | 1721 | |
| mbed_official | 133:d4dda5c437f0 | 1722 | /** |
| mbed_official | 133:d4dda5c437f0 | 1723 | * @} |
| mbed_official | 133:d4dda5c437f0 | 1724 | */ |
| mbed_official | 133:d4dda5c437f0 | 1725 | |
| mbed_official | 133:d4dda5c437f0 | 1726 | /** @defgroup TIMEx_Group7 Extension Peripheral State functions |
| mbed_official | 133:d4dda5c437f0 | 1727 | * @brief Extension Peripheral State functions |
| mbed_official | 133:d4dda5c437f0 | 1728 | * |
| mbed_official | 133:d4dda5c437f0 | 1729 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 1730 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 1731 | ##### Extension Peripheral State functions ##### |
| mbed_official | 133:d4dda5c437f0 | 1732 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 1733 | [..] |
| mbed_official | 133:d4dda5c437f0 | 1734 | This subsection permit to get in run-time the status of the peripheral |
| mbed_official | 133:d4dda5c437f0 | 1735 | and the data flow. |
| mbed_official | 133:d4dda5c437f0 | 1736 | |
| mbed_official | 133:d4dda5c437f0 | 1737 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 1738 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 1739 | */ |
| mbed_official | 133:d4dda5c437f0 | 1740 | |
| mbed_official | 133:d4dda5c437f0 | 1741 | /** |
| mbed_official | 133:d4dda5c437f0 | 1742 | * @brief Return the TIM Hall Sensor interface state |
| mbed_official | 133:d4dda5c437f0 | 1743 | * @param htim: TIM Hall Sensor handle |
| mbed_official | 133:d4dda5c437f0 | 1744 | * @retval HAL state |
| mbed_official | 133:d4dda5c437f0 | 1745 | */ |
| mbed_official | 133:d4dda5c437f0 | 1746 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) |
| mbed_official | 133:d4dda5c437f0 | 1747 | { |
| mbed_official | 133:d4dda5c437f0 | 1748 | return htim->State; |
| mbed_official | 133:d4dda5c437f0 | 1749 | } |
| mbed_official | 133:d4dda5c437f0 | 1750 | |
| mbed_official | 133:d4dda5c437f0 | 1751 | /** |
| mbed_official | 133:d4dda5c437f0 | 1752 | * @} |
| mbed_official | 133:d4dda5c437f0 | 1753 | */ |
| mbed_official | 133:d4dda5c437f0 | 1754 | |
| mbed_official | 133:d4dda5c437f0 | 1755 | /** |
| mbed_official | 133:d4dda5c437f0 | 1756 | * @brief TIM DMA Commutation callback. |
| mbed_official | 133:d4dda5c437f0 | 1757 | * @param hdma : pointer to DMA handle. |
| mbed_official | 133:d4dda5c437f0 | 1758 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 1759 | */ |
| mbed_official | 133:d4dda5c437f0 | 1760 | void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) |
| mbed_official | 133:d4dda5c437f0 | 1761 | { |
| mbed_official | 133:d4dda5c437f0 | 1762 | TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| mbed_official | 133:d4dda5c437f0 | 1763 | |
| mbed_official | 133:d4dda5c437f0 | 1764 | htim->State= HAL_TIM_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 1765 | |
| mbed_official | 133:d4dda5c437f0 | 1766 | HAL_TIMEx_CommutationCallback(htim); |
| mbed_official | 133:d4dda5c437f0 | 1767 | } |
| mbed_official | 133:d4dda5c437f0 | 1768 | |
| mbed_official | 133:d4dda5c437f0 | 1769 | /** |
| mbed_official | 133:d4dda5c437f0 | 1770 | * @brief Enables or disables the TIM Capture Compare Channel xN. |
| mbed_official | 133:d4dda5c437f0 | 1771 | * @param TIMx to select the TIM peripheral |
| mbed_official | 133:d4dda5c437f0 | 1772 | * @param Channel: specifies the TIM Channel |
| mbed_official | 133:d4dda5c437f0 | 1773 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 1774 | * @arg TIM_Channel_1: TIM Channel 1 |
| mbed_official | 133:d4dda5c437f0 | 1775 | * @arg TIM_Channel_2: TIM Channel 2 |
| mbed_official | 133:d4dda5c437f0 | 1776 | * @arg TIM_Channel_3: TIM Channel 3 |
| mbed_official | 133:d4dda5c437f0 | 1777 | * @param ChannelNState: specifies the TIM Channel CCxNE bit new state. |
| mbed_official | 133:d4dda5c437f0 | 1778 | * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. |
| mbed_official | 133:d4dda5c437f0 | 1779 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 1780 | */ |
| mbed_official | 133:d4dda5c437f0 | 1781 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) |
| mbed_official | 133:d4dda5c437f0 | 1782 | { |
| mbed_official | 133:d4dda5c437f0 | 1783 | uint32_t tmp = 0; |
| mbed_official | 133:d4dda5c437f0 | 1784 | |
| mbed_official | 133:d4dda5c437f0 | 1785 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 1786 | assert_param(IS_TIM_CC4_INSTANCE(TIMx)); |
| mbed_official | 133:d4dda5c437f0 | 1787 | assert_param(IS_TIM_COMPLEMENTARY_CHANNELS(Channel)); |
| mbed_official | 133:d4dda5c437f0 | 1788 | |
| mbed_official | 133:d4dda5c437f0 | 1789 | tmp = TIM_CCER_CC1NE << Channel; |
| mbed_official | 133:d4dda5c437f0 | 1790 | |
| mbed_official | 133:d4dda5c437f0 | 1791 | /* Reset the CCxNE Bit */ |
| mbed_official | 133:d4dda5c437f0 | 1792 | TIMx->CCER &= ~tmp; |
| mbed_official | 133:d4dda5c437f0 | 1793 | |
| mbed_official | 133:d4dda5c437f0 | 1794 | /* Set or reset the CCxNE Bit */ |
| mbed_official | 133:d4dda5c437f0 | 1795 | TIMx->CCER |= (uint32_t)(ChannelNState << Channel); |
| mbed_official | 133:d4dda5c437f0 | 1796 | } |
| mbed_official | 133:d4dda5c437f0 | 1797 | |
| mbed_official | 133:d4dda5c437f0 | 1798 | /** |
| mbed_official | 133:d4dda5c437f0 | 1799 | * @} |
| mbed_official | 133:d4dda5c437f0 | 1800 | */ |
| mbed_official | 133:d4dda5c437f0 | 1801 | |
| mbed_official | 133:d4dda5c437f0 | 1802 | #endif /* HAL_TIM_MODULE_ENABLED */ |
| mbed_official | 133:d4dda5c437f0 | 1803 | /** |
| mbed_official | 133:d4dda5c437f0 | 1804 | * @} |
| mbed_official | 133:d4dda5c437f0 | 1805 | */ |
| mbed_official | 133:d4dda5c437f0 | 1806 | |
| mbed_official | 133:d4dda5c437f0 | 1807 | /** |
| mbed_official | 133:d4dda5c437f0 | 1808 | * @} |
| mbed_official | 133:d4dda5c437f0 | 1809 | */ |
| mbed_official | 133:d4dda5c437f0 | 1810 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |