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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_hash_ex.c@133:d4dda5c437f0, 2014-03-24 (annotated)

Committer:
mbed_official
Date:
Mon Mar 24 17:45:07 2014 +0000
Revision:
133:d4dda5c437f0
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61



Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/



[STM32F4-Discovery (STM32F407VG)] initial port

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_hash_ex.c
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 133:d4dda5c437f0 5 * @version V1.0.0
mbed_official 133:d4dda5c437f0 6 * @date 18-February-2014
mbed_official 133:d4dda5c437f0 7 * @brief HASH HAL Extension module driver.
mbed_official 133:d4dda5c437f0 8 * This file provides firmware functions to manage the following
mbed_official 133:d4dda5c437f0 9 * functionalities of HASH peripheral:
mbed_official 133:d4dda5c437f0 10 * + Extended HASH processing functions based on SHA224 Algorithm
mbed_official 133:d4dda5c437f0 11 * + Extended HASH processing functions based on SHA256 Algorithm
mbed_official 133:d4dda5c437f0 12 *
mbed_official 133:d4dda5c437f0 13 @verbatim
mbed_official 133:d4dda5c437f0 14 ==============================================================================
mbed_official 133:d4dda5c437f0 15 ##### How to use this driver #####
mbed_official 133:d4dda5c437f0 16 ==============================================================================
mbed_official 133:d4dda5c437f0 17 [..]
mbed_official 133:d4dda5c437f0 18 The HASH HAL driver can be used as follows:
mbed_official 133:d4dda5c437f0 19 (#)Initialize the HASH low level resources by implementing the HAL_HASH_MspInit():
mbed_official 133:d4dda5c437f0 20 (##) Enable the HASH interface clock using __HASH_CLK_ENABLE()
mbed_official 133:d4dda5c437f0 21 (##) In case of using processing APIs based on interrupts (e.g. HAL_HMACEx_SHA224_Start())
mbed_official 133:d4dda5c437f0 22 (+++) Configure the HASH interrupt priority using HAL_NVIC_SetPriority()
mbed_official 133:d4dda5c437f0 23 (+++) Enable the HASH IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 133:d4dda5c437f0 24 (+++) In HASH IRQ handler, call HAL_HASH_IRQHandler()
mbed_official 133:d4dda5c437f0 25 (##) In case of using DMA to control data transfer (e.g. HAL_HMACEx_SH224_Start_DMA())
mbed_official 133:d4dda5c437f0 26 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
mbed_official 133:d4dda5c437f0 27 (+++) Configure and enable one DMA stream one for managing data transfer from
mbed_official 133:d4dda5c437f0 28 memory to peripheral (input stream). Managing data transfer from
mbed_official 133:d4dda5c437f0 29 peripheral to memory can be performed only using CPU
mbed_official 133:d4dda5c437f0 30 (+++) Associate the initialized DMA handle to the HASH DMA handle
mbed_official 133:d4dda5c437f0 31 using __HAL_LINKDMA()
mbed_official 133:d4dda5c437f0 32 (+++) Configure the priority and enable the NVIC for the transfer complete
mbed_official 133:d4dda5c437f0 33 interrupt on the DMA Stream: HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
mbed_official 133:d4dda5c437f0 34 (#)Initialize the HASH HAL using HAL_HASH_Init(). This function configures mainly:
mbed_official 133:d4dda5c437f0 35 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit.
mbed_official 133:d4dda5c437f0 36 (##) For HMAC, the encryption key.
mbed_official 133:d4dda5c437f0 37 (##) For HMAC, the key size used for encryption.
mbed_official 133:d4dda5c437f0 38 (#)Three processing functions are available:
mbed_official 133:d4dda5c437f0 39 (##) Polling mode: processing APIs are blocking functions
mbed_official 133:d4dda5c437f0 40 i.e. they process the data and wait till the digest computation is finished
mbed_official 133:d4dda5c437f0 41 e.g. HAL_HASHEx_SHA224_Start()
mbed_official 133:d4dda5c437f0 42 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
mbed_official 133:d4dda5c437f0 43 i.e. they process the data under interrupt
mbed_official 133:d4dda5c437f0 44 e.g. HAL_HASHEx_SHA224_Start_IT()
mbed_official 133:d4dda5c437f0 45 (##) DMA mode: processing APIs are not blocking functions and the CPU is
mbed_official 133:d4dda5c437f0 46 not used for data transfer i.e. the data transfer is ensured by DMA
mbed_official 133:d4dda5c437f0 47 e.g. HAL_HASHEx_SHA224_Start_DMA()
mbed_official 133:d4dda5c437f0 48 (#)When the processing function is called at first time after HAL_HASH_Init()
mbed_official 133:d4dda5c437f0 49 the HASH peripheral is initialized and processes the buffer in input.
mbed_official 133:d4dda5c437f0 50 After that, the digest computation is started.
mbed_official 133:d4dda5c437f0 51 When processing multi-buffer use the accumulate function to write the
mbed_official 133:d4dda5c437f0 52 data in the peripheral without starting the digest computation. In last
mbed_official 133:d4dda5c437f0 53 buffer use the start function to input the last buffer ans start the digest
mbed_official 133:d4dda5c437f0 54 computation.
mbed_official 133:d4dda5c437f0 55 (##) e.g. HAL_HASHEx_SHA224_Accumulate() : write 1st data buffer in the peripheral without starting the digest computation
mbed_official 133:d4dda5c437f0 56 (##) write (n-1)th data buffer in the peripheral without starting the digest computation
mbed_official 133:d4dda5c437f0 57 (##) HAL_HASHEx_SHA224_Start() : write (n)th data buffer in the peripheral and start the digest computation
mbed_official 133:d4dda5c437f0 58 (#)In HMAC mode, there is no Accumulate API. Only Start API is available.
mbed_official 133:d4dda5c437f0 59 (#)In case of using DMA, call the DMA start processing e.g. HAL_HASHEx_SHA224_Start_DMA().
mbed_official 133:d4dda5c437f0 60 After that, call the finish function in order to get the digest value
mbed_official 133:d4dda5c437f0 61 e.g. HAL_HASHEx_SHA224_Finish()
mbed_official 133:d4dda5c437f0 62 (#)Call HAL_HASH_DeInit() to deinitialize the HASH peripheral.
mbed_official 133:d4dda5c437f0 63
mbed_official 133:d4dda5c437f0 64 @endverbatim
mbed_official 133:d4dda5c437f0 65 ******************************************************************************
mbed_official 133:d4dda5c437f0 66 * @attention
mbed_official 133:d4dda5c437f0 67 *
mbed_official 133:d4dda5c437f0 68 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 69 *
mbed_official 133:d4dda5c437f0 70 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 71 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 72 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 73 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 74 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 75 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 76 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 77 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 78 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 79 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 80 *
mbed_official 133:d4dda5c437f0 81 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 82 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 83 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 84 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 85 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 86 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 87 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 88 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 89 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 90 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 91 *
mbed_official 133:d4dda5c437f0 92 ******************************************************************************
mbed_official 133:d4dda5c437f0 93 */
mbed_official 133:d4dda5c437f0 94
mbed_official 133:d4dda5c437f0 95 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 96 #include "stm32f4xx_hal.h"
mbed_official 133:d4dda5c437f0 97
mbed_official 133:d4dda5c437f0 98 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 99 * @{
mbed_official 133:d4dda5c437f0 100 */
mbed_official 133:d4dda5c437f0 101
mbed_official 133:d4dda5c437f0 102 /** @defgroup HASHEx
mbed_official 133:d4dda5c437f0 103 * @brief HASH Extension HAL module driver.
mbed_official 133:d4dda5c437f0 104 * @{
mbed_official 133:d4dda5c437f0 105 */
mbed_official 133:d4dda5c437f0 106
mbed_official 133:d4dda5c437f0 107 #ifdef HAL_HASH_MODULE_ENABLED
mbed_official 133:d4dda5c437f0 108
mbed_official 133:d4dda5c437f0 109 #if defined(STM32F437xx) || defined(STM32F439xx)
mbed_official 133:d4dda5c437f0 110
mbed_official 133:d4dda5c437f0 111 /* Private typedef -----------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 112 /* Private define ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 113 /* Private macro -------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 114 /* Private variables ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 115 /* Private function prototypes -----------------------------------------------*/
mbed_official 133:d4dda5c437f0 116 static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 117 static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size);
mbed_official 133:d4dda5c437f0 118 static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size);
mbed_official 133:d4dda5c437f0 119 static void HASHEx_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 120
mbed_official 133:d4dda5c437f0 121 /* Private functions ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 122
mbed_official 133:d4dda5c437f0 123 /** @defgroup HASHEx_Private_Functions
mbed_official 133:d4dda5c437f0 124 * @{
mbed_official 133:d4dda5c437f0 125 */
mbed_official 133:d4dda5c437f0 126
mbed_official 133:d4dda5c437f0 127 /** @defgroup HASHEx_Group1 HASH processing functions
mbed_official 133:d4dda5c437f0 128 * @brief processing functions using polling mode
mbed_official 133:d4dda5c437f0 129 *
mbed_official 133:d4dda5c437f0 130 @verbatim
mbed_official 133:d4dda5c437f0 131 ===============================================================================
mbed_official 133:d4dda5c437f0 132 ##### HASH processing using polling mode functions #####
mbed_official 133:d4dda5c437f0 133 ===============================================================================
mbed_official 133:d4dda5c437f0 134 [..] This section provides functions allowing to calculate in polling mode
mbed_official 133:d4dda5c437f0 135 the hash value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 136 (+) SHA224
mbed_official 133:d4dda5c437f0 137 (+) SHA256
mbed_official 133:d4dda5c437f0 138
mbed_official 133:d4dda5c437f0 139 @endverbatim
mbed_official 133:d4dda5c437f0 140 * @{
mbed_official 133:d4dda5c437f0 141 */
mbed_official 133:d4dda5c437f0 142
mbed_official 133:d4dda5c437f0 143 /**
mbed_official 133:d4dda5c437f0 144 * @brief Initializes the HASH peripheral in SHA224 mode
mbed_official 133:d4dda5c437f0 145 * then processes pInBuffer. The digest is available in pOutBuffer
mbed_official 133:d4dda5c437f0 146 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 147 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 148 * @param pOutBuffer: Pointer to the output buffer (hashed buffer).
mbed_official 133:d4dda5c437f0 149 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 150 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 151 * @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
mbed_official 133:d4dda5c437f0 152 * @param Timeout: Specify Timeout value
mbed_official 133:d4dda5c437f0 153 * @retval HAL status
mbed_official 133:d4dda5c437f0 154 */
mbed_official 133:d4dda5c437f0 155 HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 156 {
mbed_official 133:d4dda5c437f0 157 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 158
mbed_official 133:d4dda5c437f0 159 /* Process Locked */
mbed_official 133:d4dda5c437f0 160 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 161
mbed_official 133:d4dda5c437f0 162 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 163 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 164
mbed_official 133:d4dda5c437f0 165 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 166 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 167 {
mbed_official 133:d4dda5c437f0 168 /* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 169 the message digest of a new message */
mbed_official 133:d4dda5c437f0 170 HASH->CR |= HASH_AlgoSelection_SHA224 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 171 }
mbed_official 133:d4dda5c437f0 172
mbed_official 133:d4dda5c437f0 173 /* Set the phase */
mbed_official 133:d4dda5c437f0 174 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 175
mbed_official 133:d4dda5c437f0 176 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 177 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 178
mbed_official 133:d4dda5c437f0 179 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 180 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 181
mbed_official 133:d4dda5c437f0 182 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 183 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 184
mbed_official 133:d4dda5c437f0 185 /* Get timeout */
mbed_official 133:d4dda5c437f0 186 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 187
mbed_official 133:d4dda5c437f0 188 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 189 {
mbed_official 133:d4dda5c437f0 190 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 191 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 192 {
mbed_official 133:d4dda5c437f0 193 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 194 {
mbed_official 133:d4dda5c437f0 195 /* Change state */
mbed_official 133:d4dda5c437f0 196 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 197
mbed_official 133:d4dda5c437f0 198 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 199 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 200
mbed_official 133:d4dda5c437f0 201 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 202 }
mbed_official 133:d4dda5c437f0 203 }
mbed_official 133:d4dda5c437f0 204 }
mbed_official 133:d4dda5c437f0 205
mbed_official 133:d4dda5c437f0 206 /* Read the message digest */
mbed_official 133:d4dda5c437f0 207 HASHEx_GetDigest(pOutBuffer, 28);
mbed_official 133:d4dda5c437f0 208
mbed_official 133:d4dda5c437f0 209 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 210 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 211
mbed_official 133:d4dda5c437f0 212 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 213 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 214
mbed_official 133:d4dda5c437f0 215 /* Return function status */
mbed_official 133:d4dda5c437f0 216 return HAL_OK;
mbed_official 133:d4dda5c437f0 217 }
mbed_official 133:d4dda5c437f0 218
mbed_official 133:d4dda5c437f0 219 /**
mbed_official 133:d4dda5c437f0 220 * @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 221 The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 222 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 223 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 224 * @param pOutBuffer: Pointer to the output buffer (hashed buffer).
mbed_official 133:d4dda5c437f0 225 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 226 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 227 * @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
mbed_official 133:d4dda5c437f0 228 * @param Timeout: Specify Timeout value
mbed_official 133:d4dda5c437f0 229 * @retval HAL status
mbed_official 133:d4dda5c437f0 230 */
mbed_official 133:d4dda5c437f0 231 HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 232 {
mbed_official 133:d4dda5c437f0 233 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 234
mbed_official 133:d4dda5c437f0 235 /* Process Locked */
mbed_official 133:d4dda5c437f0 236 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 237
mbed_official 133:d4dda5c437f0 238 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 239 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 240
mbed_official 133:d4dda5c437f0 241 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 242 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 243 {
mbed_official 133:d4dda5c437f0 244 /* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 245 the message digest of a new message */
mbed_official 133:d4dda5c437f0 246 HASH->CR |= HASH_AlgoSelection_SHA256 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 247 }
mbed_official 133:d4dda5c437f0 248
mbed_official 133:d4dda5c437f0 249 /* Set the phase */
mbed_official 133:d4dda5c437f0 250 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 251
mbed_official 133:d4dda5c437f0 252 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 253 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 254
mbed_official 133:d4dda5c437f0 255 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 256 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 257
mbed_official 133:d4dda5c437f0 258 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 259 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 260
mbed_official 133:d4dda5c437f0 261 /* Get timeout */
mbed_official 133:d4dda5c437f0 262 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 263
mbed_official 133:d4dda5c437f0 264 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 265 {
mbed_official 133:d4dda5c437f0 266 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 267 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 268 {
mbed_official 133:d4dda5c437f0 269 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 270 {
mbed_official 133:d4dda5c437f0 271 /* Change state */
mbed_official 133:d4dda5c437f0 272 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 273
mbed_official 133:d4dda5c437f0 274 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 275 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 276
mbed_official 133:d4dda5c437f0 277 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 278 }
mbed_official 133:d4dda5c437f0 279 }
mbed_official 133:d4dda5c437f0 280 }
mbed_official 133:d4dda5c437f0 281
mbed_official 133:d4dda5c437f0 282 /* Read the message digest */
mbed_official 133:d4dda5c437f0 283 HASHEx_GetDigest(pOutBuffer, 32);
mbed_official 133:d4dda5c437f0 284
mbed_official 133:d4dda5c437f0 285 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 286 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 287
mbed_official 133:d4dda5c437f0 288 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 289 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 290
mbed_official 133:d4dda5c437f0 291 /* Return function status */
mbed_official 133:d4dda5c437f0 292 return HAL_OK;
mbed_official 133:d4dda5c437f0 293 }
mbed_official 133:d4dda5c437f0 294
mbed_official 133:d4dda5c437f0 295
mbed_official 133:d4dda5c437f0 296 /**
mbed_official 133:d4dda5c437f0 297 * @brief Initializes the HASH peripheral in SHA224 mode
mbed_official 133:d4dda5c437f0 298 * then processes pInBuffer. The digest is available in pOutBuffer
mbed_official 133:d4dda5c437f0 299 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 300 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 301 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 302 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 303 * @retval HAL status
mbed_official 133:d4dda5c437f0 304 */
mbed_official 133:d4dda5c437f0 305 HAL_StatusTypeDef HAL_HASHEx_SHA224_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 306 {
mbed_official 133:d4dda5c437f0 307 /* Process Locked */
mbed_official 133:d4dda5c437f0 308 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 309
mbed_official 133:d4dda5c437f0 310 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 311 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 312
mbed_official 133:d4dda5c437f0 313 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 314 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 315 {
mbed_official 133:d4dda5c437f0 316 /* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 317 the message digest of a new message */
mbed_official 133:d4dda5c437f0 318 HASH->CR |= HASH_AlgoSelection_SHA224 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 319 }
mbed_official 133:d4dda5c437f0 320
mbed_official 133:d4dda5c437f0 321 /* Set the phase */
mbed_official 133:d4dda5c437f0 322 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 323
mbed_official 133:d4dda5c437f0 324 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 325 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 326
mbed_official 133:d4dda5c437f0 327 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 328 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 329
mbed_official 133:d4dda5c437f0 330 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 331 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 332
mbed_official 133:d4dda5c437f0 333 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 334 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 335
mbed_official 133:d4dda5c437f0 336 /* Return function status */
mbed_official 133:d4dda5c437f0 337 return HAL_OK;
mbed_official 133:d4dda5c437f0 338 }
mbed_official 133:d4dda5c437f0 339
mbed_official 133:d4dda5c437f0 340
mbed_official 133:d4dda5c437f0 341 /**
mbed_official 133:d4dda5c437f0 342 * @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 343 The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 344 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 345 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 346 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 347 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 348 * @retval HAL status
mbed_official 133:d4dda5c437f0 349 */
mbed_official 133:d4dda5c437f0 350 HAL_StatusTypeDef HAL_HASHEx_SHA256_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 351 {
mbed_official 133:d4dda5c437f0 352 /* Process Locked */
mbed_official 133:d4dda5c437f0 353 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 354
mbed_official 133:d4dda5c437f0 355 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 356 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 357
mbed_official 133:d4dda5c437f0 358 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 359 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 360 {
mbed_official 133:d4dda5c437f0 361 /* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 362 the message digest of a new message */
mbed_official 133:d4dda5c437f0 363 HASH->CR |= HASH_AlgoSelection_SHA256 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 364 }
mbed_official 133:d4dda5c437f0 365
mbed_official 133:d4dda5c437f0 366 /* Set the phase */
mbed_official 133:d4dda5c437f0 367 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 368
mbed_official 133:d4dda5c437f0 369 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 370 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 371
mbed_official 133:d4dda5c437f0 372 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 373 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 374
mbed_official 133:d4dda5c437f0 375 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 376 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 377
mbed_official 133:d4dda5c437f0 378 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 379 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 380
mbed_official 133:d4dda5c437f0 381 /* Return function status */
mbed_official 133:d4dda5c437f0 382 return HAL_OK;
mbed_official 133:d4dda5c437f0 383 }
mbed_official 133:d4dda5c437f0 384
mbed_official 133:d4dda5c437f0 385
mbed_official 133:d4dda5c437f0 386 /**
mbed_official 133:d4dda5c437f0 387 * @}
mbed_official 133:d4dda5c437f0 388 */
mbed_official 133:d4dda5c437f0 389
mbed_official 133:d4dda5c437f0 390 /** @defgroup HASHEx_Group2 HMAC processing functions using polling mode
mbed_official 133:d4dda5c437f0 391 * @brief HMAC processing functions using polling mode .
mbed_official 133:d4dda5c437f0 392 *
mbed_official 133:d4dda5c437f0 393 @verbatim
mbed_official 133:d4dda5c437f0 394 ===============================================================================
mbed_official 133:d4dda5c437f0 395 ##### HMAC processing using polling mode functions #####
mbed_official 133:d4dda5c437f0 396 ===============================================================================
mbed_official 133:d4dda5c437f0 397 [..] This section provides functions allowing to calculate in polling mode
mbed_official 133:d4dda5c437f0 398 the HMAC value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 399 (+) SHA224
mbed_official 133:d4dda5c437f0 400 (+) SHA256
mbed_official 133:d4dda5c437f0 401
mbed_official 133:d4dda5c437f0 402 @endverbatim
mbed_official 133:d4dda5c437f0 403 * @{
mbed_official 133:d4dda5c437f0 404 */
mbed_official 133:d4dda5c437f0 405
mbed_official 133:d4dda5c437f0 406 /**
mbed_official 133:d4dda5c437f0 407 * @brief Initializes the HASH peripheral in HMAC SHA224 mode
mbed_official 133:d4dda5c437f0 408 * then processes pInBuffer. The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 409 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 410 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 411 * @param pOutBuffer: Pointer to the output buffer (hashed buffer).
mbed_official 133:d4dda5c437f0 412 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 413 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 414 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 415 * @retval HAL status
mbed_official 133:d4dda5c437f0 416 */
mbed_official 133:d4dda5c437f0 417 HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 418 {
mbed_official 133:d4dda5c437f0 419 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 420
mbed_official 133:d4dda5c437f0 421 /* Process Locked */
mbed_official 133:d4dda5c437f0 422 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 423
mbed_official 133:d4dda5c437f0 424 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 425 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 426
mbed_official 133:d4dda5c437f0 427 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 428 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 429 {
mbed_official 133:d4dda5c437f0 430 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 431 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 432 {
mbed_official 133:d4dda5c437f0 433 /* Select the HMAC SHA224 mode */
mbed_official 133:d4dda5c437f0 434 HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 435 }
mbed_official 133:d4dda5c437f0 436 else
mbed_official 133:d4dda5c437f0 437 {
mbed_official 133:d4dda5c437f0 438 /* Select the HMAC SHA224 mode */
mbed_official 133:d4dda5c437f0 439 HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 440 }
mbed_official 133:d4dda5c437f0 441 }
mbed_official 133:d4dda5c437f0 442
mbed_official 133:d4dda5c437f0 443 /* Set the phase */
mbed_official 133:d4dda5c437f0 444 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 445
mbed_official 133:d4dda5c437f0 446 /************************** STEP 1 ******************************************/
mbed_official 133:d4dda5c437f0 447 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 448 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 449
mbed_official 133:d4dda5c437f0 450 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 451 HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 452
mbed_official 133:d4dda5c437f0 453 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 454 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 455
mbed_official 133:d4dda5c437f0 456 /* Get timeout */
mbed_official 133:d4dda5c437f0 457 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 458
mbed_official 133:d4dda5c437f0 459 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 460 {
mbed_official 133:d4dda5c437f0 461 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 462 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 463 {
mbed_official 133:d4dda5c437f0 464 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 465 {
mbed_official 133:d4dda5c437f0 466 /* Change state */
mbed_official 133:d4dda5c437f0 467 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 468
mbed_official 133:d4dda5c437f0 469 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 470 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 471
mbed_official 133:d4dda5c437f0 472 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 473 }
mbed_official 133:d4dda5c437f0 474 }
mbed_official 133:d4dda5c437f0 475 }
mbed_official 133:d4dda5c437f0 476 /************************** STEP 2 ******************************************/
mbed_official 133:d4dda5c437f0 477 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 478 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 479
mbed_official 133:d4dda5c437f0 480 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 481 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 482
mbed_official 133:d4dda5c437f0 483 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 484 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 485
mbed_official 133:d4dda5c437f0 486 /* Get timeout */
mbed_official 133:d4dda5c437f0 487 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 488
mbed_official 133:d4dda5c437f0 489 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 490 {
mbed_official 133:d4dda5c437f0 491 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 492 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 493 {
mbed_official 133:d4dda5c437f0 494 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 495 {
mbed_official 133:d4dda5c437f0 496 /* Change state */
mbed_official 133:d4dda5c437f0 497 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 498
mbed_official 133:d4dda5c437f0 499 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 500 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 501
mbed_official 133:d4dda5c437f0 502 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 503 }
mbed_official 133:d4dda5c437f0 504 }
mbed_official 133:d4dda5c437f0 505 }
mbed_official 133:d4dda5c437f0 506 /************************** STEP 3 ******************************************/
mbed_official 133:d4dda5c437f0 507 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 508 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 509
mbed_official 133:d4dda5c437f0 510 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 511 HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 512
mbed_official 133:d4dda5c437f0 513 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 514 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 515
mbed_official 133:d4dda5c437f0 516 /* Get timeout */
mbed_official 133:d4dda5c437f0 517 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 518
mbed_official 133:d4dda5c437f0 519 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 520 {
mbed_official 133:d4dda5c437f0 521 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 522 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 523 {
mbed_official 133:d4dda5c437f0 524 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 525 {
mbed_official 133:d4dda5c437f0 526 /* Change state */
mbed_official 133:d4dda5c437f0 527 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 528
mbed_official 133:d4dda5c437f0 529 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 530 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 531
mbed_official 133:d4dda5c437f0 532 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 533 }
mbed_official 133:d4dda5c437f0 534 }
mbed_official 133:d4dda5c437f0 535 }
mbed_official 133:d4dda5c437f0 536 /* Read the message digest */
mbed_official 133:d4dda5c437f0 537 HASHEx_GetDigest(pOutBuffer, 28);
mbed_official 133:d4dda5c437f0 538
mbed_official 133:d4dda5c437f0 539 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 540 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 541
mbed_official 133:d4dda5c437f0 542 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 543 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 544
mbed_official 133:d4dda5c437f0 545 /* Return function status */
mbed_official 133:d4dda5c437f0 546 return HAL_OK;
mbed_official 133:d4dda5c437f0 547 }
mbed_official 133:d4dda5c437f0 548
mbed_official 133:d4dda5c437f0 549 /**
mbed_official 133:d4dda5c437f0 550 * @brief Initializes the HASH peripheral in HMAC SHA256 mode
mbed_official 133:d4dda5c437f0 551 * then processes pInBuffer. The digest is available in pOutBuffer
mbed_official 133:d4dda5c437f0 552 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 553 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 554 * @param pOutBuffer: Pointer to the output buffer (hashed buffer).
mbed_official 133:d4dda5c437f0 555 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 556 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 557 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 558 * @retval HAL status
mbed_official 133:d4dda5c437f0 559 */
mbed_official 133:d4dda5c437f0 560 HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 561 {
mbed_official 133:d4dda5c437f0 562 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 563
mbed_official 133:d4dda5c437f0 564 /* Process Locked */
mbed_official 133:d4dda5c437f0 565 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 566
mbed_official 133:d4dda5c437f0 567 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 568 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 569
mbed_official 133:d4dda5c437f0 570 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 571 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 572 {
mbed_official 133:d4dda5c437f0 573 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 574 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 575 {
mbed_official 133:d4dda5c437f0 576 /* Select the HMAC SHA256 mode */
mbed_official 133:d4dda5c437f0 577 HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey);
mbed_official 133:d4dda5c437f0 578 }
mbed_official 133:d4dda5c437f0 579 else
mbed_official 133:d4dda5c437f0 580 {
mbed_official 133:d4dda5c437f0 581 /* Select the HMAC SHA256 mode */
mbed_official 133:d4dda5c437f0 582 HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC);
mbed_official 133:d4dda5c437f0 583 }
mbed_official 133:d4dda5c437f0 584 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 585 the message digest of a new message */
mbed_official 133:d4dda5c437f0 586 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 587 }
mbed_official 133:d4dda5c437f0 588
mbed_official 133:d4dda5c437f0 589 /* Set the phase */
mbed_official 133:d4dda5c437f0 590 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 591
mbed_official 133:d4dda5c437f0 592 /************************** STEP 1 ******************************************/
mbed_official 133:d4dda5c437f0 593 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 594 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 595
mbed_official 133:d4dda5c437f0 596 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 597 HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 598
mbed_official 133:d4dda5c437f0 599 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 600 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 601
mbed_official 133:d4dda5c437f0 602 /* Get timeout */
mbed_official 133:d4dda5c437f0 603 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 604
mbed_official 133:d4dda5c437f0 605 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 606 {
mbed_official 133:d4dda5c437f0 607 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 608 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 609 {
mbed_official 133:d4dda5c437f0 610 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 611 {
mbed_official 133:d4dda5c437f0 612 /* Change state */
mbed_official 133:d4dda5c437f0 613 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 614
mbed_official 133:d4dda5c437f0 615 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 616 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 617
mbed_official 133:d4dda5c437f0 618 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 619 }
mbed_official 133:d4dda5c437f0 620 }
mbed_official 133:d4dda5c437f0 621 }
mbed_official 133:d4dda5c437f0 622 /************************** STEP 2 ******************************************/
mbed_official 133:d4dda5c437f0 623 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 624 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 625
mbed_official 133:d4dda5c437f0 626 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 627 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 628
mbed_official 133:d4dda5c437f0 629 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 630 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 631
mbed_official 133:d4dda5c437f0 632 /* Get timeout */
mbed_official 133:d4dda5c437f0 633 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 634
mbed_official 133:d4dda5c437f0 635 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 636 {
mbed_official 133:d4dda5c437f0 637 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 638 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 639 {
mbed_official 133:d4dda5c437f0 640 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 641 {
mbed_official 133:d4dda5c437f0 642 /* Change state */
mbed_official 133:d4dda5c437f0 643 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 644
mbed_official 133:d4dda5c437f0 645 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 646 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 647
mbed_official 133:d4dda5c437f0 648 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 649 }
mbed_official 133:d4dda5c437f0 650 }
mbed_official 133:d4dda5c437f0 651 }
mbed_official 133:d4dda5c437f0 652 /************************** STEP 3 ******************************************/
mbed_official 133:d4dda5c437f0 653 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 654 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 655
mbed_official 133:d4dda5c437f0 656 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 657 HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 658
mbed_official 133:d4dda5c437f0 659 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 660 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 661
mbed_official 133:d4dda5c437f0 662 /* Get timeout */
mbed_official 133:d4dda5c437f0 663 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 664
mbed_official 133:d4dda5c437f0 665 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 666 {
mbed_official 133:d4dda5c437f0 667 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 668 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 669 {
mbed_official 133:d4dda5c437f0 670 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 671 {
mbed_official 133:d4dda5c437f0 672 /* Change state */
mbed_official 133:d4dda5c437f0 673 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 674
mbed_official 133:d4dda5c437f0 675 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 676 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 677
mbed_official 133:d4dda5c437f0 678 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 679 }
mbed_official 133:d4dda5c437f0 680 }
mbed_official 133:d4dda5c437f0 681 }
mbed_official 133:d4dda5c437f0 682 /* Read the message digest */
mbed_official 133:d4dda5c437f0 683 HASHEx_GetDigest(pOutBuffer, 32);
mbed_official 133:d4dda5c437f0 684
mbed_official 133:d4dda5c437f0 685 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 686 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 687
mbed_official 133:d4dda5c437f0 688 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 689 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 690
mbed_official 133:d4dda5c437f0 691 /* Return function status */
mbed_official 133:d4dda5c437f0 692 return HAL_OK;
mbed_official 133:d4dda5c437f0 693 }
mbed_official 133:d4dda5c437f0 694
mbed_official 133:d4dda5c437f0 695 /**
mbed_official 133:d4dda5c437f0 696 * @}
mbed_official 133:d4dda5c437f0 697 */
mbed_official 133:d4dda5c437f0 698
mbed_official 133:d4dda5c437f0 699 /** @defgroup HASHEx_Group3 HASH processing functions using interrupt mode
mbed_official 133:d4dda5c437f0 700 * @brief processing functions using interrupt mode.
mbed_official 133:d4dda5c437f0 701 *
mbed_official 133:d4dda5c437f0 702 @verbatim
mbed_official 133:d4dda5c437f0 703 ===============================================================================
mbed_official 133:d4dda5c437f0 704 ##### HASH processing using interrupt functions #####
mbed_official 133:d4dda5c437f0 705 ===============================================================================
mbed_official 133:d4dda5c437f0 706 [..] This section provides functions allowing to calculate in interrupt mode
mbed_official 133:d4dda5c437f0 707 the hash value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 708 (+) SHA224
mbed_official 133:d4dda5c437f0 709 (+) SHA256
mbed_official 133:d4dda5c437f0 710
mbed_official 133:d4dda5c437f0 711 @endverbatim
mbed_official 133:d4dda5c437f0 712 * @{
mbed_official 133:d4dda5c437f0 713 */
mbed_official 133:d4dda5c437f0 714
mbed_official 133:d4dda5c437f0 715 /**
mbed_official 133:d4dda5c437f0 716 * @brief Initializes the HASH peripheral in SHA224 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 717 * The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 718 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 719 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 720 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 721 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 722 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 723 * @retval HAL status
mbed_official 133:d4dda5c437f0 724 */
mbed_official 133:d4dda5c437f0 725 HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
mbed_official 133:d4dda5c437f0 726 {
mbed_official 133:d4dda5c437f0 727 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 728 uint32_t buffercounter;
mbed_official 133:d4dda5c437f0 729 uint32_t inputcounter;
mbed_official 133:d4dda5c437f0 730
mbed_official 133:d4dda5c437f0 731 /* Process Locked */
mbed_official 133:d4dda5c437f0 732 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 733
mbed_official 133:d4dda5c437f0 734 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 735 {
mbed_official 133:d4dda5c437f0 736 hhash->HashITCounter = 1;
mbed_official 133:d4dda5c437f0 737 }
mbed_official 133:d4dda5c437f0 738 else
mbed_official 133:d4dda5c437f0 739 {
mbed_official 133:d4dda5c437f0 740 hhash->HashITCounter = 0;
mbed_official 133:d4dda5c437f0 741 }
mbed_official 133:d4dda5c437f0 742 if(hhash->State == HAL_HASH_STATE_READY)
mbed_official 133:d4dda5c437f0 743 {
mbed_official 133:d4dda5c437f0 744 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 745 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 746
mbed_official 133:d4dda5c437f0 747 hhash->HashInCount = Size;
mbed_official 133:d4dda5c437f0 748 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 749 hhash->pHashOutBuffPtr = pOutBuffer;
mbed_official 133:d4dda5c437f0 750
mbed_official 133:d4dda5c437f0 751 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 752 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 753 {
mbed_official 133:d4dda5c437f0 754 /* Select the SHA224 mode */
mbed_official 133:d4dda5c437f0 755 HASH->CR |= HASH_AlgoSelection_SHA224;
mbed_official 133:d4dda5c437f0 756 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 757 the message digest of a new message */
mbed_official 133:d4dda5c437f0 758 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 759 }
mbed_official 133:d4dda5c437f0 760
mbed_official 133:d4dda5c437f0 761 /* Set the phase */
mbed_official 133:d4dda5c437f0 762 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 763
mbed_official 133:d4dda5c437f0 764 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 765 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 766
mbed_official 133:d4dda5c437f0 767 /* Enable Interrupts */
mbed_official 133:d4dda5c437f0 768 HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
mbed_official 133:d4dda5c437f0 769
mbed_official 133:d4dda5c437f0 770 /* Return function status */
mbed_official 133:d4dda5c437f0 771 return HAL_OK;
mbed_official 133:d4dda5c437f0 772 }
mbed_official 133:d4dda5c437f0 773 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 774 {
mbed_official 133:d4dda5c437f0 775 /* Read the message digest */
mbed_official 133:d4dda5c437f0 776 HASHEx_GetDigest(hhash->pHashOutBuffPtr, 28);
mbed_official 133:d4dda5c437f0 777 if(hhash->HashInCount == 0)
mbed_official 133:d4dda5c437f0 778 {
mbed_official 133:d4dda5c437f0 779 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 780 HASH->IMR = 0;
mbed_official 133:d4dda5c437f0 781 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 782 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 783 /* Call digest computation complete callback */
mbed_official 133:d4dda5c437f0 784 HAL_HASH_DgstCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 785 }
mbed_official 133:d4dda5c437f0 786 }
mbed_official 133:d4dda5c437f0 787 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
mbed_official 133:d4dda5c437f0 788 {
mbed_official 133:d4dda5c437f0 789 if(hhash->HashInCount > 64)
mbed_official 133:d4dda5c437f0 790 {
mbed_official 133:d4dda5c437f0 791 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 792 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 793 for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
mbed_official 133:d4dda5c437f0 794 {
mbed_official 133:d4dda5c437f0 795 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 796 inputaddr+=4;
mbed_official 133:d4dda5c437f0 797 }
mbed_official 133:d4dda5c437f0 798 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 799 {
mbed_official 133:d4dda5c437f0 800 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 801 if(hhash->HashInCount >= 68)
mbed_official 133:d4dda5c437f0 802 {
mbed_official 133:d4dda5c437f0 803 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 804 hhash->HashInCount -= 68;
mbed_official 133:d4dda5c437f0 805 hhash->pHashInBuffPtr+= 68;
mbed_official 133:d4dda5c437f0 806 }
mbed_official 133:d4dda5c437f0 807 else
mbed_official 133:d4dda5c437f0 808 {
mbed_official 133:d4dda5c437f0 809 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 810 }
mbed_official 133:d4dda5c437f0 811 }
mbed_official 133:d4dda5c437f0 812 else
mbed_official 133:d4dda5c437f0 813 {
mbed_official 133:d4dda5c437f0 814 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 815 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 816 hhash->pHashInBuffPtr+= 64;
mbed_official 133:d4dda5c437f0 817 }
mbed_official 133:d4dda5c437f0 818 }
mbed_official 133:d4dda5c437f0 819 else
mbed_official 133:d4dda5c437f0 820 {
mbed_official 133:d4dda5c437f0 821 /* Get the buffer address */
mbed_official 133:d4dda5c437f0 822 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 823 /* Get the buffer counter */
mbed_official 133:d4dda5c437f0 824 inputcounter = hhash->HashInCount;
mbed_official 133:d4dda5c437f0 825 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 826 HASH->IMR &= ~(HASH_IT_DINI);
mbed_official 133:d4dda5c437f0 827 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 828 __HAL_HASH_SET_NBVALIDBITS(inputcounter);
mbed_official 133:d4dda5c437f0 829
mbed_official 133:d4dda5c437f0 830 if((inputcounter > 4) && (inputcounter%4))
mbed_official 133:d4dda5c437f0 831 {
mbed_official 133:d4dda5c437f0 832 inputcounter = (inputcounter+4-inputcounter%4);
mbed_official 133:d4dda5c437f0 833 }
mbed_official 133:d4dda5c437f0 834
mbed_official 133:d4dda5c437f0 835 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 836 for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
mbed_official 133:d4dda5c437f0 837 {
mbed_official 133:d4dda5c437f0 838 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 839 inputaddr+=4;
mbed_official 133:d4dda5c437f0 840 }
mbed_official 133:d4dda5c437f0 841 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 842 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 843 /* Reset buffer counter */
mbed_official 133:d4dda5c437f0 844 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 845 }
mbed_official 133:d4dda5c437f0 846 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 847 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 848 }
mbed_official 133:d4dda5c437f0 849
mbed_official 133:d4dda5c437f0 850 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 851 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 852
mbed_official 133:d4dda5c437f0 853 /* Return function status */
mbed_official 133:d4dda5c437f0 854 return HAL_OK;
mbed_official 133:d4dda5c437f0 855 }
mbed_official 133:d4dda5c437f0 856
mbed_official 133:d4dda5c437f0 857
mbed_official 133:d4dda5c437f0 858 /**
mbed_official 133:d4dda5c437f0 859 * @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 860 * The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 861 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 862 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 863 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 864 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 865 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 866 * @retval HAL status
mbed_official 133:d4dda5c437f0 867 */
mbed_official 133:d4dda5c437f0 868 HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
mbed_official 133:d4dda5c437f0 869 {
mbed_official 133:d4dda5c437f0 870 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 871 uint32_t buffercounter;
mbed_official 133:d4dda5c437f0 872 uint32_t inputcounter;
mbed_official 133:d4dda5c437f0 873
mbed_official 133:d4dda5c437f0 874 /* Process Locked */
mbed_official 133:d4dda5c437f0 875 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 876
mbed_official 133:d4dda5c437f0 877 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 878 {
mbed_official 133:d4dda5c437f0 879 hhash->HashITCounter = 1;
mbed_official 133:d4dda5c437f0 880 }
mbed_official 133:d4dda5c437f0 881 else
mbed_official 133:d4dda5c437f0 882 {
mbed_official 133:d4dda5c437f0 883 hhash->HashITCounter = 0;
mbed_official 133:d4dda5c437f0 884 }
mbed_official 133:d4dda5c437f0 885 if(hhash->State == HAL_HASH_STATE_READY)
mbed_official 133:d4dda5c437f0 886 {
mbed_official 133:d4dda5c437f0 887 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 888 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 889
mbed_official 133:d4dda5c437f0 890 hhash->HashInCount = Size;
mbed_official 133:d4dda5c437f0 891 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 892 hhash->pHashOutBuffPtr = pOutBuffer;
mbed_official 133:d4dda5c437f0 893
mbed_official 133:d4dda5c437f0 894 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 895 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 896 {
mbed_official 133:d4dda5c437f0 897 /* Select the SHA256 mode */
mbed_official 133:d4dda5c437f0 898 HASH->CR |= HASH_AlgoSelection_SHA256;
mbed_official 133:d4dda5c437f0 899 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 900 the message digest of a new message */
mbed_official 133:d4dda5c437f0 901 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 902 }
mbed_official 133:d4dda5c437f0 903
mbed_official 133:d4dda5c437f0 904 /* Set the phase */
mbed_official 133:d4dda5c437f0 905 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 906
mbed_official 133:d4dda5c437f0 907 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 908 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 909
mbed_official 133:d4dda5c437f0 910 /* Enable Interrupts */
mbed_official 133:d4dda5c437f0 911 HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
mbed_official 133:d4dda5c437f0 912
mbed_official 133:d4dda5c437f0 913 /* Return function status */
mbed_official 133:d4dda5c437f0 914 return HAL_OK;
mbed_official 133:d4dda5c437f0 915 }
mbed_official 133:d4dda5c437f0 916 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 917 {
mbed_official 133:d4dda5c437f0 918 /* Read the message digest */
mbed_official 133:d4dda5c437f0 919 HASHEx_GetDigest(hhash->pHashOutBuffPtr, 32);
mbed_official 133:d4dda5c437f0 920 if(hhash->HashInCount == 0)
mbed_official 133:d4dda5c437f0 921 {
mbed_official 133:d4dda5c437f0 922 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 923 HASH->IMR = 0;
mbed_official 133:d4dda5c437f0 924 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 925 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 926 /* Call digest computation complete callback */
mbed_official 133:d4dda5c437f0 927 HAL_HASH_DgstCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 928 }
mbed_official 133:d4dda5c437f0 929 }
mbed_official 133:d4dda5c437f0 930 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
mbed_official 133:d4dda5c437f0 931 {
mbed_official 133:d4dda5c437f0 932 if(hhash->HashInCount > 64)
mbed_official 133:d4dda5c437f0 933 {
mbed_official 133:d4dda5c437f0 934 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 935 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 936 for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
mbed_official 133:d4dda5c437f0 937 {
mbed_official 133:d4dda5c437f0 938 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 939 inputaddr+=4;
mbed_official 133:d4dda5c437f0 940 }
mbed_official 133:d4dda5c437f0 941 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 942 {
mbed_official 133:d4dda5c437f0 943 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 944
mbed_official 133:d4dda5c437f0 945 if(hhash->HashInCount >= 68)
mbed_official 133:d4dda5c437f0 946 {
mbed_official 133:d4dda5c437f0 947 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 948 hhash->HashInCount -= 68;
mbed_official 133:d4dda5c437f0 949 hhash->pHashInBuffPtr+= 68;
mbed_official 133:d4dda5c437f0 950 }
mbed_official 133:d4dda5c437f0 951 else
mbed_official 133:d4dda5c437f0 952 {
mbed_official 133:d4dda5c437f0 953 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 954 }
mbed_official 133:d4dda5c437f0 955 }
mbed_official 133:d4dda5c437f0 956 else
mbed_official 133:d4dda5c437f0 957 {
mbed_official 133:d4dda5c437f0 958 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 959 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 960 hhash->pHashInBuffPtr+= 64;
mbed_official 133:d4dda5c437f0 961 }
mbed_official 133:d4dda5c437f0 962 }
mbed_official 133:d4dda5c437f0 963 else
mbed_official 133:d4dda5c437f0 964 {
mbed_official 133:d4dda5c437f0 965 /* Get the buffer address */
mbed_official 133:d4dda5c437f0 966 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 967 /* Get the buffer counter */
mbed_official 133:d4dda5c437f0 968 inputcounter = hhash->HashInCount;
mbed_official 133:d4dda5c437f0 969 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 970 HASH->IMR &= ~(HASH_IT_DINI);
mbed_official 133:d4dda5c437f0 971 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 972 __HAL_HASH_SET_NBVALIDBITS(inputcounter);
mbed_official 133:d4dda5c437f0 973
mbed_official 133:d4dda5c437f0 974 if((inputcounter > 4) && (inputcounter%4))
mbed_official 133:d4dda5c437f0 975 {
mbed_official 133:d4dda5c437f0 976 inputcounter = (inputcounter+4-inputcounter%4);
mbed_official 133:d4dda5c437f0 977 }
mbed_official 133:d4dda5c437f0 978
mbed_official 133:d4dda5c437f0 979 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 980 for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
mbed_official 133:d4dda5c437f0 981 {
mbed_official 133:d4dda5c437f0 982 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 983 inputaddr+=4;
mbed_official 133:d4dda5c437f0 984 }
mbed_official 133:d4dda5c437f0 985 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 986 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 987 /* Reset buffer counter */
mbed_official 133:d4dda5c437f0 988 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 989 }
mbed_official 133:d4dda5c437f0 990 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 991 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 992 }
mbed_official 133:d4dda5c437f0 993
mbed_official 133:d4dda5c437f0 994 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 995 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 996
mbed_official 133:d4dda5c437f0 997 /* Return function status */
mbed_official 133:d4dda5c437f0 998 return HAL_OK;
mbed_official 133:d4dda5c437f0 999 }
mbed_official 133:d4dda5c437f0 1000
mbed_official 133:d4dda5c437f0 1001 /**
mbed_official 133:d4dda5c437f0 1002 * @brief This function handles HASH interrupt request.
mbed_official 133:d4dda5c437f0 1003 * @param hhash: hash handle
mbed_official 133:d4dda5c437f0 1004 * @retval None
mbed_official 133:d4dda5c437f0 1005 */
mbed_official 133:d4dda5c437f0 1006 void HAL_HASHEx_IRQHandler(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 1007 {
mbed_official 133:d4dda5c437f0 1008 switch(HASH->CR & HASH_CR_ALGO)
mbed_official 133:d4dda5c437f0 1009 {
mbed_official 133:d4dda5c437f0 1010
mbed_official 133:d4dda5c437f0 1011 case HASH_AlgoSelection_SHA224:
mbed_official 133:d4dda5c437f0 1012 HAL_HASHEx_SHA224_Start_IT(hhash, NULL, 0, NULL);
mbed_official 133:d4dda5c437f0 1013 break;
mbed_official 133:d4dda5c437f0 1014
mbed_official 133:d4dda5c437f0 1015 case HASH_AlgoSelection_SHA256:
mbed_official 133:d4dda5c437f0 1016 HAL_HASHEx_SHA256_Start_IT(hhash, NULL, 0, NULL);
mbed_official 133:d4dda5c437f0 1017 break;
mbed_official 133:d4dda5c437f0 1018
mbed_official 133:d4dda5c437f0 1019 default:
mbed_official 133:d4dda5c437f0 1020 break;
mbed_official 133:d4dda5c437f0 1021 }
mbed_official 133:d4dda5c437f0 1022 }
mbed_official 133:d4dda5c437f0 1023
mbed_official 133:d4dda5c437f0 1024 /**
mbed_official 133:d4dda5c437f0 1025 * @}
mbed_official 133:d4dda5c437f0 1026 */
mbed_official 133:d4dda5c437f0 1027
mbed_official 133:d4dda5c437f0 1028 /** @defgroup HASHEx_Group4 HASH processing functions using DMA mode
mbed_official 133:d4dda5c437f0 1029 * @brief processing functions using DMA mode.
mbed_official 133:d4dda5c437f0 1030 *
mbed_official 133:d4dda5c437f0 1031 @verbatim
mbed_official 133:d4dda5c437f0 1032 ===============================================================================
mbed_official 133:d4dda5c437f0 1033 ##### HASH processing using DMA functions #####
mbed_official 133:d4dda5c437f0 1034 ===============================================================================
mbed_official 133:d4dda5c437f0 1035 [..] This section provides functions allowing to calculate in DMA mode
mbed_official 133:d4dda5c437f0 1036 the hash value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 1037 (+) SHA224
mbed_official 133:d4dda5c437f0 1038 (+) SHA256
mbed_official 133:d4dda5c437f0 1039
mbed_official 133:d4dda5c437f0 1040 @endverbatim
mbed_official 133:d4dda5c437f0 1041 * @{
mbed_official 133:d4dda5c437f0 1042 */
mbed_official 133:d4dda5c437f0 1043
mbed_official 133:d4dda5c437f0 1044
mbed_official 133:d4dda5c437f0 1045 /**
mbed_official 133:d4dda5c437f0 1046 * @brief Initializes the HASH peripheral in SHA224 mode then enables DMA to
mbed_official 133:d4dda5c437f0 1047 control data transfer. Use HAL_HASH_SHA224_Finish() to get the digest.
mbed_official 133:d4dda5c437f0 1048 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1049 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1050 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1051 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1052 * @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
mbed_official 133:d4dda5c437f0 1053 * @retval HAL status
mbed_official 133:d4dda5c437f0 1054 */
mbed_official 133:d4dda5c437f0 1055 HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1056 {
mbed_official 133:d4dda5c437f0 1057 uint32_t inputaddr = (uint32_t)pInBuffer;
mbed_official 133:d4dda5c437f0 1058
mbed_official 133:d4dda5c437f0 1059 /* Process Locked */
mbed_official 133:d4dda5c437f0 1060 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1061
mbed_official 133:d4dda5c437f0 1062 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1063 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1064
mbed_official 133:d4dda5c437f0 1065 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1066 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1067 {
mbed_official 133:d4dda5c437f0 1068 /* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 1069 the message digest of a new message */
mbed_official 133:d4dda5c437f0 1070 HASH->CR |= HASH_AlgoSelection_SHA224 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 1071 }
mbed_official 133:d4dda5c437f0 1072
mbed_official 133:d4dda5c437f0 1073 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1074 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 1075
mbed_official 133:d4dda5c437f0 1076 /* Set the phase */
mbed_official 133:d4dda5c437f0 1077 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1078
mbed_official 133:d4dda5c437f0 1079 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1080 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1081 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1082 hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
mbed_official 133:d4dda5c437f0 1083
mbed_official 133:d4dda5c437f0 1084 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1085 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
mbed_official 133:d4dda5c437f0 1086
mbed_official 133:d4dda5c437f0 1087 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1088 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1089
mbed_official 133:d4dda5c437f0 1090 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1091 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1092
mbed_official 133:d4dda5c437f0 1093 /* Return function status */
mbed_official 133:d4dda5c437f0 1094 return HAL_OK;
mbed_official 133:d4dda5c437f0 1095 }
mbed_official 133:d4dda5c437f0 1096
mbed_official 133:d4dda5c437f0 1097 /**
mbed_official 133:d4dda5c437f0 1098 * @brief Returns the computed digest in SHA224
mbed_official 133:d4dda5c437f0 1099 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1100 * @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
mbed_official 133:d4dda5c437f0 1101 * @retval HAL status
mbed_official 133:d4dda5c437f0 1102 */
mbed_official 133:d4dda5c437f0 1103 HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 1104 {
mbed_official 133:d4dda5c437f0 1105 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 1106
mbed_official 133:d4dda5c437f0 1107 /* Process Locked */
mbed_official 133:d4dda5c437f0 1108 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1109
mbed_official 133:d4dda5c437f0 1110 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1111 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1112
mbed_official 133:d4dda5c437f0 1113 /* Get timeout */
mbed_official 133:d4dda5c437f0 1114 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1115
mbed_official 133:d4dda5c437f0 1116 while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 1117 {
mbed_official 133:d4dda5c437f0 1118 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1119 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1120 {
mbed_official 133:d4dda5c437f0 1121 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1122 {
mbed_official 133:d4dda5c437f0 1123 /* Change state */
mbed_official 133:d4dda5c437f0 1124 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1125
mbed_official 133:d4dda5c437f0 1126 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1127 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1128
mbed_official 133:d4dda5c437f0 1129 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1130 }
mbed_official 133:d4dda5c437f0 1131 }
mbed_official 133:d4dda5c437f0 1132 }
mbed_official 133:d4dda5c437f0 1133
mbed_official 133:d4dda5c437f0 1134 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1135 HASHEx_GetDigest(pOutBuffer, 28);
mbed_official 133:d4dda5c437f0 1136
mbed_official 133:d4dda5c437f0 1137 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1138 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1139
mbed_official 133:d4dda5c437f0 1140 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1141 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1142
mbed_official 133:d4dda5c437f0 1143 /* Return function status */
mbed_official 133:d4dda5c437f0 1144 return HAL_OK;
mbed_official 133:d4dda5c437f0 1145 }
mbed_official 133:d4dda5c437f0 1146
mbed_official 133:d4dda5c437f0 1147 /**
mbed_official 133:d4dda5c437f0 1148 * @brief Initializes the HASH peripheral in SHA256 mode then enables DMA to
mbed_official 133:d4dda5c437f0 1149 control data transfer. Use HAL_HASH_SHA256_Finish() to get the digest.
mbed_official 133:d4dda5c437f0 1150 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1151 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1152 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1153 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1154 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 1155 * @retval HAL status
mbed_official 133:d4dda5c437f0 1156 */
mbed_official 133:d4dda5c437f0 1157 HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1158 {
mbed_official 133:d4dda5c437f0 1159 uint32_t inputaddr = (uint32_t)pInBuffer;
mbed_official 133:d4dda5c437f0 1160
mbed_official 133:d4dda5c437f0 1161 /* Process Locked */
mbed_official 133:d4dda5c437f0 1162 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1163
mbed_official 133:d4dda5c437f0 1164 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1165 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1166
mbed_official 133:d4dda5c437f0 1167 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1168 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1169 {
mbed_official 133:d4dda5c437f0 1170 /* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 1171 the message digest of a new message */
mbed_official 133:d4dda5c437f0 1172 HASH->CR |= HASH_AlgoSelection_SHA256 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 1173 }
mbed_official 133:d4dda5c437f0 1174
mbed_official 133:d4dda5c437f0 1175 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1176 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 1177
mbed_official 133:d4dda5c437f0 1178 /* Set the phase */
mbed_official 133:d4dda5c437f0 1179 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1180
mbed_official 133:d4dda5c437f0 1181 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1182 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1183 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1184 hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
mbed_official 133:d4dda5c437f0 1185
mbed_official 133:d4dda5c437f0 1186 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1187 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
mbed_official 133:d4dda5c437f0 1188
mbed_official 133:d4dda5c437f0 1189 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1190 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1191
mbed_official 133:d4dda5c437f0 1192 /* Process UnLock */
mbed_official 133:d4dda5c437f0 1193 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1194
mbed_official 133:d4dda5c437f0 1195 /* Return function status */
mbed_official 133:d4dda5c437f0 1196 return HAL_OK;
mbed_official 133:d4dda5c437f0 1197 }
mbed_official 133:d4dda5c437f0 1198
mbed_official 133:d4dda5c437f0 1199 /**
mbed_official 133:d4dda5c437f0 1200 * @brief Returns the computed digest in SHA256.
mbed_official 133:d4dda5c437f0 1201 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1202 * @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
mbed_official 133:d4dda5c437f0 1203 * @retval HAL status
mbed_official 133:d4dda5c437f0 1204 */
mbed_official 133:d4dda5c437f0 1205 HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 1206 {
mbed_official 133:d4dda5c437f0 1207 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 1208
mbed_official 133:d4dda5c437f0 1209 /* Process Locked */
mbed_official 133:d4dda5c437f0 1210 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1211
mbed_official 133:d4dda5c437f0 1212 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1213 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1214
mbed_official 133:d4dda5c437f0 1215 /* Get timeout */
mbed_official 133:d4dda5c437f0 1216 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1217
mbed_official 133:d4dda5c437f0 1218 while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 1219 {
mbed_official 133:d4dda5c437f0 1220 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1221 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1222 {
mbed_official 133:d4dda5c437f0 1223 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1224 {
mbed_official 133:d4dda5c437f0 1225 /* Change state */
mbed_official 133:d4dda5c437f0 1226 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1227
mbed_official 133:d4dda5c437f0 1228 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1229 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1230
mbed_official 133:d4dda5c437f0 1231 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1232 }
mbed_official 133:d4dda5c437f0 1233 }
mbed_official 133:d4dda5c437f0 1234 }
mbed_official 133:d4dda5c437f0 1235
mbed_official 133:d4dda5c437f0 1236 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1237 HASHEx_GetDigest(pOutBuffer, 32);
mbed_official 133:d4dda5c437f0 1238
mbed_official 133:d4dda5c437f0 1239 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1240 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1241
mbed_official 133:d4dda5c437f0 1242 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1243 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1244
mbed_official 133:d4dda5c437f0 1245 /* Return function status */
mbed_official 133:d4dda5c437f0 1246 return HAL_OK;
mbed_official 133:d4dda5c437f0 1247 }
mbed_official 133:d4dda5c437f0 1248
mbed_official 133:d4dda5c437f0 1249
mbed_official 133:d4dda5c437f0 1250 /**
mbed_official 133:d4dda5c437f0 1251 * @}
mbed_official 133:d4dda5c437f0 1252 */
mbed_official 133:d4dda5c437f0 1253 /** @defgroup HASHEx_Group5 HMAC processing functions using DMA mode
mbed_official 133:d4dda5c437f0 1254 * @brief HMAC processing functions using DMA mode .
mbed_official 133:d4dda5c437f0 1255 *
mbed_official 133:d4dda5c437f0 1256 @verbatim
mbed_official 133:d4dda5c437f0 1257 ===============================================================================
mbed_official 133:d4dda5c437f0 1258 ##### HMAC processing using DMA functions #####
mbed_official 133:d4dda5c437f0 1259 ===============================================================================
mbed_official 133:d4dda5c437f0 1260 [..] This section provides functions allowing to calculate in DMA mode
mbed_official 133:d4dda5c437f0 1261 the HMAC value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 1262 (+) SHA224
mbed_official 133:d4dda5c437f0 1263 (+) SHA256
mbed_official 133:d4dda5c437f0 1264
mbed_official 133:d4dda5c437f0 1265 @endverbatim
mbed_official 133:d4dda5c437f0 1266 * @{
mbed_official 133:d4dda5c437f0 1267 */
mbed_official 133:d4dda5c437f0 1268
mbed_official 133:d4dda5c437f0 1269 /**
mbed_official 133:d4dda5c437f0 1270 * @brief Initializes the HASH peripheral in HMAC SHA224 mode
mbed_official 133:d4dda5c437f0 1271 * then enables DMA to control data transfer.
mbed_official 133:d4dda5c437f0 1272 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1273 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1274 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1275 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1276 * @retval HAL status
mbed_official 133:d4dda5c437f0 1277 */
mbed_official 133:d4dda5c437f0 1278 HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1279 {
mbed_official 133:d4dda5c437f0 1280 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 1281
mbed_official 133:d4dda5c437f0 1282 /* Process Locked */
mbed_official 133:d4dda5c437f0 1283 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1284
mbed_official 133:d4dda5c437f0 1285 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1286 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1287
mbed_official 133:d4dda5c437f0 1288 /* Save buffer pointer and size in handle */
mbed_official 133:d4dda5c437f0 1289 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 1290 hhash->HashBuffSize = Size;
mbed_official 133:d4dda5c437f0 1291 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 1292
mbed_official 133:d4dda5c437f0 1293 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1294 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1295 {
mbed_official 133:d4dda5c437f0 1296 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 1297 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 1298 {
mbed_official 133:d4dda5c437f0 1299 /* Select the HMAC SHA224 mode */
mbed_official 133:d4dda5c437f0 1300 HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1301 }
mbed_official 133:d4dda5c437f0 1302 else
mbed_official 133:d4dda5c437f0 1303 {
mbed_official 133:d4dda5c437f0 1304 /* Select the HMAC SHA224 mode */
mbed_official 133:d4dda5c437f0 1305 HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1306 }
mbed_official 133:d4dda5c437f0 1307 }
mbed_official 133:d4dda5c437f0 1308
mbed_official 133:d4dda5c437f0 1309 /* Set the phase */
mbed_official 133:d4dda5c437f0 1310 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1311
mbed_official 133:d4dda5c437f0 1312 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1313 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1314
mbed_official 133:d4dda5c437f0 1315 /* Get the key address */
mbed_official 133:d4dda5c437f0 1316 inputaddr = (uint32_t)(hhash->Init.pKey);
mbed_official 133:d4dda5c437f0 1317
mbed_official 133:d4dda5c437f0 1318 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1319 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1320 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1321 hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
mbed_official 133:d4dda5c437f0 1322
mbed_official 133:d4dda5c437f0 1323 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1324 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
mbed_official 133:d4dda5c437f0 1325 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1326 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1327
mbed_official 133:d4dda5c437f0 1328 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1329 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1330
mbed_official 133:d4dda5c437f0 1331 /* Return function status */
mbed_official 133:d4dda5c437f0 1332 return HAL_OK;
mbed_official 133:d4dda5c437f0 1333 }
mbed_official 133:d4dda5c437f0 1334
mbed_official 133:d4dda5c437f0 1335 /**
mbed_official 133:d4dda5c437f0 1336 * @brief Initializes the HASH peripheral in HMAC SHA256 mode
mbed_official 133:d4dda5c437f0 1337 * then enables DMA to control data transfer.
mbed_official 133:d4dda5c437f0 1338 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1339 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1340 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1341 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1342 * @retval HAL status
mbed_official 133:d4dda5c437f0 1343 */
mbed_official 133:d4dda5c437f0 1344 HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1345 {
mbed_official 133:d4dda5c437f0 1346 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 1347
mbed_official 133:d4dda5c437f0 1348 /* Process Locked */
mbed_official 133:d4dda5c437f0 1349 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1350
mbed_official 133:d4dda5c437f0 1351 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1352 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1353
mbed_official 133:d4dda5c437f0 1354 /* Save buffer pointer and size in handle */
mbed_official 133:d4dda5c437f0 1355 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 1356 hhash->HashBuffSize = Size;
mbed_official 133:d4dda5c437f0 1357 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 1358
mbed_official 133:d4dda5c437f0 1359 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1360 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1361 {
mbed_official 133:d4dda5c437f0 1362 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 1363 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 1364 {
mbed_official 133:d4dda5c437f0 1365 /* Select the HMAC SHA256 mode */
mbed_official 133:d4dda5c437f0 1366 HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey);
mbed_official 133:d4dda5c437f0 1367 }
mbed_official 133:d4dda5c437f0 1368 else
mbed_official 133:d4dda5c437f0 1369 {
mbed_official 133:d4dda5c437f0 1370 /* Select the HMAC SHA256 mode */
mbed_official 133:d4dda5c437f0 1371 HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC);
mbed_official 133:d4dda5c437f0 1372 }
mbed_official 133:d4dda5c437f0 1373 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 1374 the message digest of a new message */
mbed_official 133:d4dda5c437f0 1375 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 1376 }
mbed_official 133:d4dda5c437f0 1377
mbed_official 133:d4dda5c437f0 1378 /* Set the phase */
mbed_official 133:d4dda5c437f0 1379 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1380
mbed_official 133:d4dda5c437f0 1381 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1382 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1383
mbed_official 133:d4dda5c437f0 1384 /* Get the key address */
mbed_official 133:d4dda5c437f0 1385 inputaddr = (uint32_t)(hhash->Init.pKey);
mbed_official 133:d4dda5c437f0 1386
mbed_official 133:d4dda5c437f0 1387 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1388 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1389 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1390 hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
mbed_official 133:d4dda5c437f0 1391
mbed_official 133:d4dda5c437f0 1392 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1393 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
mbed_official 133:d4dda5c437f0 1394 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1395 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1396
mbed_official 133:d4dda5c437f0 1397 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1398 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1399
mbed_official 133:d4dda5c437f0 1400 /* Return function status */
mbed_official 133:d4dda5c437f0 1401 return HAL_OK;
mbed_official 133:d4dda5c437f0 1402 }
mbed_official 133:d4dda5c437f0 1403
mbed_official 133:d4dda5c437f0 1404 /**
mbed_official 133:d4dda5c437f0 1405 * @}
mbed_official 133:d4dda5c437f0 1406 */
mbed_official 133:d4dda5c437f0 1407
mbed_official 133:d4dda5c437f0 1408 /**
mbed_official 133:d4dda5c437f0 1409 * @brief Writes the input buffer in data register.
mbed_official 133:d4dda5c437f0 1410 * @param pInBuffer: Pointer to input buffer
mbed_official 133:d4dda5c437f0 1411 * @param Size: The size of input buffer
mbed_official 133:d4dda5c437f0 1412 * @retval None
mbed_official 133:d4dda5c437f0 1413 */
mbed_official 133:d4dda5c437f0 1414 static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1415 {
mbed_official 133:d4dda5c437f0 1416 uint32_t buffercounter;
mbed_official 133:d4dda5c437f0 1417 uint32_t inputaddr = (uint32_t) pInBuffer;
mbed_official 133:d4dda5c437f0 1418
mbed_official 133:d4dda5c437f0 1419 for(buffercounter = 0; buffercounter < Size; buffercounter+=4)
mbed_official 133:d4dda5c437f0 1420 {
mbed_official 133:d4dda5c437f0 1421 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 1422 inputaddr+=4;
mbed_official 133:d4dda5c437f0 1423 }
mbed_official 133:d4dda5c437f0 1424 }
mbed_official 133:d4dda5c437f0 1425
mbed_official 133:d4dda5c437f0 1426 /**
mbed_official 133:d4dda5c437f0 1427 * @brief Provides the message digest result.
mbed_official 133:d4dda5c437f0 1428 * @param pMsgDigest: Pointer to the message digest
mbed_official 133:d4dda5c437f0 1429 * @param Size: The size of the message digest in bytes
mbed_official 133:d4dda5c437f0 1430 * @retval None
mbed_official 133:d4dda5c437f0 1431 */
mbed_official 133:d4dda5c437f0 1432 static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
mbed_official 133:d4dda5c437f0 1433 {
mbed_official 133:d4dda5c437f0 1434 uint32_t msgdigest = (uint32_t)pMsgDigest;
mbed_official 133:d4dda5c437f0 1435
mbed_official 133:d4dda5c437f0 1436 switch(Size)
mbed_official 133:d4dda5c437f0 1437 {
mbed_official 133:d4dda5c437f0 1438 case 16:
mbed_official 133:d4dda5c437f0 1439 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1440 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1441 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1442 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1443 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1444 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1445 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1446 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1447 break;
mbed_official 133:d4dda5c437f0 1448 case 20:
mbed_official 133:d4dda5c437f0 1449 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1450 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1451 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1452 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1453 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1454 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1455 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1456 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1457 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1458 *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 1459 break;
mbed_official 133:d4dda5c437f0 1460 case 28:
mbed_official 133:d4dda5c437f0 1461 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1462 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1463 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1464 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1465 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1466 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1467 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1468 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1469 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1470 *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 1471 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1472 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
mbed_official 133:d4dda5c437f0 1473 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1474 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
mbed_official 133:d4dda5c437f0 1475 break;
mbed_official 133:d4dda5c437f0 1476 case 32:
mbed_official 133:d4dda5c437f0 1477 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1478 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1479 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1480 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1481 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1482 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1483 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1484 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1485 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1486 *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 1487 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1488 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
mbed_official 133:d4dda5c437f0 1489 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1490 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
mbed_official 133:d4dda5c437f0 1491 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1492 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[7]);
mbed_official 133:d4dda5c437f0 1493 break;
mbed_official 133:d4dda5c437f0 1494 default:
mbed_official 133:d4dda5c437f0 1495 break;
mbed_official 133:d4dda5c437f0 1496 }
mbed_official 133:d4dda5c437f0 1497 }
mbed_official 133:d4dda5c437f0 1498
mbed_official 133:d4dda5c437f0 1499 /**
mbed_official 133:d4dda5c437f0 1500 * @brief DMA HASH Input Data complete callback.
mbed_official 133:d4dda5c437f0 1501 * @param hdma: DMA handle
mbed_official 133:d4dda5c437f0 1502 * @retval None
mbed_official 133:d4dda5c437f0 1503 */
mbed_official 133:d4dda5c437f0 1504 static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma)
mbed_official 133:d4dda5c437f0 1505 {
mbed_official 133:d4dda5c437f0 1506 HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 133:d4dda5c437f0 1507 uint32_t inputaddr = 0;
mbed_official 133:d4dda5c437f0 1508 uint32_t buffersize = 0;
mbed_official 133:d4dda5c437f0 1509
mbed_official 133:d4dda5c437f0 1510 if((HASH->CR & HASH_CR_MODE) != HASH_CR_MODE)
mbed_official 133:d4dda5c437f0 1511 {
mbed_official 133:d4dda5c437f0 1512 /* Disable the DMA transfer */
mbed_official 133:d4dda5c437f0 1513 HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1514
mbed_official 133:d4dda5c437f0 1515 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1516 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1517
mbed_official 133:d4dda5c437f0 1518 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 1519 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 1520 }
mbed_official 133:d4dda5c437f0 1521 else
mbed_official 133:d4dda5c437f0 1522 {
mbed_official 133:d4dda5c437f0 1523 /* Increment Interrupt counter */
mbed_official 133:d4dda5c437f0 1524 hhash->HashInCount++;
mbed_official 133:d4dda5c437f0 1525 /* Disable the DMA transfer before starting the next transfer */
mbed_official 133:d4dda5c437f0 1526 HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1527
mbed_official 133:d4dda5c437f0 1528 if(hhash->HashInCount <= 2)
mbed_official 133:d4dda5c437f0 1529 {
mbed_official 133:d4dda5c437f0 1530 /* In case HashInCount = 1, set the DMA to transfer data to HASH DIN register */
mbed_official 133:d4dda5c437f0 1531 if(hhash->HashInCount == 1)
mbed_official 133:d4dda5c437f0 1532 {
mbed_official 133:d4dda5c437f0 1533 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 1534 buffersize = hhash->HashBuffSize;
mbed_official 133:d4dda5c437f0 1535 }
mbed_official 133:d4dda5c437f0 1536 /* In case HashInCount = 2, set the DMA to transfer key to HASH DIN register */
mbed_official 133:d4dda5c437f0 1537 else if(hhash->HashInCount == 2)
mbed_official 133:d4dda5c437f0 1538 {
mbed_official 133:d4dda5c437f0 1539 inputaddr = (uint32_t)hhash->Init.pKey;
mbed_official 133:d4dda5c437f0 1540 buffersize = hhash->Init.KeySize;
mbed_official 133:d4dda5c437f0 1541 }
mbed_official 133:d4dda5c437f0 1542 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1543 HASH->STR |= 8 * (buffersize % 4);
mbed_official 133:d4dda5c437f0 1544
mbed_official 133:d4dda5c437f0 1545 /* Set the HASH DMA transfer complete */
mbed_official 133:d4dda5c437f0 1546 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1547
mbed_official 133:d4dda5c437f0 1548 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1549 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (buffersize%4 ? (buffersize+3)/4:buffersize/4));
mbed_official 133:d4dda5c437f0 1550
mbed_official 133:d4dda5c437f0 1551 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1552 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1553 }
mbed_official 133:d4dda5c437f0 1554 else
mbed_official 133:d4dda5c437f0 1555 {
mbed_official 133:d4dda5c437f0 1556 /* Disable the DMA transfer */
mbed_official 133:d4dda5c437f0 1557 HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1558
mbed_official 133:d4dda5c437f0 1559 /* Reset the InCount */
mbed_official 133:d4dda5c437f0 1560 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 1561
mbed_official 133:d4dda5c437f0 1562 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1563 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1564
mbed_official 133:d4dda5c437f0 1565 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 1566 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 1567 }
mbed_official 133:d4dda5c437f0 1568 }
mbed_official 133:d4dda5c437f0 1569 }
mbed_official 133:d4dda5c437f0 1570
mbed_official 133:d4dda5c437f0 1571 /**
mbed_official 133:d4dda5c437f0 1572 * @brief DMA HASH communication error callback.
mbed_official 133:d4dda5c437f0 1573 * @param hdma: DMA handle
mbed_official 133:d4dda5c437f0 1574 * @retval None
mbed_official 133:d4dda5c437f0 1575 */
mbed_official 133:d4dda5c437f0 1576 static void HASHEx_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 133:d4dda5c437f0 1577 {
mbed_official 133:d4dda5c437f0 1578 HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 133:d4dda5c437f0 1579 hhash->State= HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1580 HAL_HASH_ErrorCallback(hhash);
mbed_official 133:d4dda5c437f0 1581 }
mbed_official 133:d4dda5c437f0 1582
mbed_official 133:d4dda5c437f0 1583
mbed_official 133:d4dda5c437f0 1584 /**
mbed_official 133:d4dda5c437f0 1585 * @}
mbed_official 133:d4dda5c437f0 1586 */
mbed_official 133:d4dda5c437f0 1587 #endif /* STM32F437xx || STM32F439xx */
mbed_official 133:d4dda5c437f0 1588
mbed_official 133:d4dda5c437f0 1589 #endif /* HAL_HASH_MODULE_ENABLED */
mbed_official 133:d4dda5c437f0 1590 /**
mbed_official 133:d4dda5c437f0 1591 * @}
mbed_official 133:d4dda5c437f0 1592 */
mbed_official 133:d4dda5c437f0 1593
mbed_official 133:d4dda5c437f0 1594 /**
mbed_official 133:d4dda5c437f0 1595 * @}
mbed_official 133:d4dda5c437f0 1596 */
mbed_official 133:d4dda5c437f0 1597
mbed_official 133:d4dda5c437f0 1598 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/