mbed library sources for GR-PEACH rev.B.
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Diff: targets/hal/TARGET_STM/TARGET_DISCO_F100RB/sleep.c
- Revision:
- 497:d54623194236
- Parent:
- 126:549ba18ddd81
--- a/targets/hal/TARGET_STM/TARGET_DISCO_F100RB/sleep.c Tue Mar 24 09:00:08 2015 +0000 +++ b/targets/hal/TARGET_STM/TARGET_DISCO_F100RB/sleep.c Thu Mar 26 13:45:12 2015 +0000 @@ -28,31 +28,35 @@ ******************************************************************************* */ #include "sleep_api.h" + +#if DEVICE_SLEEP + #include "cmsis.h" +#include "hal_tick.h" + +static TIM_HandleTypeDef TimMasterHandle; void sleep(void) { - // Disable us_ticker update interrupt - TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE); + TimMasterHandle.Instance = TIM_MST; + + // Disable HAL tick and us_ticker update interrupts + __HAL_TIM_DISABLE_IT(&TimMasterHandle, (TIM_IT_CC2 | TIM_IT_UPDATE)); - SCB->SCR = 0; // Normal sleep mode for ARM core - __WFI(); + // Request to enter SLEEP mode + HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); - // Re-enable us_ticker update interrupt - TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); + // Enable HAL tick and us_ticker update interrupts + __HAL_TIM_ENABLE_IT(&TimMasterHandle, (TIM_IT_CC2 | TIM_IT_UPDATE)); } void deepsleep(void) { - // Disable us_ticker update interrupt - TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE); - - // Enable PWR clock - RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); - // Request to enter STOP mode with regulator in low power mode - PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI); + HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); - // Re-enable us_ticker update interrupt - TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); + // After wake-up from STOP reconfigure the PLL + SetSysClock(); } + +#endif