Renesas / mbed-src_GR-PEACH_rev_b

mbed library sources for GR-PEACH rev.B.

Fork of mbed-src by mbed official

targets/hal/TARGET_STM/TARGET_DISCO_F100RB/pinmap.c@497:d54623194236, 2015-03-26 (annotated)

Committer:
mbed_official
Date:
Thu Mar 26 13:45:12 2015 +0000
Revision:
497:d54623194236
Parent:
285:31249416b6f9 
Synchronized with git revision 0251fefac99a5b59beb481e845c6fbf48736bac6



Full URL: https://github.com/mbedmicro/mbed/commit/0251fefac99a5b59beb481e845c6fbf48736bac6/



DISCO_F100RB -Support HAL driver

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 126:549ba18ddd81 1 /* mbed Microcontroller Library
mbed_official 126:549ba18ddd81 2 *******************************************************************************
mbed_official 126:549ba18ddd81 3 * Copyright (c) 2014, STMicroelectronics
mbed_official 126:549ba18ddd81 4 * All rights reserved.
mbed_official 126:549ba18ddd81 5 *
mbed_official 126:549ba18ddd81 6 * Redistribution and use in source and binary forms, with or without
mbed_official 126:549ba18ddd81 7 * modification, are permitted provided that the following conditions are met:
mbed_official 126:549ba18ddd81 8 *
mbed_official 126:549ba18ddd81 9 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 126:549ba18ddd81 10 * this list of conditions and the following disclaimer.
mbed_official 126:549ba18ddd81 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 126:549ba18ddd81 12 * this list of conditions and the following disclaimer in the documentation
mbed_official 126:549ba18ddd81 13 * and/or other materials provided with the distribution.
mbed_official 126:549ba18ddd81 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 126:549ba18ddd81 15 * may be used to endorse or promote products derived from this software
mbed_official 126:549ba18ddd81 16 * without specific prior written permission.
mbed_official 126:549ba18ddd81 17 *
mbed_official 126:549ba18ddd81 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 126:549ba18ddd81 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 126:549ba18ddd81 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 126:549ba18ddd81 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 126:549ba18ddd81 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 126:549ba18ddd81 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 126:549ba18ddd81 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 126:549ba18ddd81 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 126:549ba18ddd81 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 126:549ba18ddd81 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 126:549ba18ddd81 28 *******************************************************************************
mbed_official 126:549ba18ddd81 29 */
mbed_official 227:7bd0639b8911 30 #include "mbed_assert.h"
mbed_official 126:549ba18ddd81 31 #include "pinmap.h"
mbed_official 497:d54623194236 32 #include "PortNames.h"
mbed_official 285:31249416b6f9 33 #include "mbed_error.h"
mbed_official 126:549ba18ddd81 34
mbed_official 497:d54623194236 35 // GPIO mode look-up table
mbed_official 497:d54623194236 36 // Warning: the elements order must be the same as the one defined in PinNames.h
mbed_official 497:d54623194236 37 static const uint32_t gpio_mode[13] = {
mbed_official 497:d54623194236 38 GPIO_MODE_INPUT, // 0 = STM_MODE_INPUT
mbed_official 497:d54623194236 39 GPIO_MODE_OUTPUT_PP, // 1 = STM_MODE_OUTPUT_PP
mbed_official 497:d54623194236 40 GPIO_MODE_OUTPUT_OD, // 2 = STM_MODE_OUTPUT_OD
mbed_official 497:d54623194236 41 GPIO_MODE_AF_PP, // 3 = STM_MODE_AF_PP
mbed_official 497:d54623194236 42 GPIO_MODE_AF_OD, // 4 = STM_MODE_AF_OD
mbed_official 497:d54623194236 43 GPIO_MODE_ANALOG, // 5 = STM_MODE_ANALOG
mbed_official 497:d54623194236 44 GPIO_MODE_IT_RISING, // 6 = STM_MODE_IT_RISING
mbed_official 497:d54623194236 45 GPIO_MODE_IT_FALLING, // 7 = STM_MODE_IT_FALLING
mbed_official 497:d54623194236 46 GPIO_MODE_IT_RISING_FALLING, // 8 = STM_MODE_IT_RISING_FALLING
mbed_official 497:d54623194236 47 GPIO_MODE_EVT_RISING, // 9 = STM_MODE_EVT_RISING
mbed_official 497:d54623194236 48 GPIO_MODE_EVT_FALLING, // 10 = STM_MODE_EVT_FALLING
mbed_official 497:d54623194236 49 GPIO_MODE_EVT_RISING_FALLING, // 11 = STM_MODE_EVT_RISING_FALLING
mbed_official 497:d54623194236 50 0x10000000 // 12 = STM_MODE_IT_EVT_RESET (not in STM32Cube HAL)
mbed_official 126:549ba18ddd81 51 };
mbed_official 126:549ba18ddd81 52
mbed_official 126:549ba18ddd81 53 // Enable GPIO clock and return GPIO base address
mbed_official 497:d54623194236 54 uint32_t Set_GPIO_Clock(uint32_t port_idx)
mbed_official 497:d54623194236 55 {
mbed_official 126:549ba18ddd81 56 uint32_t gpio_add = 0;
mbed_official 126:549ba18ddd81 57 switch (port_idx) {
mbed_official 126:549ba18ddd81 58 case PortA:
mbed_official 126:549ba18ddd81 59 gpio_add = GPIOA_BASE;
mbed_official 497:d54623194236 60 __GPIOA_CLK_ENABLE();
mbed_official 126:549ba18ddd81 61 break;
mbed_official 126:549ba18ddd81 62 case PortB:
mbed_official 126:549ba18ddd81 63 gpio_add = GPIOB_BASE;
mbed_official 497:d54623194236 64 __GPIOB_CLK_ENABLE();
mbed_official 126:549ba18ddd81 65 break;
mbed_official 126:549ba18ddd81 66 case PortC:
mbed_official 126:549ba18ddd81 67 gpio_add = GPIOC_BASE;
mbed_official 497:d54623194236 68 __GPIOC_CLK_ENABLE();
mbed_official 126:549ba18ddd81 69 break;
mbed_official 126:549ba18ddd81 70 case PortD:
mbed_official 126:549ba18ddd81 71 gpio_add = GPIOD_BASE;
mbed_official 497:d54623194236 72 __GPIOD_CLK_ENABLE();
mbed_official 126:549ba18ddd81 73 break;
mbed_official 126:549ba18ddd81 74 default:
mbed_official 497:d54623194236 75 error("Pinmap error: wrong port number.");
mbed_official 126:549ba18ddd81 76 break;
mbed_official 126:549ba18ddd81 77 }
mbed_official 126:549ba18ddd81 78 return gpio_add;
mbed_official 126:549ba18ddd81 79 }
mbed_official 126:549ba18ddd81 80
mbed_official 126:549ba18ddd81 81 /**
mbed_official 126:549ba18ddd81 82 * Configure pin (input, output, alternate function or analog) + output speed + AF
mbed_official 126:549ba18ddd81 83 */
mbed_official 497:d54623194236 84 void pin_function(PinName pin, int data)
mbed_official 497:d54623194236 85 {
mbed_official 227:7bd0639b8911 86 MBED_ASSERT(pin != (PinName)NC);
mbed_official 126:549ba18ddd81 87 // Get the pin informations
mbed_official 126:549ba18ddd81 88 uint32_t mode = STM_PIN_MODE(data);
mbed_official 497:d54623194236 89 uint32_t pupd = STM_PIN_PUPD(data);
mbed_official 126:549ba18ddd81 90 uint32_t afnum = STM_PIN_AFNUM(data);
mbed_official 126:549ba18ddd81 91
mbed_official 126:549ba18ddd81 92 uint32_t port_index = STM_PORT(pin);
mbed_official 126:549ba18ddd81 93 uint32_t pin_index = STM_PIN(pin);
mbed_official 126:549ba18ddd81 94
mbed_official 126:549ba18ddd81 95 // Enable GPIO clock
mbed_official 126:549ba18ddd81 96 uint32_t gpio_add = Set_GPIO_Clock(port_index);
mbed_official 126:549ba18ddd81 97 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
mbed_official 126:549ba18ddd81 98
mbed_official 126:549ba18ddd81 99 // Enable AFIO clock
mbed_official 497:d54623194236 100 __HAL_RCC_AFIO_CLK_ENABLE();
mbed_official 126:549ba18ddd81 101
mbed_official 126:549ba18ddd81 102 // Configure Alternate Function
mbed_official 126:549ba18ddd81 103 // Warning: Must be done before the GPIO is initialized
mbed_official 126:549ba18ddd81 104 if (afnum > 0) {
mbed_official 497:d54623194236 105 switch (afnum) {
mbed_official 497:d54623194236 106 case 1: // Remap SPI1
mbed_official 497:d54623194236 107 __HAL_AFIO_REMAP_SPI1_ENABLE();
mbed_official 497:d54623194236 108 break;
mbed_official 497:d54623194236 109 case 2: // Remap I2C1
mbed_official 497:d54623194236 110 __HAL_AFIO_REMAP_I2C1_ENABLE();
mbed_official 497:d54623194236 111 break;
mbed_official 497:d54623194236 112 case 3: // Remap USART1
mbed_official 497:d54623194236 113 __HAL_AFIO_REMAP_USART1_ENABLE();
mbed_official 497:d54623194236 114 break;
mbed_official 497:d54623194236 115 case 4: // Remap USART2
mbed_official 497:d54623194236 116 __HAL_AFIO_REMAP_USART2_ENABLE();
mbed_official 497:d54623194236 117 break;
mbed_official 497:d54623194236 118 case 5: // Partial Remap USART3
mbed_official 497:d54623194236 119 __HAL_AFIO_REMAP_USART3_PARTIAL();
mbed_official 497:d54623194236 120 break;
mbed_official 497:d54623194236 121 case 6: // Partial Remap TIM1
mbed_official 497:d54623194236 122 __HAL_AFIO_REMAP_TIM1_PARTIAL();
mbed_official 497:d54623194236 123 break;
mbed_official 497:d54623194236 124 case 7: // Partial Remap TIM3
mbed_official 497:d54623194236 125 __HAL_AFIO_REMAP_TIM3_PARTIAL();
mbed_official 497:d54623194236 126 break;
mbed_official 497:d54623194236 127 case 8: // Full Remap TIM2
mbed_official 497:d54623194236 128 __HAL_AFIO_REMAP_TIM2_ENABLE();
mbed_official 497:d54623194236 129 break;
mbed_official 497:d54623194236 130 case 9: // Full Remap TIM3
mbed_official 497:d54623194236 131 __HAL_AFIO_REMAP_TIM3_ENABLE();
mbed_official 497:d54623194236 132 break;
mbed_official 497:d54623194236 133 default:
mbed_official 497:d54623194236 134 break;
mbed_official 497:d54623194236 135 }
mbed_official 126:549ba18ddd81 136 }
mbed_official 126:549ba18ddd81 137
mbed_official 126:549ba18ddd81 138 // Configure GPIO
mbed_official 126:549ba18ddd81 139 GPIO_InitTypeDef GPIO_InitStructure;
mbed_official 497:d54623194236 140 GPIO_InitStructure.Pin = (uint32_t)(1 << pin_index);
mbed_official 497:d54623194236 141 GPIO_InitStructure.Mode = gpio_mode[mode];
mbed_official 497:d54623194236 142 GPIO_InitStructure.Pull = pupd;
mbed_official 497:d54623194236 143 GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
mbed_official 497:d54623194236 144 HAL_GPIO_Init(gpio, &GPIO_InitStructure);
mbed_official 126:549ba18ddd81 145
mbed_official 126:549ba18ddd81 146 // Disconnect JTAG-DP + SW-DP signals.
mbed_official 126:549ba18ddd81 147 // Warning: Need to reconnect under reset
mbed_official 126:549ba18ddd81 148 if ((pin == PA_13) || (pin == PA_14)) {
mbed_official 497:d54623194236 149 __HAL_AFIO_REMAP_SWJ_DISABLE(); // JTAG-DP Disabled and SW-DP Disabled
mbed_official 126:549ba18ddd81 150 }
mbed_official 126:549ba18ddd81 151 if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
mbed_official 497:d54623194236 152 __HAL_AFIO_REMAP_SWJ_NOJTAG(); // JTAG-DP Disabled and SW-DP enabled
mbed_official 227:7bd0639b8911 153 }
mbed_official 126:549ba18ddd81 154 }
mbed_official 126:549ba18ddd81 155
mbed_official 126:549ba18ddd81 156 /**
mbed_official 126:549ba18ddd81 157 * Configure pin pull-up/pull-down
mbed_official 126:549ba18ddd81 158 */
mbed_official 497:d54623194236 159 void pin_mode(PinName pin, PinMode mode)
mbed_official 497:d54623194236 160 {
mbed_official 227:7bd0639b8911 161 MBED_ASSERT(pin != (PinName)NC);
mbed_official 126:549ba18ddd81 162
mbed_official 126:549ba18ddd81 163 uint32_t port_index = STM_PORT(pin);
mbed_official 126:549ba18ddd81 164 uint32_t pin_index = STM_PIN(pin);
mbed_official 126:549ba18ddd81 165
mbed_official 126:549ba18ddd81 166 // Enable GPIO clock
mbed_official 126:549ba18ddd81 167 uint32_t gpio_add = Set_GPIO_Clock(port_index);
mbed_official 126:549ba18ddd81 168 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
mbed_official 126:549ba18ddd81 169
mbed_official 126:549ba18ddd81 170 // Configure open-drain and pull-up/down
mbed_official 126:549ba18ddd81 171 switch (mode) {
mbed_official 227:7bd0639b8911 172 case PullNone:
mbed_official 497:d54623194236 173 break;
mbed_official 227:7bd0639b8911 174 case PullUp:
mbed_official 227:7bd0639b8911 175 case PullDown:
mbed_official 497:d54623194236 176 // Set pull-up / pull-down for Input mode
mbed_official 497:d54623194236 177 if (pin_index < 8) {
mbed_official 497:d54623194236 178 if ((gpio->CRL & (0x03 << (pin_index * 4))) == 0) { // MODE bits = Input mode
mbed_official 497:d54623194236 179 gpio->CRL |= (0x08 << (pin_index * 4)); // Set pull-up / pull-down
mbed_official 497:d54623194236 180 }
mbed_official 497:d54623194236 181 } else {
mbed_official 497:d54623194236 182 if ((gpio->CRH & (0x03 << ((pin_index % 8) * 4))) == 0) { // MODE bits = Input mode
mbed_official 497:d54623194236 183 gpio->CRH |= (0x08 << ((pin_index % 8) * 4)); // Set pull-up / pull-down
mbed_official 497:d54623194236 184 }
mbed_official 497:d54623194236 185 }
mbed_official 227:7bd0639b8911 186 break;
mbed_official 227:7bd0639b8911 187 case OpenDrain:
mbed_official 497:d54623194236 188 // Set open-drain for Output mode (General Purpose or Alternate Function)
mbed_official 227:7bd0639b8911 189 if (pin_index < 8) {
mbed_official 227:7bd0639b8911 190 if ((gpio->CRL & (0x03 << (pin_index * 4))) > 0) { // MODE bits = Output mode
mbed_official 227:7bd0639b8911 191 gpio->CRL |= (0x04 << (pin_index * 4)); // Set open-drain
mbed_official 227:7bd0639b8911 192 }
mbed_official 227:7bd0639b8911 193 } else {
mbed_official 227:7bd0639b8911 194 if ((gpio->CRH & (0x03 << ((pin_index % 8) * 4))) > 0) { // MODE bits = Output mode
mbed_official 227:7bd0639b8911 195 gpio->CRH |= (0x04 << ((pin_index % 8) * 4)); // Set open-drain
mbed_official 227:7bd0639b8911 196 }
mbed_official 126:549ba18ddd81 197 }
mbed_official 497:d54623194236 198 break;
mbed_official 227:7bd0639b8911 199 default:
mbed_official 227:7bd0639b8911 200 break;
mbed_official 126:549ba18ddd81 201 }
mbed_official 126:549ba18ddd81 202 }