Diff: source/nordic_sdk/components/drivers_nrf/hal/nrf_gpio.h

Revision:

28:041dac1366b2

Parent:

27:0fe148f1bca3

Child:

29:286940b7ee5a

--- a/source/nordic_sdk/components/drivers_nrf/hal/nrf_gpio.h	Thu Apr 07 17:37:52 2016 +0100
+++ b/source/nordic_sdk/components/drivers_nrf/hal/nrf_gpio.h	Thu Apr 07 17:37:56 2016 +0100
@@ -1,40 +1,18 @@
-/*
- * Copyright (c) Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- *   1. Redistributions of source code must retain the above copyright notice, this
- *   list of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form must reproduce the above copyright notice, this
- *   list of conditions and the following disclaimer in the documentation and/or
- *   other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of other
- *   contributors to this software may be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
+/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+*
+* The information contained herein is property of Nordic Semiconductor ASA.
+* Terms and conditions of usage are described in detail in NORDIC
+* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+*
+* Licensees are granted free, non-transferable use of the information. NO
+* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+* the file.
+*
+*/
 #ifndef NRF_GPIO_H__
 #define NRF_GPIO_H__
 
-#include "nrf51.h"
-#include "nrf51_bitfields.h"
+#include "nrf.h"
 #include <stdbool.h>
 
 /**
@@ -53,27 +31,6 @@
 #define NUMBER_OF_PINS 32
 
 /**
- * @enum nrf_gpio_port_dir_t
- * @brief Enumerator used for setting the direction of a GPIO port.
- */
-typedef enum
-{
-    NRF_GPIO_PORT_DIR_OUTPUT,       ///<  Output
-    NRF_GPIO_PORT_DIR_INPUT         ///<  Input
-} nrf_gpio_port_dir_t;
-
-/**
- * @enum nrf_gpio_pin_dir_t
- * Pin direction definitions.
- */
-typedef enum
-{
-    NRF_GPIO_PIN_DIR_INPUT,   ///< Input
-    NRF_GPIO_PIN_DIR_OUTPUT   ///< Output
-} nrf_gpio_pin_dir_t;
-
-/**
- * @enum nrf_gpio_port_select_t
  * @brief Enumerator used for selecting between port 0 - 3.
  */
 typedef enum
@@ -85,7 +42,33 @@
 } nrf_gpio_port_select_t;
 
 /**
- * @enum nrf_gpio_pin_pull_t
+ * @brief Enumerator used for setting the direction of a GPIO port.
+ */
+typedef enum
+{
+    NRF_GPIO_PORT_DIR_OUTPUT,       ///<  Output
+    NRF_GPIO_PORT_DIR_INPUT         ///<  Input
+} nrf_gpio_port_dir_t;
+
+/**
+ * @brief Pin direction definitions.
+ */
+typedef enum
+{
+    NRF_GPIO_PIN_DIR_INPUT  = GPIO_PIN_CNF_DIR_Input,   ///< Input
+    NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output   ///< Output
+} nrf_gpio_pin_dir_t;
+
+/**
+ * @brief Connection of input buffer
+ */
+typedef enum
+{
+    NRF_GPIO_PIN_INPUT_CONNECT    = GPIO_PIN_CNF_INPUT_Connect,   ///< Connect input buffer
+    NRF_GPIO_PIN_INPUT_DISCONNECT = GPIO_PIN_CNF_INPUT_Disconnect ///< Disconnect input buffer
+} nrf_gpio_pin_input_t;
+
+/**
  * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
  */
 typedef enum
@@ -96,7 +79,21 @@
 } nrf_gpio_pin_pull_t;
 
 /**
- * @enum nrf_gpio_pin_sense_t
+ * @brief Enumerator used for selecting output drive mode
+ */
+typedef enum
+{
+    NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'
+    NRF_GPIO_PIN_H0S1 = GPIO_PIN_CNF_DRIVE_H0S1, ///< !< High drive '0', standard '1'
+    NRF_GPIO_PIN_S0H1 = GPIO_PIN_CNF_DRIVE_S0H1, ///< !< Standard '0', high drive '1'
+    NRF_GPIO_PIN_H0H1 = GPIO_PIN_CNF_DRIVE_H0H1, ///< !< High drive '0', high 'drive '1''
+    NRF_GPIO_PIN_D0S1 = GPIO_PIN_CNF_DRIVE_D0S1, ///< !< Disconnect '0' standard '1'
+    NRF_GPIO_PIN_D0H1 = GPIO_PIN_CNF_DRIVE_D0H1, ///< !< Disconnect '0', high drive '1'
+    NRF_GPIO_PIN_S0D1 = GPIO_PIN_CNF_DRIVE_S0D1, ///< !< Standard '0'. disconnect '1'
+    NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High drive '0', disconnect '1'
+} nrf_gpio_pin_drive_t;
+
+/**
  * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
  */
 typedef enum
@@ -106,6 +103,7 @@
     NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High,                  ///<  Pin sense high level.
 } nrf_gpio_pin_sense_t;
 
+
 /**
  * @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
  *        This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
@@ -135,10 +133,30 @@
 __STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config);
 
 /**
+ * @brief Pin configuration function
+ *
+ * The main pin configuration function.
+ * This function allows to set any aspect in PIN_CNF register.
+ * @param pin_number Specifies the pin number (allowed values 0-31).
+ * @param dir   Pin direction
+ * @param input Connect or disconnect input buffer
+ * @param pull  Pull configuration
+ * @param drive Drive configuration
+ * @param sense Pin sensing mechanism
+ */
+__STATIC_INLINE void nrf_gpio_cfg(
+        uint32_t             pin_number,
+        nrf_gpio_pin_dir_t   dir,
+        nrf_gpio_pin_input_t input,
+        nrf_gpio_pin_pull_t  pull,
+        nrf_gpio_pin_drive_t drive,
+        nrf_gpio_pin_sense_t sense);
+
+/**
  * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
  *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
  *
- * @param pin_number specifies the pin number (allowed values 0-30)
+ * @param pin_number specifies the pin number (allowed values 0-31)
  *
  * @note  Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
  */
@@ -158,14 +176,14 @@
 /**
  * @brief Function for reseting pin configuration to its default state.
  *
- * @param pin_number Specifies the pin number (allowed values 0-30).
+ * @param pin_number Specifies the pin number (allowed values 0-31).
  */
 __STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number);
 
 /**
  * @brief Function for configuring the given GPIO pin number as a watcher. Only input is connected.
  *
- * @param pin_number Specifies the pin number (allowed values 0-30).
+ * @param pin_number Specifies the pin number (allowed values 0-31).
  *
  */
 __STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number);
@@ -173,7 +191,7 @@
 /**
  * @brief Function for disconnecting input for the given GPIO.
  *
- * @param pin_number Specifies the pin number (allowed values 0-30).
+ * @param pin_number Specifies the pin number (allowed values 0-31).
  *
  */
 __STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number);
@@ -220,6 +238,17 @@
 __STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number);
 
 /**
+ * @brief Function for setting GPIO pins.
+ *
+ * Note that pins must be configured as an output for this
+ * function to have any effect.
+ *
+ * @param pin_mask Specifies the pins to set.
+ * set.
+ */
+__STATIC_INLINE void nrf_gpio_pins_set(uint32_t pin_mask);
+
+/**
  * @brief Function for clearing a GPIO pin.
  *
  * Note that the pin must be configured as an output for this
@@ -231,6 +260,17 @@
 __STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number);
 
 /**
+ * @brief Function for clearing GPIO pins.
+ *
+ * Note that pins must be configured as an output for this
+ * function to have any effect.
+ *
+ * @param pin_mask Specifies the pins to clear.
+ * set.
+ */
+__STATIC_INLINE void nrf_gpio_pins_clear(uint32_t pin_mask);
+
+/**
  * @brief Function for toggling a GPIO pin.
  *
  * Note that the pin must be configured as an output for this
@@ -384,11 +424,7 @@
     /*lint -e{845} // A zero has been given as right argument to operator '|'" */
     for (; pin_range_start <= pin_range_end; pin_range_start++)
     {
-        NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                        | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
-                                        | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
-                                        | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        nrf_gpio_cfg_output(pin_range_start);
     }
 }
 
@@ -397,42 +433,56 @@
     /*lint -e{845} // A zero has been given as right argument to operator '|'" */
     for (; pin_range_start <= pin_range_end; pin_range_start++)
     {
-        NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                        | (pull_config << GPIO_PIN_CNF_PULL_Pos)
-                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
-                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+        nrf_gpio_cfg_input(pin_range_start, pull_config);
     }
 }
 
+__STATIC_INLINE void nrf_gpio_cfg(
+        uint32_t             pin_number,
+        nrf_gpio_pin_dir_t   dir,
+        nrf_gpio_pin_input_t input,
+        nrf_gpio_pin_pull_t  pull,
+        nrf_gpio_pin_drive_t drive,
+        nrf_gpio_pin_sense_t sense)
+{
+    NRF_GPIO->PIN_CNF[pin_number] = ((uint32_t)dir   << GPIO_PIN_CNF_DIR_Pos)
+                                  | ((uint32_t)input << GPIO_PIN_CNF_INPUT_Pos)
+                                  | ((uint32_t)pull  << GPIO_PIN_CNF_PULL_Pos)
+                                  | ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos)
+                                  | ((uint32_t)sense << GPIO_PIN_CNF_SENSE_Pos);
+}
+
 __STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
 {
-    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-                                            | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                            | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
-                                            | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
-                                            | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    nrf_gpio_cfg(
+            pin_number,
+            NRF_GPIO_PIN_DIR_OUTPUT,
+            NRF_GPIO_PIN_INPUT_DISCONNECT,
+            NRF_GPIO_PIN_NOPULL,
+            NRF_GPIO_PIN_S0S1,
+            NRF_GPIO_PIN_NOSENSE);
 }
 
 __STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
 {
-    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                        | (pull_config << GPIO_PIN_CNF_PULL_Pos)
-                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
-                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+    nrf_gpio_cfg(
+            pin_number,
+            NRF_GPIO_PIN_DIR_INPUT,
+            NRF_GPIO_PIN_INPUT_CONNECT,
+            pull_config,
+            NRF_GPIO_PIN_S0S1,
+            NRF_GPIO_PIN_NOSENSE);
 }
 
 __STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number)
 {
-    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                        | (NRF_GPIO_PIN_NOPULL << GPIO_PIN_CNF_PULL_Pos)
-                                        | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
-                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+    nrf_gpio_cfg(
+            pin_number,
+            NRF_GPIO_PIN_DIR_INPUT,
+            NRF_GPIO_PIN_INPUT_DISCONNECT,
+            NRF_GPIO_PIN_NOPULL,
+            NRF_GPIO_PIN_S0S1,
+            NRF_GPIO_PIN_NOSENSE);
 }
 
 __STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number)
@@ -451,12 +501,13 @@
 
 __STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
 {
-    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    NRF_GPIO->PIN_CNF[pin_number] = (sense_config << GPIO_PIN_CNF_SENSE_Pos)
-                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                        | (pull_config << GPIO_PIN_CNF_PULL_Pos)
-                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
-                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+    nrf_gpio_cfg(
+            pin_number,
+            NRF_GPIO_PIN_DIR_INPUT,
+            NRF_GPIO_PIN_INPUT_CONNECT,
+            pull_config,
+            NRF_GPIO_PIN_S0S1,
+            sense_config);
 }
 
 __STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config)
@@ -471,12 +522,13 @@
 {
     if(direction == NRF_GPIO_PIN_DIR_INPUT)
     {
-        NRF_GPIO->PIN_CNF[pin_number] =
-          (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-        | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
-        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
-        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+        nrf_gpio_cfg(
+                pin_number,
+                NRF_GPIO_PIN_DIR_INPUT,
+                NRF_GPIO_PIN_INPUT_CONNECT,
+                NRF_GPIO_PIN_NOPULL,
+                NRF_GPIO_PIN_S0S1,
+                NRF_GPIO_PIN_NOSENSE);
     }
     else
     {
@@ -489,11 +541,21 @@
     NRF_GPIO->OUTSET = (1UL << pin_number);
 }
 
+__STATIC_INLINE void nrf_gpio_pins_set(uint32_t pin_mask)
+{
+    NRF_GPIO->OUTSET = pin_mask;
+}
+
 __STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
 {
     NRF_GPIO->OUTCLR = (1UL << pin_number);
 }
 
+__STATIC_INLINE void nrf_gpio_pins_clear(uint32_t pin_mask)
+{
+    NRF_GPIO->OUTCLR = pin_mask;
+}
+
 __STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
 {
     const uint32_t pin_bit   = 1UL << pin_number;