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Lancaster University's (short term!) clone of mbed-src for micro:bit. This is a copy of the github branch https://github.com/lancaster-university/mbed-classic

Fork of mbed-src by mbed official

targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/component/comp_usb.h@592:a274ee790e56, 2015-07-17 (annotated)

Committer:: mbed_official
Date:: Fri Jul 17 09:15:10 2015 +0100
Revision:: 592:a274ee790e56
Parent:: 579:53297373a894

Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6

Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/

More API implementation for SAMR21

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	579:53297373a894	1	#ifndef _SAMD21_USB_COMPONENT_
mbed_official	579:53297373a894	2	#define _SAMD21_USB_COMPONENT_
mbed_official	579:53297373a894	3
mbed_official	579:53297373a894	4	/* ========================================================================== */
mbed_official	579:53297373a894	5	/** SOFTWARE API DEFINITION FOR USB */
mbed_official	579:53297373a894	6	/* ========================================================================== */
mbed_official	579:53297373a894	7	/** \addtogroup SAMD21_USB Universal Serial Bus */
mbed_official	579:53297373a894	8	/@{/
mbed_official	579:53297373a894	9
mbed_official	579:53297373a894	10	#define USB_U2222
mbed_official	579:53297373a894	11	#define REV_USB 0x101
mbed_official	579:53297373a894	12
mbed_official	579:53297373a894	13	/* -------- USB_CTRLA : (USB Offset: 0x000) (R/W 8) Control A -------- */
mbed_official	579:53297373a894	14	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	15	typedef union {
mbed_official	579:53297373a894	16	struct {
mbed_official	579:53297373a894	17	uint8_t SWRST:1; /!< bit: 0 Software Reset /
mbed_official	579:53297373a894	18	uint8_t ENABLE:1; /!< bit: 1 Enable /
mbed_official	579:53297373a894	19	uint8_t RUNSTDBY:1; /!< bit: 2 Run in Standby Mode /
mbed_official	579:53297373a894	20	uint8_t :4; /!< bit: 3.. 6 Reserved /
mbed_official	579:53297373a894	21	uint8_t MODE:1; /!< bit: 7 Operating Mode /
mbed_official	579:53297373a894	22	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	23	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	24	} USB_CTRLA_Type;
mbed_official	579:53297373a894	25	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	26
mbed_official	579:53297373a894	27	#define USB_CTRLA_OFFSET 0x000 /*< \brief (USB_CTRLA offset) Control A /
mbed_official	579:53297373a894	28	#define USB_CTRLA_RESETVALUE 0x00ul /*< \brief (USB_CTRLA reset_value) Control A /
mbed_official	579:53297373a894	29
mbed_official	579:53297373a894	30	#define USB_CTRLA_SWRST_Pos 0 /*< \brief (USB_CTRLA) Software Reset /
mbed_official	579:53297373a894	31	#define USB_CTRLA_SWRST (0x1ul << USB_CTRLA_SWRST_Pos)
mbed_official	579:53297373a894	32	#define USB_CTRLA_ENABLE_Pos 1 /*< \brief (USB_CTRLA) Enable /
mbed_official	579:53297373a894	33	#define USB_CTRLA_ENABLE (0x1ul << USB_CTRLA_ENABLE_Pos)
mbed_official	579:53297373a894	34	#define USB_CTRLA_RUNSTDBY_Pos 2 /*< \brief (USB_CTRLA) Run in Standby Mode /
mbed_official	579:53297373a894	35	#define USB_CTRLA_RUNSTDBY (0x1ul << USB_CTRLA_RUNSTDBY_Pos)
mbed_official	579:53297373a894	36	#define USB_CTRLA_MODE_Pos 7 /*< \brief (USB_CTRLA) Operating Mode /
mbed_official	579:53297373a894	37	#define USB_CTRLA_MODE (0x1ul << USB_CTRLA_MODE_Pos)
mbed_official	579:53297373a894	38	#define USB_CTRLA_MODE_DEVICE_Val 0x0ul /*< \brief (USB_CTRLA) Device Mode /
mbed_official	579:53297373a894	39	#define USB_CTRLA_MODE_HOST_Val 0x1ul /*< \brief (USB_CTRLA) Host Mode /
mbed_official	579:53297373a894	40	#define USB_CTRLA_MODE_DEVICE (USB_CTRLA_MODE_DEVICE_Val << USB_CTRLA_MODE_Pos)
mbed_official	579:53297373a894	41	#define USB_CTRLA_MODE_HOST (USB_CTRLA_MODE_HOST_Val << USB_CTRLA_MODE_Pos)
mbed_official	579:53297373a894	42	#define USB_CTRLA_MASK 0x87ul /*< \brief (USB_CTRLA) MASK Register /
mbed_official	579:53297373a894	43
mbed_official	579:53297373a894	44	/* -------- USB_SYNCBUSY : (USB Offset: 0x002) (R/ 8) Synchronization Busy -------- */
mbed_official	579:53297373a894	45	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	46	typedef union {
mbed_official	579:53297373a894	47	struct {
mbed_official	579:53297373a894	48	uint8_t SWRST:1; /!< bit: 0 Software Reset Synchronization Busy /
mbed_official	579:53297373a894	49	uint8_t ENABLE:1; /!< bit: 1 Enable Synchronization Busy /
mbed_official	579:53297373a894	50	uint8_t :6; /!< bit: 2.. 7 Reserved /
mbed_official	579:53297373a894	51	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	52	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	53	} USB_SYNCBUSY_Type;
mbed_official	579:53297373a894	54	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	55
mbed_official	579:53297373a894	56	#define USB_SYNCBUSY_OFFSET 0x002 /*< \brief (USB_SYNCBUSY offset) Synchronization Busy /
mbed_official	579:53297373a894	57	#define USB_SYNCBUSY_RESETVALUE 0x00ul /*< \brief (USB_SYNCBUSY reset_value) Synchronization Busy /
mbed_official	579:53297373a894	58
mbed_official	579:53297373a894	59	#define USB_SYNCBUSY_SWRST_Pos 0 /*< \brief (USB_SYNCBUSY) Software Reset Synchronization Busy /
mbed_official	579:53297373a894	60	#define USB_SYNCBUSY_SWRST (0x1ul << USB_SYNCBUSY_SWRST_Pos)
mbed_official	579:53297373a894	61	#define USB_SYNCBUSY_ENABLE_Pos 1 /*< \brief (USB_SYNCBUSY) Enable Synchronization Busy /
mbed_official	579:53297373a894	62	#define USB_SYNCBUSY_ENABLE (0x1ul << USB_SYNCBUSY_ENABLE_Pos)
mbed_official	579:53297373a894	63	#define USB_SYNCBUSY_MASK 0x03ul /*< \brief (USB_SYNCBUSY) MASK Register /
mbed_official	579:53297373a894	64
mbed_official	579:53297373a894	65	/* -------- USB_QOSCTRL : (USB Offset: 0x003) (R/W 8) USB Quality Of Service -------- */
mbed_official	579:53297373a894	66	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	67	typedef union {
mbed_official	579:53297373a894	68	struct {
mbed_official	579:53297373a894	69	uint8_t CQOS:2; /!< bit: 0.. 1 Configuration Quality of Service /
mbed_official	579:53297373a894	70	uint8_t DQOS:2; /!< bit: 2.. 3 Data Quality of Service /
mbed_official	579:53297373a894	71	uint8_t :4; /!< bit: 4.. 7 Reserved /
mbed_official	579:53297373a894	72	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	73	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	74	} USB_QOSCTRL_Type;
mbed_official	579:53297373a894	75	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	76
mbed_official	579:53297373a894	77	#define USB_QOSCTRL_OFFSET 0x003 /*< \brief (USB_QOSCTRL offset) USB Quality Of Service /
mbed_official	579:53297373a894	78	#define USB_QOSCTRL_RESETVALUE 0x05ul /*< \brief (USB_QOSCTRL reset_value) USB Quality Of Service /
mbed_official	579:53297373a894	79
mbed_official	579:53297373a894	80	#define USB_QOSCTRL_CQOS_Pos 0 /*< \brief (USB_QOSCTRL) Configuration Quality of Service /
mbed_official	579:53297373a894	81	#define USB_QOSCTRL_CQOS_Msk (0x3ul << USB_QOSCTRL_CQOS_Pos)
mbed_official	579:53297373a894	82	#define USB_QOSCTRL_CQOS(value) ((USB_QOSCTRL_CQOS_Msk & ((value) << USB_QOSCTRL_CQOS_Pos)))
mbed_official	579:53297373a894	83	#define USB_QOSCTRL_CQOS_DISABLE_Val 0x0ul /*< \brief (USB_QOSCTRL) Background (no sensitive operation) /
mbed_official	579:53297373a894	84	#define USB_QOSCTRL_CQOS_LOW_Val 0x1ul /*< \brief (USB_QOSCTRL) Sensitive Bandwidth /
mbed_official	579:53297373a894	85	#define USB_QOSCTRL_CQOS_MEDIUM_Val 0x2ul /*< \brief (USB_QOSCTRL) Sensitive Latency /
mbed_official	579:53297373a894	86	#define USB_QOSCTRL_CQOS_HIGH_Val 0x3ul /*< \brief (USB_QOSCTRL) Critical Latency /
mbed_official	579:53297373a894	87	#define USB_QOSCTRL_CQOS_DISABLE (USB_QOSCTRL_CQOS_DISABLE_Val << USB_QOSCTRL_CQOS_Pos)
mbed_official	579:53297373a894	88	#define USB_QOSCTRL_CQOS_LOW (USB_QOSCTRL_CQOS_LOW_Val << USB_QOSCTRL_CQOS_Pos)
mbed_official	579:53297373a894	89	#define USB_QOSCTRL_CQOS_MEDIUM (USB_QOSCTRL_CQOS_MEDIUM_Val << USB_QOSCTRL_CQOS_Pos)
mbed_official	579:53297373a894	90	#define USB_QOSCTRL_CQOS_HIGH (USB_QOSCTRL_CQOS_HIGH_Val << USB_QOSCTRL_CQOS_Pos)
mbed_official	579:53297373a894	91	#define USB_QOSCTRL_DQOS_Pos 2 /*< \brief (USB_QOSCTRL) Data Quality of Service /
mbed_official	579:53297373a894	92	#define USB_QOSCTRL_DQOS_Msk (0x3ul << USB_QOSCTRL_DQOS_Pos)
mbed_official	579:53297373a894	93	#define USB_QOSCTRL_DQOS(value) ((USB_QOSCTRL_DQOS_Msk & ((value) << USB_QOSCTRL_DQOS_Pos)))
mbed_official	579:53297373a894	94	#define USB_QOSCTRL_DQOS_DISABLE_Val 0x0ul /*< \brief (USB_QOSCTRL) Background (no sensitive operation) /
mbed_official	579:53297373a894	95	#define USB_QOSCTRL_DQOS_LOW_Val 0x1ul /*< \brief (USB_QOSCTRL) Sensitive Bandwidth /
mbed_official	579:53297373a894	96	#define USB_QOSCTRL_DQOS_MEDIUM_Val 0x2ul /*< \brief (USB_QOSCTRL) Sensitive Latency /
mbed_official	579:53297373a894	97	#define USB_QOSCTRL_DQOS_HIGH_Val 0x3ul /*< \brief (USB_QOSCTRL) Critical Latency /
mbed_official	579:53297373a894	98	#define USB_QOSCTRL_DQOS_DISABLE (USB_QOSCTRL_DQOS_DISABLE_Val << USB_QOSCTRL_DQOS_Pos)
mbed_official	579:53297373a894	99	#define USB_QOSCTRL_DQOS_LOW (USB_QOSCTRL_DQOS_LOW_Val << USB_QOSCTRL_DQOS_Pos)
mbed_official	579:53297373a894	100	#define USB_QOSCTRL_DQOS_MEDIUM (USB_QOSCTRL_DQOS_MEDIUM_Val << USB_QOSCTRL_DQOS_Pos)
mbed_official	579:53297373a894	101	#define USB_QOSCTRL_DQOS_HIGH (USB_QOSCTRL_DQOS_HIGH_Val << USB_QOSCTRL_DQOS_Pos)
mbed_official	579:53297373a894	102	#define USB_QOSCTRL_MASK 0x0Ful /*< \brief (USB_QOSCTRL) MASK Register /
mbed_official	579:53297373a894	103
mbed_official	579:53297373a894	104	/* -------- USB_DEVICE_CTRLB : (USB Offset: 0x008) (R/W 16) DEVICE DEVICE Control B -------- */
mbed_official	579:53297373a894	105	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	106	typedef union {
mbed_official	579:53297373a894	107	struct {
mbed_official	579:53297373a894	108	uint16_t DETACH:1; /!< bit: 0 Detach /
mbed_official	579:53297373a894	109	uint16_t UPRSM:1; /!< bit: 1 Upstream Resume /
mbed_official	579:53297373a894	110	uint16_t SPDCONF:2; /!< bit: 2.. 3 Speed Configuration /
mbed_official	579:53297373a894	111	uint16_t NREPLY:1; /!< bit: 4 No Reply /
mbed_official	579:53297373a894	112	uint16_t TSTJ:1; /!< bit: 5 Test mode J /
mbed_official	579:53297373a894	113	uint16_t TSTK:1; /!< bit: 6 Test mode K /
mbed_official	579:53297373a894	114	uint16_t TSTPCKT:1; /!< bit: 7 Test packet mode /
mbed_official	579:53297373a894	115	uint16_t OPMODE2:1; /!< bit: 8 Specific Operational Mode /
mbed_official	579:53297373a894	116	uint16_t GNAK:1; /!< bit: 9 Global NAK /
mbed_official	579:53297373a894	117	uint16_t LPMHDSK:2; /!< bit: 10..11 Link Power Management Handshake /
mbed_official	579:53297373a894	118	uint16_t :4; /!< bit: 12..15 Reserved /
mbed_official	579:53297373a894	119	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	120	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	121	} USB_DEVICE_CTRLB_Type;
mbed_official	579:53297373a894	122	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	123
mbed_official	579:53297373a894	124	#define USB_DEVICE_CTRLB_OFFSET 0x008 /*< \brief (USB_DEVICE_CTRLB offset) DEVICE Control B /
mbed_official	579:53297373a894	125	#define USB_DEVICE_CTRLB_RESETVALUE 0x0001ul /*< \brief (USB_DEVICE_CTRLB reset_value) DEVICE Control B /
mbed_official	579:53297373a894	126
mbed_official	579:53297373a894	127	#define USB_DEVICE_CTRLB_DETACH_Pos 0 /*< \brief (USB_DEVICE_CTRLB) Detach /
mbed_official	579:53297373a894	128	#define USB_DEVICE_CTRLB_DETACH (0x1ul << USB_DEVICE_CTRLB_DETACH_Pos)
mbed_official	579:53297373a894	129	#define USB_DEVICE_CTRLB_UPRSM_Pos 1 /*< \brief (USB_DEVICE_CTRLB) Upstream Resume /
mbed_official	579:53297373a894	130	#define USB_DEVICE_CTRLB_UPRSM (0x1ul << USB_DEVICE_CTRLB_UPRSM_Pos)
mbed_official	579:53297373a894	131	#define USB_DEVICE_CTRLB_SPDCONF_Pos 2 /*< \brief (USB_DEVICE_CTRLB) Speed Configuration /
mbed_official	579:53297373a894	132	#define USB_DEVICE_CTRLB_SPDCONF_Msk (0x3ul << USB_DEVICE_CTRLB_SPDCONF_Pos)
mbed_official	579:53297373a894	133	#define USB_DEVICE_CTRLB_SPDCONF(value) ((USB_DEVICE_CTRLB_SPDCONF_Msk & ((value) << USB_DEVICE_CTRLB_SPDCONF_Pos)))
mbed_official	579:53297373a894	134	#define USB_DEVICE_CTRLB_SPDCONF_FS_Val 0x0ul /*< \brief (USB_DEVICE_CTRLB) FS : Full Speed /
mbed_official	579:53297373a894	135	#define USB_DEVICE_CTRLB_SPDCONF_LS_Val 0x1ul /*< \brief (USB_DEVICE_CTRLB) LS : Low Speed /
mbed_official	579:53297373a894	136	#define USB_DEVICE_CTRLB_SPDCONF_HS_Val 0x2ul /*< \brief (USB_DEVICE_CTRLB) HS : High Speed capable /
mbed_official	579:53297373a894	137	#define USB_DEVICE_CTRLB_SPDCONF_HSTM_Val 0x3ul /*< \brief (USB_DEVICE_CTRLB) HSTM: High Speed Test Mode (force high-speed mode for test mode) /
mbed_official	579:53297373a894	138	#define USB_DEVICE_CTRLB_SPDCONF_FS (USB_DEVICE_CTRLB_SPDCONF_FS_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
mbed_official	579:53297373a894	139	#define USB_DEVICE_CTRLB_SPDCONF_LS (USB_DEVICE_CTRLB_SPDCONF_LS_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
mbed_official	579:53297373a894	140	#define USB_DEVICE_CTRLB_SPDCONF_HS (USB_DEVICE_CTRLB_SPDCONF_HS_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
mbed_official	579:53297373a894	141	#define USB_DEVICE_CTRLB_SPDCONF_HSTM (USB_DEVICE_CTRLB_SPDCONF_HSTM_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
mbed_official	579:53297373a894	142	#define USB_DEVICE_CTRLB_NREPLY_Pos 4 /*< \brief (USB_DEVICE_CTRLB) No Reply /
mbed_official	579:53297373a894	143	#define USB_DEVICE_CTRLB_NREPLY (0x1ul << USB_DEVICE_CTRLB_NREPLY_Pos)
mbed_official	579:53297373a894	144	#define USB_DEVICE_CTRLB_TSTJ_Pos 5 /*< \brief (USB_DEVICE_CTRLB) Test mode J /
mbed_official	579:53297373a894	145	#define USB_DEVICE_CTRLB_TSTJ (0x1ul << USB_DEVICE_CTRLB_TSTJ_Pos)
mbed_official	579:53297373a894	146	#define USB_DEVICE_CTRLB_TSTK_Pos 6 /*< \brief (USB_DEVICE_CTRLB) Test mode K /
mbed_official	579:53297373a894	147	#define USB_DEVICE_CTRLB_TSTK (0x1ul << USB_DEVICE_CTRLB_TSTK_Pos)
mbed_official	579:53297373a894	148	#define USB_DEVICE_CTRLB_TSTPCKT_Pos 7 /*< \brief (USB_DEVICE_CTRLB) Test packet mode /
mbed_official	579:53297373a894	149	#define USB_DEVICE_CTRLB_TSTPCKT (0x1ul << USB_DEVICE_CTRLB_TSTPCKT_Pos)
mbed_official	579:53297373a894	150	#define USB_DEVICE_CTRLB_OPMODE2_Pos 8 /*< \brief (USB_DEVICE_CTRLB) Specific Operational Mode /
mbed_official	579:53297373a894	151	#define USB_DEVICE_CTRLB_OPMODE2 (0x1ul << USB_DEVICE_CTRLB_OPMODE2_Pos)
mbed_official	579:53297373a894	152	#define USB_DEVICE_CTRLB_GNAK_Pos 9 /*< \brief (USB_DEVICE_CTRLB) Global NAK /
mbed_official	579:53297373a894	153	#define USB_DEVICE_CTRLB_GNAK (0x1ul << USB_DEVICE_CTRLB_GNAK_Pos)
mbed_official	579:53297373a894	154	#define USB_DEVICE_CTRLB_LPMHDSK_Pos 10 /*< \brief (USB_DEVICE_CTRLB) Link Power Management Handshake /
mbed_official	579:53297373a894	155	#define USB_DEVICE_CTRLB_LPMHDSK_Msk (0x3ul << USB_DEVICE_CTRLB_LPMHDSK_Pos)
mbed_official	579:53297373a894	156	#define USB_DEVICE_CTRLB_LPMHDSK(value) ((USB_DEVICE_CTRLB_LPMHDSK_Msk & ((value) << USB_DEVICE_CTRLB_LPMHDSK_Pos)))
mbed_official	579:53297373a894	157	#define USB_DEVICE_CTRLB_LPMHDSK_NO_Val 0x0ul /*< \brief (USB_DEVICE_CTRLB) No handshake. LPM is not supported /
mbed_official	579:53297373a894	158	#define USB_DEVICE_CTRLB_LPMHDSK_ACK_Val 0x1ul /*< \brief (USB_DEVICE_CTRLB) ACK /
mbed_official	579:53297373a894	159	#define USB_DEVICE_CTRLB_LPMHDSK_NYET_Val 0x2ul /*< \brief (USB_DEVICE_CTRLB) NYET /
mbed_official	579:53297373a894	160	#define USB_DEVICE_CTRLB_LPMHDSK_STALL_Val 0x3ul /*< \brief (USB_DEVICE_CTRLB) STALL /
mbed_official	579:53297373a894	161	#define USB_DEVICE_CTRLB_LPMHDSK_NO (USB_DEVICE_CTRLB_LPMHDSK_NO_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
mbed_official	579:53297373a894	162	#define USB_DEVICE_CTRLB_LPMHDSK_ACK (USB_DEVICE_CTRLB_LPMHDSK_ACK_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
mbed_official	579:53297373a894	163	#define USB_DEVICE_CTRLB_LPMHDSK_NYET (USB_DEVICE_CTRLB_LPMHDSK_NYET_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
mbed_official	579:53297373a894	164	#define USB_DEVICE_CTRLB_LPMHDSK_STALL (USB_DEVICE_CTRLB_LPMHDSK_STALL_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
mbed_official	579:53297373a894	165	#define USB_DEVICE_CTRLB_MASK 0x0FFFul /*< \brief (USB_DEVICE_CTRLB) MASK Register /
mbed_official	579:53297373a894	166
mbed_official	579:53297373a894	167	/* -------- USB_HOST_CTRLB : (USB Offset: 0x008) (R/W 16) HOST HOST Control B -------- */
mbed_official	579:53297373a894	168	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	169	typedef union {
mbed_official	579:53297373a894	170	struct {
mbed_official	579:53297373a894	171	uint16_t :1; /!< bit: 0 Reserved /
mbed_official	579:53297373a894	172	uint16_t RESUME:1; /!< bit: 1 Send USB Resume /
mbed_official	579:53297373a894	173	uint16_t SPDCONF:2; /!< bit: 2.. 3 Speed Configuration for Host /
mbed_official	579:53297373a894	174	uint16_t :1; /!< bit: 4 Reserved /
mbed_official	579:53297373a894	175	uint16_t TSTJ:1; /!< bit: 5 Test mode J /
mbed_official	579:53297373a894	176	uint16_t TSTK:1; /!< bit: 6 Test mode K /
mbed_official	579:53297373a894	177	uint16_t :1; /!< bit: 7 Reserved /
mbed_official	579:53297373a894	178	uint16_t SOFE:1; /!< bit: 8 Start of Frame Generation Enable /
mbed_official	579:53297373a894	179	uint16_t BUSRESET:1; /!< bit: 9 Send USB Reset /
mbed_official	579:53297373a894	180	uint16_t VBUSOK:1; /!< bit: 10 VBUS is OK /
mbed_official	579:53297373a894	181	uint16_t L1RESUME:1; /!< bit: 11 Send L1 Resume /
mbed_official	579:53297373a894	182	uint16_t :4; /!< bit: 12..15 Reserved /
mbed_official	579:53297373a894	183	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	184	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	185	} USB_HOST_CTRLB_Type;
mbed_official	579:53297373a894	186	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	187
mbed_official	579:53297373a894	188	#define USB_HOST_CTRLB_OFFSET 0x008 /*< \brief (USB_HOST_CTRLB offset) HOST Control B /
mbed_official	579:53297373a894	189	#define USB_HOST_CTRLB_RESETVALUE 0x0000ul /*< \brief (USB_HOST_CTRLB reset_value) HOST Control B /
mbed_official	579:53297373a894	190
mbed_official	579:53297373a894	191	#define USB_HOST_CTRLB_RESUME_Pos 1 /*< \brief (USB_HOST_CTRLB) Send USB Resume /
mbed_official	579:53297373a894	192	#define USB_HOST_CTRLB_RESUME (0x1ul << USB_HOST_CTRLB_RESUME_Pos)
mbed_official	579:53297373a894	193	#define USB_HOST_CTRLB_SPDCONF_Pos 2 /*< \brief (USB_HOST_CTRLB) Speed Configuration for Host /
mbed_official	579:53297373a894	194	#define USB_HOST_CTRLB_SPDCONF_Msk (0x3ul << USB_HOST_CTRLB_SPDCONF_Pos)
mbed_official	579:53297373a894	195	#define USB_HOST_CTRLB_SPDCONF(value) ((USB_HOST_CTRLB_SPDCONF_Msk & ((value) << USB_HOST_CTRLB_SPDCONF_Pos)))
mbed_official	579:53297373a894	196	#define USB_HOST_CTRLB_SPDCONF_NORMAL_Val 0x0ul /*< \brief (USB_HOST_CTRLB) Normal mode:the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheral is high-speed capable. /
mbed_official	579:53297373a894	197	#define USB_HOST_CTRLB_SPDCONF_FS_Val 0x3ul /*< \brief (USB_HOST_CTRLB) Full-speed:the host remains in full-speed mode whatever is the peripheral speed capability. Relevant in UTMI mode only. /
mbed_official	579:53297373a894	198	#define USB_HOST_CTRLB_SPDCONF_NORMAL (USB_HOST_CTRLB_SPDCONF_NORMAL_Val << USB_HOST_CTRLB_SPDCONF_Pos)
mbed_official	579:53297373a894	199	#define USB_HOST_CTRLB_SPDCONF_FS (USB_HOST_CTRLB_SPDCONF_FS_Val << USB_HOST_CTRLB_SPDCONF_Pos)
mbed_official	579:53297373a894	200	#define USB_HOST_CTRLB_TSTJ_Pos 5 /*< \brief (USB_HOST_CTRLB) Test mode J /
mbed_official	579:53297373a894	201	#define USB_HOST_CTRLB_TSTJ (0x1ul << USB_HOST_CTRLB_TSTJ_Pos)
mbed_official	579:53297373a894	202	#define USB_HOST_CTRLB_TSTK_Pos 6 /*< \brief (USB_HOST_CTRLB) Test mode K /
mbed_official	579:53297373a894	203	#define USB_HOST_CTRLB_TSTK (0x1ul << USB_HOST_CTRLB_TSTK_Pos)
mbed_official	579:53297373a894	204	#define USB_HOST_CTRLB_SOFE_Pos 8 /*< \brief (USB_HOST_CTRLB) Start of Frame Generation Enable /
mbed_official	579:53297373a894	205	#define USB_HOST_CTRLB_SOFE (0x1ul << USB_HOST_CTRLB_SOFE_Pos)
mbed_official	579:53297373a894	206	#define USB_HOST_CTRLB_BUSRESET_Pos 9 /*< \brief (USB_HOST_CTRLB) Send USB Reset /
mbed_official	579:53297373a894	207	#define USB_HOST_CTRLB_BUSRESET (0x1ul << USB_HOST_CTRLB_BUSRESET_Pos)
mbed_official	579:53297373a894	208	#define USB_HOST_CTRLB_VBUSOK_Pos 10 /*< \brief (USB_HOST_CTRLB) VBUS is OK /
mbed_official	579:53297373a894	209	#define USB_HOST_CTRLB_VBUSOK (0x1ul << USB_HOST_CTRLB_VBUSOK_Pos)
mbed_official	579:53297373a894	210	#define USB_HOST_CTRLB_L1RESUME_Pos 11 /*< \brief (USB_HOST_CTRLB) Send L1 Resume /
mbed_official	579:53297373a894	211	#define USB_HOST_CTRLB_L1RESUME (0x1ul << USB_HOST_CTRLB_L1RESUME_Pos)
mbed_official	579:53297373a894	212	#define USB_HOST_CTRLB_MASK 0x0F6Eul /*< \brief (USB_HOST_CTRLB) MASK Register /
mbed_official	579:53297373a894	213
mbed_official	579:53297373a894	214	/* -------- USB_DEVICE_DADD : (USB Offset: 0x00A) (R/W 8) DEVICE DEVICE Device Address -------- */
mbed_official	579:53297373a894	215	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	216	typedef union {
mbed_official	579:53297373a894	217	struct {
mbed_official	579:53297373a894	218	uint8_t DADD:7; /!< bit: 0.. 6 Device Address /
mbed_official	579:53297373a894	219	uint8_t ADDEN:1; /!< bit: 7 Device Address Enable /
mbed_official	579:53297373a894	220	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	221	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	222	} USB_DEVICE_DADD_Type;
mbed_official	579:53297373a894	223	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	224
mbed_official	579:53297373a894	225	#define USB_DEVICE_DADD_OFFSET 0x00A /*< \brief (USB_DEVICE_DADD offset) DEVICE Device Address /
mbed_official	579:53297373a894	226	#define USB_DEVICE_DADD_RESETVALUE 0x00ul /*< \brief (USB_DEVICE_DADD reset_value) DEVICE Device Address /
mbed_official	579:53297373a894	227
mbed_official	579:53297373a894	228	#define USB_DEVICE_DADD_DADD_Pos 0 /*< \brief (USB_DEVICE_DADD) Device Address /
mbed_official	579:53297373a894	229	#define USB_DEVICE_DADD_DADD_Msk (0x7Ful << USB_DEVICE_DADD_DADD_Pos)
mbed_official	579:53297373a894	230	#define USB_DEVICE_DADD_DADD(value) ((USB_DEVICE_DADD_DADD_Msk & ((value) << USB_DEVICE_DADD_DADD_Pos)))
mbed_official	579:53297373a894	231	#define USB_DEVICE_DADD_ADDEN_Pos 7 /*< \brief (USB_DEVICE_DADD) Device Address Enable /
mbed_official	579:53297373a894	232	#define USB_DEVICE_DADD_ADDEN (0x1ul << USB_DEVICE_DADD_ADDEN_Pos)
mbed_official	579:53297373a894	233	#define USB_DEVICE_DADD_MASK 0xFFul /*< \brief (USB_DEVICE_DADD) MASK Register /
mbed_official	579:53297373a894	234
mbed_official	579:53297373a894	235	/* -------- USB_HOST_HSOFC : (USB Offset: 0x00A) (R/W 8) HOST HOST Host Start Of Frame Control -------- */
mbed_official	579:53297373a894	236	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	237	typedef union {
mbed_official	579:53297373a894	238	struct {
mbed_official	579:53297373a894	239	uint8_t FLENC:4; /!< bit: 0.. 3 Frame Length Control /
mbed_official	579:53297373a894	240	uint8_t :3; /!< bit: 4.. 6 Reserved /
mbed_official	579:53297373a894	241	uint8_t FLENCE:1; /!< bit: 7 Frame Length Control Enable /
mbed_official	579:53297373a894	242	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	243	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	244	} USB_HOST_HSOFC_Type;
mbed_official	579:53297373a894	245	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	246
mbed_official	579:53297373a894	247	#define USB_HOST_HSOFC_OFFSET 0x00A /*< \brief (USB_HOST_HSOFC offset) HOST Host Start Of Frame Control /
mbed_official	579:53297373a894	248	#define USB_HOST_HSOFC_RESETVALUE 0x00ul /*< \brief (USB_HOST_HSOFC reset_value) HOST Host Start Of Frame Control /
mbed_official	579:53297373a894	249
mbed_official	579:53297373a894	250	#define USB_HOST_HSOFC_FLENC_Pos 0 /*< \brief (USB_HOST_HSOFC) Frame Length Control /
mbed_official	579:53297373a894	251	#define USB_HOST_HSOFC_FLENC_Msk (0xFul << USB_HOST_HSOFC_FLENC_Pos)
mbed_official	579:53297373a894	252	#define USB_HOST_HSOFC_FLENC(value) ((USB_HOST_HSOFC_FLENC_Msk & ((value) << USB_HOST_HSOFC_FLENC_Pos)))
mbed_official	579:53297373a894	253	#define USB_HOST_HSOFC_FLENCE_Pos 7 /*< \brief (USB_HOST_HSOFC) Frame Length Control Enable /
mbed_official	579:53297373a894	254	#define USB_HOST_HSOFC_FLENCE (0x1ul << USB_HOST_HSOFC_FLENCE_Pos)
mbed_official	579:53297373a894	255	#define USB_HOST_HSOFC_MASK 0x8Ful /*< \brief (USB_HOST_HSOFC) MASK Register /
mbed_official	579:53297373a894	256
mbed_official	579:53297373a894	257	/* -------- USB_DEVICE_STATUS : (USB Offset: 0x00C) (R/ 8) DEVICE DEVICE Status -------- */
mbed_official	579:53297373a894	258	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	259	typedef union {
mbed_official	579:53297373a894	260	struct {
mbed_official	579:53297373a894	261	uint8_t :2; /!< bit: 0.. 1 Reserved /
mbed_official	579:53297373a894	262	uint8_t SPEED:2; /!< bit: 2.. 3 Speed Status /
mbed_official	579:53297373a894	263	uint8_t :2; /!< bit: 4.. 5 Reserved /
mbed_official	579:53297373a894	264	uint8_t LINESTATE:2; /!< bit: 6.. 7 USB Line State Status /
mbed_official	579:53297373a894	265	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	266	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	267	} USB_DEVICE_STATUS_Type;
mbed_official	579:53297373a894	268	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	269
mbed_official	579:53297373a894	270	#define USB_DEVICE_STATUS_OFFSET 0x00C /*< \brief (USB_DEVICE_STATUS offset) DEVICE Status /
mbed_official	579:53297373a894	271	#define USB_DEVICE_STATUS_RESETVALUE 0x40ul /*< \brief (USB_DEVICE_STATUS reset_value) DEVICE Status /
mbed_official	579:53297373a894	272
mbed_official	579:53297373a894	273	#define USB_DEVICE_STATUS_SPEED_Pos 2 /*< \brief (USB_DEVICE_STATUS) Speed Status /
mbed_official	579:53297373a894	274	#define USB_DEVICE_STATUS_SPEED_Msk (0x3ul << USB_DEVICE_STATUS_SPEED_Pos)
mbed_official	579:53297373a894	275	#define USB_DEVICE_STATUS_SPEED(value) ((USB_DEVICE_STATUS_SPEED_Msk & ((value) << USB_DEVICE_STATUS_SPEED_Pos)))
mbed_official	579:53297373a894	276	#define USB_DEVICE_STATUS_SPEED_FS_Val 0x0ul /*< \brief (USB_DEVICE_STATUS) Full-speed mode /
mbed_official	579:53297373a894	277	#define USB_DEVICE_STATUS_SPEED_HS_Val 0x1ul /*< \brief (USB_DEVICE_STATUS) High-speed mode /
mbed_official	579:53297373a894	278	#define USB_DEVICE_STATUS_SPEED_LS_Val 0x2ul /*< \brief (USB_DEVICE_STATUS) Low-speed mode /
mbed_official	579:53297373a894	279	#define USB_DEVICE_STATUS_SPEED_FS (USB_DEVICE_STATUS_SPEED_FS_Val << USB_DEVICE_STATUS_SPEED_Pos)
mbed_official	579:53297373a894	280	#define USB_DEVICE_STATUS_SPEED_HS (USB_DEVICE_STATUS_SPEED_HS_Val << USB_DEVICE_STATUS_SPEED_Pos)
mbed_official	579:53297373a894	281	#define USB_DEVICE_STATUS_SPEED_LS (USB_DEVICE_STATUS_SPEED_LS_Val << USB_DEVICE_STATUS_SPEED_Pos)
mbed_official	579:53297373a894	282	#define USB_DEVICE_STATUS_LINESTATE_Pos 6 /*< \brief (USB_DEVICE_STATUS) USB Line State Status /
mbed_official	579:53297373a894	283	#define USB_DEVICE_STATUS_LINESTATE_Msk (0x3ul << USB_DEVICE_STATUS_LINESTATE_Pos)
mbed_official	579:53297373a894	284	#define USB_DEVICE_STATUS_LINESTATE(value) ((USB_DEVICE_STATUS_LINESTATE_Msk & ((value) << USB_DEVICE_STATUS_LINESTATE_Pos)))
mbed_official	579:53297373a894	285	#define USB_DEVICE_STATUS_LINESTATE_0_Val 0x0ul /*< \brief (USB_DEVICE_STATUS) SE0/RESET /
mbed_official	579:53297373a894	286	#define USB_DEVICE_STATUS_LINESTATE_1_Val 0x1ul /*< \brief (USB_DEVICE_STATUS) FS-J or LS-K State /
mbed_official	579:53297373a894	287	#define USB_DEVICE_STATUS_LINESTATE_2_Val 0x2ul /*< \brief (USB_DEVICE_STATUS) FS-K or LS-J State /
mbed_official	579:53297373a894	288	#define USB_DEVICE_STATUS_LINESTATE_0 (USB_DEVICE_STATUS_LINESTATE_0_Val << USB_DEVICE_STATUS_LINESTATE_Pos)
mbed_official	579:53297373a894	289	#define USB_DEVICE_STATUS_LINESTATE_1 (USB_DEVICE_STATUS_LINESTATE_1_Val << USB_DEVICE_STATUS_LINESTATE_Pos)
mbed_official	579:53297373a894	290	#define USB_DEVICE_STATUS_LINESTATE_2 (USB_DEVICE_STATUS_LINESTATE_2_Val << USB_DEVICE_STATUS_LINESTATE_Pos)
mbed_official	579:53297373a894	291	#define USB_DEVICE_STATUS_MASK 0xCCul /*< \brief (USB_DEVICE_STATUS) MASK Register /
mbed_official	579:53297373a894	292
mbed_official	579:53297373a894	293	/* -------- USB_HOST_STATUS : (USB Offset: 0x00C) (R/W 8) HOST HOST Status -------- */
mbed_official	579:53297373a894	294	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	295	typedef union {
mbed_official	579:53297373a894	296	struct {
mbed_official	579:53297373a894	297	uint8_t :2; /!< bit: 0.. 1 Reserved /
mbed_official	579:53297373a894	298	uint8_t SPEED:2; /!< bit: 2.. 3 Speed Status /
mbed_official	579:53297373a894	299	uint8_t :2; /!< bit: 4.. 5 Reserved /
mbed_official	579:53297373a894	300	uint8_t LINESTATE:2; /!< bit: 6.. 7 USB Line State Status /
mbed_official	579:53297373a894	301	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	302	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	303	} USB_HOST_STATUS_Type;
mbed_official	579:53297373a894	304	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	305
mbed_official	579:53297373a894	306	#define USB_HOST_STATUS_OFFSET 0x00C /*< \brief (USB_HOST_STATUS offset) HOST Status /
mbed_official	579:53297373a894	307	#define USB_HOST_STATUS_RESETVALUE 0x00ul /*< \brief (USB_HOST_STATUS reset_value) HOST Status /
mbed_official	579:53297373a894	308
mbed_official	579:53297373a894	309	#define USB_HOST_STATUS_SPEED_Pos 2 /*< \brief (USB_HOST_STATUS) Speed Status /
mbed_official	579:53297373a894	310	#define USB_HOST_STATUS_SPEED_Msk (0x3ul << USB_HOST_STATUS_SPEED_Pos)
mbed_official	579:53297373a894	311	#define USB_HOST_STATUS_SPEED(value) ((USB_HOST_STATUS_SPEED_Msk & ((value) << USB_HOST_STATUS_SPEED_Pos)))
mbed_official	579:53297373a894	312	#define USB_HOST_STATUS_LINESTATE_Pos 6 /*< \brief (USB_HOST_STATUS) USB Line State Status /
mbed_official	579:53297373a894	313	#define USB_HOST_STATUS_LINESTATE_Msk (0x3ul << USB_HOST_STATUS_LINESTATE_Pos)
mbed_official	579:53297373a894	314	#define USB_HOST_STATUS_LINESTATE(value) ((USB_HOST_STATUS_LINESTATE_Msk & ((value) << USB_HOST_STATUS_LINESTATE_Pos)))
mbed_official	579:53297373a894	315	#define USB_HOST_STATUS_MASK 0xCCul /*< \brief (USB_HOST_STATUS) MASK Register /
mbed_official	579:53297373a894	316
mbed_official	579:53297373a894	317	/* -------- USB_FSMSTATUS : (USB Offset: 0x00D) (R/ 8) Finite State Machine Status -------- */
mbed_official	579:53297373a894	318	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	319	typedef union {
mbed_official	579:53297373a894	320	struct {
mbed_official	579:53297373a894	321	uint8_t FSMSTATE:6; /!< bit: 0.. 5 Fine State Machine Status /
mbed_official	579:53297373a894	322	uint8_t :2; /!< bit: 6.. 7 Reserved /
mbed_official	579:53297373a894	323	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	324	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	325	} USB_FSMSTATUS_Type;
mbed_official	579:53297373a894	326	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	327
mbed_official	579:53297373a894	328	#define USB_FSMSTATUS_OFFSET 0x00D /*< \brief (USB_FSMSTATUS offset) Finite State Machine Status /
mbed_official	579:53297373a894	329	#define USB_FSMSTATUS_RESETVALUE 0x01ul /*< \brief (USB_FSMSTATUS reset_value) Finite State Machine Status /
mbed_official	579:53297373a894	330
mbed_official	579:53297373a894	331	#define USB_FSMSTATUS_FSMSTATE_Pos 0 /*< \brief (USB_FSMSTATUS) Fine State Machine Status /
mbed_official	579:53297373a894	332	#define USB_FSMSTATUS_FSMSTATE_Msk (0x3Ful << USB_FSMSTATUS_FSMSTATE_Pos)
mbed_official	579:53297373a894	333	#define USB_FSMSTATUS_FSMSTATE(value) ((USB_FSMSTATUS_FSMSTATE_Msk & ((value) << USB_FSMSTATUS_FSMSTATE_Pos)))
mbed_official	579:53297373a894	334	#define USB_FSMSTATUS_FSMSTATE_OFF_Val 0x1ul /*< \brief (USB_FSMSTATUS) OFF (L3). It corresponds to the powered-off, disconnected, and disabled state /
mbed_official	579:53297373a894	335	#define USB_FSMSTATUS_FSMSTATE_ON_Val 0x2ul /*< \brief (USB_FSMSTATUS) ON (L0). It corresponds to the Idle and Active states /
mbed_official	579:53297373a894	336	#define USB_FSMSTATUS_FSMSTATE_SUSPEND_Val 0x4ul /*< \brief (USB_FSMSTATUS) SUSPEND (L2) /
mbed_official	579:53297373a894	337	#define USB_FSMSTATUS_FSMSTATE_SLEEP_Val 0x8ul /*< \brief (USB_FSMSTATUS) SLEEP (L1) /
mbed_official	579:53297373a894	338	#define USB_FSMSTATUS_FSMSTATE_DNRESUME_Val 0x10ul /*< \brief (USB_FSMSTATUS) DNRESUME. Down Stream Resume. /
mbed_official	579:53297373a894	339	#define USB_FSMSTATUS_FSMSTATE_UPRESUME_Val 0x20ul /*< \brief (USB_FSMSTATUS) UPRESUME. Up Stream Resume. /
mbed_official	579:53297373a894	340	#define USB_FSMSTATUS_FSMSTATE_RESET_Val 0x40ul /*< \brief (USB_FSMSTATUS) RESET. USB lines Reset. /
mbed_official	579:53297373a894	341	#define USB_FSMSTATUS_FSMSTATE_OFF (USB_FSMSTATUS_FSMSTATE_OFF_Val << USB_FSMSTATUS_FSMSTATE_Pos)
mbed_official	579:53297373a894	342	#define USB_FSMSTATUS_FSMSTATE_ON (USB_FSMSTATUS_FSMSTATE_ON_Val << USB_FSMSTATUS_FSMSTATE_Pos)
mbed_official	579:53297373a894	343	#define USB_FSMSTATUS_FSMSTATE_SUSPEND (USB_FSMSTATUS_FSMSTATE_SUSPEND_Val << USB_FSMSTATUS_FSMSTATE_Pos)
mbed_official	579:53297373a894	344	#define USB_FSMSTATUS_FSMSTATE_SLEEP (USB_FSMSTATUS_FSMSTATE_SLEEP_Val << USB_FSMSTATUS_FSMSTATE_Pos)
mbed_official	579:53297373a894	345	#define USB_FSMSTATUS_FSMSTATE_DNRESUME (USB_FSMSTATUS_FSMSTATE_DNRESUME_Val << USB_FSMSTATUS_FSMSTATE_Pos)
mbed_official	579:53297373a894	346	#define USB_FSMSTATUS_FSMSTATE_UPRESUME (USB_FSMSTATUS_FSMSTATE_UPRESUME_Val << USB_FSMSTATUS_FSMSTATE_Pos)
mbed_official	579:53297373a894	347	#define USB_FSMSTATUS_FSMSTATE_RESET (USB_FSMSTATUS_FSMSTATE_RESET_Val << USB_FSMSTATUS_FSMSTATE_Pos)
mbed_official	579:53297373a894	348	#define USB_FSMSTATUS_MASK 0x3Ful /*< \brief (USB_FSMSTATUS) MASK Register /
mbed_official	579:53297373a894	349
mbed_official	579:53297373a894	350	/* -------- USB_DEVICE_FNUM : (USB Offset: 0x010) (R/ 16) DEVICE DEVICE Device Frame Number -------- */
mbed_official	579:53297373a894	351	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	352	typedef union {
mbed_official	579:53297373a894	353	struct {
mbed_official	579:53297373a894	354	uint16_t MFNUM:3; /!< bit: 0.. 2 Micro Frame Number /
mbed_official	579:53297373a894	355	uint16_t FNUM:11; /!< bit: 3..13 Frame Number /
mbed_official	579:53297373a894	356	uint16_t :1; /!< bit: 14 Reserved /
mbed_official	579:53297373a894	357	uint16_t FNCERR:1; /!< bit: 15 Frame Number CRC Error /
mbed_official	579:53297373a894	358	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	359	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	360	} USB_DEVICE_FNUM_Type;
mbed_official	579:53297373a894	361	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	362
mbed_official	579:53297373a894	363	#define USB_DEVICE_FNUM_OFFSET 0x010 /*< \brief (USB_DEVICE_FNUM offset) DEVICE Device Frame Number /
mbed_official	579:53297373a894	364	#define USB_DEVICE_FNUM_RESETVALUE 0x0000ul /*< \brief (USB_DEVICE_FNUM reset_value) DEVICE Device Frame Number /
mbed_official	579:53297373a894	365
mbed_official	579:53297373a894	366	#define USB_DEVICE_FNUM_MFNUM_Pos 0 /*< \brief (USB_DEVICE_FNUM) Micro Frame Number /
mbed_official	579:53297373a894	367	#define USB_DEVICE_FNUM_MFNUM_Msk (0x7ul << USB_DEVICE_FNUM_MFNUM_Pos)
mbed_official	579:53297373a894	368	#define USB_DEVICE_FNUM_MFNUM(value) ((USB_DEVICE_FNUM_MFNUM_Msk & ((value) << USB_DEVICE_FNUM_MFNUM_Pos)))
mbed_official	579:53297373a894	369	#define USB_DEVICE_FNUM_FNUM_Pos 3 /*< \brief (USB_DEVICE_FNUM) Frame Number /
mbed_official	579:53297373a894	370	#define USB_DEVICE_FNUM_FNUM_Msk (0x7FFul << USB_DEVICE_FNUM_FNUM_Pos)
mbed_official	579:53297373a894	371	#define USB_DEVICE_FNUM_FNUM(value) ((USB_DEVICE_FNUM_FNUM_Msk & ((value) << USB_DEVICE_FNUM_FNUM_Pos)))
mbed_official	579:53297373a894	372	#define USB_DEVICE_FNUM_FNCERR_Pos 15 /*< \brief (USB_DEVICE_FNUM) Frame Number CRC Error /
mbed_official	579:53297373a894	373	#define USB_DEVICE_FNUM_FNCERR (0x1ul << USB_DEVICE_FNUM_FNCERR_Pos)
mbed_official	579:53297373a894	374	#define USB_DEVICE_FNUM_MASK 0xBFFFul /*< \brief (USB_DEVICE_FNUM) MASK Register /
mbed_official	579:53297373a894	375
mbed_official	579:53297373a894	376	/* -------- USB_HOST_FNUM : (USB Offset: 0x010) (R/W 16) HOST HOST Host Frame Number -------- */
mbed_official	579:53297373a894	377	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	378	typedef union {
mbed_official	579:53297373a894	379	struct {
mbed_official	579:53297373a894	380	uint16_t MFNUM:3; /!< bit: 0.. 2 Micro Frame Number /
mbed_official	579:53297373a894	381	uint16_t FNUM:11; /!< bit: 3..13 Frame Number /
mbed_official	579:53297373a894	382	uint16_t :2; /!< bit: 14..15 Reserved /
mbed_official	579:53297373a894	383	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	384	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	385	} USB_HOST_FNUM_Type;
mbed_official	579:53297373a894	386	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	387
mbed_official	579:53297373a894	388	#define USB_HOST_FNUM_OFFSET 0x010 /*< \brief (USB_HOST_FNUM offset) HOST Host Frame Number /
mbed_official	579:53297373a894	389	#define USB_HOST_FNUM_RESETVALUE 0x0000ul /*< \brief (USB_HOST_FNUM reset_value) HOST Host Frame Number /
mbed_official	579:53297373a894	390
mbed_official	579:53297373a894	391	#define USB_HOST_FNUM_MFNUM_Pos 0 /*< \brief (USB_HOST_FNUM) Micro Frame Number /
mbed_official	579:53297373a894	392	#define USB_HOST_FNUM_MFNUM_Msk (0x7ul << USB_HOST_FNUM_MFNUM_Pos)
mbed_official	579:53297373a894	393	#define USB_HOST_FNUM_MFNUM(value) ((USB_HOST_FNUM_MFNUM_Msk & ((value) << USB_HOST_FNUM_MFNUM_Pos)))
mbed_official	579:53297373a894	394	#define USB_HOST_FNUM_FNUM_Pos 3 /*< \brief (USB_HOST_FNUM) Frame Number /
mbed_official	579:53297373a894	395	#define USB_HOST_FNUM_FNUM_Msk (0x7FFul << USB_HOST_FNUM_FNUM_Pos)
mbed_official	579:53297373a894	396	#define USB_HOST_FNUM_FNUM(value) ((USB_HOST_FNUM_FNUM_Msk & ((value) << USB_HOST_FNUM_FNUM_Pos)))
mbed_official	579:53297373a894	397	#define USB_HOST_FNUM_MASK 0x3FFFul /*< \brief (USB_HOST_FNUM) MASK Register /
mbed_official	579:53297373a894	398
mbed_official	579:53297373a894	399	/* -------- USB_HOST_FLENHIGH : (USB Offset: 0x012) (R/ 8) HOST HOST Host Frame Length -------- */
mbed_official	579:53297373a894	400	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	401	typedef union {
mbed_official	579:53297373a894	402	struct {
mbed_official	579:53297373a894	403	uint8_t FLENHIGH:8; /!< bit: 0.. 7 Frame Length /
mbed_official	579:53297373a894	404	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	405	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	406	} USB_HOST_FLENHIGH_Type;
mbed_official	579:53297373a894	407	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	408
mbed_official	579:53297373a894	409	#define USB_HOST_FLENHIGH_OFFSET 0x012 /*< \brief (USB_HOST_FLENHIGH offset) HOST Host Frame Length /
mbed_official	579:53297373a894	410	#define USB_HOST_FLENHIGH_RESETVALUE 0x00ul /*< \brief (USB_HOST_FLENHIGH reset_value) HOST Host Frame Length /
mbed_official	579:53297373a894	411
mbed_official	579:53297373a894	412	#define USB_HOST_FLENHIGH_FLENHIGH_Pos 0 /*< \brief (USB_HOST_FLENHIGH) Frame Length /
mbed_official	579:53297373a894	413	#define USB_HOST_FLENHIGH_FLENHIGH_Msk (0xFFul << USB_HOST_FLENHIGH_FLENHIGH_Pos)
mbed_official	579:53297373a894	414	#define USB_HOST_FLENHIGH_FLENHIGH(value) ((USB_HOST_FLENHIGH_FLENHIGH_Msk & ((value) << USB_HOST_FLENHIGH_FLENHIGH_Pos)))
mbed_official	579:53297373a894	415	#define USB_HOST_FLENHIGH_MASK 0xFFul /*< \brief (USB_HOST_FLENHIGH) MASK Register /
mbed_official	579:53297373a894	416
mbed_official	579:53297373a894	417	/* -------- USB_DEVICE_INTENCLR : (USB Offset: 0x014) (R/W 16) DEVICE DEVICE Device Interrupt Enable Clear -------- */
mbed_official	579:53297373a894	418	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	419	typedef union {
mbed_official	579:53297373a894	420	struct {
mbed_official	579:53297373a894	421	uint16_t SUSPEND:1; /!< bit: 0 Suspend Interrupt Enable /
mbed_official	579:53297373a894	422	uint16_t MSOF:1; /!< bit: 1 Micro Start of Frame Interrupt Enable in High Speed Mode /
mbed_official	579:53297373a894	423	uint16_t SOF:1; /!< bit: 2 Start Of Frame Interrupt Enable /
mbed_official	579:53297373a894	424	uint16_t EORST:1; /!< bit: 3 End of Reset Interrupt Enable /
mbed_official	579:53297373a894	425	uint16_t WAKEUP:1; /!< bit: 4 Wake Up Interrupt Enable /
mbed_official	579:53297373a894	426	uint16_t EORSM:1; /!< bit: 5 End Of Resume Interrupt Enable /
mbed_official	579:53297373a894	427	uint16_t UPRSM:1; /!< bit: 6 Upstream Resume Interrupt Enable /
mbed_official	579:53297373a894	428	uint16_t RAMACER:1; /!< bit: 7 Ram Access Interrupt Enable /
mbed_official	579:53297373a894	429	uint16_t LPMNYET:1; /!< bit: 8 Link Power Management Not Yet Interrupt Enable /
mbed_official	579:53297373a894	430	uint16_t LPMSUSP:1; /!< bit: 9 Link Power Management Suspend Interrupt Enable /
mbed_official	579:53297373a894	431	uint16_t :6; /!< bit: 10..15 Reserved /
mbed_official	579:53297373a894	432	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	433	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	434	} USB_DEVICE_INTENCLR_Type;
mbed_official	579:53297373a894	435	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	436
mbed_official	579:53297373a894	437	#define USB_DEVICE_INTENCLR_OFFSET 0x014 /*< \brief (USB_DEVICE_INTENCLR offset) DEVICE Device Interrupt Enable Clear /
mbed_official	579:53297373a894	438	#define USB_DEVICE_INTENCLR_RESETVALUE 0x0000ul /*< \brief (USB_DEVICE_INTENCLR reset_value) DEVICE Device Interrupt Enable Clear /
mbed_official	579:53297373a894	439
mbed_official	579:53297373a894	440	#define USB_DEVICE_INTENCLR_SUSPEND_Pos 0 /*< \brief (USB_DEVICE_INTENCLR) Suspend Interrupt Enable /
mbed_official	579:53297373a894	441	#define USB_DEVICE_INTENCLR_SUSPEND (0x1ul << USB_DEVICE_INTENCLR_SUSPEND_Pos)
mbed_official	579:53297373a894	442	#define USB_DEVICE_INTENCLR_MSOF_Pos 1 /*< \brief (USB_DEVICE_INTENCLR) Micro Start of Frame Interrupt Enable in High Speed Mode /
mbed_official	579:53297373a894	443	#define USB_DEVICE_INTENCLR_MSOF (0x1ul << USB_DEVICE_INTENCLR_MSOF_Pos)
mbed_official	579:53297373a894	444	#define USB_DEVICE_INTENCLR_SOF_Pos 2 /*< \brief (USB_DEVICE_INTENCLR) Start Of Frame Interrupt Enable /
mbed_official	579:53297373a894	445	#define USB_DEVICE_INTENCLR_SOF (0x1ul << USB_DEVICE_INTENCLR_SOF_Pos)
mbed_official	579:53297373a894	446	#define USB_DEVICE_INTENCLR_EORST_Pos 3 /*< \brief (USB_DEVICE_INTENCLR) End of Reset Interrupt Enable /
mbed_official	579:53297373a894	447	#define USB_DEVICE_INTENCLR_EORST (0x1ul << USB_DEVICE_INTENCLR_EORST_Pos)
mbed_official	579:53297373a894	448	#define USB_DEVICE_INTENCLR_WAKEUP_Pos 4 /*< \brief (USB_DEVICE_INTENCLR) Wake Up Interrupt Enable /
mbed_official	579:53297373a894	449	#define USB_DEVICE_INTENCLR_WAKEUP (0x1ul << USB_DEVICE_INTENCLR_WAKEUP_Pos)
mbed_official	579:53297373a894	450	#define USB_DEVICE_INTENCLR_EORSM_Pos 5 /*< \brief (USB_DEVICE_INTENCLR) End Of Resume Interrupt Enable /
mbed_official	579:53297373a894	451	#define USB_DEVICE_INTENCLR_EORSM (0x1ul << USB_DEVICE_INTENCLR_EORSM_Pos)
mbed_official	579:53297373a894	452	#define USB_DEVICE_INTENCLR_UPRSM_Pos 6 /*< \brief (USB_DEVICE_INTENCLR) Upstream Resume Interrupt Enable /
mbed_official	579:53297373a894	453	#define USB_DEVICE_INTENCLR_UPRSM (0x1ul << USB_DEVICE_INTENCLR_UPRSM_Pos)
mbed_official	579:53297373a894	454	#define USB_DEVICE_INTENCLR_RAMACER_Pos 7 /*< \brief (USB_DEVICE_INTENCLR) Ram Access Interrupt Enable /
mbed_official	579:53297373a894	455	#define USB_DEVICE_INTENCLR_RAMACER (0x1ul << USB_DEVICE_INTENCLR_RAMACER_Pos)
mbed_official	579:53297373a894	456	#define USB_DEVICE_INTENCLR_LPMNYET_Pos 8 /*< \brief (USB_DEVICE_INTENCLR) Link Power Management Not Yet Interrupt Enable /
mbed_official	579:53297373a894	457	#define USB_DEVICE_INTENCLR_LPMNYET (0x1ul << USB_DEVICE_INTENCLR_LPMNYET_Pos)
mbed_official	579:53297373a894	458	#define USB_DEVICE_INTENCLR_LPMSUSP_Pos 9 /*< \brief (USB_DEVICE_INTENCLR) Link Power Management Suspend Interrupt Enable /
mbed_official	579:53297373a894	459	#define USB_DEVICE_INTENCLR_LPMSUSP (0x1ul << USB_DEVICE_INTENCLR_LPMSUSP_Pos)
mbed_official	579:53297373a894	460	#define USB_DEVICE_INTENCLR_MASK 0x03FFul /*< \brief (USB_DEVICE_INTENCLR) MASK Register /
mbed_official	579:53297373a894	461
mbed_official	579:53297373a894	462	/* -------- USB_HOST_INTENCLR : (USB Offset: 0x014) (R/W 16) HOST HOST Host Interrupt Enable Clear -------- */
mbed_official	579:53297373a894	463	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	464	typedef union {
mbed_official	579:53297373a894	465	struct {
mbed_official	579:53297373a894	466	uint16_t :2; /!< bit: 0.. 1 Reserved /
mbed_official	579:53297373a894	467	uint16_t HSOF:1; /!< bit: 2 Host Start Of Frame Interrupt Disable /
mbed_official	579:53297373a894	468	uint16_t RST:1; /!< bit: 3 BUS Reset Interrupt Disable /
mbed_official	579:53297373a894	469	uint16_t WAKEUP:1; /!< bit: 4 Wake Up Interrupt Disable /
mbed_official	579:53297373a894	470	uint16_t DNRSM:1; /!< bit: 5 DownStream to Device Interrupt Disable /
mbed_official	579:53297373a894	471	uint16_t UPRSM:1; /!< bit: 6 Upstream Resume from Device Interrupt Disable /
mbed_official	579:53297373a894	472	uint16_t RAMACER:1; /!< bit: 7 Ram Access Interrupt Disable /
mbed_official	579:53297373a894	473	uint16_t DCONN:1; /!< bit: 8 Device Connection Interrupt Disable /
mbed_official	579:53297373a894	474	uint16_t DDISC:1; /!< bit: 9 Device Disconnection Interrupt Disable /
mbed_official	579:53297373a894	475	uint16_t :6; /!< bit: 10..15 Reserved /
mbed_official	579:53297373a894	476	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	477	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	478	} USB_HOST_INTENCLR_Type;
mbed_official	579:53297373a894	479	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	480
mbed_official	579:53297373a894	481	#define USB_HOST_INTENCLR_OFFSET 0x014 /*< \brief (USB_HOST_INTENCLR offset) HOST Host Interrupt Enable Clear /
mbed_official	579:53297373a894	482	#define USB_HOST_INTENCLR_RESETVALUE 0x0000ul /*< \brief (USB_HOST_INTENCLR reset_value) HOST Host Interrupt Enable Clear /
mbed_official	579:53297373a894	483
mbed_official	579:53297373a894	484	#define USB_HOST_INTENCLR_HSOF_Pos 2 /*< \brief (USB_HOST_INTENCLR) Host Start Of Frame Interrupt Disable /
mbed_official	579:53297373a894	485	#define USB_HOST_INTENCLR_HSOF (0x1ul << USB_HOST_INTENCLR_HSOF_Pos)
mbed_official	579:53297373a894	486	#define USB_HOST_INTENCLR_RST_Pos 3 /*< \brief (USB_HOST_INTENCLR) BUS Reset Interrupt Disable /
mbed_official	579:53297373a894	487	#define USB_HOST_INTENCLR_RST (0x1ul << USB_HOST_INTENCLR_RST_Pos)
mbed_official	579:53297373a894	488	#define USB_HOST_INTENCLR_WAKEUP_Pos 4 /*< \brief (USB_HOST_INTENCLR) Wake Up Interrupt Disable /
mbed_official	579:53297373a894	489	#define USB_HOST_INTENCLR_WAKEUP (0x1ul << USB_HOST_INTENCLR_WAKEUP_Pos)
mbed_official	579:53297373a894	490	#define USB_HOST_INTENCLR_DNRSM_Pos 5 /*< \brief (USB_HOST_INTENCLR) DownStream to Device Interrupt Disable /
mbed_official	579:53297373a894	491	#define USB_HOST_INTENCLR_DNRSM (0x1ul << USB_HOST_INTENCLR_DNRSM_Pos)
mbed_official	579:53297373a894	492	#define USB_HOST_INTENCLR_UPRSM_Pos 6 /*< \brief (USB_HOST_INTENCLR) Upstream Resume from Device Interrupt Disable /
mbed_official	579:53297373a894	493	#define USB_HOST_INTENCLR_UPRSM (0x1ul << USB_HOST_INTENCLR_UPRSM_Pos)
mbed_official	579:53297373a894	494	#define USB_HOST_INTENCLR_RAMACER_Pos 7 /*< \brief (USB_HOST_INTENCLR) Ram Access Interrupt Disable /
mbed_official	579:53297373a894	495	#define USB_HOST_INTENCLR_RAMACER (0x1ul << USB_HOST_INTENCLR_RAMACER_Pos)
mbed_official	579:53297373a894	496	#define USB_HOST_INTENCLR_DCONN_Pos 8 /*< \brief (USB_HOST_INTENCLR) Device Connection Interrupt Disable /
mbed_official	579:53297373a894	497	#define USB_HOST_INTENCLR_DCONN (0x1ul << USB_HOST_INTENCLR_DCONN_Pos)
mbed_official	579:53297373a894	498	#define USB_HOST_INTENCLR_DDISC_Pos 9 /*< \brief (USB_HOST_INTENCLR) Device Disconnection Interrupt Disable /
mbed_official	579:53297373a894	499	#define USB_HOST_INTENCLR_DDISC (0x1ul << USB_HOST_INTENCLR_DDISC_Pos)
mbed_official	579:53297373a894	500	#define USB_HOST_INTENCLR_MASK 0x03FCul /*< \brief (USB_HOST_INTENCLR) MASK Register /
mbed_official	579:53297373a894	501
mbed_official	579:53297373a894	502	/* -------- USB_DEVICE_INTENSET : (USB Offset: 0x018) (R/W 16) DEVICE DEVICE Device Interrupt Enable Set -------- */
mbed_official	579:53297373a894	503	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	504	typedef union {
mbed_official	579:53297373a894	505	struct {
mbed_official	579:53297373a894	506	uint16_t SUSPEND:1; /!< bit: 0 Suspend Interrupt Enable /
mbed_official	579:53297373a894	507	uint16_t MSOF:1; /!< bit: 1 Micro Start of Frame Interrupt Enable in High Speed Mode /
mbed_official	579:53297373a894	508	uint16_t SOF:1; /!< bit: 2 Start Of Frame Interrupt Enable /
mbed_official	579:53297373a894	509	uint16_t EORST:1; /!< bit: 3 End of Reset Interrupt Enable /
mbed_official	579:53297373a894	510	uint16_t WAKEUP:1; /!< bit: 4 Wake Up Interrupt Enable /
mbed_official	579:53297373a894	511	uint16_t EORSM:1; /!< bit: 5 End Of Resume Interrupt Enable /
mbed_official	579:53297373a894	512	uint16_t UPRSM:1; /!< bit: 6 Upstream Resume Interrupt Enable /
mbed_official	579:53297373a894	513	uint16_t RAMACER:1; /!< bit: 7 Ram Access Interrupt Enable /
mbed_official	579:53297373a894	514	uint16_t LPMNYET:1; /!< bit: 8 Link Power Management Not Yet Interrupt Enable /
mbed_official	579:53297373a894	515	uint16_t LPMSUSP:1; /!< bit: 9 Link Power Management Suspend Interrupt Enable /
mbed_official	579:53297373a894	516	uint16_t :6; /!< bit: 10..15 Reserved /
mbed_official	579:53297373a894	517	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	518	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	519	} USB_DEVICE_INTENSET_Type;
mbed_official	579:53297373a894	520	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	521
mbed_official	579:53297373a894	522	#define USB_DEVICE_INTENSET_OFFSET 0x018 /*< \brief (USB_DEVICE_INTENSET offset) DEVICE Device Interrupt Enable Set /
mbed_official	579:53297373a894	523	#define USB_DEVICE_INTENSET_RESETVALUE 0x0000ul /*< \brief (USB_DEVICE_INTENSET reset_value) DEVICE Device Interrupt Enable Set /
mbed_official	579:53297373a894	524
mbed_official	579:53297373a894	525	#define USB_DEVICE_INTENSET_SUSPEND_Pos 0 /*< \brief (USB_DEVICE_INTENSET) Suspend Interrupt Enable /
mbed_official	579:53297373a894	526	#define USB_DEVICE_INTENSET_SUSPEND (0x1ul << USB_DEVICE_INTENSET_SUSPEND_Pos)
mbed_official	579:53297373a894	527	#define USB_DEVICE_INTENSET_MSOF_Pos 1 /*< \brief (USB_DEVICE_INTENSET) Micro Start of Frame Interrupt Enable in High Speed Mode /
mbed_official	579:53297373a894	528	#define USB_DEVICE_INTENSET_MSOF (0x1ul << USB_DEVICE_INTENSET_MSOF_Pos)
mbed_official	579:53297373a894	529	#define USB_DEVICE_INTENSET_SOF_Pos 2 /*< \brief (USB_DEVICE_INTENSET) Start Of Frame Interrupt Enable /
mbed_official	579:53297373a894	530	#define USB_DEVICE_INTENSET_SOF (0x1ul << USB_DEVICE_INTENSET_SOF_Pos)
mbed_official	579:53297373a894	531	#define USB_DEVICE_INTENSET_EORST_Pos 3 /*< \brief (USB_DEVICE_INTENSET) End of Reset Interrupt Enable /
mbed_official	579:53297373a894	532	#define USB_DEVICE_INTENSET_EORST (0x1ul << USB_DEVICE_INTENSET_EORST_Pos)
mbed_official	579:53297373a894	533	#define USB_DEVICE_INTENSET_WAKEUP_Pos 4 /*< \brief (USB_DEVICE_INTENSET) Wake Up Interrupt Enable /
mbed_official	579:53297373a894	534	#define USB_DEVICE_INTENSET_WAKEUP (0x1ul << USB_DEVICE_INTENSET_WAKEUP_Pos)
mbed_official	579:53297373a894	535	#define USB_DEVICE_INTENSET_EORSM_Pos 5 /*< \brief (USB_DEVICE_INTENSET) End Of Resume Interrupt Enable /
mbed_official	579:53297373a894	536	#define USB_DEVICE_INTENSET_EORSM (0x1ul << USB_DEVICE_INTENSET_EORSM_Pos)
mbed_official	579:53297373a894	537	#define USB_DEVICE_INTENSET_UPRSM_Pos 6 /*< \brief (USB_DEVICE_INTENSET) Upstream Resume Interrupt Enable /
mbed_official	579:53297373a894	538	#define USB_DEVICE_INTENSET_UPRSM (0x1ul << USB_DEVICE_INTENSET_UPRSM_Pos)
mbed_official	579:53297373a894	539	#define USB_DEVICE_INTENSET_RAMACER_Pos 7 /*< \brief (USB_DEVICE_INTENSET) Ram Access Interrupt Enable /
mbed_official	579:53297373a894	540	#define USB_DEVICE_INTENSET_RAMACER (0x1ul << USB_DEVICE_INTENSET_RAMACER_Pos)
mbed_official	579:53297373a894	541	#define USB_DEVICE_INTENSET_LPMNYET_Pos 8 /*< \brief (USB_DEVICE_INTENSET) Link Power Management Not Yet Interrupt Enable /
mbed_official	579:53297373a894	542	#define USB_DEVICE_INTENSET_LPMNYET (0x1ul << USB_DEVICE_INTENSET_LPMNYET_Pos)
mbed_official	579:53297373a894	543	#define USB_DEVICE_INTENSET_LPMSUSP_Pos 9 /*< \brief (USB_DEVICE_INTENSET) Link Power Management Suspend Interrupt Enable /
mbed_official	579:53297373a894	544	#define USB_DEVICE_INTENSET_LPMSUSP (0x1ul << USB_DEVICE_INTENSET_LPMSUSP_Pos)
mbed_official	579:53297373a894	545	#define USB_DEVICE_INTENSET_MASK 0x03FFul /*< \brief (USB_DEVICE_INTENSET) MASK Register /
mbed_official	579:53297373a894	546
mbed_official	579:53297373a894	547	/* -------- USB_HOST_INTENSET : (USB Offset: 0x018) (R/W 16) HOST HOST Host Interrupt Enable Set -------- */
mbed_official	579:53297373a894	548	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	549	typedef union {
mbed_official	579:53297373a894	550	struct {
mbed_official	579:53297373a894	551	uint16_t :2; /!< bit: 0.. 1 Reserved /
mbed_official	579:53297373a894	552	uint16_t HSOF:1; /!< bit: 2 Host Start Of Frame Interrupt Enable /
mbed_official	579:53297373a894	553	uint16_t RST:1; /!< bit: 3 Bus Reset Interrupt Enable /
mbed_official	579:53297373a894	554	uint16_t WAKEUP:1; /!< bit: 4 Wake Up Interrupt Enable /
mbed_official	579:53297373a894	555	uint16_t DNRSM:1; /!< bit: 5 DownStream to the Device Interrupt Enable /
mbed_official	579:53297373a894	556	uint16_t UPRSM:1; /!< bit: 6 Upstream Resume fromthe device Interrupt Enable /
mbed_official	579:53297373a894	557	uint16_t RAMACER:1; /!< bit: 7 Ram Access Interrupt Enable /
mbed_official	579:53297373a894	558	uint16_t DCONN:1; /!< bit: 8 Link Power Management Interrupt Enable /
mbed_official	579:53297373a894	559	uint16_t DDISC:1; /!< bit: 9 Device Disconnection Interrupt Enable /
mbed_official	579:53297373a894	560	uint16_t :6; /!< bit: 10..15 Reserved /
mbed_official	579:53297373a894	561	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	562	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	563	} USB_HOST_INTENSET_Type;
mbed_official	579:53297373a894	564	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	565
mbed_official	579:53297373a894	566	#define USB_HOST_INTENSET_OFFSET 0x018 /*< \brief (USB_HOST_INTENSET offset) HOST Host Interrupt Enable Set /
mbed_official	579:53297373a894	567	#define USB_HOST_INTENSET_RESETVALUE 0x0000ul /*< \brief (USB_HOST_INTENSET reset_value) HOST Host Interrupt Enable Set /
mbed_official	579:53297373a894	568
mbed_official	579:53297373a894	569	#define USB_HOST_INTENSET_HSOF_Pos 2 /*< \brief (USB_HOST_INTENSET) Host Start Of Frame Interrupt Enable /
mbed_official	579:53297373a894	570	#define USB_HOST_INTENSET_HSOF (0x1ul << USB_HOST_INTENSET_HSOF_Pos)
mbed_official	579:53297373a894	571	#define USB_HOST_INTENSET_RST_Pos 3 /*< \brief (USB_HOST_INTENSET) Bus Reset Interrupt Enable /
mbed_official	579:53297373a894	572	#define USB_HOST_INTENSET_RST (0x1ul << USB_HOST_INTENSET_RST_Pos)
mbed_official	579:53297373a894	573	#define USB_HOST_INTENSET_WAKEUP_Pos 4 /*< \brief (USB_HOST_INTENSET) Wake Up Interrupt Enable /
mbed_official	579:53297373a894	574	#define USB_HOST_INTENSET_WAKEUP (0x1ul << USB_HOST_INTENSET_WAKEUP_Pos)
mbed_official	579:53297373a894	575	#define USB_HOST_INTENSET_DNRSM_Pos 5 /*< \brief (USB_HOST_INTENSET) DownStream to the Device Interrupt Enable /
mbed_official	579:53297373a894	576	#define USB_HOST_INTENSET_DNRSM (0x1ul << USB_HOST_INTENSET_DNRSM_Pos)
mbed_official	579:53297373a894	577	#define USB_HOST_INTENSET_UPRSM_Pos 6 /*< \brief (USB_HOST_INTENSET) Upstream Resume fromthe device Interrupt Enable /
mbed_official	579:53297373a894	578	#define USB_HOST_INTENSET_UPRSM (0x1ul << USB_HOST_INTENSET_UPRSM_Pos)
mbed_official	579:53297373a894	579	#define USB_HOST_INTENSET_RAMACER_Pos 7 /*< \brief (USB_HOST_INTENSET) Ram Access Interrupt Enable /
mbed_official	579:53297373a894	580	#define USB_HOST_INTENSET_RAMACER (0x1ul << USB_HOST_INTENSET_RAMACER_Pos)
mbed_official	579:53297373a894	581	#define USB_HOST_INTENSET_DCONN_Pos 8 /*< \brief (USB_HOST_INTENSET) Link Power Management Interrupt Enable /
mbed_official	579:53297373a894	582	#define USB_HOST_INTENSET_DCONN (0x1ul << USB_HOST_INTENSET_DCONN_Pos)
mbed_official	579:53297373a894	583	#define USB_HOST_INTENSET_DDISC_Pos 9 /*< \brief (USB_HOST_INTENSET) Device Disconnection Interrupt Enable /
mbed_official	579:53297373a894	584	#define USB_HOST_INTENSET_DDISC (0x1ul << USB_HOST_INTENSET_DDISC_Pos)
mbed_official	579:53297373a894	585	#define USB_HOST_INTENSET_MASK 0x03FCul /*< \brief (USB_HOST_INTENSET) MASK Register /
mbed_official	579:53297373a894	586
mbed_official	579:53297373a894	587	/* -------- USB_DEVICE_INTFLAG : (USB Offset: 0x01C) (R/W 16) DEVICE DEVICE Device Interrupt Flag -------- */
mbed_official	579:53297373a894	588	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	589	typedef union {
mbed_official	579:53297373a894	590	struct {
mbed_official	579:53297373a894	591	uint16_t SUSPEND:1; /!< bit: 0 Suspend /
mbed_official	579:53297373a894	592	uint16_t MSOF:1; /!< bit: 1 Micro Start of Frame in High Speed Mode /
mbed_official	579:53297373a894	593	uint16_t SOF:1; /!< bit: 2 Start Of Frame /
mbed_official	579:53297373a894	594	uint16_t EORST:1; /!< bit: 3 End of Reset /
mbed_official	579:53297373a894	595	uint16_t WAKEUP:1; /!< bit: 4 Wake Up /
mbed_official	579:53297373a894	596	uint16_t EORSM:1; /!< bit: 5 End Of Resume /
mbed_official	579:53297373a894	597	uint16_t UPRSM:1; /!< bit: 6 Upstream Resume /
mbed_official	579:53297373a894	598	uint16_t RAMACER:1; /!< bit: 7 Ram Access /
mbed_official	579:53297373a894	599	uint16_t LPMNYET:1; /!< bit: 8 Link Power Management Not Yet /
mbed_official	579:53297373a894	600	uint16_t LPMSUSP:1; /!< bit: 9 Link Power Management Suspend /
mbed_official	579:53297373a894	601	uint16_t :6; /!< bit: 10..15 Reserved /
mbed_official	579:53297373a894	602	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	603	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	604	} USB_DEVICE_INTFLAG_Type;
mbed_official	579:53297373a894	605	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	606
mbed_official	579:53297373a894	607	#define USB_DEVICE_INTFLAG_OFFSET 0x01C /*< \brief (USB_DEVICE_INTFLAG offset) DEVICE Device Interrupt Flag /
mbed_official	579:53297373a894	608	#define USB_DEVICE_INTFLAG_RESETVALUE 0x0000ul /*< \brief (USB_DEVICE_INTFLAG reset_value) DEVICE Device Interrupt Flag /
mbed_official	579:53297373a894	609
mbed_official	579:53297373a894	610	#define USB_DEVICE_INTFLAG_SUSPEND_Pos 0 /*< \brief (USB_DEVICE_INTFLAG) Suspend /
mbed_official	579:53297373a894	611	#define USB_DEVICE_INTFLAG_SUSPEND (0x1ul << USB_DEVICE_INTFLAG_SUSPEND_Pos)
mbed_official	579:53297373a894	612	#define USB_DEVICE_INTFLAG_MSOF_Pos 1 /*< \brief (USB_DEVICE_INTFLAG) Micro Start of Frame in High Speed Mode /
mbed_official	579:53297373a894	613	#define USB_DEVICE_INTFLAG_MSOF (0x1ul << USB_DEVICE_INTFLAG_MSOF_Pos)
mbed_official	579:53297373a894	614	#define USB_DEVICE_INTFLAG_SOF_Pos 2 /*< \brief (USB_DEVICE_INTFLAG) Start Of Frame /
mbed_official	579:53297373a894	615	#define USB_DEVICE_INTFLAG_SOF (0x1ul << USB_DEVICE_INTFLAG_SOF_Pos)
mbed_official	579:53297373a894	616	#define USB_DEVICE_INTFLAG_EORST_Pos 3 /*< \brief (USB_DEVICE_INTFLAG) End of Reset /
mbed_official	579:53297373a894	617	#define USB_DEVICE_INTFLAG_EORST (0x1ul << USB_DEVICE_INTFLAG_EORST_Pos)
mbed_official	579:53297373a894	618	#define USB_DEVICE_INTFLAG_WAKEUP_Pos 4 /*< \brief (USB_DEVICE_INTFLAG) Wake Up /
mbed_official	579:53297373a894	619	#define USB_DEVICE_INTFLAG_WAKEUP (0x1ul << USB_DEVICE_INTFLAG_WAKEUP_Pos)
mbed_official	579:53297373a894	620	#define USB_DEVICE_INTFLAG_EORSM_Pos 5 /*< \brief (USB_DEVICE_INTFLAG) End Of Resume /
mbed_official	579:53297373a894	621	#define USB_DEVICE_INTFLAG_EORSM (0x1ul << USB_DEVICE_INTFLAG_EORSM_Pos)
mbed_official	579:53297373a894	622	#define USB_DEVICE_INTFLAG_UPRSM_Pos 6 /*< \brief (USB_DEVICE_INTFLAG) Upstream Resume /
mbed_official	579:53297373a894	623	#define USB_DEVICE_INTFLAG_UPRSM (0x1ul << USB_DEVICE_INTFLAG_UPRSM_Pos)
mbed_official	579:53297373a894	624	#define USB_DEVICE_INTFLAG_RAMACER_Pos 7 /*< \brief (USB_DEVICE_INTFLAG) Ram Access /
mbed_official	579:53297373a894	625	#define USB_DEVICE_INTFLAG_RAMACER (0x1ul << USB_DEVICE_INTFLAG_RAMACER_Pos)
mbed_official	579:53297373a894	626	#define USB_DEVICE_INTFLAG_LPMNYET_Pos 8 /*< \brief (USB_DEVICE_INTFLAG) Link Power Management Not Yet /
mbed_official	579:53297373a894	627	#define USB_DEVICE_INTFLAG_LPMNYET (0x1ul << USB_DEVICE_INTFLAG_LPMNYET_Pos)
mbed_official	579:53297373a894	628	#define USB_DEVICE_INTFLAG_LPMSUSP_Pos 9 /*< \brief (USB_DEVICE_INTFLAG) Link Power Management Suspend /
mbed_official	579:53297373a894	629	#define USB_DEVICE_INTFLAG_LPMSUSP (0x1ul << USB_DEVICE_INTFLAG_LPMSUSP_Pos)
mbed_official	579:53297373a894	630	#define USB_DEVICE_INTFLAG_MASK 0x03FFul /*< \brief (USB_DEVICE_INTFLAG) MASK Register /
mbed_official	579:53297373a894	631
mbed_official	579:53297373a894	632	/* -------- USB_HOST_INTFLAG : (USB Offset: 0x01C) (R/W 16) HOST HOST Host Interrupt Flag -------- */
mbed_official	579:53297373a894	633	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	634	typedef union {
mbed_official	579:53297373a894	635	struct {
mbed_official	579:53297373a894	636	uint16_t :2; /!< bit: 0.. 1 Reserved /
mbed_official	579:53297373a894	637	uint16_t HSOF:1; /!< bit: 2 Host Start Of Frame /
mbed_official	579:53297373a894	638	uint16_t RST:1; /!< bit: 3 Bus Reset /
mbed_official	579:53297373a894	639	uint16_t WAKEUP:1; /!< bit: 4 Wake Up /
mbed_official	579:53297373a894	640	uint16_t DNRSM:1; /!< bit: 5 Downstream /
mbed_official	579:53297373a894	641	uint16_t UPRSM:1; /!< bit: 6 Upstream Resume from the Device /
mbed_official	579:53297373a894	642	uint16_t RAMACER:1; /!< bit: 7 Ram Access /
mbed_official	579:53297373a894	643	uint16_t DCONN:1; /!< bit: 8 Device Connection /
mbed_official	579:53297373a894	644	uint16_t DDISC:1; /!< bit: 9 Device Disconnection /
mbed_official	579:53297373a894	645	uint16_t :6; /!< bit: 10..15 Reserved /
mbed_official	579:53297373a894	646	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	647	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	648	} USB_HOST_INTFLAG_Type;
mbed_official	579:53297373a894	649	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	650
mbed_official	579:53297373a894	651	#define USB_HOST_INTFLAG_OFFSET 0x01C /*< \brief (USB_HOST_INTFLAG offset) HOST Host Interrupt Flag /
mbed_official	579:53297373a894	652	#define USB_HOST_INTFLAG_RESETVALUE 0x0000ul /*< \brief (USB_HOST_INTFLAG reset_value) HOST Host Interrupt Flag /
mbed_official	579:53297373a894	653
mbed_official	579:53297373a894	654	#define USB_HOST_INTFLAG_HSOF_Pos 2 /*< \brief (USB_HOST_INTFLAG) Host Start Of Frame /
mbed_official	579:53297373a894	655	#define USB_HOST_INTFLAG_HSOF (0x1ul << USB_HOST_INTFLAG_HSOF_Pos)
mbed_official	579:53297373a894	656	#define USB_HOST_INTFLAG_RST_Pos 3 /*< \brief (USB_HOST_INTFLAG) Bus Reset /
mbed_official	579:53297373a894	657	#define USB_HOST_INTFLAG_RST (0x1ul << USB_HOST_INTFLAG_RST_Pos)
mbed_official	579:53297373a894	658	#define USB_HOST_INTFLAG_WAKEUP_Pos 4 /*< \brief (USB_HOST_INTFLAG) Wake Up /
mbed_official	579:53297373a894	659	#define USB_HOST_INTFLAG_WAKEUP (0x1ul << USB_HOST_INTFLAG_WAKEUP_Pos)
mbed_official	579:53297373a894	660	#define USB_HOST_INTFLAG_DNRSM_Pos 5 /*< \brief (USB_HOST_INTFLAG) Downstream /
mbed_official	579:53297373a894	661	#define USB_HOST_INTFLAG_DNRSM (0x1ul << USB_HOST_INTFLAG_DNRSM_Pos)
mbed_official	579:53297373a894	662	#define USB_HOST_INTFLAG_UPRSM_Pos 6 /*< \brief (USB_HOST_INTFLAG) Upstream Resume from the Device /
mbed_official	579:53297373a894	663	#define USB_HOST_INTFLAG_UPRSM (0x1ul << USB_HOST_INTFLAG_UPRSM_Pos)
mbed_official	579:53297373a894	664	#define USB_HOST_INTFLAG_RAMACER_Pos 7 /*< \brief (USB_HOST_INTFLAG) Ram Access /
mbed_official	579:53297373a894	665	#define USB_HOST_INTFLAG_RAMACER (0x1ul << USB_HOST_INTFLAG_RAMACER_Pos)
mbed_official	579:53297373a894	666	#define USB_HOST_INTFLAG_DCONN_Pos 8 /*< \brief (USB_HOST_INTFLAG) Device Connection /
mbed_official	579:53297373a894	667	#define USB_HOST_INTFLAG_DCONN (0x1ul << USB_HOST_INTFLAG_DCONN_Pos)
mbed_official	579:53297373a894	668	#define USB_HOST_INTFLAG_DDISC_Pos 9 /*< \brief (USB_HOST_INTFLAG) Device Disconnection /
mbed_official	579:53297373a894	669	#define USB_HOST_INTFLAG_DDISC (0x1ul << USB_HOST_INTFLAG_DDISC_Pos)
mbed_official	579:53297373a894	670	#define USB_HOST_INTFLAG_MASK 0x03FCul /*< \brief (USB_HOST_INTFLAG) MASK Register /
mbed_official	579:53297373a894	671
mbed_official	579:53297373a894	672	/* -------- USB_DEVICE_EPINTSMRY : (USB Offset: 0x020) (R/ 16) DEVICE DEVICE End Point Interrupt Summary -------- */
mbed_official	579:53297373a894	673	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	674	typedef union {
mbed_official	579:53297373a894	675	struct {
mbed_official	579:53297373a894	676	uint16_t EPINT0:1; /!< bit: 0 End Point 0 Interrupt /
mbed_official	579:53297373a894	677	uint16_t EPINT1:1; /!< bit: 1 End Point 1 Interrupt /
mbed_official	579:53297373a894	678	uint16_t EPINT2:1; /!< bit: 2 End Point 2 Interrupt /
mbed_official	579:53297373a894	679	uint16_t EPINT3:1; /!< bit: 3 End Point 3 Interrupt /
mbed_official	579:53297373a894	680	uint16_t EPINT4:1; /!< bit: 4 End Point 4 Interrupt /
mbed_official	579:53297373a894	681	uint16_t EPINT5:1; /!< bit: 5 End Point 5 Interrupt /
mbed_official	579:53297373a894	682	uint16_t EPINT6:1; /!< bit: 6 End Point 6 Interrupt /
mbed_official	579:53297373a894	683	uint16_t EPINT7:1; /!< bit: 7 End Point 7 Interrupt /
mbed_official	579:53297373a894	684	uint16_t :8; /!< bit: 8..15 Reserved /
mbed_official	579:53297373a894	685	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	686	struct {
mbed_official	579:53297373a894	687	uint16_t EPINT:8; /!< bit: 0.. 7 End Point x Interrupt /
mbed_official	579:53297373a894	688	uint16_t :8; /!< bit: 8..15 Reserved /
mbed_official	579:53297373a894	689	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	690	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	691	} USB_DEVICE_EPINTSMRY_Type;
mbed_official	579:53297373a894	692	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	693
mbed_official	579:53297373a894	694	#define USB_DEVICE_EPINTSMRY_OFFSET 0x020 /*< \brief (USB_DEVICE_EPINTSMRY offset) DEVICE End Point Interrupt Summary /
mbed_official	579:53297373a894	695	#define USB_DEVICE_EPINTSMRY_RESETVALUE 0x0000ul /*< \brief (USB_DEVICE_EPINTSMRY reset_value) DEVICE End Point Interrupt Summary /
mbed_official	579:53297373a894	696
mbed_official	579:53297373a894	697	#define USB_DEVICE_EPINTSMRY_EPINT0_Pos 0 /*< \brief (USB_DEVICE_EPINTSMRY) End Point 0 Interrupt /
mbed_official	579:53297373a894	698	#define USB_DEVICE_EPINTSMRY_EPINT0 (1 << USB_DEVICE_EPINTSMRY_EPINT0_Pos)
mbed_official	579:53297373a894	699	#define USB_DEVICE_EPINTSMRY_EPINT1_Pos 1 /*< \brief (USB_DEVICE_EPINTSMRY) End Point 1 Interrupt /
mbed_official	579:53297373a894	700	#define USB_DEVICE_EPINTSMRY_EPINT1 (1 << USB_DEVICE_EPINTSMRY_EPINT1_Pos)
mbed_official	579:53297373a894	701	#define USB_DEVICE_EPINTSMRY_EPINT2_Pos 2 /*< \brief (USB_DEVICE_EPINTSMRY) End Point 2 Interrupt /
mbed_official	579:53297373a894	702	#define USB_DEVICE_EPINTSMRY_EPINT2 (1 << USB_DEVICE_EPINTSMRY_EPINT2_Pos)
mbed_official	579:53297373a894	703	#define USB_DEVICE_EPINTSMRY_EPINT3_Pos 3 /*< \brief (USB_DEVICE_EPINTSMRY) End Point 3 Interrupt /
mbed_official	579:53297373a894	704	#define USB_DEVICE_EPINTSMRY_EPINT3 (1 << USB_DEVICE_EPINTSMRY_EPINT3_Pos)
mbed_official	579:53297373a894	705	#define USB_DEVICE_EPINTSMRY_EPINT4_Pos 4 /*< \brief (USB_DEVICE_EPINTSMRY) End Point 4 Interrupt /
mbed_official	579:53297373a894	706	#define USB_DEVICE_EPINTSMRY_EPINT4 (1 << USB_DEVICE_EPINTSMRY_EPINT4_Pos)
mbed_official	579:53297373a894	707	#define USB_DEVICE_EPINTSMRY_EPINT5_Pos 5 /*< \brief (USB_DEVICE_EPINTSMRY) End Point 5 Interrupt /
mbed_official	579:53297373a894	708	#define USB_DEVICE_EPINTSMRY_EPINT5 (1 << USB_DEVICE_EPINTSMRY_EPINT5_Pos)
mbed_official	579:53297373a894	709	#define USB_DEVICE_EPINTSMRY_EPINT6_Pos 6 /*< \brief (USB_DEVICE_EPINTSMRY) End Point 6 Interrupt /
mbed_official	579:53297373a894	710	#define USB_DEVICE_EPINTSMRY_EPINT6 (1 << USB_DEVICE_EPINTSMRY_EPINT6_Pos)
mbed_official	579:53297373a894	711	#define USB_DEVICE_EPINTSMRY_EPINT7_Pos 7 /*< \brief (USB_DEVICE_EPINTSMRY) End Point 7 Interrupt /
mbed_official	579:53297373a894	712	#define USB_DEVICE_EPINTSMRY_EPINT7 (1 << USB_DEVICE_EPINTSMRY_EPINT7_Pos)
mbed_official	579:53297373a894	713	#define USB_DEVICE_EPINTSMRY_EPINT_Pos 0 /*< \brief (USB_DEVICE_EPINTSMRY) End Point x Interrupt /
mbed_official	579:53297373a894	714	#define USB_DEVICE_EPINTSMRY_EPINT_Msk (0xFFul << USB_DEVICE_EPINTSMRY_EPINT_Pos)
mbed_official	579:53297373a894	715	#define USB_DEVICE_EPINTSMRY_EPINT(value) ((USB_DEVICE_EPINTSMRY_EPINT_Msk & ((value) << USB_DEVICE_EPINTSMRY_EPINT_Pos)))
mbed_official	579:53297373a894	716	#define USB_DEVICE_EPINTSMRY_MASK 0x00FFul /*< \brief (USB_DEVICE_EPINTSMRY) MASK Register /
mbed_official	579:53297373a894	717
mbed_official	579:53297373a894	718	/* -------- USB_HOST_PINTSMRY : (USB Offset: 0x020) (R/ 16) HOST HOST Pipe Interrupt Summary -------- */
mbed_official	579:53297373a894	719	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	720	typedef union {
mbed_official	579:53297373a894	721	struct {
mbed_official	579:53297373a894	722	uint16_t EPINT0:1; /!< bit: 0 Pipe 0 Interrupt /
mbed_official	579:53297373a894	723	uint16_t EPINT1:1; /!< bit: 1 Pipe 1 Interrupt /
mbed_official	579:53297373a894	724	uint16_t EPINT2:1; /!< bit: 2 Pipe 2 Interrupt /
mbed_official	579:53297373a894	725	uint16_t EPINT3:1; /!< bit: 3 Pipe 3 Interrupt /
mbed_official	579:53297373a894	726	uint16_t EPINT4:1; /!< bit: 4 Pipe 4 Interrupt /
mbed_official	579:53297373a894	727	uint16_t EPINT5:1; /!< bit: 5 Pipe 5 Interrupt /
mbed_official	579:53297373a894	728	uint16_t EPINT6:1; /!< bit: 6 Pipe 6 Interrupt /
mbed_official	579:53297373a894	729	uint16_t EPINT7:1; /!< bit: 7 Pipe 7 Interrupt /
mbed_official	579:53297373a894	730	uint16_t :8; /!< bit: 8..15 Reserved /
mbed_official	579:53297373a894	731	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	732	struct {
mbed_official	579:53297373a894	733	uint16_t EPINT:8; /!< bit: 0.. 7 Pipe x Interrupt /
mbed_official	579:53297373a894	734	uint16_t :8; /!< bit: 8..15 Reserved /
mbed_official	579:53297373a894	735	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	736	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	737	} USB_HOST_PINTSMRY_Type;
mbed_official	579:53297373a894	738	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	739
mbed_official	579:53297373a894	740	#define USB_HOST_PINTSMRY_OFFSET 0x020 /*< \brief (USB_HOST_PINTSMRY offset) HOST Pipe Interrupt Summary /
mbed_official	579:53297373a894	741	#define USB_HOST_PINTSMRY_RESETVALUE 0x0000ul /*< \brief (USB_HOST_PINTSMRY reset_value) HOST Pipe Interrupt Summary /
mbed_official	579:53297373a894	742
mbed_official	579:53297373a894	743	#define USB_HOST_PINTSMRY_EPINT0_Pos 0 /*< \brief (USB_HOST_PINTSMRY) Pipe 0 Interrupt /
mbed_official	579:53297373a894	744	#define USB_HOST_PINTSMRY_EPINT0 (1 << USB_HOST_PINTSMRY_EPINT0_Pos)
mbed_official	579:53297373a894	745	#define USB_HOST_PINTSMRY_EPINT1_Pos 1 /*< \brief (USB_HOST_PINTSMRY) Pipe 1 Interrupt /
mbed_official	579:53297373a894	746	#define USB_HOST_PINTSMRY_EPINT1 (1 << USB_HOST_PINTSMRY_EPINT1_Pos)
mbed_official	579:53297373a894	747	#define USB_HOST_PINTSMRY_EPINT2_Pos 2 /*< \brief (USB_HOST_PINTSMRY) Pipe 2 Interrupt /
mbed_official	579:53297373a894	748	#define USB_HOST_PINTSMRY_EPINT2 (1 << USB_HOST_PINTSMRY_EPINT2_Pos)
mbed_official	579:53297373a894	749	#define USB_HOST_PINTSMRY_EPINT3_Pos 3 /*< \brief (USB_HOST_PINTSMRY) Pipe 3 Interrupt /
mbed_official	579:53297373a894	750	#define USB_HOST_PINTSMRY_EPINT3 (1 << USB_HOST_PINTSMRY_EPINT3_Pos)
mbed_official	579:53297373a894	751	#define USB_HOST_PINTSMRY_EPINT4_Pos 4 /*< \brief (USB_HOST_PINTSMRY) Pipe 4 Interrupt /
mbed_official	579:53297373a894	752	#define USB_HOST_PINTSMRY_EPINT4 (1 << USB_HOST_PINTSMRY_EPINT4_Pos)
mbed_official	579:53297373a894	753	#define USB_HOST_PINTSMRY_EPINT5_Pos 5 /*< \brief (USB_HOST_PINTSMRY) Pipe 5 Interrupt /
mbed_official	579:53297373a894	754	#define USB_HOST_PINTSMRY_EPINT5 (1 << USB_HOST_PINTSMRY_EPINT5_Pos)
mbed_official	579:53297373a894	755	#define USB_HOST_PINTSMRY_EPINT6_Pos 6 /*< \brief (USB_HOST_PINTSMRY) Pipe 6 Interrupt /
mbed_official	579:53297373a894	756	#define USB_HOST_PINTSMRY_EPINT6 (1 << USB_HOST_PINTSMRY_EPINT6_Pos)
mbed_official	579:53297373a894	757	#define USB_HOST_PINTSMRY_EPINT7_Pos 7 /*< \brief (USB_HOST_PINTSMRY) Pipe 7 Interrupt /
mbed_official	579:53297373a894	758	#define USB_HOST_PINTSMRY_EPINT7 (1 << USB_HOST_PINTSMRY_EPINT7_Pos)
mbed_official	579:53297373a894	759	#define USB_HOST_PINTSMRY_EPINT_Pos 0 /*< \brief (USB_HOST_PINTSMRY) Pipe x Interrupt /
mbed_official	579:53297373a894	760	#define USB_HOST_PINTSMRY_EPINT_Msk (0xFFul << USB_HOST_PINTSMRY_EPINT_Pos)
mbed_official	579:53297373a894	761	#define USB_HOST_PINTSMRY_EPINT(value) ((USB_HOST_PINTSMRY_EPINT_Msk & ((value) << USB_HOST_PINTSMRY_EPINT_Pos)))
mbed_official	579:53297373a894	762	#define USB_HOST_PINTSMRY_MASK 0x00FFul /*< \brief (USB_HOST_PINTSMRY) MASK Register /
mbed_official	579:53297373a894	763
mbed_official	579:53297373a894	764	/* -------- USB_DESCADD : (USB Offset: 0x024) (R/W 32) Descriptor Address -------- */
mbed_official	579:53297373a894	765	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	766	typedef union {
mbed_official	579:53297373a894	767	struct {
mbed_official	579:53297373a894	768	uint32_t DESCADD:32; /!< bit: 0..31 Descriptor Address Value /
mbed_official	579:53297373a894	769	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	770	uint32_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	771	} USB_DESCADD_Type;
mbed_official	579:53297373a894	772	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	773
mbed_official	579:53297373a894	774	#define USB_DESCADD_OFFSET 0x024 /*< \brief (USB_DESCADD offset) Descriptor Address /
mbed_official	579:53297373a894	775	#define USB_DESCADD_RESETVALUE 0x00000000ul /*< \brief (USB_DESCADD reset_value) Descriptor Address /
mbed_official	579:53297373a894	776
mbed_official	579:53297373a894	777	#define USB_DESCADD_DESCADD_Pos 0 /*< \brief (USB_DESCADD) Descriptor Address Value /
mbed_official	579:53297373a894	778	#define USB_DESCADD_DESCADD_Msk (0xFFFFFFFFul << USB_DESCADD_DESCADD_Pos)
mbed_official	579:53297373a894	779	#define USB_DESCADD_DESCADD(value) ((USB_DESCADD_DESCADD_Msk & ((value) << USB_DESCADD_DESCADD_Pos)))
mbed_official	579:53297373a894	780	#define USB_DESCADD_MASK 0xFFFFFFFFul /*< \brief (USB_DESCADD) MASK Register /
mbed_official	579:53297373a894	781
mbed_official	579:53297373a894	782	/* -------- USB_PADCAL : (USB Offset: 0x028) (R/W 16) USB PAD Calibration -------- */
mbed_official	579:53297373a894	783	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	784	typedef union {
mbed_official	579:53297373a894	785	struct {
mbed_official	579:53297373a894	786	uint16_t TRANSP:5; /!< bit: 0.. 4 USB Pad Transp calibration /
mbed_official	579:53297373a894	787	uint16_t :1; /!< bit: 5 Reserved /
mbed_official	579:53297373a894	788	uint16_t TRANSN:5; /!< bit: 6..10 USB Pad Transn calibration /
mbed_official	579:53297373a894	789	uint16_t :1; /!< bit: 11 Reserved /
mbed_official	579:53297373a894	790	uint16_t TRIM:3; /!< bit: 12..14 USB Pad Trim calibration /
mbed_official	579:53297373a894	791	uint16_t :1; /!< bit: 15 Reserved /
mbed_official	579:53297373a894	792	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	793	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	794	} USB_PADCAL_Type;
mbed_official	579:53297373a894	795	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	796
mbed_official	579:53297373a894	797	#define USB_PADCAL_OFFSET 0x028 /*< \brief (USB_PADCAL offset) USB PAD Calibration /
mbed_official	579:53297373a894	798	#define USB_PADCAL_RESETVALUE 0x0000ul /*< \brief (USB_PADCAL reset_value) USB PAD Calibration /
mbed_official	579:53297373a894	799
mbed_official	579:53297373a894	800	#define USB_PADCAL_TRANSP_Pos 0 /*< \brief (USB_PADCAL) USB Pad Transp calibration /
mbed_official	579:53297373a894	801	#define USB_PADCAL_TRANSP_Msk (0x1Ful << USB_PADCAL_TRANSP_Pos)
mbed_official	579:53297373a894	802	#define USB_PADCAL_TRANSP(value) ((USB_PADCAL_TRANSP_Msk & ((value) << USB_PADCAL_TRANSP_Pos)))
mbed_official	579:53297373a894	803	#define USB_PADCAL_TRANSN_Pos 6 /*< \brief (USB_PADCAL) USB Pad Transn calibration /
mbed_official	579:53297373a894	804	#define USB_PADCAL_TRANSN_Msk (0x1Ful << USB_PADCAL_TRANSN_Pos)
mbed_official	579:53297373a894	805	#define USB_PADCAL_TRANSN(value) ((USB_PADCAL_TRANSN_Msk & ((value) << USB_PADCAL_TRANSN_Pos)))
mbed_official	579:53297373a894	806	#define USB_PADCAL_TRIM_Pos 12 /*< \brief (USB_PADCAL) USB Pad Trim calibration /
mbed_official	579:53297373a894	807	#define USB_PADCAL_TRIM_Msk (0x7ul << USB_PADCAL_TRIM_Pos)
mbed_official	579:53297373a894	808	#define USB_PADCAL_TRIM(value) ((USB_PADCAL_TRIM_Msk & ((value) << USB_PADCAL_TRIM_Pos)))
mbed_official	579:53297373a894	809	#define USB_PADCAL_MASK 0x77DFul /*< \brief (USB_PADCAL) MASK Register /
mbed_official	579:53297373a894	810
mbed_official	579:53297373a894	811	/* -------- USB_DEVICE_EPCFG : (USB Offset: 0x100) (R/W 8) DEVICE DEVICE_ENDPOINT End Point Configuration -------- */
mbed_official	579:53297373a894	812	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	813	typedef union {
mbed_official	579:53297373a894	814	struct {
mbed_official	579:53297373a894	815	uint8_t EPTYPE0:3; /!< bit: 0.. 2 End Point Type0 /
mbed_official	579:53297373a894	816	uint8_t :1; /!< bit: 3 Reserved /
mbed_official	579:53297373a894	817	uint8_t EPTYPE1:3; /!< bit: 4.. 6 End Point Type1 /
mbed_official	579:53297373a894	818	uint8_t NYETDIS:1; /!< bit: 7 NYET Token Disable /
mbed_official	579:53297373a894	819	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	820	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	821	} USB_DEVICE_EPCFG_Type;
mbed_official	579:53297373a894	822	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	823
mbed_official	579:53297373a894	824	#define USB_DEVICE_EPCFG_OFFSET 0x100 /*< \brief (USB_DEVICE_EPCFG offset) DEVICE_ENDPOINT End Point Configuration /
mbed_official	579:53297373a894	825	#define USB_DEVICE_EPCFG_RESETVALUE 0x00ul /*< \brief (USB_DEVICE_EPCFG reset_value) DEVICE_ENDPOINT End Point Configuration /
mbed_official	579:53297373a894	826
mbed_official	579:53297373a894	827	#define USB_DEVICE_EPCFG_EPTYPE0_Pos 0 /*< \brief (USB_DEVICE_EPCFG) End Point Type0 /
mbed_official	579:53297373a894	828	#define USB_DEVICE_EPCFG_EPTYPE0_Msk (0x7ul << USB_DEVICE_EPCFG_EPTYPE0_Pos)
mbed_official	579:53297373a894	829	#define USB_DEVICE_EPCFG_EPTYPE0(value) ((USB_DEVICE_EPCFG_EPTYPE0_Msk & ((value) << USB_DEVICE_EPCFG_EPTYPE0_Pos)))
mbed_official	579:53297373a894	830	#define USB_DEVICE_EPCFG_EPTYPE1_Pos 4 /*< \brief (USB_DEVICE_EPCFG) End Point Type1 /
mbed_official	579:53297373a894	831	#define USB_DEVICE_EPCFG_EPTYPE1_Msk (0x7ul << USB_DEVICE_EPCFG_EPTYPE1_Pos)
mbed_official	579:53297373a894	832	#define USB_DEVICE_EPCFG_EPTYPE1(value) ((USB_DEVICE_EPCFG_EPTYPE1_Msk & ((value) << USB_DEVICE_EPCFG_EPTYPE1_Pos)))
mbed_official	579:53297373a894	833	#define USB_DEVICE_EPCFG_NYETDIS_Pos 7 /*< \brief (USB_DEVICE_EPCFG) NYET Token Disable /
mbed_official	579:53297373a894	834	#define USB_DEVICE_EPCFG_NYETDIS (0x1ul << USB_DEVICE_EPCFG_NYETDIS_Pos)
mbed_official	579:53297373a894	835	#define USB_DEVICE_EPCFG_MASK 0xF7ul /*< \brief (USB_DEVICE_EPCFG) MASK Register /
mbed_official	579:53297373a894	836
mbed_official	579:53297373a894	837	/* -------- USB_HOST_PCFG : (USB Offset: 0x100) (R/W 8) HOST HOST_PIPE End Point Configuration -------- */
mbed_official	579:53297373a894	838	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	839	typedef union {
mbed_official	579:53297373a894	840	struct {
mbed_official	579:53297373a894	841	uint8_t PTOKEN:2; /!< bit: 0.. 1 Pipe Token /
mbed_official	579:53297373a894	842	uint8_t BK:1; /!< bit: 2 Pipe Bank /
mbed_official	579:53297373a894	843	uint8_t PTYPE:3; /!< bit: 3.. 5 Pipe Type /
mbed_official	579:53297373a894	844	uint8_t :2; /!< bit: 6.. 7 Reserved /
mbed_official	579:53297373a894	845	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	846	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	847	} USB_HOST_PCFG_Type;
mbed_official	579:53297373a894	848	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	849
mbed_official	579:53297373a894	850	#define USB_HOST_PCFG_OFFSET 0x100 /*< \brief (USB_HOST_PCFG offset) HOST_PIPE End Point Configuration /
mbed_official	579:53297373a894	851	#define USB_HOST_PCFG_RESETVALUE 0x00ul /*< \brief (USB_HOST_PCFG reset_value) HOST_PIPE End Point Configuration /
mbed_official	579:53297373a894	852
mbed_official	579:53297373a894	853	#define USB_HOST_PCFG_PTOKEN_Pos 0 /*< \brief (USB_HOST_PCFG) Pipe Token /
mbed_official	579:53297373a894	854	#define USB_HOST_PCFG_PTOKEN_Msk (0x3ul << USB_HOST_PCFG_PTOKEN_Pos)
mbed_official	579:53297373a894	855	#define USB_HOST_PCFG_PTOKEN(value) ((USB_HOST_PCFG_PTOKEN_Msk & ((value) << USB_HOST_PCFG_PTOKEN_Pos)))
mbed_official	579:53297373a894	856	#define USB_HOST_PCFG_BK_Pos 2 /*< \brief (USB_HOST_PCFG) Pipe Bank /
mbed_official	579:53297373a894	857	#define USB_HOST_PCFG_BK (0x1ul << USB_HOST_PCFG_BK_Pos)
mbed_official	579:53297373a894	858	#define USB_HOST_PCFG_PTYPE_Pos 3 /*< \brief (USB_HOST_PCFG) Pipe Type /
mbed_official	579:53297373a894	859	#define USB_HOST_PCFG_PTYPE_Msk (0x7ul << USB_HOST_PCFG_PTYPE_Pos)
mbed_official	579:53297373a894	860	#define USB_HOST_PCFG_PTYPE(value) ((USB_HOST_PCFG_PTYPE_Msk & ((value) << USB_HOST_PCFG_PTYPE_Pos)))
mbed_official	579:53297373a894	861	#define USB_HOST_PCFG_MASK 0x3Ful /*< \brief (USB_HOST_PCFG) MASK Register /
mbed_official	579:53297373a894	862
mbed_official	579:53297373a894	863	/* -------- USB_HOST_BINTERVAL : (USB Offset: 0x103) (R/W 8) HOST HOST_PIPE Bus Access Period of Pipe -------- */
mbed_official	579:53297373a894	864	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	865	typedef union {
mbed_official	579:53297373a894	866	struct {
mbed_official	579:53297373a894	867	uint8_t BITINTERVAL:8; /!< bit: 0.. 7 Bit Interval /
mbed_official	579:53297373a894	868	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	869	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	870	} USB_HOST_BINTERVAL_Type;
mbed_official	579:53297373a894	871	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	872
mbed_official	579:53297373a894	873	#define USB_HOST_BINTERVAL_OFFSET 0x103 /*< \brief (USB_HOST_BINTERVAL offset) HOST_PIPE Bus Access Period of Pipe /
mbed_official	579:53297373a894	874	#define USB_HOST_BINTERVAL_RESETVALUE 0x00ul /*< \brief (USB_HOST_BINTERVAL reset_value) HOST_PIPE Bus Access Period of Pipe /
mbed_official	579:53297373a894	875
mbed_official	579:53297373a894	876	#define USB_HOST_BINTERVAL_BITINTERVAL_Pos 0 /*< \brief (USB_HOST_BINTERVAL) Bit Interval /
mbed_official	579:53297373a894	877	#define USB_HOST_BINTERVAL_BITINTERVAL_Msk (0xFFul << USB_HOST_BINTERVAL_BITINTERVAL_Pos)
mbed_official	579:53297373a894	878	#define USB_HOST_BINTERVAL_BITINTERVAL(value) ((USB_HOST_BINTERVAL_BITINTERVAL_Msk & ((value) << USB_HOST_BINTERVAL_BITINTERVAL_Pos)))
mbed_official	579:53297373a894	879	#define USB_HOST_BINTERVAL_MASK 0xFFul /*< \brief (USB_HOST_BINTERVAL) MASK Register /
mbed_official	579:53297373a894	880
mbed_official	579:53297373a894	881	/* -------- USB_DEVICE_EPSTATUSCLR : (USB Offset: 0x104) ( /W 8) DEVICE DEVICE_ENDPOINT End Point Pipe Status Clear -------- */
mbed_official	579:53297373a894	882	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	883	typedef union {
mbed_official	579:53297373a894	884	struct {
mbed_official	579:53297373a894	885	uint8_t DTGLOUT:1; /!< bit: 0 Data Toggle OUT Clear /
mbed_official	579:53297373a894	886	uint8_t DTGLIN:1; /!< bit: 1 Data Toggle IN Clear /
mbed_official	579:53297373a894	887	uint8_t CURBK:1; /!< bit: 2 Curren Bank Clear /
mbed_official	579:53297373a894	888	uint8_t :1; /!< bit: 3 Reserved /
mbed_official	579:53297373a894	889	uint8_t STALLRQ0:1; /!< bit: 4 Stall 0 Request Clear /
mbed_official	579:53297373a894	890	uint8_t STALLRQ1:1; /!< bit: 5 Stall 1 Request Clear /
mbed_official	579:53297373a894	891	uint8_t BK0RDY:1; /!< bit: 6 Bank 0 Ready Clear /
mbed_official	579:53297373a894	892	uint8_t BK1RDY:1; /!< bit: 7 Bank 1 Ready Clear /
mbed_official	579:53297373a894	893	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	894	struct {
mbed_official	579:53297373a894	895	uint8_t :4; /!< bit: 0.. 3 Reserved /
mbed_official	579:53297373a894	896	uint8_t STALLRQ:2; /!< bit: 4.. 5 Stall x Request Clear /
mbed_official	579:53297373a894	897	uint8_t :2; /!< bit: 6.. 7 Reserved /
mbed_official	579:53297373a894	898	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	899	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	900	} USB_DEVICE_EPSTATUSCLR_Type;
mbed_official	579:53297373a894	901	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	902
mbed_official	579:53297373a894	903	#define USB_DEVICE_EPSTATUSCLR_OFFSET 0x104 /*< \brief (USB_DEVICE_EPSTATUSCLR offset) DEVICE_ENDPOINT End Point Pipe Status Clear /
mbed_official	579:53297373a894	904	#define USB_DEVICE_EPSTATUSCLR_RESETVALUE 0x00ul /*< \brief (USB_DEVICE_EPSTATUSCLR reset_value) DEVICE_ENDPOINT End Point Pipe Status Clear /
mbed_official	579:53297373a894	905
mbed_official	579:53297373a894	906	#define USB_DEVICE_EPSTATUSCLR_DTGLOUT_Pos 0 /*< \brief (USB_DEVICE_EPSTATUSCLR) Data Toggle OUT Clear /
mbed_official	579:53297373a894	907	#define USB_DEVICE_EPSTATUSCLR_DTGLOUT (0x1ul << USB_DEVICE_EPSTATUSCLR_DTGLOUT_Pos)
mbed_official	579:53297373a894	908	#define USB_DEVICE_EPSTATUSCLR_DTGLIN_Pos 1 /*< \brief (USB_DEVICE_EPSTATUSCLR) Data Toggle IN Clear /
mbed_official	579:53297373a894	909	#define USB_DEVICE_EPSTATUSCLR_DTGLIN (0x1ul << USB_DEVICE_EPSTATUSCLR_DTGLIN_Pos)
mbed_official	579:53297373a894	910	#define USB_DEVICE_EPSTATUSCLR_CURBK_Pos 2 /*< \brief (USB_DEVICE_EPSTATUSCLR) Curren Bank Clear /
mbed_official	579:53297373a894	911	#define USB_DEVICE_EPSTATUSCLR_CURBK (0x1ul << USB_DEVICE_EPSTATUSCLR_CURBK_Pos)
mbed_official	579:53297373a894	912	#define USB_DEVICE_EPSTATUSCLR_STALLRQ0_Pos 4 /*< \brief (USB_DEVICE_EPSTATUSCLR) Stall 0 Request Clear /
mbed_official	579:53297373a894	913	#define USB_DEVICE_EPSTATUSCLR_STALLRQ0 (1 << USB_DEVICE_EPSTATUSCLR_STALLRQ0_Pos)
mbed_official	579:53297373a894	914	#define USB_DEVICE_EPSTATUSCLR_STALLRQ1_Pos 5 /*< \brief (USB_DEVICE_EPSTATUSCLR) Stall 1 Request Clear /
mbed_official	579:53297373a894	915	#define USB_DEVICE_EPSTATUSCLR_STALLRQ1 (1 << USB_DEVICE_EPSTATUSCLR_STALLRQ1_Pos)
mbed_official	579:53297373a894	916	#define USB_DEVICE_EPSTATUSCLR_STALLRQ_Pos 4 /*< \brief (USB_DEVICE_EPSTATUSCLR) Stall x Request Clear /
mbed_official	579:53297373a894	917	#define USB_DEVICE_EPSTATUSCLR_STALLRQ_Msk (0x3ul << USB_DEVICE_EPSTATUSCLR_STALLRQ_Pos)
mbed_official	579:53297373a894	918	#define USB_DEVICE_EPSTATUSCLR_STALLRQ(value) ((USB_DEVICE_EPSTATUSCLR_STALLRQ_Msk & ((value) << USB_DEVICE_EPSTATUSCLR_STALLRQ_Pos)))
mbed_official	579:53297373a894	919	#define USB_DEVICE_EPSTATUSCLR_BK0RDY_Pos 6 /*< \brief (USB_DEVICE_EPSTATUSCLR) Bank 0 Ready Clear /
mbed_official	579:53297373a894	920	#define USB_DEVICE_EPSTATUSCLR_BK0RDY (0x1ul << USB_DEVICE_EPSTATUSCLR_BK0RDY_Pos)
mbed_official	579:53297373a894	921	#define USB_DEVICE_EPSTATUSCLR_BK1RDY_Pos 7 /*< \brief (USB_DEVICE_EPSTATUSCLR) Bank 1 Ready Clear /
mbed_official	579:53297373a894	922	#define USB_DEVICE_EPSTATUSCLR_BK1RDY (0x1ul << USB_DEVICE_EPSTATUSCLR_BK1RDY_Pos)
mbed_official	579:53297373a894	923	#define USB_DEVICE_EPSTATUSCLR_MASK 0xF7ul /*< \brief (USB_DEVICE_EPSTATUSCLR) MASK Register /
mbed_official	579:53297373a894	924
mbed_official	579:53297373a894	925	/* -------- USB_HOST_PSTATUSCLR : (USB Offset: 0x104) ( /W 8) HOST HOST_PIPE End Point Pipe Status Clear -------- */
mbed_official	579:53297373a894	926	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	927	typedef union {
mbed_official	579:53297373a894	928	struct {
mbed_official	579:53297373a894	929	uint8_t DTGL:1; /!< bit: 0 Data Toggle clear /
mbed_official	579:53297373a894	930	uint8_t :1; /!< bit: 1 Reserved /
mbed_official	579:53297373a894	931	uint8_t CURBK:1; /!< bit: 2 Curren Bank clear /
mbed_official	579:53297373a894	932	uint8_t :1; /!< bit: 3 Reserved /
mbed_official	579:53297373a894	933	uint8_t PFREEZE:1; /!< bit: 4 Pipe Freeze Clear /
mbed_official	579:53297373a894	934	uint8_t :1; /!< bit: 5 Reserved /
mbed_official	579:53297373a894	935	uint8_t BK0RDY:1; /!< bit: 6 Bank 0 Ready Clear /
mbed_official	579:53297373a894	936	uint8_t BK1RDY:1; /!< bit: 7 Bank 1 Ready Clear /
mbed_official	579:53297373a894	937	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	938	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	939	} USB_HOST_PSTATUSCLR_Type;
mbed_official	579:53297373a894	940	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	941
mbed_official	579:53297373a894	942	#define USB_HOST_PSTATUSCLR_OFFSET 0x104 /*< \brief (USB_HOST_PSTATUSCLR offset) HOST_PIPE End Point Pipe Status Clear /
mbed_official	579:53297373a894	943	#define USB_HOST_PSTATUSCLR_RESETVALUE 0x00ul /*< \brief (USB_HOST_PSTATUSCLR reset_value) HOST_PIPE End Point Pipe Status Clear /
mbed_official	579:53297373a894	944
mbed_official	579:53297373a894	945	#define USB_HOST_PSTATUSCLR_DTGL_Pos 0 /*< \brief (USB_HOST_PSTATUSCLR) Data Toggle clear /
mbed_official	579:53297373a894	946	#define USB_HOST_PSTATUSCLR_DTGL (0x1ul << USB_HOST_PSTATUSCLR_DTGL_Pos)
mbed_official	579:53297373a894	947	#define USB_HOST_PSTATUSCLR_CURBK_Pos 2 /*< \brief (USB_HOST_PSTATUSCLR) Curren Bank clear /
mbed_official	579:53297373a894	948	#define USB_HOST_PSTATUSCLR_CURBK (0x1ul << USB_HOST_PSTATUSCLR_CURBK_Pos)
mbed_official	579:53297373a894	949	#define USB_HOST_PSTATUSCLR_PFREEZE_Pos 4 /*< \brief (USB_HOST_PSTATUSCLR) Pipe Freeze Clear /
mbed_official	579:53297373a894	950	#define USB_HOST_PSTATUSCLR_PFREEZE (0x1ul << USB_HOST_PSTATUSCLR_PFREEZE_Pos)
mbed_official	579:53297373a894	951	#define USB_HOST_PSTATUSCLR_BK0RDY_Pos 6 /*< \brief (USB_HOST_PSTATUSCLR) Bank 0 Ready Clear /
mbed_official	579:53297373a894	952	#define USB_HOST_PSTATUSCLR_BK0RDY (0x1ul << USB_HOST_PSTATUSCLR_BK0RDY_Pos)
mbed_official	579:53297373a894	953	#define USB_HOST_PSTATUSCLR_BK1RDY_Pos 7 /*< \brief (USB_HOST_PSTATUSCLR) Bank 1 Ready Clear /
mbed_official	579:53297373a894	954	#define USB_HOST_PSTATUSCLR_BK1RDY (0x1ul << USB_HOST_PSTATUSCLR_BK1RDY_Pos)
mbed_official	579:53297373a894	955	#define USB_HOST_PSTATUSCLR_MASK 0xD5ul /*< \brief (USB_HOST_PSTATUSCLR) MASK Register /
mbed_official	579:53297373a894	956
mbed_official	579:53297373a894	957	/* -------- USB_DEVICE_EPSTATUSSET : (USB Offset: 0x105) ( /W 8) DEVICE DEVICE_ENDPOINT End Point Pipe Status Set -------- */
mbed_official	579:53297373a894	958	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	959	typedef union {
mbed_official	579:53297373a894	960	struct {
mbed_official	579:53297373a894	961	uint8_t DTGLOUT:1; /!< bit: 0 Data Toggle OUT Set /
mbed_official	579:53297373a894	962	uint8_t DTGLIN:1; /!< bit: 1 Data Toggle IN Set /
mbed_official	579:53297373a894	963	uint8_t CURBK:1; /!< bit: 2 Current Bank Set /
mbed_official	579:53297373a894	964	uint8_t :1; /!< bit: 3 Reserved /
mbed_official	579:53297373a894	965	uint8_t STALLRQ0:1; /!< bit: 4 Stall 0 Request Set /
mbed_official	579:53297373a894	966	uint8_t STALLRQ1:1; /!< bit: 5 Stall 1 Request Set /
mbed_official	579:53297373a894	967	uint8_t BK0RDY:1; /!< bit: 6 Bank 0 Ready Set /
mbed_official	579:53297373a894	968	uint8_t BK1RDY:1; /!< bit: 7 Bank 1 Ready Set /
mbed_official	579:53297373a894	969	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	970	struct {
mbed_official	579:53297373a894	971	uint8_t :4; /!< bit: 0.. 3 Reserved /
mbed_official	579:53297373a894	972	uint8_t STALLRQ:2; /!< bit: 4.. 5 Stall x Request Set /
mbed_official	579:53297373a894	973	uint8_t :2; /!< bit: 6.. 7 Reserved /
mbed_official	579:53297373a894	974	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	975	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	976	} USB_DEVICE_EPSTATUSSET_Type;
mbed_official	579:53297373a894	977	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	978
mbed_official	579:53297373a894	979	#define USB_DEVICE_EPSTATUSSET_OFFSET 0x105 /*< \brief (USB_DEVICE_EPSTATUSSET offset) DEVICE_ENDPOINT End Point Pipe Status Set /
mbed_official	579:53297373a894	980	#define USB_DEVICE_EPSTATUSSET_RESETVALUE 0x00ul /*< \brief (USB_DEVICE_EPSTATUSSET reset_value) DEVICE_ENDPOINT End Point Pipe Status Set /
mbed_official	579:53297373a894	981
mbed_official	579:53297373a894	982	#define USB_DEVICE_EPSTATUSSET_DTGLOUT_Pos 0 /*< \brief (USB_DEVICE_EPSTATUSSET) Data Toggle OUT Set /
mbed_official	579:53297373a894	983	#define USB_DEVICE_EPSTATUSSET_DTGLOUT (0x1ul << USB_DEVICE_EPSTATUSSET_DTGLOUT_Pos)
mbed_official	579:53297373a894	984	#define USB_DEVICE_EPSTATUSSET_DTGLIN_Pos 1 /*< \brief (USB_DEVICE_EPSTATUSSET) Data Toggle IN Set /
mbed_official	579:53297373a894	985	#define USB_DEVICE_EPSTATUSSET_DTGLIN (0x1ul << USB_DEVICE_EPSTATUSSET_DTGLIN_Pos)
mbed_official	579:53297373a894	986	#define USB_DEVICE_EPSTATUSSET_CURBK_Pos 2 /*< \brief (USB_DEVICE_EPSTATUSSET) Current Bank Set /
mbed_official	579:53297373a894	987	#define USB_DEVICE_EPSTATUSSET_CURBK (0x1ul << USB_DEVICE_EPSTATUSSET_CURBK_Pos)
mbed_official	579:53297373a894	988	#define USB_DEVICE_EPSTATUSSET_STALLRQ0_Pos 4 /*< \brief (USB_DEVICE_EPSTATUSSET) Stall 0 Request Set /
mbed_official	579:53297373a894	989	#define USB_DEVICE_EPSTATUSSET_STALLRQ0 (1 << USB_DEVICE_EPSTATUSSET_STALLRQ0_Pos)
mbed_official	579:53297373a894	990	#define USB_DEVICE_EPSTATUSSET_STALLRQ1_Pos 5 /*< \brief (USB_DEVICE_EPSTATUSSET) Stall 1 Request Set /
mbed_official	579:53297373a894	991	#define USB_DEVICE_EPSTATUSSET_STALLRQ1 (1 << USB_DEVICE_EPSTATUSSET_STALLRQ1_Pos)
mbed_official	579:53297373a894	992	#define USB_DEVICE_EPSTATUSSET_STALLRQ_Pos 4 /*< \brief (USB_DEVICE_EPSTATUSSET) Stall x Request Set /
mbed_official	579:53297373a894	993	#define USB_DEVICE_EPSTATUSSET_STALLRQ_Msk (0x3ul << USB_DEVICE_EPSTATUSSET_STALLRQ_Pos)
mbed_official	579:53297373a894	994	#define USB_DEVICE_EPSTATUSSET_STALLRQ(value) ((USB_DEVICE_EPSTATUSSET_STALLRQ_Msk & ((value) << USB_DEVICE_EPSTATUSSET_STALLRQ_Pos)))
mbed_official	579:53297373a894	995	#define USB_DEVICE_EPSTATUSSET_BK0RDY_Pos 6 /*< \brief (USB_DEVICE_EPSTATUSSET) Bank 0 Ready Set /
mbed_official	579:53297373a894	996	#define USB_DEVICE_EPSTATUSSET_BK0RDY (0x1ul << USB_DEVICE_EPSTATUSSET_BK0RDY_Pos)
mbed_official	579:53297373a894	997	#define USB_DEVICE_EPSTATUSSET_BK1RDY_Pos 7 /*< \brief (USB_DEVICE_EPSTATUSSET) Bank 1 Ready Set /
mbed_official	579:53297373a894	998	#define USB_DEVICE_EPSTATUSSET_BK1RDY (0x1ul << USB_DEVICE_EPSTATUSSET_BK1RDY_Pos)
mbed_official	579:53297373a894	999	#define USB_DEVICE_EPSTATUSSET_MASK 0xF7ul /*< \brief (USB_DEVICE_EPSTATUSSET) MASK Register /
mbed_official	579:53297373a894	1000
mbed_official	579:53297373a894	1001	/* -------- USB_HOST_PSTATUSSET : (USB Offset: 0x105) ( /W 8) HOST HOST_PIPE End Point Pipe Status Set -------- */
mbed_official	579:53297373a894	1002	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1003	typedef union {
mbed_official	579:53297373a894	1004	struct {
mbed_official	579:53297373a894	1005	uint8_t DTGL:1; /!< bit: 0 Data Toggle Set /
mbed_official	579:53297373a894	1006	uint8_t :1; /!< bit: 1 Reserved /
mbed_official	579:53297373a894	1007	uint8_t CURBK:1; /!< bit: 2 Current Bank Set /
mbed_official	579:53297373a894	1008	uint8_t :1; /!< bit: 3 Reserved /
mbed_official	579:53297373a894	1009	uint8_t PFREEZE:1; /!< bit: 4 Pipe Freeze Set /
mbed_official	579:53297373a894	1010	uint8_t :1; /!< bit: 5 Reserved /
mbed_official	579:53297373a894	1011	uint8_t BK0RDY:1; /!< bit: 6 Bank 0 Ready Set /
mbed_official	579:53297373a894	1012	uint8_t BK1RDY:1; /!< bit: 7 Bank 1 Ready Set /
mbed_official	579:53297373a894	1013	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1014	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1015	} USB_HOST_PSTATUSSET_Type;
mbed_official	579:53297373a894	1016	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1017
mbed_official	579:53297373a894	1018	#define USB_HOST_PSTATUSSET_OFFSET 0x105 /*< \brief (USB_HOST_PSTATUSSET offset) HOST_PIPE End Point Pipe Status Set /
mbed_official	579:53297373a894	1019	#define USB_HOST_PSTATUSSET_RESETVALUE 0x00ul /*< \brief (USB_HOST_PSTATUSSET reset_value) HOST_PIPE End Point Pipe Status Set /
mbed_official	579:53297373a894	1020
mbed_official	579:53297373a894	1021	#define USB_HOST_PSTATUSSET_DTGL_Pos 0 /*< \brief (USB_HOST_PSTATUSSET) Data Toggle Set /
mbed_official	579:53297373a894	1022	#define USB_HOST_PSTATUSSET_DTGL (0x1ul << USB_HOST_PSTATUSSET_DTGL_Pos)
mbed_official	579:53297373a894	1023	#define USB_HOST_PSTATUSSET_CURBK_Pos 2 /*< \brief (USB_HOST_PSTATUSSET) Current Bank Set /
mbed_official	579:53297373a894	1024	#define USB_HOST_PSTATUSSET_CURBK (0x1ul << USB_HOST_PSTATUSSET_CURBK_Pos)
mbed_official	579:53297373a894	1025	#define USB_HOST_PSTATUSSET_PFREEZE_Pos 4 /*< \brief (USB_HOST_PSTATUSSET) Pipe Freeze Set /
mbed_official	579:53297373a894	1026	#define USB_HOST_PSTATUSSET_PFREEZE (0x1ul << USB_HOST_PSTATUSSET_PFREEZE_Pos)
mbed_official	579:53297373a894	1027	#define USB_HOST_PSTATUSSET_BK0RDY_Pos 6 /*< \brief (USB_HOST_PSTATUSSET) Bank 0 Ready Set /
mbed_official	579:53297373a894	1028	#define USB_HOST_PSTATUSSET_BK0RDY (0x1ul << USB_HOST_PSTATUSSET_BK0RDY_Pos)
mbed_official	579:53297373a894	1029	#define USB_HOST_PSTATUSSET_BK1RDY_Pos 7 /*< \brief (USB_HOST_PSTATUSSET) Bank 1 Ready Set /
mbed_official	579:53297373a894	1030	#define USB_HOST_PSTATUSSET_BK1RDY (0x1ul << USB_HOST_PSTATUSSET_BK1RDY_Pos)
mbed_official	579:53297373a894	1031	#define USB_HOST_PSTATUSSET_MASK 0xD5ul /*< \brief (USB_HOST_PSTATUSSET) MASK Register /
mbed_official	579:53297373a894	1032
mbed_official	579:53297373a894	1033	/* -------- USB_DEVICE_EPSTATUS : (USB Offset: 0x106) (R/ 8) DEVICE DEVICE_ENDPOINT End Point Pipe Status -------- */
mbed_official	579:53297373a894	1034	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1035	typedef union {
mbed_official	579:53297373a894	1036	struct {
mbed_official	579:53297373a894	1037	uint8_t DTGLOUT:1; /!< bit: 0 Data Toggle Out /
mbed_official	579:53297373a894	1038	uint8_t DTGLIN:1; /!< bit: 1 Data Toggle In /
mbed_official	579:53297373a894	1039	uint8_t CURBK:1; /!< bit: 2 Current Bank /
mbed_official	579:53297373a894	1040	uint8_t :1; /!< bit: 3 Reserved /
mbed_official	579:53297373a894	1041	uint8_t STALLRQ0:1; /!< bit: 4 Stall 0 Request /
mbed_official	579:53297373a894	1042	uint8_t STALLRQ1:1; /!< bit: 5 Stall 1 Request /
mbed_official	579:53297373a894	1043	uint8_t BK0RDY:1; /!< bit: 6 Bank 0 ready /
mbed_official	579:53297373a894	1044	uint8_t BK1RDY:1; /!< bit: 7 Bank 1 ready /
mbed_official	579:53297373a894	1045	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1046	struct {
mbed_official	579:53297373a894	1047	uint8_t :4; /!< bit: 0.. 3 Reserved /
mbed_official	579:53297373a894	1048	uint8_t STALLRQ:2; /!< bit: 4.. 5 Stall x Request /
mbed_official	579:53297373a894	1049	uint8_t :2; /!< bit: 6.. 7 Reserved /
mbed_official	579:53297373a894	1050	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	1051	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1052	} USB_DEVICE_EPSTATUS_Type;
mbed_official	579:53297373a894	1053	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1054
mbed_official	579:53297373a894	1055	#define USB_DEVICE_EPSTATUS_OFFSET 0x106 /*< \brief (USB_DEVICE_EPSTATUS offset) DEVICE_ENDPOINT End Point Pipe Status /
mbed_official	579:53297373a894	1056	#define USB_DEVICE_EPSTATUS_RESETVALUE 0x00ul /*< \brief (USB_DEVICE_EPSTATUS reset_value) DEVICE_ENDPOINT End Point Pipe Status /
mbed_official	579:53297373a894	1057
mbed_official	579:53297373a894	1058	#define USB_DEVICE_EPSTATUS_DTGLOUT_Pos 0 /*< \brief (USB_DEVICE_EPSTATUS) Data Toggle Out /
mbed_official	579:53297373a894	1059	#define USB_DEVICE_EPSTATUS_DTGLOUT (0x1ul << USB_DEVICE_EPSTATUS_DTGLOUT_Pos)
mbed_official	579:53297373a894	1060	#define USB_DEVICE_EPSTATUS_DTGLIN_Pos 1 /*< \brief (USB_DEVICE_EPSTATUS) Data Toggle In /
mbed_official	579:53297373a894	1061	#define USB_DEVICE_EPSTATUS_DTGLIN (0x1ul << USB_DEVICE_EPSTATUS_DTGLIN_Pos)
mbed_official	579:53297373a894	1062	#define USB_DEVICE_EPSTATUS_CURBK_Pos 2 /*< \brief (USB_DEVICE_EPSTATUS) Current Bank /
mbed_official	579:53297373a894	1063	#define USB_DEVICE_EPSTATUS_CURBK (0x1ul << USB_DEVICE_EPSTATUS_CURBK_Pos)
mbed_official	579:53297373a894	1064	#define USB_DEVICE_EPSTATUS_STALLRQ0_Pos 4 /*< \brief (USB_DEVICE_EPSTATUS) Stall 0 Request /
mbed_official	579:53297373a894	1065	#define USB_DEVICE_EPSTATUS_STALLRQ0 (1 << USB_DEVICE_EPSTATUS_STALLRQ0_Pos)
mbed_official	579:53297373a894	1066	#define USB_DEVICE_EPSTATUS_STALLRQ1_Pos 5 /*< \brief (USB_DEVICE_EPSTATUS) Stall 1 Request /
mbed_official	579:53297373a894	1067	#define USB_DEVICE_EPSTATUS_STALLRQ1 (1 << USB_DEVICE_EPSTATUS_STALLRQ1_Pos)
mbed_official	579:53297373a894	1068	#define USB_DEVICE_EPSTATUS_STALLRQ_Pos 4 /*< \brief (USB_DEVICE_EPSTATUS) Stall x Request /
mbed_official	579:53297373a894	1069	#define USB_DEVICE_EPSTATUS_STALLRQ_Msk (0x3ul << USB_DEVICE_EPSTATUS_STALLRQ_Pos)
mbed_official	579:53297373a894	1070	#define USB_DEVICE_EPSTATUS_STALLRQ(value) ((USB_DEVICE_EPSTATUS_STALLRQ_Msk & ((value) << USB_DEVICE_EPSTATUS_STALLRQ_Pos)))
mbed_official	579:53297373a894	1071	#define USB_DEVICE_EPSTATUS_BK0RDY_Pos 6 /*< \brief (USB_DEVICE_EPSTATUS) Bank 0 ready /
mbed_official	579:53297373a894	1072	#define USB_DEVICE_EPSTATUS_BK0RDY (0x1ul << USB_DEVICE_EPSTATUS_BK0RDY_Pos)
mbed_official	579:53297373a894	1073	#define USB_DEVICE_EPSTATUS_BK1RDY_Pos 7 /*< \brief (USB_DEVICE_EPSTATUS) Bank 1 ready /
mbed_official	579:53297373a894	1074	#define USB_DEVICE_EPSTATUS_BK1RDY (0x1ul << USB_DEVICE_EPSTATUS_BK1RDY_Pos)
mbed_official	579:53297373a894	1075	#define USB_DEVICE_EPSTATUS_MASK 0xF7ul /*< \brief (USB_DEVICE_EPSTATUS) MASK Register /
mbed_official	579:53297373a894	1076
mbed_official	579:53297373a894	1077	/* -------- USB_HOST_PSTATUS : (USB Offset: 0x106) (R/ 8) HOST HOST_PIPE End Point Pipe Status -------- */
mbed_official	579:53297373a894	1078	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1079	typedef union {
mbed_official	579:53297373a894	1080	struct {
mbed_official	579:53297373a894	1081	uint8_t DTGL:1; /!< bit: 0 Data Toggle /
mbed_official	579:53297373a894	1082	uint8_t :1; /!< bit: 1 Reserved /
mbed_official	579:53297373a894	1083	uint8_t CURBK:1; /!< bit: 2 Current Bank /
mbed_official	579:53297373a894	1084	uint8_t :1; /!< bit: 3 Reserved /
mbed_official	579:53297373a894	1085	uint8_t PFREEZE:1; /!< bit: 4 Pipe Freeze /
mbed_official	579:53297373a894	1086	uint8_t :1; /!< bit: 5 Reserved /
mbed_official	579:53297373a894	1087	uint8_t BK0RDY:1; /!< bit: 6 Bank 0 ready /
mbed_official	579:53297373a894	1088	uint8_t BK1RDY:1; /!< bit: 7 Bank 1 ready /
mbed_official	579:53297373a894	1089	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1090	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1091	} USB_HOST_PSTATUS_Type;
mbed_official	579:53297373a894	1092	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1093
mbed_official	579:53297373a894	1094	#define USB_HOST_PSTATUS_OFFSET 0x106 /*< \brief (USB_HOST_PSTATUS offset) HOST_PIPE End Point Pipe Status /
mbed_official	579:53297373a894	1095	#define USB_HOST_PSTATUS_RESETVALUE 0x00ul /*< \brief (USB_HOST_PSTATUS reset_value) HOST_PIPE End Point Pipe Status /
mbed_official	579:53297373a894	1096
mbed_official	579:53297373a894	1097	#define USB_HOST_PSTATUS_DTGL_Pos 0 /*< \brief (USB_HOST_PSTATUS) Data Toggle /
mbed_official	579:53297373a894	1098	#define USB_HOST_PSTATUS_DTGL (0x1ul << USB_HOST_PSTATUS_DTGL_Pos)
mbed_official	579:53297373a894	1099	#define USB_HOST_PSTATUS_CURBK_Pos 2 /*< \brief (USB_HOST_PSTATUS) Current Bank /
mbed_official	579:53297373a894	1100	#define USB_HOST_PSTATUS_CURBK (0x1ul << USB_HOST_PSTATUS_CURBK_Pos)
mbed_official	579:53297373a894	1101	#define USB_HOST_PSTATUS_PFREEZE_Pos 4 /*< \brief (USB_HOST_PSTATUS) Pipe Freeze /
mbed_official	579:53297373a894	1102	#define USB_HOST_PSTATUS_PFREEZE (0x1ul << USB_HOST_PSTATUS_PFREEZE_Pos)
mbed_official	579:53297373a894	1103	#define USB_HOST_PSTATUS_BK0RDY_Pos 6 /*< \brief (USB_HOST_PSTATUS) Bank 0 ready /
mbed_official	579:53297373a894	1104	#define USB_HOST_PSTATUS_BK0RDY (0x1ul << USB_HOST_PSTATUS_BK0RDY_Pos)
mbed_official	579:53297373a894	1105	#define USB_HOST_PSTATUS_BK1RDY_Pos 7 /*< \brief (USB_HOST_PSTATUS) Bank 1 ready /
mbed_official	579:53297373a894	1106	#define USB_HOST_PSTATUS_BK1RDY (0x1ul << USB_HOST_PSTATUS_BK1RDY_Pos)
mbed_official	579:53297373a894	1107	#define USB_HOST_PSTATUS_MASK 0xD5ul /*< \brief (USB_HOST_PSTATUS) MASK Register /
mbed_official	579:53297373a894	1108
mbed_official	579:53297373a894	1109	/* -------- USB_DEVICE_EPINTFLAG : (USB Offset: 0x107) (R/W 8) DEVICE DEVICE_ENDPOINT End Point Interrupt Flag -------- */
mbed_official	579:53297373a894	1110	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1111	typedef union {
mbed_official	579:53297373a894	1112	struct {
mbed_official	579:53297373a894	1113	uint8_t TRCPT0:1; /!< bit: 0 Transfer Complete 0 /
mbed_official	579:53297373a894	1114	uint8_t TRCPT1:1; /!< bit: 1 Transfer Complete 1 /
mbed_official	579:53297373a894	1115	uint8_t TRFAIL0:1; /!< bit: 2 Error Flow 0 /
mbed_official	579:53297373a894	1116	uint8_t TRFAIL1:1; /!< bit: 3 Error Flow 1 /
mbed_official	579:53297373a894	1117	uint8_t RXSTP:1; /!< bit: 4 Received Setup /
mbed_official	579:53297373a894	1118	uint8_t STALL0:1; /!< bit: 5 Stall 0 In/out /
mbed_official	579:53297373a894	1119	uint8_t STALL1:1; /!< bit: 6 Stall 1 In/out /
mbed_official	579:53297373a894	1120	uint8_t :1; /!< bit: 7 Reserved /
mbed_official	579:53297373a894	1121	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1122	struct {
mbed_official	579:53297373a894	1123	uint8_t TRCPT:2; /!< bit: 0.. 1 Transfer Complete x /
mbed_official	579:53297373a894	1124	uint8_t TRFAIL:2; /!< bit: 2.. 3 Error Flow x /
mbed_official	579:53297373a894	1125	uint8_t :1; /!< bit: 4 Reserved /
mbed_official	579:53297373a894	1126	uint8_t STALL:2; /!< bit: 5.. 6 Stall x In/out /
mbed_official	579:53297373a894	1127	uint8_t :1; /!< bit: 7 Reserved /
mbed_official	579:53297373a894	1128	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	1129	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1130	} USB_DEVICE_EPINTFLAG_Type;
mbed_official	579:53297373a894	1131	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1132
mbed_official	579:53297373a894	1133	#define USB_DEVICE_EPINTFLAG_OFFSET 0x107 /*< \brief (USB_DEVICE_EPINTFLAG offset) DEVICE_ENDPOINT End Point Interrupt Flag /
mbed_official	579:53297373a894	1134	#define USB_DEVICE_EPINTFLAG_RESETVALUE 0x00ul /*< \brief (USB_DEVICE_EPINTFLAG reset_value) DEVICE_ENDPOINT End Point Interrupt Flag /
mbed_official	579:53297373a894	1135
mbed_official	579:53297373a894	1136	#define USB_DEVICE_EPINTFLAG_TRCPT0_Pos 0 /*< \brief (USB_DEVICE_EPINTFLAG) Transfer Complete 0 /
mbed_official	579:53297373a894	1137	#define USB_DEVICE_EPINTFLAG_TRCPT0 (1 << USB_DEVICE_EPINTFLAG_TRCPT0_Pos)
mbed_official	579:53297373a894	1138	#define USB_DEVICE_EPINTFLAG_TRCPT1_Pos 1 /*< \brief (USB_DEVICE_EPINTFLAG) Transfer Complete 1 /
mbed_official	579:53297373a894	1139	#define USB_DEVICE_EPINTFLAG_TRCPT1 (1 << USB_DEVICE_EPINTFLAG_TRCPT1_Pos)
mbed_official	579:53297373a894	1140	#define USB_DEVICE_EPINTFLAG_TRCPT_Pos 0 /*< \brief (USB_DEVICE_EPINTFLAG) Transfer Complete x /
mbed_official	579:53297373a894	1141	#define USB_DEVICE_EPINTFLAG_TRCPT_Msk (0x3ul << USB_DEVICE_EPINTFLAG_TRCPT_Pos)
mbed_official	579:53297373a894	1142	#define USB_DEVICE_EPINTFLAG_TRCPT(value) ((USB_DEVICE_EPINTFLAG_TRCPT_Msk & ((value) << USB_DEVICE_EPINTFLAG_TRCPT_Pos)))
mbed_official	579:53297373a894	1143	#define USB_DEVICE_EPINTFLAG_TRFAIL0_Pos 2 /*< \brief (USB_DEVICE_EPINTFLAG) Error Flow 0 /
mbed_official	579:53297373a894	1144	#define USB_DEVICE_EPINTFLAG_TRFAIL0 (1 << USB_DEVICE_EPINTFLAG_TRFAIL0_Pos)
mbed_official	579:53297373a894	1145	#define USB_DEVICE_EPINTFLAG_TRFAIL1_Pos 3 /*< \brief (USB_DEVICE_EPINTFLAG) Error Flow 1 /
mbed_official	579:53297373a894	1146	#define USB_DEVICE_EPINTFLAG_TRFAIL1 (1 << USB_DEVICE_EPINTFLAG_TRFAIL1_Pos)
mbed_official	579:53297373a894	1147	#define USB_DEVICE_EPINTFLAG_TRFAIL_Pos 2 /*< \brief (USB_DEVICE_EPINTFLAG) Error Flow x /
mbed_official	579:53297373a894	1148	#define USB_DEVICE_EPINTFLAG_TRFAIL_Msk (0x3ul << USB_DEVICE_EPINTFLAG_TRFAIL_Pos)
mbed_official	579:53297373a894	1149	#define USB_DEVICE_EPINTFLAG_TRFAIL(value) ((USB_DEVICE_EPINTFLAG_TRFAIL_Msk & ((value) << USB_DEVICE_EPINTFLAG_TRFAIL_Pos)))
mbed_official	579:53297373a894	1150	#define USB_DEVICE_EPINTFLAG_RXSTP_Pos 4 /*< \brief (USB_DEVICE_EPINTFLAG) Received Setup /
mbed_official	579:53297373a894	1151	#define USB_DEVICE_EPINTFLAG_RXSTP (0x1ul << USB_DEVICE_EPINTFLAG_RXSTP_Pos)
mbed_official	579:53297373a894	1152	#define USB_DEVICE_EPINTFLAG_STALL0_Pos 5 /*< \brief (USB_DEVICE_EPINTFLAG) Stall 0 In/out /
mbed_official	579:53297373a894	1153	#define USB_DEVICE_EPINTFLAG_STALL0 (1 << USB_DEVICE_EPINTFLAG_STALL0_Pos)
mbed_official	579:53297373a894	1154	#define USB_DEVICE_EPINTFLAG_STALL1_Pos 6 /*< \brief (USB_DEVICE_EPINTFLAG) Stall 1 In/out /
mbed_official	579:53297373a894	1155	#define USB_DEVICE_EPINTFLAG_STALL1 (1 << USB_DEVICE_EPINTFLAG_STALL1_Pos)
mbed_official	579:53297373a894	1156	#define USB_DEVICE_EPINTFLAG_STALL_Pos 5 /*< \brief (USB_DEVICE_EPINTFLAG) Stall x In/out /
mbed_official	579:53297373a894	1157	#define USB_DEVICE_EPINTFLAG_STALL_Msk (0x3ul << USB_DEVICE_EPINTFLAG_STALL_Pos)
mbed_official	579:53297373a894	1158	#define USB_DEVICE_EPINTFLAG_STALL(value) ((USB_DEVICE_EPINTFLAG_STALL_Msk & ((value) << USB_DEVICE_EPINTFLAG_STALL_Pos)))
mbed_official	579:53297373a894	1159	#define USB_DEVICE_EPINTFLAG_MASK 0x7Ful /*< \brief (USB_DEVICE_EPINTFLAG) MASK Register /
mbed_official	579:53297373a894	1160
mbed_official	579:53297373a894	1161	/* -------- USB_HOST_PINTFLAG : (USB Offset: 0x107) (R/W 8) HOST HOST_PIPE Pipe Interrupt Flag -------- */
mbed_official	579:53297373a894	1162	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1163	typedef union {
mbed_official	579:53297373a894	1164	struct {
mbed_official	579:53297373a894	1165	uint8_t TRCPT0:1; /!< bit: 0 Transfer Complete 0 Interrupt Flag /
mbed_official	579:53297373a894	1166	uint8_t TRCPT1:1; /!< bit: 1 Transfer Complete 1 Interrupt Flag /
mbed_official	579:53297373a894	1167	uint8_t TRFAIL:1; /!< bit: 2 Error Flow Interrupt Flag /
mbed_official	579:53297373a894	1168	uint8_t PERR:1; /!< bit: 3 Pipe Error Interrupt Flag /
mbed_official	579:53297373a894	1169	uint8_t TXSTP:1; /!< bit: 4 Transmit Setup Interrupt Flag /
mbed_official	579:53297373a894	1170	uint8_t STALL:1; /!< bit: 5 Stall Interrupt Flag /
mbed_official	579:53297373a894	1171	uint8_t :2; /!< bit: 6.. 7 Reserved /
mbed_official	579:53297373a894	1172	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1173	struct {
mbed_official	579:53297373a894	1174	uint8_t TRCPT:2; /!< bit: 0.. 1 Transfer Complete x Interrupt Flag /
mbed_official	579:53297373a894	1175	uint8_t :6; /!< bit: 2.. 7 Reserved /
mbed_official	579:53297373a894	1176	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	1177	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1178	} USB_HOST_PINTFLAG_Type;
mbed_official	579:53297373a894	1179	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1180
mbed_official	579:53297373a894	1181	#define USB_HOST_PINTFLAG_OFFSET 0x107 /*< \brief (USB_HOST_PINTFLAG offset) HOST_PIPE Pipe Interrupt Flag /
mbed_official	579:53297373a894	1182	#define USB_HOST_PINTFLAG_RESETVALUE 0x00ul /*< \brief (USB_HOST_PINTFLAG reset_value) HOST_PIPE Pipe Interrupt Flag /
mbed_official	579:53297373a894	1183
mbed_official	579:53297373a894	1184	#define USB_HOST_PINTFLAG_TRCPT0_Pos 0 /*< \brief (USB_HOST_PINTFLAG) Transfer Complete 0 Interrupt Flag /
mbed_official	579:53297373a894	1185	#define USB_HOST_PINTFLAG_TRCPT0 (1 << USB_HOST_PINTFLAG_TRCPT0_Pos)
mbed_official	579:53297373a894	1186	#define USB_HOST_PINTFLAG_TRCPT1_Pos 1 /*< \brief (USB_HOST_PINTFLAG) Transfer Complete 1 Interrupt Flag /
mbed_official	579:53297373a894	1187	#define USB_HOST_PINTFLAG_TRCPT1 (1 << USB_HOST_PINTFLAG_TRCPT1_Pos)
mbed_official	579:53297373a894	1188	#define USB_HOST_PINTFLAG_TRCPT_Pos 0 /*< \brief (USB_HOST_PINTFLAG) Transfer Complete x Interrupt Flag /
mbed_official	579:53297373a894	1189	#define USB_HOST_PINTFLAG_TRCPT_Msk (0x3ul << USB_HOST_PINTFLAG_TRCPT_Pos)
mbed_official	579:53297373a894	1190	#define USB_HOST_PINTFLAG_TRCPT(value) ((USB_HOST_PINTFLAG_TRCPT_Msk & ((value) << USB_HOST_PINTFLAG_TRCPT_Pos)))
mbed_official	579:53297373a894	1191	#define USB_HOST_PINTFLAG_TRFAIL_Pos 2 /*< \brief (USB_HOST_PINTFLAG) Error Flow Interrupt Flag /
mbed_official	579:53297373a894	1192	#define USB_HOST_PINTFLAG_TRFAIL (0x1ul << USB_HOST_PINTFLAG_TRFAIL_Pos)
mbed_official	579:53297373a894	1193	#define USB_HOST_PINTFLAG_PERR_Pos 3 /*< \brief (USB_HOST_PINTFLAG) Pipe Error Interrupt Flag /
mbed_official	579:53297373a894	1194	#define USB_HOST_PINTFLAG_PERR (0x1ul << USB_HOST_PINTFLAG_PERR_Pos)
mbed_official	579:53297373a894	1195	#define USB_HOST_PINTFLAG_TXSTP_Pos 4 /*< \brief (USB_HOST_PINTFLAG) Transmit Setup Interrupt Flag /
mbed_official	579:53297373a894	1196	#define USB_HOST_PINTFLAG_TXSTP (0x1ul << USB_HOST_PINTFLAG_TXSTP_Pos)
mbed_official	579:53297373a894	1197	#define USB_HOST_PINTFLAG_STALL_Pos 5 /*< \brief (USB_HOST_PINTFLAG) Stall Interrupt Flag /
mbed_official	579:53297373a894	1198	#define USB_HOST_PINTFLAG_STALL (0x1ul << USB_HOST_PINTFLAG_STALL_Pos)
mbed_official	579:53297373a894	1199	#define USB_HOST_PINTFLAG_MASK 0x3Ful /*< \brief (USB_HOST_PINTFLAG) MASK Register /
mbed_official	579:53297373a894	1200
mbed_official	579:53297373a894	1201	/* -------- USB_DEVICE_EPINTENCLR : (USB Offset: 0x108) (R/W 8) DEVICE DEVICE_ENDPOINT End Point Interrupt Clear Flag -------- */
mbed_official	579:53297373a894	1202	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1203	typedef union {
mbed_official	579:53297373a894	1204	struct {
mbed_official	579:53297373a894	1205	uint8_t TRCPT0:1; /!< bit: 0 Transfer Complete 0 Interrupt Disable /
mbed_official	579:53297373a894	1206	uint8_t TRCPT1:1; /!< bit: 1 Transfer Complete 1 Interrupt Disable /
mbed_official	579:53297373a894	1207	uint8_t TRFAIL0:1; /!< bit: 2 Error Flow 0 Interrupt Disable /
mbed_official	579:53297373a894	1208	uint8_t TRFAIL1:1; /!< bit: 3 Error Flow 1 Interrupt Disable /
mbed_official	579:53297373a894	1209	uint8_t RXSTP:1; /!< bit: 4 Received Setup Interrupt Disable /
mbed_official	579:53297373a894	1210	uint8_t STALL0:1; /!< bit: 5 Stall 0 In/Out Interrupt Disable /
mbed_official	579:53297373a894	1211	uint8_t STALL1:1; /!< bit: 6 Stall 1 In/Out Interrupt Disable /
mbed_official	579:53297373a894	1212	uint8_t :1; /!< bit: 7 Reserved /
mbed_official	579:53297373a894	1213	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1214	struct {
mbed_official	579:53297373a894	1215	uint8_t TRCPT:2; /!< bit: 0.. 1 Transfer Complete x Interrupt Disable /
mbed_official	579:53297373a894	1216	uint8_t TRFAIL:2; /!< bit: 2.. 3 Error Flow x Interrupt Disable /
mbed_official	579:53297373a894	1217	uint8_t :1; /!< bit: 4 Reserved /
mbed_official	579:53297373a894	1218	uint8_t STALL:2; /!< bit: 5.. 6 Stall x In/Out Interrupt Disable /
mbed_official	579:53297373a894	1219	uint8_t :1; /!< bit: 7 Reserved /
mbed_official	579:53297373a894	1220	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	1221	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1222	} USB_DEVICE_EPINTENCLR_Type;
mbed_official	579:53297373a894	1223	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1224
mbed_official	579:53297373a894	1225	#define USB_DEVICE_EPINTENCLR_OFFSET 0x108 /*< \brief (USB_DEVICE_EPINTENCLR offset) DEVICE_ENDPOINT End Point Interrupt Clear Flag /
mbed_official	579:53297373a894	1226	#define USB_DEVICE_EPINTENCLR_RESETVALUE 0x00ul /*< \brief (USB_DEVICE_EPINTENCLR reset_value) DEVICE_ENDPOINT End Point Interrupt Clear Flag /
mbed_official	579:53297373a894	1227
mbed_official	579:53297373a894	1228	#define USB_DEVICE_EPINTENCLR_TRCPT0_Pos 0 /*< \brief (USB_DEVICE_EPINTENCLR) Transfer Complete 0 Interrupt Disable /
mbed_official	579:53297373a894	1229	#define USB_DEVICE_EPINTENCLR_TRCPT0 (1 << USB_DEVICE_EPINTENCLR_TRCPT0_Pos)
mbed_official	579:53297373a894	1230	#define USB_DEVICE_EPINTENCLR_TRCPT1_Pos 1 /*< \brief (USB_DEVICE_EPINTENCLR) Transfer Complete 1 Interrupt Disable /
mbed_official	579:53297373a894	1231	#define USB_DEVICE_EPINTENCLR_TRCPT1 (1 << USB_DEVICE_EPINTENCLR_TRCPT1_Pos)
mbed_official	579:53297373a894	1232	#define USB_DEVICE_EPINTENCLR_TRCPT_Pos 0 /*< \brief (USB_DEVICE_EPINTENCLR) Transfer Complete x Interrupt Disable /
mbed_official	579:53297373a894	1233	#define USB_DEVICE_EPINTENCLR_TRCPT_Msk (0x3ul << USB_DEVICE_EPINTENCLR_TRCPT_Pos)
mbed_official	579:53297373a894	1234	#define USB_DEVICE_EPINTENCLR_TRCPT(value) ((USB_DEVICE_EPINTENCLR_TRCPT_Msk & ((value) << USB_DEVICE_EPINTENCLR_TRCPT_Pos)))
mbed_official	579:53297373a894	1235	#define USB_DEVICE_EPINTENCLR_TRFAIL0_Pos 2 /*< \brief (USB_DEVICE_EPINTENCLR) Error Flow 0 Interrupt Disable /
mbed_official	579:53297373a894	1236	#define USB_DEVICE_EPINTENCLR_TRFAIL0 (1 << USB_DEVICE_EPINTENCLR_TRFAIL0_Pos)
mbed_official	579:53297373a894	1237	#define USB_DEVICE_EPINTENCLR_TRFAIL1_Pos 3 /*< \brief (USB_DEVICE_EPINTENCLR) Error Flow 1 Interrupt Disable /
mbed_official	579:53297373a894	1238	#define USB_DEVICE_EPINTENCLR_TRFAIL1 (1 << USB_DEVICE_EPINTENCLR_TRFAIL1_Pos)
mbed_official	579:53297373a894	1239	#define USB_DEVICE_EPINTENCLR_TRFAIL_Pos 2 /*< \brief (USB_DEVICE_EPINTENCLR) Error Flow x Interrupt Disable /
mbed_official	579:53297373a894	1240	#define USB_DEVICE_EPINTENCLR_TRFAIL_Msk (0x3ul << USB_DEVICE_EPINTENCLR_TRFAIL_Pos)
mbed_official	579:53297373a894	1241	#define USB_DEVICE_EPINTENCLR_TRFAIL(value) ((USB_DEVICE_EPINTENCLR_TRFAIL_Msk & ((value) << USB_DEVICE_EPINTENCLR_TRFAIL_Pos)))
mbed_official	579:53297373a894	1242	#define USB_DEVICE_EPINTENCLR_RXSTP_Pos 4 /*< \brief (USB_DEVICE_EPINTENCLR) Received Setup Interrupt Disable /
mbed_official	579:53297373a894	1243	#define USB_DEVICE_EPINTENCLR_RXSTP (0x1ul << USB_DEVICE_EPINTENCLR_RXSTP_Pos)
mbed_official	579:53297373a894	1244	#define USB_DEVICE_EPINTENCLR_STALL0_Pos 5 /*< \brief (USB_DEVICE_EPINTENCLR) Stall 0 In/Out Interrupt Disable /
mbed_official	579:53297373a894	1245	#define USB_DEVICE_EPINTENCLR_STALL0 (1 << USB_DEVICE_EPINTENCLR_STALL0_Pos)
mbed_official	579:53297373a894	1246	#define USB_DEVICE_EPINTENCLR_STALL1_Pos 6 /*< \brief (USB_DEVICE_EPINTENCLR) Stall 1 In/Out Interrupt Disable /
mbed_official	579:53297373a894	1247	#define USB_DEVICE_EPINTENCLR_STALL1 (1 << USB_DEVICE_EPINTENCLR_STALL1_Pos)
mbed_official	579:53297373a894	1248	#define USB_DEVICE_EPINTENCLR_STALL_Pos 5 /*< \brief (USB_DEVICE_EPINTENCLR) Stall x In/Out Interrupt Disable /
mbed_official	579:53297373a894	1249	#define USB_DEVICE_EPINTENCLR_STALL_Msk (0x3ul << USB_DEVICE_EPINTENCLR_STALL_Pos)
mbed_official	579:53297373a894	1250	#define USB_DEVICE_EPINTENCLR_STALL(value) ((USB_DEVICE_EPINTENCLR_STALL_Msk & ((value) << USB_DEVICE_EPINTENCLR_STALL_Pos)))
mbed_official	579:53297373a894	1251	#define USB_DEVICE_EPINTENCLR_MASK 0x7Ful /*< \brief (USB_DEVICE_EPINTENCLR) MASK Register /
mbed_official	579:53297373a894	1252
mbed_official	579:53297373a894	1253	/* -------- USB_HOST_PINTENCLR : (USB Offset: 0x108) (R/W 8) HOST HOST_PIPE Pipe Interrupt Flag Clear -------- */
mbed_official	579:53297373a894	1254	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1255	typedef union {
mbed_official	579:53297373a894	1256	struct {
mbed_official	579:53297373a894	1257	uint8_t TRCPT0:1; /!< bit: 0 Transfer Complete 0 Disable /
mbed_official	579:53297373a894	1258	uint8_t TRCPT1:1; /!< bit: 1 Transfer Complete 1 Disable /
mbed_official	579:53297373a894	1259	uint8_t TRFAIL:1; /!< bit: 2 Error Flow Interrupt Disable /
mbed_official	579:53297373a894	1260	uint8_t PERR:1; /!< bit: 3 Pipe Error Interrupt Disable /
mbed_official	579:53297373a894	1261	uint8_t TXSTP:1; /!< bit: 4 Transmit Setup Interrupt Disable /
mbed_official	579:53297373a894	1262	uint8_t STALL:1; /!< bit: 5 Stall Inetrrupt Disable /
mbed_official	579:53297373a894	1263	uint8_t :2; /!< bit: 6.. 7 Reserved /
mbed_official	579:53297373a894	1264	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1265	struct {
mbed_official	579:53297373a894	1266	uint8_t TRCPT:2; /!< bit: 0.. 1 Transfer Complete x Disable /
mbed_official	579:53297373a894	1267	uint8_t :6; /!< bit: 2.. 7 Reserved /
mbed_official	579:53297373a894	1268	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	1269	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1270	} USB_HOST_PINTENCLR_Type;
mbed_official	579:53297373a894	1271	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1272
mbed_official	579:53297373a894	1273	#define USB_HOST_PINTENCLR_OFFSET 0x108 /*< \brief (USB_HOST_PINTENCLR offset) HOST_PIPE Pipe Interrupt Flag Clear /
mbed_official	579:53297373a894	1274	#define USB_HOST_PINTENCLR_RESETVALUE 0x00ul /*< \brief (USB_HOST_PINTENCLR reset_value) HOST_PIPE Pipe Interrupt Flag Clear /
mbed_official	579:53297373a894	1275
mbed_official	579:53297373a894	1276	#define USB_HOST_PINTENCLR_TRCPT0_Pos 0 /*< \brief (USB_HOST_PINTENCLR) Transfer Complete 0 Disable /
mbed_official	579:53297373a894	1277	#define USB_HOST_PINTENCLR_TRCPT0 (1 << USB_HOST_PINTENCLR_TRCPT0_Pos)
mbed_official	579:53297373a894	1278	#define USB_HOST_PINTENCLR_TRCPT1_Pos 1 /*< \brief (USB_HOST_PINTENCLR) Transfer Complete 1 Disable /
mbed_official	579:53297373a894	1279	#define USB_HOST_PINTENCLR_TRCPT1 (1 << USB_HOST_PINTENCLR_TRCPT1_Pos)
mbed_official	579:53297373a894	1280	#define USB_HOST_PINTENCLR_TRCPT_Pos 0 /*< \brief (USB_HOST_PINTENCLR) Transfer Complete x Disable /
mbed_official	579:53297373a894	1281	#define USB_HOST_PINTENCLR_TRCPT_Msk (0x3ul << USB_HOST_PINTENCLR_TRCPT_Pos)
mbed_official	579:53297373a894	1282	#define USB_HOST_PINTENCLR_TRCPT(value) ((USB_HOST_PINTENCLR_TRCPT_Msk & ((value) << USB_HOST_PINTENCLR_TRCPT_Pos)))
mbed_official	579:53297373a894	1283	#define USB_HOST_PINTENCLR_TRFAIL_Pos 2 /*< \brief (USB_HOST_PINTENCLR) Error Flow Interrupt Disable /
mbed_official	579:53297373a894	1284	#define USB_HOST_PINTENCLR_TRFAIL (0x1ul << USB_HOST_PINTENCLR_TRFAIL_Pos)
mbed_official	579:53297373a894	1285	#define USB_HOST_PINTENCLR_PERR_Pos 3 /*< \brief (USB_HOST_PINTENCLR) Pipe Error Interrupt Disable /
mbed_official	579:53297373a894	1286	#define USB_HOST_PINTENCLR_PERR (0x1ul << USB_HOST_PINTENCLR_PERR_Pos)
mbed_official	579:53297373a894	1287	#define USB_HOST_PINTENCLR_TXSTP_Pos 4 /*< \brief (USB_HOST_PINTENCLR) Transmit Setup Interrupt Disable /
mbed_official	579:53297373a894	1288	#define USB_HOST_PINTENCLR_TXSTP (0x1ul << USB_HOST_PINTENCLR_TXSTP_Pos)
mbed_official	579:53297373a894	1289	#define USB_HOST_PINTENCLR_STALL_Pos 5 /*< \brief (USB_HOST_PINTENCLR) Stall Inetrrupt Disable /
mbed_official	579:53297373a894	1290	#define USB_HOST_PINTENCLR_STALL (0x1ul << USB_HOST_PINTENCLR_STALL_Pos)
mbed_official	579:53297373a894	1291	#define USB_HOST_PINTENCLR_MASK 0x3Ful /*< \brief (USB_HOST_PINTENCLR) MASK Register /
mbed_official	579:53297373a894	1292
mbed_official	579:53297373a894	1293	/* -------- USB_DEVICE_EPINTENSET : (USB Offset: 0x109) (R/W 8) DEVICE DEVICE_ENDPOINT End Point Interrupt Set Flag -------- */
mbed_official	579:53297373a894	1294	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1295	typedef union {
mbed_official	579:53297373a894	1296	struct {
mbed_official	579:53297373a894	1297	uint8_t TRCPT0:1; /!< bit: 0 Transfer Complete 0 Interrupt Enable /
mbed_official	579:53297373a894	1298	uint8_t TRCPT1:1; /!< bit: 1 Transfer Complete 1 Interrupt Enable /
mbed_official	579:53297373a894	1299	uint8_t TRFAIL0:1; /!< bit: 2 Error Flow 0 Interrupt Enable /
mbed_official	579:53297373a894	1300	uint8_t TRFAIL1:1; /!< bit: 3 Error Flow 1 Interrupt Enable /
mbed_official	579:53297373a894	1301	uint8_t RXSTP:1; /!< bit: 4 Received Setup Interrupt Enable /
mbed_official	579:53297373a894	1302	uint8_t STALL0:1; /!< bit: 5 Stall 0 In/out Interrupt enable /
mbed_official	579:53297373a894	1303	uint8_t STALL1:1; /!< bit: 6 Stall 1 In/out Interrupt enable /
mbed_official	579:53297373a894	1304	uint8_t :1; /!< bit: 7 Reserved /
mbed_official	579:53297373a894	1305	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1306	struct {
mbed_official	579:53297373a894	1307	uint8_t TRCPT:2; /!< bit: 0.. 1 Transfer Complete x Interrupt Enable /
mbed_official	579:53297373a894	1308	uint8_t TRFAIL:2; /!< bit: 2.. 3 Error Flow x Interrupt Enable /
mbed_official	579:53297373a894	1309	uint8_t :1; /!< bit: 4 Reserved /
mbed_official	579:53297373a894	1310	uint8_t STALL:2; /!< bit: 5.. 6 Stall x In/out Interrupt enable /
mbed_official	579:53297373a894	1311	uint8_t :1; /!< bit: 7 Reserved /
mbed_official	579:53297373a894	1312	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	1313	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1314	} USB_DEVICE_EPINTENSET_Type;
mbed_official	579:53297373a894	1315	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1316
mbed_official	579:53297373a894	1317	#define USB_DEVICE_EPINTENSET_OFFSET 0x109 /*< \brief (USB_DEVICE_EPINTENSET offset) DEVICE_ENDPOINT End Point Interrupt Set Flag /
mbed_official	579:53297373a894	1318	#define USB_DEVICE_EPINTENSET_RESETVALUE 0x00ul /*< \brief (USB_DEVICE_EPINTENSET reset_value) DEVICE_ENDPOINT End Point Interrupt Set Flag /
mbed_official	579:53297373a894	1319
mbed_official	579:53297373a894	1320	#define USB_DEVICE_EPINTENSET_TRCPT0_Pos 0 /*< \brief (USB_DEVICE_EPINTENSET) Transfer Complete 0 Interrupt Enable /
mbed_official	579:53297373a894	1321	#define USB_DEVICE_EPINTENSET_TRCPT0 (1 << USB_DEVICE_EPINTENSET_TRCPT0_Pos)
mbed_official	579:53297373a894	1322	#define USB_DEVICE_EPINTENSET_TRCPT1_Pos 1 /*< \brief (USB_DEVICE_EPINTENSET) Transfer Complete 1 Interrupt Enable /
mbed_official	579:53297373a894	1323	#define USB_DEVICE_EPINTENSET_TRCPT1 (1 << USB_DEVICE_EPINTENSET_TRCPT1_Pos)
mbed_official	579:53297373a894	1324	#define USB_DEVICE_EPINTENSET_TRCPT_Pos 0 /*< \brief (USB_DEVICE_EPINTENSET) Transfer Complete x Interrupt Enable /
mbed_official	579:53297373a894	1325	#define USB_DEVICE_EPINTENSET_TRCPT_Msk (0x3ul << USB_DEVICE_EPINTENSET_TRCPT_Pos)
mbed_official	579:53297373a894	1326	#define USB_DEVICE_EPINTENSET_TRCPT(value) ((USB_DEVICE_EPINTENSET_TRCPT_Msk & ((value) << USB_DEVICE_EPINTENSET_TRCPT_Pos)))
mbed_official	579:53297373a894	1327	#define USB_DEVICE_EPINTENSET_TRFAIL0_Pos 2 /*< \brief (USB_DEVICE_EPINTENSET) Error Flow 0 Interrupt Enable /
mbed_official	579:53297373a894	1328	#define USB_DEVICE_EPINTENSET_TRFAIL0 (1 << USB_DEVICE_EPINTENSET_TRFAIL0_Pos)
mbed_official	579:53297373a894	1329	#define USB_DEVICE_EPINTENSET_TRFAIL1_Pos 3 /*< \brief (USB_DEVICE_EPINTENSET) Error Flow 1 Interrupt Enable /
mbed_official	579:53297373a894	1330	#define USB_DEVICE_EPINTENSET_TRFAIL1 (1 << USB_DEVICE_EPINTENSET_TRFAIL1_Pos)
mbed_official	579:53297373a894	1331	#define USB_DEVICE_EPINTENSET_TRFAIL_Pos 2 /*< \brief (USB_DEVICE_EPINTENSET) Error Flow x Interrupt Enable /
mbed_official	579:53297373a894	1332	#define USB_DEVICE_EPINTENSET_TRFAIL_Msk (0x3ul << USB_DEVICE_EPINTENSET_TRFAIL_Pos)
mbed_official	579:53297373a894	1333	#define USB_DEVICE_EPINTENSET_TRFAIL(value) ((USB_DEVICE_EPINTENSET_TRFAIL_Msk & ((value) << USB_DEVICE_EPINTENSET_TRFAIL_Pos)))
mbed_official	579:53297373a894	1334	#define USB_DEVICE_EPINTENSET_RXSTP_Pos 4 /*< \brief (USB_DEVICE_EPINTENSET) Received Setup Interrupt Enable /
mbed_official	579:53297373a894	1335	#define USB_DEVICE_EPINTENSET_RXSTP (0x1ul << USB_DEVICE_EPINTENSET_RXSTP_Pos)
mbed_official	579:53297373a894	1336	#define USB_DEVICE_EPINTENSET_STALL0_Pos 5 /*< \brief (USB_DEVICE_EPINTENSET) Stall 0 In/out Interrupt enable /
mbed_official	579:53297373a894	1337	#define USB_DEVICE_EPINTENSET_STALL0 (1 << USB_DEVICE_EPINTENSET_STALL0_Pos)
mbed_official	579:53297373a894	1338	#define USB_DEVICE_EPINTENSET_STALL1_Pos 6 /*< \brief (USB_DEVICE_EPINTENSET) Stall 1 In/out Interrupt enable /
mbed_official	579:53297373a894	1339	#define USB_DEVICE_EPINTENSET_STALL1 (1 << USB_DEVICE_EPINTENSET_STALL1_Pos)
mbed_official	579:53297373a894	1340	#define USB_DEVICE_EPINTENSET_STALL_Pos 5 /*< \brief (USB_DEVICE_EPINTENSET) Stall x In/out Interrupt enable /
mbed_official	579:53297373a894	1341	#define USB_DEVICE_EPINTENSET_STALL_Msk (0x3ul << USB_DEVICE_EPINTENSET_STALL_Pos)
mbed_official	579:53297373a894	1342	#define USB_DEVICE_EPINTENSET_STALL(value) ((USB_DEVICE_EPINTENSET_STALL_Msk & ((value) << USB_DEVICE_EPINTENSET_STALL_Pos)))
mbed_official	579:53297373a894	1343	#define USB_DEVICE_EPINTENSET_MASK 0x7Ful /*< \brief (USB_DEVICE_EPINTENSET) MASK Register /
mbed_official	579:53297373a894	1344
mbed_official	579:53297373a894	1345	/* -------- USB_HOST_PINTENSET : (USB Offset: 0x109) (R/W 8) HOST HOST_PIPE Pipe Interrupt Flag Set -------- */
mbed_official	579:53297373a894	1346	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1347	typedef union {
mbed_official	579:53297373a894	1348	struct {
mbed_official	579:53297373a894	1349	uint8_t TRCPT0:1; /!< bit: 0 Transfer Complete 0 Interrupt Enable /
mbed_official	579:53297373a894	1350	uint8_t TRCPT1:1; /!< bit: 1 Transfer Complete 1 Interrupt Enable /
mbed_official	579:53297373a894	1351	uint8_t TRFAIL:1; /!< bit: 2 Error Flow Interrupt Enable /
mbed_official	579:53297373a894	1352	uint8_t PERR:1; /!< bit: 3 Pipe Error Interrupt Enable /
mbed_official	579:53297373a894	1353	uint8_t TXSTP:1; /!< bit: 4 Transmit Setup Interrupt Enable /
mbed_official	579:53297373a894	1354	uint8_t STALL:1; /!< bit: 5 Stall Interrupt Enable /
mbed_official	579:53297373a894	1355	uint8_t :2; /!< bit: 6.. 7 Reserved /
mbed_official	579:53297373a894	1356	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1357	struct {
mbed_official	579:53297373a894	1358	uint8_t TRCPT:2; /!< bit: 0.. 1 Transfer Complete x Interrupt Enable /
mbed_official	579:53297373a894	1359	uint8_t :6; /!< bit: 2.. 7 Reserved /
mbed_official	579:53297373a894	1360	} vec; /!< Structure used for vec access /
mbed_official	579:53297373a894	1361	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1362	} USB_HOST_PINTENSET_Type;
mbed_official	579:53297373a894	1363	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1364
mbed_official	579:53297373a894	1365	#define USB_HOST_PINTENSET_OFFSET 0x109 /*< \brief (USB_HOST_PINTENSET offset) HOST_PIPE Pipe Interrupt Flag Set /
mbed_official	579:53297373a894	1366	#define USB_HOST_PINTENSET_RESETVALUE 0x00ul /*< \brief (USB_HOST_PINTENSET reset_value) HOST_PIPE Pipe Interrupt Flag Set /
mbed_official	579:53297373a894	1367
mbed_official	579:53297373a894	1368	#define USB_HOST_PINTENSET_TRCPT0_Pos 0 /*< \brief (USB_HOST_PINTENSET) Transfer Complete 0 Interrupt Enable /
mbed_official	579:53297373a894	1369	#define USB_HOST_PINTENSET_TRCPT0 (1 << USB_HOST_PINTENSET_TRCPT0_Pos)
mbed_official	579:53297373a894	1370	#define USB_HOST_PINTENSET_TRCPT1_Pos 1 /*< \brief (USB_HOST_PINTENSET) Transfer Complete 1 Interrupt Enable /
mbed_official	579:53297373a894	1371	#define USB_HOST_PINTENSET_TRCPT1 (1 << USB_HOST_PINTENSET_TRCPT1_Pos)
mbed_official	579:53297373a894	1372	#define USB_HOST_PINTENSET_TRCPT_Pos 0 /*< \brief (USB_HOST_PINTENSET) Transfer Complete x Interrupt Enable /
mbed_official	579:53297373a894	1373	#define USB_HOST_PINTENSET_TRCPT_Msk (0x3ul << USB_HOST_PINTENSET_TRCPT_Pos)
mbed_official	579:53297373a894	1374	#define USB_HOST_PINTENSET_TRCPT(value) ((USB_HOST_PINTENSET_TRCPT_Msk & ((value) << USB_HOST_PINTENSET_TRCPT_Pos)))
mbed_official	579:53297373a894	1375	#define USB_HOST_PINTENSET_TRFAIL_Pos 2 /*< \brief (USB_HOST_PINTENSET) Error Flow Interrupt Enable /
mbed_official	579:53297373a894	1376	#define USB_HOST_PINTENSET_TRFAIL (0x1ul << USB_HOST_PINTENSET_TRFAIL_Pos)
mbed_official	579:53297373a894	1377	#define USB_HOST_PINTENSET_PERR_Pos 3 /*< \brief (USB_HOST_PINTENSET) Pipe Error Interrupt Enable /
mbed_official	579:53297373a894	1378	#define USB_HOST_PINTENSET_PERR (0x1ul << USB_HOST_PINTENSET_PERR_Pos)
mbed_official	579:53297373a894	1379	#define USB_HOST_PINTENSET_TXSTP_Pos 4 /*< \brief (USB_HOST_PINTENSET) Transmit Setup Interrupt Enable /
mbed_official	579:53297373a894	1380	#define USB_HOST_PINTENSET_TXSTP (0x1ul << USB_HOST_PINTENSET_TXSTP_Pos)
mbed_official	579:53297373a894	1381	#define USB_HOST_PINTENSET_STALL_Pos 5 /*< \brief (USB_HOST_PINTENSET) Stall Interrupt Enable /
mbed_official	579:53297373a894	1382	#define USB_HOST_PINTENSET_STALL (0x1ul << USB_HOST_PINTENSET_STALL_Pos)
mbed_official	579:53297373a894	1383	#define USB_HOST_PINTENSET_MASK 0x3Ful /*< \brief (USB_HOST_PINTENSET) MASK Register /
mbed_official	579:53297373a894	1384
mbed_official	579:53297373a894	1385	/* -------- USB_DEVICE_ADDR : (USB Offset: 0x000) (R/W 32) DEVICE DEVICE_DESC_BANK Endpoint Bank, Adress of Data Buffer -------- */
mbed_official	579:53297373a894	1386	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1387	typedef union {
mbed_official	579:53297373a894	1388	struct {
mbed_official	579:53297373a894	1389	uint32_t ADDR:32; /!< bit: 0..31 Adress of data buffer /
mbed_official	579:53297373a894	1390	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1391	uint32_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1392	} USB_DEVICE_ADDR_Type;
mbed_official	579:53297373a894	1393	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1394
mbed_official	579:53297373a894	1395	#define USB_DEVICE_ADDR_OFFSET 0x000 /*< \brief (USB_DEVICE_ADDR offset) DEVICE_DESC_BANK Endpoint Bank, Adress of Data Buffer /
mbed_official	579:53297373a894	1396
mbed_official	579:53297373a894	1397	#define USB_DEVICE_ADDR_ADDR_Pos 0 /*< \brief (USB_DEVICE_ADDR) Adress of data buffer /
mbed_official	579:53297373a894	1398	#define USB_DEVICE_ADDR_ADDR_Msk (0xFFFFFFFFul << USB_DEVICE_ADDR_ADDR_Pos)
mbed_official	579:53297373a894	1399	#define USB_DEVICE_ADDR_ADDR(value) ((USB_DEVICE_ADDR_ADDR_Msk & ((value) << USB_DEVICE_ADDR_ADDR_Pos)))
mbed_official	579:53297373a894	1400	#define USB_DEVICE_ADDR_MASK 0xFFFFFFFFul /*< \brief (USB_DEVICE_ADDR) MASK Register /
mbed_official	579:53297373a894	1401
mbed_official	579:53297373a894	1402	/* -------- USB_HOST_ADDR : (USB Offset: 0x000) (R/W 32) HOST HOST_DESC_BANK Host Bank, Adress of Data Buffer -------- */
mbed_official	579:53297373a894	1403	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1404	typedef union {
mbed_official	579:53297373a894	1405	struct {
mbed_official	579:53297373a894	1406	uint32_t ADDR:32; /!< bit: 0..31 Adress of data buffer /
mbed_official	579:53297373a894	1407	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1408	uint32_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1409	} USB_HOST_ADDR_Type;
mbed_official	579:53297373a894	1410	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1411
mbed_official	579:53297373a894	1412	#define USB_HOST_ADDR_OFFSET 0x000 /*< \brief (USB_HOST_ADDR offset) HOST_DESC_BANK Host Bank, Adress of Data Buffer /
mbed_official	579:53297373a894	1413
mbed_official	579:53297373a894	1414	#define USB_HOST_ADDR_ADDR_Pos 0 /*< \brief (USB_HOST_ADDR) Adress of data buffer /
mbed_official	579:53297373a894	1415	#define USB_HOST_ADDR_ADDR_Msk (0xFFFFFFFFul << USB_HOST_ADDR_ADDR_Pos)
mbed_official	579:53297373a894	1416	#define USB_HOST_ADDR_ADDR(value) ((USB_HOST_ADDR_ADDR_Msk & ((value) << USB_HOST_ADDR_ADDR_Pos)))
mbed_official	579:53297373a894	1417	#define USB_HOST_ADDR_MASK 0xFFFFFFFFul /*< \brief (USB_HOST_ADDR) MASK Register /
mbed_official	579:53297373a894	1418
mbed_official	579:53297373a894	1419	/* -------- USB_DEVICE_PCKSIZE : (USB Offset: 0x004) (R/W 32) DEVICE DEVICE_DESC_BANK Endpoint Bank, Packet Size -------- */
mbed_official	579:53297373a894	1420	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1421	typedef union {
mbed_official	579:53297373a894	1422	struct {
mbed_official	579:53297373a894	1423	uint32_t BYTE_COUNT:14; /!< bit: 0..13 Byte Count /
mbed_official	579:53297373a894	1424	uint32_t MULTI_PACKET_SIZE:14; /!< bit: 14..27 Multi Packet In or Out size /
mbed_official	579:53297373a894	1425	uint32_t SIZE:3; /!< bit: 28..30 Enpoint size /
mbed_official	579:53297373a894	1426	uint32_t AUTO_ZLP:1; /!< bit: 31 Automatic Zero Length Packet /
mbed_official	579:53297373a894	1427	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1428	uint32_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1429	} USB_DEVICE_PCKSIZE_Type;
mbed_official	579:53297373a894	1430	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1431
mbed_official	579:53297373a894	1432	#define USB_DEVICE_PCKSIZE_OFFSET 0x004 /*< \brief (USB_DEVICE_PCKSIZE offset) DEVICE_DESC_BANK Endpoint Bank, Packet Size /
mbed_official	579:53297373a894	1433
mbed_official	579:53297373a894	1434	#define USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos 0 /*< \brief (USB_DEVICE_PCKSIZE) Byte Count /
mbed_official	579:53297373a894	1435	#define USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk (0x3FFFul << USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos)
mbed_official	579:53297373a894	1436	#define USB_DEVICE_PCKSIZE_BYTE_COUNT(value) ((USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk & ((value) << USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos)))
mbed_official	579:53297373a894	1437	#define USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos 14 /*< \brief (USB_DEVICE_PCKSIZE) Multi Packet In or Out size /
mbed_official	579:53297373a894	1438	#define USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk (0x3FFFul << USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos)
mbed_official	579:53297373a894	1439	#define USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(value) ((USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk & ((value) << USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos)))
mbed_official	579:53297373a894	1440	#define USB_DEVICE_PCKSIZE_SIZE_Pos 28 /*< \brief (USB_DEVICE_PCKSIZE) Enpoint size /
mbed_official	579:53297373a894	1441	#define USB_DEVICE_PCKSIZE_SIZE_Msk (0x7ul << USB_DEVICE_PCKSIZE_SIZE_Pos)
mbed_official	579:53297373a894	1442	#define USB_DEVICE_PCKSIZE_SIZE(value) ((USB_DEVICE_PCKSIZE_SIZE_Msk & ((value) << USB_DEVICE_PCKSIZE_SIZE_Pos)))
mbed_official	579:53297373a894	1443	#define USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos 31 /*< \brief (USB_DEVICE_PCKSIZE) Automatic Zero Length Packet /
mbed_official	579:53297373a894	1444	#define USB_DEVICE_PCKSIZE_AUTO_ZLP (0x1ul << USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos)
mbed_official	579:53297373a894	1445	#define USB_DEVICE_PCKSIZE_MASK 0xFFFFFFFFul /*< \brief (USB_DEVICE_PCKSIZE) MASK Register /
mbed_official	579:53297373a894	1446
mbed_official	579:53297373a894	1447	/* -------- USB_HOST_PCKSIZE : (USB Offset: 0x004) (R/W 32) HOST HOST_DESC_BANK Host Bank, Packet Size -------- */
mbed_official	579:53297373a894	1448	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1449	typedef union {
mbed_official	579:53297373a894	1450	struct {
mbed_official	579:53297373a894	1451	uint32_t BYTE_COUNT:14; /!< bit: 0..13 Byte Count /
mbed_official	579:53297373a894	1452	uint32_t MULTI_PACKET_SIZE:14; /!< bit: 14..27 Multi Packet In or Out size /
mbed_official	579:53297373a894	1453	uint32_t SIZE:3; /!< bit: 28..30 Pipe size /
mbed_official	579:53297373a894	1454	uint32_t AUTO_ZLP:1; /!< bit: 31 Automatic Zero Length Packet /
mbed_official	579:53297373a894	1455	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1456	uint32_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1457	} USB_HOST_PCKSIZE_Type;
mbed_official	579:53297373a894	1458	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1459
mbed_official	579:53297373a894	1460	#define USB_HOST_PCKSIZE_OFFSET 0x004 /*< \brief (USB_HOST_PCKSIZE offset) HOST_DESC_BANK Host Bank, Packet Size /
mbed_official	579:53297373a894	1461
mbed_official	579:53297373a894	1462	#define USB_HOST_PCKSIZE_BYTE_COUNT_Pos 0 /*< \brief (USB_HOST_PCKSIZE) Byte Count /
mbed_official	579:53297373a894	1463	#define USB_HOST_PCKSIZE_BYTE_COUNT_Msk (0x3FFFul << USB_HOST_PCKSIZE_BYTE_COUNT_Pos)
mbed_official	579:53297373a894	1464	#define USB_HOST_PCKSIZE_BYTE_COUNT(value) ((USB_HOST_PCKSIZE_BYTE_COUNT_Msk & ((value) << USB_HOST_PCKSIZE_BYTE_COUNT_Pos)))
mbed_official	579:53297373a894	1465	#define USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos 14 /*< \brief (USB_HOST_PCKSIZE) Multi Packet In or Out size /
mbed_official	579:53297373a894	1466	#define USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk (0x3FFFul << USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos)
mbed_official	579:53297373a894	1467	#define USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(value) ((USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk & ((value) << USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos)))
mbed_official	579:53297373a894	1468	#define USB_HOST_PCKSIZE_SIZE_Pos 28 /*< \brief (USB_HOST_PCKSIZE) Pipe size /
mbed_official	579:53297373a894	1469	#define USB_HOST_PCKSIZE_SIZE_Msk (0x7ul << USB_HOST_PCKSIZE_SIZE_Pos)
mbed_official	579:53297373a894	1470	#define USB_HOST_PCKSIZE_SIZE(value) ((USB_HOST_PCKSIZE_SIZE_Msk & ((value) << USB_HOST_PCKSIZE_SIZE_Pos)))
mbed_official	579:53297373a894	1471	#define USB_HOST_PCKSIZE_AUTO_ZLP_Pos 31 /*< \brief (USB_HOST_PCKSIZE) Automatic Zero Length Packet /
mbed_official	579:53297373a894	1472	#define USB_HOST_PCKSIZE_AUTO_ZLP (0x1ul << USB_HOST_PCKSIZE_AUTO_ZLP_Pos)
mbed_official	579:53297373a894	1473	#define USB_HOST_PCKSIZE_MASK 0xFFFFFFFFul /*< \brief (USB_HOST_PCKSIZE) MASK Register /
mbed_official	579:53297373a894	1474
mbed_official	579:53297373a894	1475	/* -------- USB_DEVICE_EXTREG : (USB Offset: 0x008) (R/W 16) DEVICE DEVICE_DESC_BANK Endpoint Bank, Extended -------- */
mbed_official	579:53297373a894	1476	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1477	typedef union {
mbed_official	579:53297373a894	1478	struct {
mbed_official	579:53297373a894	1479	uint16_t SUBPID:4; /!< bit: 0.. 3 SUBPID field send with extended token /
mbed_official	579:53297373a894	1480	uint16_t VARIABLE:11; /!< bit: 4..14 Variable field send with extended token /
mbed_official	579:53297373a894	1481	uint16_t :1; /!< bit: 15 Reserved /
mbed_official	579:53297373a894	1482	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1483	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1484	} USB_DEVICE_EXTREG_Type;
mbed_official	579:53297373a894	1485	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1486
mbed_official	579:53297373a894	1487	#define USB_DEVICE_EXTREG_OFFSET 0x008 /*< \brief (USB_DEVICE_EXTREG offset) DEVICE_DESC_BANK Endpoint Bank, Extended /
mbed_official	579:53297373a894	1488
mbed_official	579:53297373a894	1489	#define USB_DEVICE_EXTREG_SUBPID_Pos 0 /*< \brief (USB_DEVICE_EXTREG) SUBPID field send with extended token /
mbed_official	579:53297373a894	1490	#define USB_DEVICE_EXTREG_SUBPID_Msk (0xFul << USB_DEVICE_EXTREG_SUBPID_Pos)
mbed_official	579:53297373a894	1491	#define USB_DEVICE_EXTREG_SUBPID(value) ((USB_DEVICE_EXTREG_SUBPID_Msk & ((value) << USB_DEVICE_EXTREG_SUBPID_Pos)))
mbed_official	579:53297373a894	1492	#define USB_DEVICE_EXTREG_VARIABLE_Pos 4 /*< \brief (USB_DEVICE_EXTREG) Variable field send with extended token /
mbed_official	579:53297373a894	1493	#define USB_DEVICE_EXTREG_VARIABLE_Msk (0x7FFul << USB_DEVICE_EXTREG_VARIABLE_Pos)
mbed_official	579:53297373a894	1494	#define USB_DEVICE_EXTREG_VARIABLE(value) ((USB_DEVICE_EXTREG_VARIABLE_Msk & ((value) << USB_DEVICE_EXTREG_VARIABLE_Pos)))
mbed_official	579:53297373a894	1495	#define USB_DEVICE_EXTREG_MASK 0x7FFFul /*< \brief (USB_DEVICE_EXTREG) MASK Register /
mbed_official	579:53297373a894	1496
mbed_official	579:53297373a894	1497	/* -------- USB_HOST_EXTREG : (USB Offset: 0x008) (R/W 16) HOST HOST_DESC_BANK Host Bank, Extended -------- */
mbed_official	579:53297373a894	1498	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1499	typedef union {
mbed_official	579:53297373a894	1500	struct {
mbed_official	579:53297373a894	1501	uint16_t SUBPID:4; /!< bit: 0.. 3 SUBPID field send with extended token /
mbed_official	579:53297373a894	1502	uint16_t VARIABLE:11; /!< bit: 4..14 Variable field send with extended token /
mbed_official	579:53297373a894	1503	uint16_t :1; /!< bit: 15 Reserved /
mbed_official	579:53297373a894	1504	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1505	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1506	} USB_HOST_EXTREG_Type;
mbed_official	579:53297373a894	1507	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1508
mbed_official	579:53297373a894	1509	#define USB_HOST_EXTREG_OFFSET 0x008 /*< \brief (USB_HOST_EXTREG offset) HOST_DESC_BANK Host Bank, Extended /
mbed_official	579:53297373a894	1510
mbed_official	579:53297373a894	1511	#define USB_HOST_EXTREG_SUBPID_Pos 0 /*< \brief (USB_HOST_EXTREG) SUBPID field send with extended token /
mbed_official	579:53297373a894	1512	#define USB_HOST_EXTREG_SUBPID_Msk (0xFul << USB_HOST_EXTREG_SUBPID_Pos)
mbed_official	579:53297373a894	1513	#define USB_HOST_EXTREG_SUBPID(value) ((USB_HOST_EXTREG_SUBPID_Msk & ((value) << USB_HOST_EXTREG_SUBPID_Pos)))
mbed_official	579:53297373a894	1514	#define USB_HOST_EXTREG_VARIABLE_Pos 4 /*< \brief (USB_HOST_EXTREG) Variable field send with extended token /
mbed_official	579:53297373a894	1515	#define USB_HOST_EXTREG_VARIABLE_Msk (0x7FFul << USB_HOST_EXTREG_VARIABLE_Pos)
mbed_official	579:53297373a894	1516	#define USB_HOST_EXTREG_VARIABLE(value) ((USB_HOST_EXTREG_VARIABLE_Msk & ((value) << USB_HOST_EXTREG_VARIABLE_Pos)))
mbed_official	579:53297373a894	1517	#define USB_HOST_EXTREG_MASK 0x7FFFul /*< \brief (USB_HOST_EXTREG) MASK Register /
mbed_official	579:53297373a894	1518
mbed_official	579:53297373a894	1519	/* -------- USB_DEVICE_STATUS_BK : (USB Offset: 0x00A) (R/W 8) DEVICE DEVICE_DESC_BANK Enpoint Bank, Status of Bank -------- */
mbed_official	579:53297373a894	1520	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1521	typedef union {
mbed_official	579:53297373a894	1522	struct {
mbed_official	579:53297373a894	1523	uint8_t CRCERR:1; /!< bit: 0 CRC Error Status /
mbed_official	579:53297373a894	1524	uint8_t ERRORFLOW:1; /!< bit: 1 Error Flow Status /
mbed_official	579:53297373a894	1525	uint8_t :6; /!< bit: 2.. 7 Reserved /
mbed_official	579:53297373a894	1526	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1527	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1528	} USB_DEVICE_STATUS_BK_Type;
mbed_official	579:53297373a894	1529	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1530
mbed_official	579:53297373a894	1531	#define USB_DEVICE_STATUS_BK_OFFSET 0x00A /*< \brief (USB_DEVICE_STATUS_BK offset) DEVICE_DESC_BANK Enpoint Bank, Status of Bank /
mbed_official	579:53297373a894	1532
mbed_official	579:53297373a894	1533	#define USB_DEVICE_STATUS_BK_CRCERR_Pos 0 /*< \brief (USB_DEVICE_STATUS_BK) CRC Error Status /
mbed_official	579:53297373a894	1534	#define USB_DEVICE_STATUS_BK_CRCERR (0x1ul << USB_DEVICE_STATUS_BK_CRCERR_Pos)
mbed_official	579:53297373a894	1535	#define USB_DEVICE_STATUS_BK_ERRORFLOW_Pos 1 /*< \brief (USB_DEVICE_STATUS_BK) Error Flow Status /
mbed_official	579:53297373a894	1536	#define USB_DEVICE_STATUS_BK_ERRORFLOW (0x1ul << USB_DEVICE_STATUS_BK_ERRORFLOW_Pos)
mbed_official	579:53297373a894	1537	#define USB_DEVICE_STATUS_BK_MASK 0x03ul /*< \brief (USB_DEVICE_STATUS_BK) MASK Register /
mbed_official	579:53297373a894	1538
mbed_official	579:53297373a894	1539	/* -------- USB_HOST_STATUS_BK : (USB Offset: 0x00A) (R/W 8) HOST HOST_DESC_BANK Host Bank, Status of Bank -------- */
mbed_official	579:53297373a894	1540	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1541	typedef union {
mbed_official	579:53297373a894	1542	struct {
mbed_official	579:53297373a894	1543	uint8_t CRCERR:1; /!< bit: 0 CRC Error Status /
mbed_official	579:53297373a894	1544	uint8_t ERRORFLOW:1; /!< bit: 1 Error Flow Status /
mbed_official	579:53297373a894	1545	uint8_t :6; /!< bit: 2.. 7 Reserved /
mbed_official	579:53297373a894	1546	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1547	uint8_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1548	} USB_HOST_STATUS_BK_Type;
mbed_official	579:53297373a894	1549	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1550
mbed_official	579:53297373a894	1551	#define USB_HOST_STATUS_BK_OFFSET 0x00A /*< \brief (USB_HOST_STATUS_BK offset) HOST_DESC_BANK Host Bank, Status of Bank /
mbed_official	579:53297373a894	1552
mbed_official	579:53297373a894	1553	#define USB_HOST_STATUS_BK_CRCERR_Pos 0 /*< \brief (USB_HOST_STATUS_BK) CRC Error Status /
mbed_official	579:53297373a894	1554	#define USB_HOST_STATUS_BK_CRCERR (0x1ul << USB_HOST_STATUS_BK_CRCERR_Pos)
mbed_official	579:53297373a894	1555	#define USB_HOST_STATUS_BK_ERRORFLOW_Pos 1 /*< \brief (USB_HOST_STATUS_BK) Error Flow Status /
mbed_official	579:53297373a894	1556	#define USB_HOST_STATUS_BK_ERRORFLOW (0x1ul << USB_HOST_STATUS_BK_ERRORFLOW_Pos)
mbed_official	579:53297373a894	1557	#define USB_HOST_STATUS_BK_MASK 0x03ul /*< \brief (USB_HOST_STATUS_BK) MASK Register /
mbed_official	579:53297373a894	1558
mbed_official	579:53297373a894	1559	/* -------- USB_HOST_CTRL_PIPE : (USB Offset: 0x00C) (R/W 16) HOST HOST_DESC_BANK Host Bank, Host Control Pipe -------- */
mbed_official	579:53297373a894	1560	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1561	typedef union {
mbed_official	579:53297373a894	1562	struct {
mbed_official	579:53297373a894	1563	uint16_t PDADDR:7; /!< bit: 0.. 6 Pipe Device Adress /
mbed_official	579:53297373a894	1564	uint16_t :1; /!< bit: 7 Reserved /
mbed_official	579:53297373a894	1565	uint16_t PEPNUM:4; /!< bit: 8..11 Pipe Endpoint Number /
mbed_official	579:53297373a894	1566	uint16_t PERMAX:4; /!< bit: 12..15 Pipe Error Max Number /
mbed_official	579:53297373a894	1567	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1568	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1569	} USB_HOST_CTRL_PIPE_Type;
mbed_official	579:53297373a894	1570	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1571
mbed_official	579:53297373a894	1572	#define USB_HOST_CTRL_PIPE_OFFSET 0x00C /*< \brief (USB_HOST_CTRL_PIPE offset) HOST_DESC_BANK Host Bank, Host Control Pipe /
mbed_official	579:53297373a894	1573	#define USB_HOST_CTRL_PIPE_RESETVALUE 0x0000ul /*< \brief (USB_HOST_CTRL_PIPE reset_value) HOST_DESC_BANK Host Bank, Host Control Pipe /
mbed_official	579:53297373a894	1574
mbed_official	579:53297373a894	1575	#define USB_HOST_CTRL_PIPE_PDADDR_Pos 0 /*< \brief (USB_HOST_CTRL_PIPE) Pipe Device Adress /
mbed_official	579:53297373a894	1576	#define USB_HOST_CTRL_PIPE_PDADDR_Msk (0x7Ful << USB_HOST_CTRL_PIPE_PDADDR_Pos)
mbed_official	579:53297373a894	1577	#define USB_HOST_CTRL_PIPE_PDADDR(value) ((USB_HOST_CTRL_PIPE_PDADDR_Msk & ((value) << USB_HOST_CTRL_PIPE_PDADDR_Pos)))
mbed_official	579:53297373a894	1578	#define USB_HOST_CTRL_PIPE_PEPNUM_Pos 8 /*< \brief (USB_HOST_CTRL_PIPE) Pipe Endpoint Number /
mbed_official	579:53297373a894	1579	#define USB_HOST_CTRL_PIPE_PEPNUM_Msk (0xFul << USB_HOST_CTRL_PIPE_PEPNUM_Pos)
mbed_official	579:53297373a894	1580	#define USB_HOST_CTRL_PIPE_PEPNUM(value) ((USB_HOST_CTRL_PIPE_PEPNUM_Msk & ((value) << USB_HOST_CTRL_PIPE_PEPNUM_Pos)))
mbed_official	579:53297373a894	1581	#define USB_HOST_CTRL_PIPE_PERMAX_Pos 12 /*< \brief (USB_HOST_CTRL_PIPE) Pipe Error Max Number /
mbed_official	579:53297373a894	1582	#define USB_HOST_CTRL_PIPE_PERMAX_Msk (0xFul << USB_HOST_CTRL_PIPE_PERMAX_Pos)
mbed_official	579:53297373a894	1583	#define USB_HOST_CTRL_PIPE_PERMAX(value) ((USB_HOST_CTRL_PIPE_PERMAX_Msk & ((value) << USB_HOST_CTRL_PIPE_PERMAX_Pos)))
mbed_official	579:53297373a894	1584	#define USB_HOST_CTRL_PIPE_MASK 0xFF7Ful /*< \brief (USB_HOST_CTRL_PIPE) MASK Register /
mbed_official	579:53297373a894	1585
mbed_official	579:53297373a894	1586	/* -------- USB_HOST_STATUS_PIPE : (USB Offset: 0x00E) (R/W 16) HOST HOST_DESC_BANK Host Bank, Host Status Pipe -------- */
mbed_official	579:53297373a894	1587	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1588	typedef union {
mbed_official	579:53297373a894	1589	struct {
mbed_official	579:53297373a894	1590	uint16_t DTGLER:1; /!< bit: 0 Data Toggle Error /
mbed_official	579:53297373a894	1591	uint16_t DAPIDER:1; /!< bit: 1 Data PID Error /
mbed_official	579:53297373a894	1592	uint16_t PIDER:1; /!< bit: 2 PID Error /
mbed_official	579:53297373a894	1593	uint16_t TOUTER:1; /!< bit: 3 Time Out Error /
mbed_official	579:53297373a894	1594	uint16_t CRC16ER:1; /!< bit: 4 CRC16 Error /
mbed_official	579:53297373a894	1595	uint16_t ERCNT:3; /!< bit: 5.. 7 Pipe Error Count /
mbed_official	579:53297373a894	1596	uint16_t :8; /!< bit: 8..15 Reserved /
mbed_official	579:53297373a894	1597	} bit; /!< Structure used for bit access /
mbed_official	579:53297373a894	1598	uint16_t reg; /!< Type used for register access /
mbed_official	579:53297373a894	1599	} USB_HOST_STATUS_PIPE_Type;
mbed_official	579:53297373a894	1600	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1601
mbed_official	579:53297373a894	1602	#define USB_HOST_STATUS_PIPE_OFFSET 0x00E /*< \brief (USB_HOST_STATUS_PIPE offset) HOST_DESC_BANK Host Bank, Host Status Pipe /
mbed_official	579:53297373a894	1603
mbed_official	579:53297373a894	1604	#define USB_HOST_STATUS_PIPE_DTGLER_Pos 0 /*< \brief (USB_HOST_STATUS_PIPE) Data Toggle Error /
mbed_official	579:53297373a894	1605	#define USB_HOST_STATUS_PIPE_DTGLER (0x1ul << USB_HOST_STATUS_PIPE_DTGLER_Pos)
mbed_official	579:53297373a894	1606	#define USB_HOST_STATUS_PIPE_DAPIDER_Pos 1 /*< \brief (USB_HOST_STATUS_PIPE) Data PID Error /
mbed_official	579:53297373a894	1607	#define USB_HOST_STATUS_PIPE_DAPIDER (0x1ul << USB_HOST_STATUS_PIPE_DAPIDER_Pos)
mbed_official	579:53297373a894	1608	#define USB_HOST_STATUS_PIPE_PIDER_Pos 2 /*< \brief (USB_HOST_STATUS_PIPE) PID Error /
mbed_official	579:53297373a894	1609	#define USB_HOST_STATUS_PIPE_PIDER (0x1ul << USB_HOST_STATUS_PIPE_PIDER_Pos)
mbed_official	579:53297373a894	1610	#define USB_HOST_STATUS_PIPE_TOUTER_Pos 3 /*< \brief (USB_HOST_STATUS_PIPE) Time Out Error /
mbed_official	579:53297373a894	1611	#define USB_HOST_STATUS_PIPE_TOUTER (0x1ul << USB_HOST_STATUS_PIPE_TOUTER_Pos)
mbed_official	579:53297373a894	1612	#define USB_HOST_STATUS_PIPE_CRC16ER_Pos 4 /*< \brief (USB_HOST_STATUS_PIPE) CRC16 Error /
mbed_official	579:53297373a894	1613	#define USB_HOST_STATUS_PIPE_CRC16ER (0x1ul << USB_HOST_STATUS_PIPE_CRC16ER_Pos)
mbed_official	579:53297373a894	1614	#define USB_HOST_STATUS_PIPE_ERCNT_Pos 5 /*< \brief (USB_HOST_STATUS_PIPE) Pipe Error Count /
mbed_official	579:53297373a894	1615	#define USB_HOST_STATUS_PIPE_ERCNT_Msk (0x7ul << USB_HOST_STATUS_PIPE_ERCNT_Pos)
mbed_official	579:53297373a894	1616	#define USB_HOST_STATUS_PIPE_ERCNT(value) ((USB_HOST_STATUS_PIPE_ERCNT_Msk & ((value) << USB_HOST_STATUS_PIPE_ERCNT_Pos)))
mbed_official	579:53297373a894	1617	#define USB_HOST_STATUS_PIPE_MASK 0x00FFul /*< \brief (USB_HOST_STATUS_PIPE) MASK Register /
mbed_official	579:53297373a894	1618
mbed_official	579:53297373a894	1619	/** \brief UsbDeviceDescBank SRAM registers */
mbed_official	579:53297373a894	1620	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1621	typedef struct {
mbed_official	579:53297373a894	1622	__IO USB_DEVICE_ADDR_Type ADDR; /*< \brief Offset: 0x000 (R/W 32) DEVICE_DESC_BANK Endpoint Bank, Adress of Data Buffer /
mbed_official	579:53297373a894	1623	__IO USB_DEVICE_PCKSIZE_Type PCKSIZE; /*< \brief Offset: 0x004 (R/W 32) DEVICE_DESC_BANK Endpoint Bank, Packet Size /
mbed_official	579:53297373a894	1624	__IO USB_DEVICE_EXTREG_Type EXTREG; /*< \brief Offset: 0x008 (R/W 16) DEVICE_DESC_BANK Endpoint Bank, Extended /
mbed_official	579:53297373a894	1625	__IO USB_DEVICE_STATUS_BK_Type STATUS_BK; /*< \brief Offset: 0x00A (R/W 8) DEVICE_DESC_BANK Enpoint Bank, Status of Bank /
mbed_official	579:53297373a894	1626	RoReg8 Reserved1[0x5];
mbed_official	579:53297373a894	1627	} UsbDeviceDescBank;
mbed_official	579:53297373a894	1628	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1629
mbed_official	579:53297373a894	1630	/** \brief UsbHostDescBank SRAM registers */
mbed_official	579:53297373a894	1631	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1632	typedef struct {
mbed_official	579:53297373a894	1633	__IO USB_HOST_ADDR_Type ADDR; /*< \brief Offset: 0x000 (R/W 32) HOST_DESC_BANK Host Bank, Adress of Data Buffer /
mbed_official	579:53297373a894	1634	__IO USB_HOST_PCKSIZE_Type PCKSIZE; /*< \brief Offset: 0x004 (R/W 32) HOST_DESC_BANK Host Bank, Packet Size /
mbed_official	579:53297373a894	1635	__IO USB_HOST_EXTREG_Type EXTREG; /*< \brief Offset: 0x008 (R/W 16) HOST_DESC_BANK Host Bank, Extended /
mbed_official	579:53297373a894	1636	__IO USB_HOST_STATUS_BK_Type STATUS_BK; /*< \brief Offset: 0x00A (R/W 8) HOST_DESC_BANK Host Bank, Status of Bank /
mbed_official	579:53297373a894	1637	RoReg8 Reserved1[0x1];
mbed_official	579:53297373a894	1638	__IO USB_HOST_CTRL_PIPE_Type CTRL_PIPE; /*< \brief Offset: 0x00C (R/W 16) HOST_DESC_BANK Host Bank, Host Control Pipe /
mbed_official	579:53297373a894	1639	__IO USB_HOST_STATUS_PIPE_Type STATUS_PIPE; /*< \brief Offset: 0x00E (R/W 16) HOST_DESC_BANK Host Bank, Host Status Pipe /
mbed_official	579:53297373a894	1640	} UsbHostDescBank;
mbed_official	579:53297373a894	1641	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1642
mbed_official	579:53297373a894	1643	/** \brief UsbDeviceEndpoint hardware registers */
mbed_official	579:53297373a894	1644	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1645	typedef struct {
mbed_official	579:53297373a894	1646	__IO USB_DEVICE_EPCFG_Type EPCFG; /*< \brief Offset: 0x000 (R/W 8) DEVICE_ENDPOINT End Point Configuration /
mbed_official	579:53297373a894	1647	RoReg8 Reserved1[0x3];
mbed_official	579:53297373a894	1648	__O USB_DEVICE_EPSTATUSCLR_Type EPSTATUSCLR; /*< \brief Offset: 0x004 ( /W 8) DEVICE_ENDPOINT End Point Pipe Status Clear /
mbed_official	579:53297373a894	1649	__O USB_DEVICE_EPSTATUSSET_Type EPSTATUSSET; /*< \brief Offset: 0x005 ( /W 8) DEVICE_ENDPOINT End Point Pipe Status Set /
mbed_official	579:53297373a894	1650	__I USB_DEVICE_EPSTATUS_Type EPSTATUS; /*< \brief Offset: 0x006 (R/ 8) DEVICE_ENDPOINT End Point Pipe Status /
mbed_official	579:53297373a894	1651	__IO USB_DEVICE_EPINTFLAG_Type EPINTFLAG; /*< \brief Offset: 0x007 (R/W 8) DEVICE_ENDPOINT End Point Interrupt Flag /
mbed_official	579:53297373a894	1652	__IO USB_DEVICE_EPINTENCLR_Type EPINTENCLR; /*< \brief Offset: 0x008 (R/W 8) DEVICE_ENDPOINT End Point Interrupt Clear Flag /
mbed_official	579:53297373a894	1653	__IO USB_DEVICE_EPINTENSET_Type EPINTENSET; /*< \brief Offset: 0x009 (R/W 8) DEVICE_ENDPOINT End Point Interrupt Set Flag /
mbed_official	579:53297373a894	1654	RoReg8 Reserved2[0x16];
mbed_official	579:53297373a894	1655	} UsbDeviceEndpoint;
mbed_official	579:53297373a894	1656	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1657
mbed_official	579:53297373a894	1658	/** \brief UsbHostPipe hardware registers */
mbed_official	579:53297373a894	1659	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1660	typedef struct {
mbed_official	579:53297373a894	1661	__IO USB_HOST_PCFG_Type PCFG; /*< \brief Offset: 0x000 (R/W 8) HOST_PIPE End Point Configuration /
mbed_official	579:53297373a894	1662	RoReg8 Reserved1[0x2];
mbed_official	579:53297373a894	1663	__IO USB_HOST_BINTERVAL_Type BINTERVAL; /*< \brief Offset: 0x003 (R/W 8) HOST_PIPE Bus Access Period of Pipe /
mbed_official	579:53297373a894	1664	__O USB_HOST_PSTATUSCLR_Type PSTATUSCLR; /*< \brief Offset: 0x004 ( /W 8) HOST_PIPE End Point Pipe Status Clear /
mbed_official	579:53297373a894	1665	__O USB_HOST_PSTATUSSET_Type PSTATUSSET; /*< \brief Offset: 0x005 ( /W 8) HOST_PIPE End Point Pipe Status Set /
mbed_official	579:53297373a894	1666	__I USB_HOST_PSTATUS_Type PSTATUS; /*< \brief Offset: 0x006 (R/ 8) HOST_PIPE End Point Pipe Status /
mbed_official	579:53297373a894	1667	__IO USB_HOST_PINTFLAG_Type PINTFLAG; /*< \brief Offset: 0x007 (R/W 8) HOST_PIPE Pipe Interrupt Flag /
mbed_official	579:53297373a894	1668	__IO USB_HOST_PINTENCLR_Type PINTENCLR; /*< \brief Offset: 0x008 (R/W 8) HOST_PIPE Pipe Interrupt Flag Clear /
mbed_official	579:53297373a894	1669	__IO USB_HOST_PINTENSET_Type PINTENSET; /*< \brief Offset: 0x009 (R/W 8) HOST_PIPE Pipe Interrupt Flag Set /
mbed_official	579:53297373a894	1670	RoReg8 Reserved2[0x16];
mbed_official	579:53297373a894	1671	} UsbHostPipe;
mbed_official	579:53297373a894	1672	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1673
mbed_official	579:53297373a894	1674	/** \brief USB_DEVICE APB hardware registers */
mbed_official	579:53297373a894	1675	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1676	typedef struct { /* USB is Device */
mbed_official	579:53297373a894	1677	__IO USB_CTRLA_Type CTRLA; /*< \brief Offset: 0x000 (R/W 8) Control A /
mbed_official	579:53297373a894	1678	RoReg8 Reserved1[0x1];
mbed_official	579:53297373a894	1679	__I USB_SYNCBUSY_Type SYNCBUSY; /*< \brief Offset: 0x002 (R/ 8) Synchronization Busy /
mbed_official	579:53297373a894	1680	__IO USB_QOSCTRL_Type QOSCTRL; /*< \brief Offset: 0x003 (R/W 8) USB Quality Of Service /
mbed_official	579:53297373a894	1681	RoReg8 Reserved2[0x4];
mbed_official	579:53297373a894	1682	__IO USB_DEVICE_CTRLB_Type CTRLB; /*< \brief Offset: 0x008 (R/W 16) DEVICE Control B /
mbed_official	579:53297373a894	1683	__IO USB_DEVICE_DADD_Type DADD; /*< \brief Offset: 0x00A (R/W 8) DEVICE Device Address /
mbed_official	579:53297373a894	1684	RoReg8 Reserved3[0x1];
mbed_official	579:53297373a894	1685	__I USB_DEVICE_STATUS_Type STATUS; /*< \brief Offset: 0x00C (R/ 8) DEVICE Status /
mbed_official	579:53297373a894	1686	__I USB_FSMSTATUS_Type FSMSTATUS; /*< \brief Offset: 0x00D (R/ 8) Finite State Machine Status /
mbed_official	579:53297373a894	1687	RoReg8 Reserved4[0x2];
mbed_official	579:53297373a894	1688	__I USB_DEVICE_FNUM_Type FNUM; /*< \brief Offset: 0x010 (R/ 16) DEVICE Device Frame Number /
mbed_official	579:53297373a894	1689	RoReg8 Reserved5[0x2];
mbed_official	579:53297373a894	1690	__IO USB_DEVICE_INTENCLR_Type INTENCLR; /*< \brief Offset: 0x014 (R/W 16) DEVICE Device Interrupt Enable Clear /
mbed_official	579:53297373a894	1691	RoReg8 Reserved6[0x2];
mbed_official	579:53297373a894	1692	__IO USB_DEVICE_INTENSET_Type INTENSET; /*< \brief Offset: 0x018 (R/W 16) DEVICE Device Interrupt Enable Set /
mbed_official	579:53297373a894	1693	RoReg8 Reserved7[0x2];
mbed_official	579:53297373a894	1694	__IO USB_DEVICE_INTFLAG_Type INTFLAG; /*< \brief Offset: 0x01C (R/W 16) DEVICE Device Interrupt Flag /
mbed_official	579:53297373a894	1695	RoReg8 Reserved8[0x2];
mbed_official	579:53297373a894	1696	__I USB_DEVICE_EPINTSMRY_Type EPINTSMRY; /*< \brief Offset: 0x020 (R/ 16) DEVICE End Point Interrupt Summary /
mbed_official	579:53297373a894	1697	RoReg8 Reserved9[0x2];
mbed_official	579:53297373a894	1698	__IO USB_DESCADD_Type DESCADD; /*< \brief Offset: 0x024 (R/W 32) Descriptor Address /
mbed_official	579:53297373a894	1699	__IO USB_PADCAL_Type PADCAL; /*< \brief Offset: 0x028 (R/W 16) USB PAD Calibration /
mbed_official	579:53297373a894	1700	RoReg8 Reserved10[0xD6];
mbed_official	579:53297373a894	1701	UsbDeviceEndpoint DeviceEndpoint[8]; /*< \brief Offset: 0x100 UsbDeviceEndpoint groups [EPT_NUM] /
mbed_official	579:53297373a894	1702	} UsbDevice;
mbed_official	579:53297373a894	1703	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1704
mbed_official	579:53297373a894	1705	/** \brief USB_HOST hardware registers */
mbed_official	579:53297373a894	1706	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1707	typedef struct { /* USB is Host */
mbed_official	579:53297373a894	1708	__IO USB_CTRLA_Type CTRLA; /*< \brief Offset: 0x000 (R/W 8) Control A /
mbed_official	579:53297373a894	1709	RoReg8 Reserved1[0x1];
mbed_official	579:53297373a894	1710	__I USB_SYNCBUSY_Type SYNCBUSY; /*< \brief Offset: 0x002 (R/ 8) Synchronization Busy /
mbed_official	579:53297373a894	1711	__IO USB_QOSCTRL_Type QOSCTRL; /*< \brief Offset: 0x003 (R/W 8) USB Quality Of Service /
mbed_official	579:53297373a894	1712	RoReg8 Reserved2[0x4];
mbed_official	579:53297373a894	1713	__IO USB_HOST_CTRLB_Type CTRLB; /*< \brief Offset: 0x008 (R/W 16) HOST Control B /
mbed_official	579:53297373a894	1714	__IO USB_HOST_HSOFC_Type HSOFC; /*< \brief Offset: 0x00A (R/W 8) HOST Host Start Of Frame Control /
mbed_official	579:53297373a894	1715	RoReg8 Reserved3[0x1];
mbed_official	579:53297373a894	1716	__IO USB_HOST_STATUS_Type STATUS; /*< \brief Offset: 0x00C (R/W 8) HOST Status /
mbed_official	579:53297373a894	1717	__I USB_FSMSTATUS_Type FSMSTATUS; /*< \brief Offset: 0x00D (R/ 8) Finite State Machine Status /
mbed_official	579:53297373a894	1718	RoReg8 Reserved4[0x2];
mbed_official	579:53297373a894	1719	__IO USB_HOST_FNUM_Type FNUM; /*< \brief Offset: 0x010 (R/W 16) HOST Host Frame Number /
mbed_official	579:53297373a894	1720	__I USB_HOST_FLENHIGH_Type FLENHIGH; /*< \brief Offset: 0x012 (R/ 8) HOST Host Frame Length /
mbed_official	579:53297373a894	1721	RoReg8 Reserved5[0x1];
mbed_official	579:53297373a894	1722	__IO USB_HOST_INTENCLR_Type INTENCLR; /*< \brief Offset: 0x014 (R/W 16) HOST Host Interrupt Enable Clear /
mbed_official	579:53297373a894	1723	RoReg8 Reserved6[0x2];
mbed_official	579:53297373a894	1724	__IO USB_HOST_INTENSET_Type INTENSET; /*< \brief Offset: 0x018 (R/W 16) HOST Host Interrupt Enable Set /
mbed_official	579:53297373a894	1725	RoReg8 Reserved7[0x2];
mbed_official	579:53297373a894	1726	__IO USB_HOST_INTFLAG_Type INTFLAG; /*< \brief Offset: 0x01C (R/W 16) HOST Host Interrupt Flag /
mbed_official	579:53297373a894	1727	RoReg8 Reserved8[0x2];
mbed_official	579:53297373a894	1728	__I USB_HOST_PINTSMRY_Type PINTSMRY; /*< \brief Offset: 0x020 (R/ 16) HOST Pipe Interrupt Summary /
mbed_official	579:53297373a894	1729	RoReg8 Reserved9[0x2];
mbed_official	579:53297373a894	1730	__IO USB_DESCADD_Type DESCADD; /*< \brief Offset: 0x024 (R/W 32) Descriptor Address /
mbed_official	579:53297373a894	1731	__IO USB_PADCAL_Type PADCAL; /*< \brief Offset: 0x028 (R/W 16) USB PAD Calibration /
mbed_official	579:53297373a894	1732	RoReg8 Reserved10[0xD6];
mbed_official	579:53297373a894	1733	UsbHostPipe HostPipe[8]; /*< \brief Offset: 0x100 UsbHostPipe groups [EPT_NUMHOST_IMPLEMENTED] */
mbed_official	579:53297373a894	1734	} UsbHost;
mbed_official	579:53297373a894	1735	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1736
mbed_official	579:53297373a894	1737	/** \brief USB_DEVICE Descriptor SRAM registers */
mbed_official	579:53297373a894	1738	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1739	typedef struct { /* USB is Device */
mbed_official	579:53297373a894	1740	UsbDeviceDescBank DeviceDescBank[2]; /*< \brief Offset: 0x000 UsbDeviceDescBank groups /
mbed_official	579:53297373a894	1741	} UsbDeviceDescriptor;
mbed_official	579:53297373a894	1742	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1743
mbed_official	579:53297373a894	1744	/** \brief USB_HOST Descriptor SRAM registers */
mbed_official	579:53297373a894	1745	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1746	typedef struct { /* USB is Host */
mbed_official	579:53297373a894	1747	UsbHostDescBank HostDescBank[2]; /*< \brief Offset: 0x000 UsbHostDescBank groups [2HOST_IMPLEMENTED] */
mbed_official	579:53297373a894	1748	} UsbHostDescriptor;
mbed_official	579:53297373a894	1749	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1750	#define SECTION_USB_DESCRIPTOR
mbed_official	579:53297373a894	1751
mbed_official	579:53297373a894	1752	#if !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__))
mbed_official	579:53297373a894	1753	typedef union {
mbed_official	579:53297373a894	1754	UsbDevice DEVICE; /*< \brief Offset: 0x000 USB is Device /
mbed_official	579:53297373a894	1755	UsbHost HOST; /*< \brief Offset: 0x000 USB is Host /
mbed_official	579:53297373a894	1756	} Usb;
mbed_official	579:53297373a894	1757	#endif /* !(defined(__ASSEMBLY__) \|\| defined(__IAR_SYSTEMS_ASM__)) */
mbed_official	579:53297373a894	1758
mbed_official	579:53297373a894	1759	/@}/
mbed_official	579:53297373a894	1760
mbed_official	579:53297373a894	1761	#endif /* _SAMD21_USB_COMPONENT_ */

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Type:	Library
Created:	06 Apr 2016
Imports:	21
Forks:	0
Commits:	642
Dependents:	0
Dependencies:	0
Followers:	14

targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/component/comp_usb.h@592:a274ee790e56, 2015-07-17 (annotated)

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