Flotsam
Modified version of the mbed library for use with the Nucleo boards.
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mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.c@613:bc40b8d2aec4, 2015-08-20 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Aug 20 10:45:13 2015 +0100
- Revision:
- 613:bc40b8d2aec4
- Parent:
- 532:fe11edbda85c
Synchronized with git revision 92ca8c7b60a283b6bb60eb65b183dac1599f0ade
Full URL: https://github.com/mbedmicro/mbed/commit/92ca8c7b60a283b6bb60eb65b183dac1599f0ade/
Nordic: update application start address in GCC linker script
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 235:685d5f11838f | 1 | /** |
| mbed_official | 235:685d5f11838f | 2 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 3 | * @file stm32f4xx_hal_pwr.c |
| mbed_official | 235:685d5f11838f | 4 | * @author MCD Application Team |
| mbed_official | 613:bc40b8d2aec4 | 5 | * @version V1.3.2 |
| mbed_official | 613:bc40b8d2aec4 | 6 | * @date 26-June-2015 |
| mbed_official | 235:685d5f11838f | 7 | * @brief PWR HAL module driver. |
| mbed_official | 235:685d5f11838f | 8 | * This file provides firmware functions to manage the following |
| mbed_official | 235:685d5f11838f | 9 | * functionalities of the Power Controller (PWR) peripheral: |
| mbed_official | 235:685d5f11838f | 10 | * + Initialization and de-initialization functions |
| mbed_official | 235:685d5f11838f | 11 | * + Peripheral Control functions |
| mbed_official | 235:685d5f11838f | 12 | * |
| mbed_official | 235:685d5f11838f | 13 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 14 | * @attention |
| mbed_official | 235:685d5f11838f | 15 | * |
| mbed_official | 532:fe11edbda85c | 16 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| mbed_official | 235:685d5f11838f | 17 | * |
| mbed_official | 235:685d5f11838f | 18 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 235:685d5f11838f | 19 | * are permitted provided that the following conditions are met: |
| mbed_official | 235:685d5f11838f | 20 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 235:685d5f11838f | 21 | * this list of conditions and the following disclaimer. |
| mbed_official | 235:685d5f11838f | 22 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 235:685d5f11838f | 23 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 235:685d5f11838f | 24 | * and/or other materials provided with the distribution. |
| mbed_official | 235:685d5f11838f | 25 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 235:685d5f11838f | 26 | * may be used to endorse or promote products derived from this software |
| mbed_official | 235:685d5f11838f | 27 | * without specific prior written permission. |
| mbed_official | 235:685d5f11838f | 28 | * |
| mbed_official | 235:685d5f11838f | 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 235:685d5f11838f | 30 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 235:685d5f11838f | 31 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 235:685d5f11838f | 32 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 235:685d5f11838f | 33 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 235:685d5f11838f | 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 235:685d5f11838f | 35 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 235:685d5f11838f | 36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 235:685d5f11838f | 37 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 235:685d5f11838f | 38 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 235:685d5f11838f | 39 | * |
| mbed_official | 235:685d5f11838f | 40 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 41 | */ |
| mbed_official | 235:685d5f11838f | 42 | |
| mbed_official | 235:685d5f11838f | 43 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 44 | #include "stm32f4xx_hal.h" |
| mbed_official | 235:685d5f11838f | 45 | |
| mbed_official | 235:685d5f11838f | 46 | /** @addtogroup STM32F4xx_HAL_Driver |
| mbed_official | 235:685d5f11838f | 47 | * @{ |
| mbed_official | 235:685d5f11838f | 48 | */ |
| mbed_official | 235:685d5f11838f | 49 | |
| mbed_official | 532:fe11edbda85c | 50 | /** @defgroup PWR PWR |
| mbed_official | 235:685d5f11838f | 51 | * @brief PWR HAL module driver |
| mbed_official | 235:685d5f11838f | 52 | * @{ |
| mbed_official | 235:685d5f11838f | 53 | */ |
| mbed_official | 235:685d5f11838f | 54 | |
| mbed_official | 235:685d5f11838f | 55 | #ifdef HAL_PWR_MODULE_ENABLED |
| mbed_official | 235:685d5f11838f | 56 | |
| mbed_official | 235:685d5f11838f | 57 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 58 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 532:fe11edbda85c | 59 | /** @addtogroup PWR_Private_Constants |
| mbed_official | 532:fe11edbda85c | 60 | * @{ |
| mbed_official | 532:fe11edbda85c | 61 | */ |
| mbed_official | 532:fe11edbda85c | 62 | |
| mbed_official | 532:fe11edbda85c | 63 | /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask |
| mbed_official | 532:fe11edbda85c | 64 | * @{ |
| mbed_official | 532:fe11edbda85c | 65 | */ |
| mbed_official | 532:fe11edbda85c | 66 | #define PVD_MODE_IT ((uint32_t)0x00010000) |
| mbed_official | 532:fe11edbda85c | 67 | #define PVD_MODE_EVT ((uint32_t)0x00020000) |
| mbed_official | 532:fe11edbda85c | 68 | #define PVD_RISING_EDGE ((uint32_t)0x00000001) |
| mbed_official | 532:fe11edbda85c | 69 | #define PVD_FALLING_EDGE ((uint32_t)0x00000002) |
| mbed_official | 532:fe11edbda85c | 70 | /** |
| mbed_official | 532:fe11edbda85c | 71 | * @} |
| mbed_official | 532:fe11edbda85c | 72 | */ |
| mbed_official | 532:fe11edbda85c | 73 | |
| mbed_official | 532:fe11edbda85c | 74 | /** |
| mbed_official | 532:fe11edbda85c | 75 | * @} |
| mbed_official | 532:fe11edbda85c | 76 | */ |
| mbed_official | 235:685d5f11838f | 77 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 78 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 79 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 80 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 81 | |
| mbed_official | 532:fe11edbda85c | 82 | /** @defgroup PWR_Exported_Functions PWR Exported Functions |
| mbed_official | 235:685d5f11838f | 83 | * @{ |
| mbed_official | 235:685d5f11838f | 84 | */ |
| mbed_official | 235:685d5f11838f | 85 | |
| mbed_official | 532:fe11edbda85c | 86 | /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
| mbed_official | 235:685d5f11838f | 87 | * @brief Initialization and de-initialization functions |
| mbed_official | 235:685d5f11838f | 88 | * |
| mbed_official | 235:685d5f11838f | 89 | @verbatim |
| mbed_official | 235:685d5f11838f | 90 | =============================================================================== |
| mbed_official | 235:685d5f11838f | 91 | ##### Initialization and de-initialization functions ##### |
| mbed_official | 235:685d5f11838f | 92 | =============================================================================== |
| mbed_official | 235:685d5f11838f | 93 | [..] |
| mbed_official | 235:685d5f11838f | 94 | After reset, the backup domain (RTC registers, RTC backup data |
| mbed_official | 235:685d5f11838f | 95 | registers and backup SRAM) is protected against possible unwanted |
| mbed_official | 235:685d5f11838f | 96 | write accesses. |
| mbed_official | 235:685d5f11838f | 97 | To enable access to the RTC Domain and RTC registers, proceed as follows: |
| mbed_official | 235:685d5f11838f | 98 | (+) Enable the Power Controller (PWR) APB1 interface clock using the |
| mbed_official | 532:fe11edbda85c | 99 | __HAL_RCC_PWR_CLK_ENABLE() macro. |
| mbed_official | 235:685d5f11838f | 100 | (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. |
| mbed_official | 235:685d5f11838f | 101 | |
| mbed_official | 235:685d5f11838f | 102 | @endverbatim |
| mbed_official | 235:685d5f11838f | 103 | * @{ |
| mbed_official | 235:685d5f11838f | 104 | */ |
| mbed_official | 235:685d5f11838f | 105 | |
| mbed_official | 235:685d5f11838f | 106 | /** |
| mbed_official | 235:685d5f11838f | 107 | * @brief Deinitializes the HAL PWR peripheral registers to their default reset values. |
| mbed_official | 235:685d5f11838f | 108 | * @retval None |
| mbed_official | 235:685d5f11838f | 109 | */ |
| mbed_official | 235:685d5f11838f | 110 | void HAL_PWR_DeInit(void) |
| mbed_official | 235:685d5f11838f | 111 | { |
| mbed_official | 532:fe11edbda85c | 112 | __HAL_RCC_PWR_FORCE_RESET(); |
| mbed_official | 532:fe11edbda85c | 113 | __HAL_RCC_PWR_RELEASE_RESET(); |
| mbed_official | 235:685d5f11838f | 114 | } |
| mbed_official | 235:685d5f11838f | 115 | |
| mbed_official | 235:685d5f11838f | 116 | /** |
| mbed_official | 235:685d5f11838f | 117 | * @brief Enables access to the backup domain (RTC registers, RTC |
| mbed_official | 235:685d5f11838f | 118 | * backup data registers and backup SRAM). |
| mbed_official | 235:685d5f11838f | 119 | * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the |
| mbed_official | 235:685d5f11838f | 120 | * Backup Domain Access should be kept enabled. |
| mbed_official | 235:685d5f11838f | 121 | * @retval None |
| mbed_official | 235:685d5f11838f | 122 | */ |
| mbed_official | 235:685d5f11838f | 123 | void HAL_PWR_EnableBkUpAccess(void) |
| mbed_official | 235:685d5f11838f | 124 | { |
| mbed_official | 235:685d5f11838f | 125 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; |
| mbed_official | 235:685d5f11838f | 126 | } |
| mbed_official | 235:685d5f11838f | 127 | |
| mbed_official | 235:685d5f11838f | 128 | /** |
| mbed_official | 235:685d5f11838f | 129 | * @brief Disables access to the backup domain (RTC registers, RTC |
| mbed_official | 235:685d5f11838f | 130 | * backup data registers and backup SRAM). |
| mbed_official | 235:685d5f11838f | 131 | * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the |
| mbed_official | 235:685d5f11838f | 132 | * Backup Domain Access should be kept enabled. |
| mbed_official | 235:685d5f11838f | 133 | * @retval None |
| mbed_official | 235:685d5f11838f | 134 | */ |
| mbed_official | 235:685d5f11838f | 135 | void HAL_PWR_DisableBkUpAccess(void) |
| mbed_official | 235:685d5f11838f | 136 | { |
| mbed_official | 235:685d5f11838f | 137 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE; |
| mbed_official | 235:685d5f11838f | 138 | } |
| mbed_official | 235:685d5f11838f | 139 | |
| mbed_official | 235:685d5f11838f | 140 | /** |
| mbed_official | 235:685d5f11838f | 141 | * @} |
| mbed_official | 235:685d5f11838f | 142 | */ |
| mbed_official | 235:685d5f11838f | 143 | |
| mbed_official | 532:fe11edbda85c | 144 | /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions |
| mbed_official | 235:685d5f11838f | 145 | * @brief Low Power modes configuration functions |
| mbed_official | 235:685d5f11838f | 146 | * |
| mbed_official | 235:685d5f11838f | 147 | @verbatim |
| mbed_official | 235:685d5f11838f | 148 | |
| mbed_official | 235:685d5f11838f | 149 | =============================================================================== |
| mbed_official | 235:685d5f11838f | 150 | ##### Peripheral Control functions ##### |
| mbed_official | 235:685d5f11838f | 151 | =============================================================================== |
| mbed_official | 235:685d5f11838f | 152 | |
| mbed_official | 235:685d5f11838f | 153 | *** PVD configuration *** |
| mbed_official | 235:685d5f11838f | 154 | ========================= |
| mbed_official | 235:685d5f11838f | 155 | [..] |
| mbed_official | 235:685d5f11838f | 156 | (+) The PVD is used to monitor the VDD power supply by comparing it to a |
| mbed_official | 235:685d5f11838f | 157 | threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). |
| mbed_official | 235:685d5f11838f | 158 | (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower |
| mbed_official | 235:685d5f11838f | 159 | than the PVD threshold. This event is internally connected to the EXTI |
| mbed_official | 235:685d5f11838f | 160 | line16 and can generate an interrupt if enabled. This is done through |
| mbed_official | 532:fe11edbda85c | 161 | __HAL_PWR_PVD_EXTI_ENABLE_IT() macro. |
| mbed_official | 235:685d5f11838f | 162 | (+) The PVD is stopped in Standby mode. |
| mbed_official | 235:685d5f11838f | 163 | |
| mbed_official | 532:fe11edbda85c | 164 | *** Wake-up pin configuration *** |
| mbed_official | 235:685d5f11838f | 165 | ================================ |
| mbed_official | 235:685d5f11838f | 166 | [..] |
| mbed_official | 532:fe11edbda85c | 167 | (+) Wake-up pin is used to wake up the system from Standby mode. This pin is |
| mbed_official | 235:685d5f11838f | 168 | forced in input pull-down configuration and is active on rising edges. |
| mbed_official | 532:fe11edbda85c | 169 | (+) There is one Wake-up pin: Wake-up Pin 1 on PA.00. |
| mbed_official | 532:fe11edbda85c | 170 | Only for STM32F446xx there are two Wake-Up pins: Pin1 on PA.00 and Pin 2 on PC.13 |
| mbed_official | 235:685d5f11838f | 171 | |
| mbed_official | 235:685d5f11838f | 172 | *** Low Power modes configuration *** |
| mbed_official | 235:685d5f11838f | 173 | ===================================== |
| mbed_official | 235:685d5f11838f | 174 | [..] |
| mbed_official | 235:685d5f11838f | 175 | The devices feature 3 low-power modes: |
| mbed_official | 235:685d5f11838f | 176 | (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running. |
| mbed_official | 235:685d5f11838f | 177 | (+) Stop mode: all clocks are stopped, regulator running, regulator |
| mbed_official | 235:685d5f11838f | 178 | in low power mode |
| mbed_official | 235:685d5f11838f | 179 | (+) Standby mode: 1.2V domain powered off. |
| mbed_official | 235:685d5f11838f | 180 | |
| mbed_official | 235:685d5f11838f | 181 | *** Sleep mode *** |
| mbed_official | 235:685d5f11838f | 182 | ================== |
| mbed_official | 235:685d5f11838f | 183 | [..] |
| mbed_official | 235:685d5f11838f | 184 | (+) Entry: |
| mbed_official | 235:685d5f11838f | 185 | The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI) |
| mbed_official | 235:685d5f11838f | 186 | functions with |
| mbed_official | 235:685d5f11838f | 187 | (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
| mbed_official | 235:685d5f11838f | 188 | (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
| mbed_official | 235:685d5f11838f | 189 | |
| mbed_official | 235:685d5f11838f | 190 | -@@- The Regulator parameter is not used for the STM32F4 family |
| mbed_official | 235:685d5f11838f | 191 | and is kept as parameter just to maintain compatibility with the |
| mbed_official | 235:685d5f11838f | 192 | lower power families (STM32L). |
| mbed_official | 235:685d5f11838f | 193 | (+) Exit: |
| mbed_official | 235:685d5f11838f | 194 | Any peripheral interrupt acknowledged by the nested vectored interrupt |
| mbed_official | 235:685d5f11838f | 195 | controller (NVIC) can wake up the device from Sleep mode. |
| mbed_official | 235:685d5f11838f | 196 | |
| mbed_official | 235:685d5f11838f | 197 | *** Stop mode *** |
| mbed_official | 235:685d5f11838f | 198 | ================= |
| mbed_official | 235:685d5f11838f | 199 | [..] |
| mbed_official | 235:685d5f11838f | 200 | In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI, |
| mbed_official | 235:685d5f11838f | 201 | and the HSE RC oscillators are disabled. Internal SRAM and register contents |
| mbed_official | 235:685d5f11838f | 202 | are preserved. |
| mbed_official | 235:685d5f11838f | 203 | The voltage regulator can be configured either in normal or low-power mode. |
| mbed_official | 235:685d5f11838f | 204 | To minimize the consumption In Stop mode, FLASH can be powered off before |
| mbed_official | 532:fe11edbda85c | 205 | entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function. |
| mbed_official | 235:685d5f11838f | 206 | It can be switched on again by software after exiting the Stop mode using |
| mbed_official | 532:fe11edbda85c | 207 | the HAL_PWREx_DisableFlashPowerDown() function. |
| mbed_official | 235:685d5f11838f | 208 | |
| mbed_official | 235:685d5f11838f | 209 | (+) Entry: |
| mbed_official | 235:685d5f11838f | 210 | The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON) |
| mbed_official | 235:685d5f11838f | 211 | function with: |
| mbed_official | 235:685d5f11838f | 212 | (++) Main regulator ON. |
| mbed_official | 235:685d5f11838f | 213 | (++) Low Power regulator ON. |
| mbed_official | 235:685d5f11838f | 214 | (+) Exit: |
| mbed_official | 235:685d5f11838f | 215 | Any EXTI Line (Internal or External) configured in Interrupt/Event mode. |
| mbed_official | 235:685d5f11838f | 216 | |
| mbed_official | 235:685d5f11838f | 217 | *** Standby mode *** |
| mbed_official | 235:685d5f11838f | 218 | ==================== |
| mbed_official | 235:685d5f11838f | 219 | [..] |
| mbed_official | 235:685d5f11838f | 220 | (+) |
| mbed_official | 235:685d5f11838f | 221 | The Standby mode allows to achieve the lowest power consumption. It is based |
| mbed_official | 235:685d5f11838f | 222 | on the Cortex-M4 deep sleep mode, with the voltage regulator disabled. |
| mbed_official | 235:685d5f11838f | 223 | The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and |
| mbed_official | 235:685d5f11838f | 224 | the HSE oscillator are also switched off. SRAM and register contents are lost |
| mbed_official | 235:685d5f11838f | 225 | except for the RTC registers, RTC backup registers, backup SRAM and Standby |
| mbed_official | 235:685d5f11838f | 226 | circuitry. |
| mbed_official | 235:685d5f11838f | 227 | |
| mbed_official | 235:685d5f11838f | 228 | The voltage regulator is OFF. |
| mbed_official | 235:685d5f11838f | 229 | |
| mbed_official | 235:685d5f11838f | 230 | (++) Entry: |
| mbed_official | 235:685d5f11838f | 231 | (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. |
| mbed_official | 235:685d5f11838f | 232 | (++) Exit: |
| mbed_official | 532:fe11edbda85c | 233 | (+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wake-up, |
| mbed_official | 235:685d5f11838f | 234 | tamper event, time-stamp event, external reset in NRST pin, IWDG reset. |
| mbed_official | 235:685d5f11838f | 235 | |
| mbed_official | 532:fe11edbda85c | 236 | *** Auto-wake-up (AWU) from low-power mode *** |
| mbed_official | 235:685d5f11838f | 237 | ============================================= |
| mbed_official | 235:685d5f11838f | 238 | [..] |
| mbed_official | 235:685d5f11838f | 239 | |
| mbed_official | 235:685d5f11838f | 240 | (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC |
| mbed_official | 532:fe11edbda85c | 241 | Wake-up event, a tamper event or a time-stamp event, without depending on |
| mbed_official | 532:fe11edbda85c | 242 | an external interrupt (Auto-wake-up mode). |
| mbed_official | 235:685d5f11838f | 243 | |
| mbed_official | 532:fe11edbda85c | 244 | (+) RTC auto-wake-up (AWU) from the Stop and Standby modes |
| mbed_official | 235:685d5f11838f | 245 | |
| mbed_official | 235:685d5f11838f | 246 | (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to |
| mbed_official | 235:685d5f11838f | 247 | configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. |
| mbed_official | 235:685d5f11838f | 248 | |
| mbed_official | 235:685d5f11838f | 249 | (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it |
| mbed_official | 235:685d5f11838f | 250 | is necessary to configure the RTC to detect the tamper or time stamp event using the |
| mbed_official | 235:685d5f11838f | 251 | HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions. |
| mbed_official | 235:685d5f11838f | 252 | |
| mbed_official | 532:fe11edbda85c | 253 | (++) To wake up from the Stop mode with an RTC Wake-up event, it is necessary to |
| mbed_official | 532:fe11edbda85c | 254 | configure the RTC to generate the RTC Wake-up event using the HAL_RTCEx_SetWakeUpTimer_IT() function. |
| mbed_official | 235:685d5f11838f | 255 | |
| mbed_official | 235:685d5f11838f | 256 | @endverbatim |
| mbed_official | 235:685d5f11838f | 257 | * @{ |
| mbed_official | 235:685d5f11838f | 258 | */ |
| mbed_official | 235:685d5f11838f | 259 | |
| mbed_official | 235:685d5f11838f | 260 | /** |
| mbed_official | 235:685d5f11838f | 261 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). |
| mbed_official | 235:685d5f11838f | 262 | * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration |
| mbed_official | 235:685d5f11838f | 263 | * information for the PVD. |
| mbed_official | 235:685d5f11838f | 264 | * @note Refer to the electrical characteristics of your device datasheet for |
| mbed_official | 235:685d5f11838f | 265 | * more details about the voltage threshold corresponding to each |
| mbed_official | 235:685d5f11838f | 266 | * detection level. |
| mbed_official | 235:685d5f11838f | 267 | * @retval None |
| mbed_official | 235:685d5f11838f | 268 | */ |
| mbed_official | 532:fe11edbda85c | 269 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) |
| mbed_official | 235:685d5f11838f | 270 | { |
| mbed_official | 235:685d5f11838f | 271 | /* Check the parameters */ |
| mbed_official | 235:685d5f11838f | 272 | assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); |
| mbed_official | 235:685d5f11838f | 273 | assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); |
| mbed_official | 235:685d5f11838f | 274 | |
| mbed_official | 235:685d5f11838f | 275 | /* Set PLS[7:5] bits according to PVDLevel value */ |
| mbed_official | 532:fe11edbda85c | 276 | MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); |
| mbed_official | 235:685d5f11838f | 277 | |
| mbed_official | 532:fe11edbda85c | 278 | /* Clear any previous config. Keep it clear if no event or IT mode is selected */ |
| mbed_official | 532:fe11edbda85c | 279 | __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); |
| mbed_official | 532:fe11edbda85c | 280 | __HAL_PWR_PVD_EXTI_DISABLE_IT(); |
| mbed_official | 532:fe11edbda85c | 281 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); |
| mbed_official | 532:fe11edbda85c | 282 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); |
| mbed_official | 532:fe11edbda85c | 283 | |
| mbed_official | 532:fe11edbda85c | 284 | /* Configure interrupt mode */ |
| mbed_official | 532:fe11edbda85c | 285 | if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) |
| mbed_official | 235:685d5f11838f | 286 | { |
| mbed_official | 532:fe11edbda85c | 287 | __HAL_PWR_PVD_EXTI_ENABLE_IT(); |
| mbed_official | 532:fe11edbda85c | 288 | } |
| mbed_official | 532:fe11edbda85c | 289 | |
| mbed_official | 532:fe11edbda85c | 290 | /* Configure event mode */ |
| mbed_official | 532:fe11edbda85c | 291 | if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) |
| mbed_official | 532:fe11edbda85c | 292 | { |
| mbed_official | 532:fe11edbda85c | 293 | __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); |
| mbed_official | 235:685d5f11838f | 294 | } |
| mbed_official | 532:fe11edbda85c | 295 | |
| mbed_official | 532:fe11edbda85c | 296 | /* Configure the edge */ |
| mbed_official | 532:fe11edbda85c | 297 | if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) |
| mbed_official | 235:685d5f11838f | 298 | { |
| mbed_official | 532:fe11edbda85c | 299 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); |
| mbed_official | 235:685d5f11838f | 300 | } |
| mbed_official | 532:fe11edbda85c | 301 | |
| mbed_official | 532:fe11edbda85c | 302 | if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) |
| mbed_official | 235:685d5f11838f | 303 | { |
| mbed_official | 532:fe11edbda85c | 304 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); |
| mbed_official | 235:685d5f11838f | 305 | } |
| mbed_official | 235:685d5f11838f | 306 | } |
| mbed_official | 235:685d5f11838f | 307 | |
| mbed_official | 235:685d5f11838f | 308 | /** |
| mbed_official | 235:685d5f11838f | 309 | * @brief Enables the Power Voltage Detector(PVD). |
| mbed_official | 235:685d5f11838f | 310 | * @retval None |
| mbed_official | 235:685d5f11838f | 311 | */ |
| mbed_official | 235:685d5f11838f | 312 | void HAL_PWR_EnablePVD(void) |
| mbed_official | 235:685d5f11838f | 313 | { |
| mbed_official | 235:685d5f11838f | 314 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE; |
| mbed_official | 235:685d5f11838f | 315 | } |
| mbed_official | 235:685d5f11838f | 316 | |
| mbed_official | 235:685d5f11838f | 317 | /** |
| mbed_official | 235:685d5f11838f | 318 | * @brief Disables the Power Voltage Detector(PVD). |
| mbed_official | 235:685d5f11838f | 319 | * @retval None |
| mbed_official | 235:685d5f11838f | 320 | */ |
| mbed_official | 235:685d5f11838f | 321 | void HAL_PWR_DisablePVD(void) |
| mbed_official | 235:685d5f11838f | 322 | { |
| mbed_official | 235:685d5f11838f | 323 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE; |
| mbed_official | 235:685d5f11838f | 324 | } |
| mbed_official | 235:685d5f11838f | 325 | |
| mbed_official | 235:685d5f11838f | 326 | /** |
| mbed_official | 532:fe11edbda85c | 327 | * @brief Enables the Wake-up PINx functionality. |
| mbed_official | 235:685d5f11838f | 328 | * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable. |
| mbed_official | 235:685d5f11838f | 329 | * This parameter can be one of the following values: |
| mbed_official | 235:685d5f11838f | 330 | * @arg PWR_WAKEUP_PIN1 |
| mbed_official | 532:fe11edbda85c | 331 | * @arg PWR_WAKEUP_PIN2 only available in case of STM32F446xx devices |
| mbed_official | 235:685d5f11838f | 332 | * @retval None |
| mbed_official | 235:685d5f11838f | 333 | */ |
| mbed_official | 235:685d5f11838f | 334 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) |
| mbed_official | 235:685d5f11838f | 335 | { |
| mbed_official | 235:685d5f11838f | 336 | /* Check the parameter */ |
| mbed_official | 235:685d5f11838f | 337 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
| mbed_official | 532:fe11edbda85c | 338 | |
| mbed_official | 532:fe11edbda85c | 339 | /* Enable the wake up pin */ |
| mbed_official | 532:fe11edbda85c | 340 | SET_BIT(PWR->CSR, WakeUpPinx); |
| mbed_official | 235:685d5f11838f | 341 | } |
| mbed_official | 235:685d5f11838f | 342 | |
| mbed_official | 235:685d5f11838f | 343 | /** |
| mbed_official | 532:fe11edbda85c | 344 | * @brief Disables the Wake-up PINx functionality. |
| mbed_official | 235:685d5f11838f | 345 | * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable. |
| mbed_official | 235:685d5f11838f | 346 | * This parameter can be one of the following values: |
| mbed_official | 235:685d5f11838f | 347 | * @arg PWR_WAKEUP_PIN1 |
| mbed_official | 532:fe11edbda85c | 348 | * @arg PWR_WAKEUP_PIN2 only available in case of STM32F446xx devices |
| mbed_official | 235:685d5f11838f | 349 | * @retval None |
| mbed_official | 235:685d5f11838f | 350 | */ |
| mbed_official | 235:685d5f11838f | 351 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) |
| mbed_official | 235:685d5f11838f | 352 | { |
| mbed_official | 235:685d5f11838f | 353 | /* Check the parameter */ |
| mbed_official | 235:685d5f11838f | 354 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
| mbed_official | 532:fe11edbda85c | 355 | |
| mbed_official | 532:fe11edbda85c | 356 | /* Disable the wake up pin */ |
| mbed_official | 532:fe11edbda85c | 357 | CLEAR_BIT(PWR->CSR, WakeUpPinx); |
| mbed_official | 235:685d5f11838f | 358 | } |
| mbed_official | 235:685d5f11838f | 359 | |
| mbed_official | 235:685d5f11838f | 360 | /** |
| mbed_official | 235:685d5f11838f | 361 | * @brief Enters Sleep mode. |
| mbed_official | 235:685d5f11838f | 362 | * |
| mbed_official | 235:685d5f11838f | 363 | * @note In Sleep mode, all I/O pins keep the same state as in Run mode. |
| mbed_official | 235:685d5f11838f | 364 | * |
| mbed_official | 235:685d5f11838f | 365 | * @note In Sleep mode, the systick is stopped to avoid exit from this mode with |
| mbed_official | 235:685d5f11838f | 366 | * systick interrupt when used as time base for Timeout |
| mbed_official | 235:685d5f11838f | 367 | * |
| mbed_official | 235:685d5f11838f | 368 | * @param Regulator: Specifies the regulator state in SLEEP mode. |
| mbed_official | 235:685d5f11838f | 369 | * This parameter can be one of the following values: |
| mbed_official | 235:685d5f11838f | 370 | * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON |
| mbed_official | 235:685d5f11838f | 371 | * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON |
| mbed_official | 235:685d5f11838f | 372 | * @note This parameter is not used for the STM32F4 family and is kept as parameter |
| mbed_official | 235:685d5f11838f | 373 | * just to maintain compatibility with the lower power families. |
| mbed_official | 235:685d5f11838f | 374 | * @param SLEEPEntry: Specifies if SLEEP mode in entered with WFI or WFE instruction. |
| mbed_official | 235:685d5f11838f | 375 | * This parameter can be one of the following values: |
| mbed_official | 235:685d5f11838f | 376 | * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
| mbed_official | 235:685d5f11838f | 377 | * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
| mbed_official | 235:685d5f11838f | 378 | * @retval None |
| mbed_official | 235:685d5f11838f | 379 | */ |
| mbed_official | 235:685d5f11838f | 380 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) |
| mbed_official | 235:685d5f11838f | 381 | { |
| mbed_official | 235:685d5f11838f | 382 | /* Check the parameters */ |
| mbed_official | 235:685d5f11838f | 383 | assert_param(IS_PWR_REGULATOR(Regulator)); |
| mbed_official | 235:685d5f11838f | 384 | assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); |
| mbed_official | 235:685d5f11838f | 385 | |
| mbed_official | 532:fe11edbda85c | 386 | /* Clear SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 532:fe11edbda85c | 387 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
| mbed_official | 532:fe11edbda85c | 388 | |
| mbed_official | 235:685d5f11838f | 389 | /* Select SLEEP mode entry -------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 390 | if(SLEEPEntry == PWR_SLEEPENTRY_WFI) |
| mbed_official | 235:685d5f11838f | 391 | { |
| mbed_official | 235:685d5f11838f | 392 | /* Request Wait For Interrupt */ |
| mbed_official | 235:685d5f11838f | 393 | __WFI(); |
| mbed_official | 235:685d5f11838f | 394 | } |
| mbed_official | 235:685d5f11838f | 395 | else |
| mbed_official | 235:685d5f11838f | 396 | { |
| mbed_official | 235:685d5f11838f | 397 | /* Request Wait For Event */ |
| mbed_official | 235:685d5f11838f | 398 | __SEV(); |
| mbed_official | 235:685d5f11838f | 399 | __WFE(); |
| mbed_official | 235:685d5f11838f | 400 | __WFE(); |
| mbed_official | 235:685d5f11838f | 401 | } |
| mbed_official | 235:685d5f11838f | 402 | } |
| mbed_official | 235:685d5f11838f | 403 | |
| mbed_official | 235:685d5f11838f | 404 | /** |
| mbed_official | 235:685d5f11838f | 405 | * @brief Enters Stop mode. |
| mbed_official | 235:685d5f11838f | 406 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
| mbed_official | 532:fe11edbda85c | 407 | * @note When exiting Stop mode by issuing an interrupt or a wake-up event, |
| mbed_official | 235:685d5f11838f | 408 | * the HSI RC oscillator is selected as system clock. |
| mbed_official | 235:685d5f11838f | 409 | * @note When the voltage regulator operates in low power mode, an additional |
| mbed_official | 235:685d5f11838f | 410 | * startup delay is incurred when waking up from Stop mode. |
| mbed_official | 235:685d5f11838f | 411 | * By keeping the internal regulator ON during Stop mode, the consumption |
| mbed_official | 235:685d5f11838f | 412 | * is higher although the startup time is reduced. |
| mbed_official | 235:685d5f11838f | 413 | * @param Regulator: Specifies the regulator state in Stop mode. |
| mbed_official | 235:685d5f11838f | 414 | * This parameter can be one of the following values: |
| mbed_official | 235:685d5f11838f | 415 | * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON |
| mbed_official | 235:685d5f11838f | 416 | * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON |
| mbed_official | 235:685d5f11838f | 417 | * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction. |
| mbed_official | 235:685d5f11838f | 418 | * This parameter can be one of the following values: |
| mbed_official | 235:685d5f11838f | 419 | * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction |
| mbed_official | 235:685d5f11838f | 420 | * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction |
| mbed_official | 235:685d5f11838f | 421 | * @retval None |
| mbed_official | 235:685d5f11838f | 422 | */ |
| mbed_official | 235:685d5f11838f | 423 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) |
| mbed_official | 235:685d5f11838f | 424 | { |
| mbed_official | 235:685d5f11838f | 425 | /* Check the parameters */ |
| mbed_official | 235:685d5f11838f | 426 | assert_param(IS_PWR_REGULATOR(Regulator)); |
| mbed_official | 235:685d5f11838f | 427 | assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); |
| mbed_official | 235:685d5f11838f | 428 | |
| mbed_official | 532:fe11edbda85c | 429 | /* Select the regulator state in Stop mode: Set PDDS and LPDS bits according to PWR_Regulator value */ |
| mbed_official | 532:fe11edbda85c | 430 | MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS), Regulator); |
| mbed_official | 235:685d5f11838f | 431 | |
| mbed_official | 235:685d5f11838f | 432 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 532:fe11edbda85c | 433 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
| mbed_official | 235:685d5f11838f | 434 | |
| mbed_official | 235:685d5f11838f | 435 | /* Select Stop mode entry --------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 436 | if(STOPEntry == PWR_STOPENTRY_WFI) |
| mbed_official | 235:685d5f11838f | 437 | { |
| mbed_official | 235:685d5f11838f | 438 | /* Request Wait For Interrupt */ |
| mbed_official | 235:685d5f11838f | 439 | __WFI(); |
| mbed_official | 235:685d5f11838f | 440 | } |
| mbed_official | 235:685d5f11838f | 441 | else |
| mbed_official | 235:685d5f11838f | 442 | { |
| mbed_official | 235:685d5f11838f | 443 | /* Request Wait For Event */ |
| mbed_official | 532:fe11edbda85c | 444 | __SEV(); |
| mbed_official | 532:fe11edbda85c | 445 | __WFE(); |
| mbed_official | 235:685d5f11838f | 446 | __WFE(); |
| mbed_official | 235:685d5f11838f | 447 | } |
| mbed_official | 235:685d5f11838f | 448 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 532:fe11edbda85c | 449 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
| mbed_official | 235:685d5f11838f | 450 | } |
| mbed_official | 235:685d5f11838f | 451 | |
| mbed_official | 235:685d5f11838f | 452 | /** |
| mbed_official | 235:685d5f11838f | 453 | * @brief Enters Standby mode. |
| mbed_official | 235:685d5f11838f | 454 | * @note In Standby mode, all I/O pins are high impedance except for: |
| mbed_official | 235:685d5f11838f | 455 | * - Reset pad (still available) |
| mbed_official | 235:685d5f11838f | 456 | * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC |
| mbed_official | 235:685d5f11838f | 457 | * Alarm out, or RTC clock calibration out. |
| mbed_official | 235:685d5f11838f | 458 | * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp. |
| mbed_official | 235:685d5f11838f | 459 | * - WKUP pin 1 (PA0) if enabled. |
| mbed_official | 235:685d5f11838f | 460 | * @retval None |
| mbed_official | 235:685d5f11838f | 461 | */ |
| mbed_official | 235:685d5f11838f | 462 | void HAL_PWR_EnterSTANDBYMode(void) |
| mbed_official | 235:685d5f11838f | 463 | { |
| mbed_official | 235:685d5f11838f | 464 | /* Select Standby mode */ |
| mbed_official | 532:fe11edbda85c | 465 | SET_BIT(PWR->CR, PWR_CR_PDDS); |
| mbed_official | 532:fe11edbda85c | 466 | |
| mbed_official | 235:685d5f11838f | 467 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 532:fe11edbda85c | 468 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
| mbed_official | 235:685d5f11838f | 469 | |
| mbed_official | 235:685d5f11838f | 470 | /* This option is used to ensure that store operations are completed */ |
| mbed_official | 235:685d5f11838f | 471 | #if defined ( __CC_ARM) |
| mbed_official | 235:685d5f11838f | 472 | __force_stores(); |
| mbed_official | 235:685d5f11838f | 473 | #endif |
| mbed_official | 235:685d5f11838f | 474 | /* Request Wait For Interrupt */ |
| mbed_official | 235:685d5f11838f | 475 | __WFI(); |
| mbed_official | 235:685d5f11838f | 476 | } |
| mbed_official | 235:685d5f11838f | 477 | |
| mbed_official | 235:685d5f11838f | 478 | /** |
| mbed_official | 235:685d5f11838f | 479 | * @brief This function handles the PWR PVD interrupt request. |
| mbed_official | 235:685d5f11838f | 480 | * @note This API should be called under the PVD_IRQHandler(). |
| mbed_official | 235:685d5f11838f | 481 | * @retval None |
| mbed_official | 235:685d5f11838f | 482 | */ |
| mbed_official | 235:685d5f11838f | 483 | void HAL_PWR_PVD_IRQHandler(void) |
| mbed_official | 235:685d5f11838f | 484 | { |
| mbed_official | 532:fe11edbda85c | 485 | /* Check PWR Exti flag */ |
| mbed_official | 532:fe11edbda85c | 486 | if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) |
| mbed_official | 235:685d5f11838f | 487 | { |
| mbed_official | 235:685d5f11838f | 488 | /* PWR PVD interrupt user callback */ |
| mbed_official | 235:685d5f11838f | 489 | HAL_PWR_PVDCallback(); |
| mbed_official | 235:685d5f11838f | 490 | |
| mbed_official | 235:685d5f11838f | 491 | /* Clear PWR Exti pending bit */ |
| mbed_official | 532:fe11edbda85c | 492 | __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); |
| mbed_official | 235:685d5f11838f | 493 | } |
| mbed_official | 235:685d5f11838f | 494 | } |
| mbed_official | 235:685d5f11838f | 495 | |
| mbed_official | 235:685d5f11838f | 496 | /** |
| mbed_official | 235:685d5f11838f | 497 | * @brief PWR PVD interrupt callback |
| mbed_official | 235:685d5f11838f | 498 | * @retval None |
| mbed_official | 235:685d5f11838f | 499 | */ |
| mbed_official | 235:685d5f11838f | 500 | __weak void HAL_PWR_PVDCallback(void) |
| mbed_official | 235:685d5f11838f | 501 | { |
| mbed_official | 235:685d5f11838f | 502 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 235:685d5f11838f | 503 | the HAL_PWR_PVDCallback could be implemented in the user file |
| mbed_official | 235:685d5f11838f | 504 | */ |
| mbed_official | 235:685d5f11838f | 505 | } |
| mbed_official | 235:685d5f11838f | 506 | |
| mbed_official | 235:685d5f11838f | 507 | /** |
| mbed_official | 532:fe11edbda85c | 508 | * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. |
| mbed_official | 532:fe11edbda85c | 509 | * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor |
| mbed_official | 532:fe11edbda85c | 510 | * re-enters SLEEP mode when an interruption handling is over. |
| mbed_official | 532:fe11edbda85c | 511 | * Setting this bit is useful when the processor is expected to run only on |
| mbed_official | 532:fe11edbda85c | 512 | * interruptions handling. |
| mbed_official | 532:fe11edbda85c | 513 | * @retval None |
| mbed_official | 532:fe11edbda85c | 514 | */ |
| mbed_official | 532:fe11edbda85c | 515 | void HAL_PWR_EnableSleepOnExit(void) |
| mbed_official | 532:fe11edbda85c | 516 | { |
| mbed_official | 532:fe11edbda85c | 517 | /* Set SLEEPONEXIT bit of Cortex System Control Register */ |
| mbed_official | 532:fe11edbda85c | 518 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); |
| mbed_official | 532:fe11edbda85c | 519 | } |
| mbed_official | 532:fe11edbda85c | 520 | |
| mbed_official | 532:fe11edbda85c | 521 | /** |
| mbed_official | 532:fe11edbda85c | 522 | * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. |
| mbed_official | 532:fe11edbda85c | 523 | * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor |
| mbed_official | 532:fe11edbda85c | 524 | * re-enters SLEEP mode when an interruption handling is over. |
| mbed_official | 532:fe11edbda85c | 525 | * @retval None |
| mbed_official | 532:fe11edbda85c | 526 | */ |
| mbed_official | 532:fe11edbda85c | 527 | void HAL_PWR_DisableSleepOnExit(void) |
| mbed_official | 532:fe11edbda85c | 528 | { |
| mbed_official | 532:fe11edbda85c | 529 | /* Clear SLEEPONEXIT bit of Cortex System Control Register */ |
| mbed_official | 532:fe11edbda85c | 530 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); |
| mbed_official | 532:fe11edbda85c | 531 | } |
| mbed_official | 532:fe11edbda85c | 532 | |
| mbed_official | 532:fe11edbda85c | 533 | /** |
| mbed_official | 532:fe11edbda85c | 534 | * @brief Enables CORTEX M4 SEVONPEND bit. |
| mbed_official | 532:fe11edbda85c | 535 | * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes |
| mbed_official | 532:fe11edbda85c | 536 | * WFE to wake up when an interrupt moves from inactive to pended. |
| mbed_official | 532:fe11edbda85c | 537 | * @retval None |
| mbed_official | 532:fe11edbda85c | 538 | */ |
| mbed_official | 532:fe11edbda85c | 539 | void HAL_PWR_EnableSEVOnPend(void) |
| mbed_official | 532:fe11edbda85c | 540 | { |
| mbed_official | 532:fe11edbda85c | 541 | /* Set SEVONPEND bit of Cortex System Control Register */ |
| mbed_official | 532:fe11edbda85c | 542 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); |
| mbed_official | 532:fe11edbda85c | 543 | } |
| mbed_official | 532:fe11edbda85c | 544 | |
| mbed_official | 532:fe11edbda85c | 545 | /** |
| mbed_official | 532:fe11edbda85c | 546 | * @brief Disables CORTEX M4 SEVONPEND bit. |
| mbed_official | 532:fe11edbda85c | 547 | * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes |
| mbed_official | 532:fe11edbda85c | 548 | * WFE to wake up when an interrupt moves from inactive to pended. |
| mbed_official | 532:fe11edbda85c | 549 | * @retval None |
| mbed_official | 532:fe11edbda85c | 550 | */ |
| mbed_official | 532:fe11edbda85c | 551 | void HAL_PWR_DisableSEVOnPend(void) |
| mbed_official | 532:fe11edbda85c | 552 | { |
| mbed_official | 532:fe11edbda85c | 553 | /* Clear SEVONPEND bit of Cortex System Control Register */ |
| mbed_official | 532:fe11edbda85c | 554 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); |
| mbed_official | 532:fe11edbda85c | 555 | } |
| mbed_official | 532:fe11edbda85c | 556 | |
| mbed_official | 532:fe11edbda85c | 557 | /** |
| mbed_official | 235:685d5f11838f | 558 | * @} |
| mbed_official | 235:685d5f11838f | 559 | */ |
| mbed_official | 235:685d5f11838f | 560 | |
| mbed_official | 235:685d5f11838f | 561 | /** |
| mbed_official | 235:685d5f11838f | 562 | * @} |
| mbed_official | 235:685d5f11838f | 563 | */ |
| mbed_official | 235:685d5f11838f | 564 | |
| mbed_official | 235:685d5f11838f | 565 | #endif /* HAL_PWR_MODULE_ENABLED */ |
| mbed_official | 235:685d5f11838f | 566 | /** |
| mbed_official | 235:685d5f11838f | 567 | * @} |
| mbed_official | 235:685d5f11838f | 568 | */ |
| mbed_official | 235:685d5f11838f | 569 | |
| mbed_official | 235:685d5f11838f | 570 | /** |
| mbed_official | 235:685d5f11838f | 571 | * @} |
| mbed_official | 235:685d5f11838f | 572 | */ |
| mbed_official | 235:685d5f11838f | 573 | |
| mbed_official | 235:685d5f11838f | 574 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |