Flotsam / mbed-modifed

Modified version of the mbed library for use with the Nucleo boards.

Dependents:   EEPROMWrite Full-Project

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.c@613:bc40b8d2aec4, 2015-08-20 (annotated)

Committer:
mbed_official
Date:
Thu Aug 20 10:45:13 2015 +0100
Revision:
613:bc40b8d2aec4
Parent:
532:fe11edbda85c 
Synchronized with git revision 92ca8c7b60a283b6bb60eb65b183dac1599f0ade



Full URL: https://github.com/mbedmicro/mbed/commit/92ca8c7b60a283b6bb60eb65b183dac1599f0ade/



Nordic: update application start address in GCC linker script

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UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_dma2d.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 613:bc40b8d2aec4 5 * @version V1.3.2
mbed_official 613:bc40b8d2aec4 6 * @date 26-June-2015
mbed_official 87:085cde657901 7 * @brief DMA2D HAL module driver.
mbed_official 87:085cde657901 8 * This file provides firmware functions to manage the following
mbed_official 87:085cde657901 9 * functionalities of the DMA2D peripheral:
mbed_official 87:085cde657901 10 * + Initialization and de-initialization functions
mbed_official 87:085cde657901 11 * + IO operation functions
mbed_official 87:085cde657901 12 * + Peripheral Control functions
mbed_official 87:085cde657901 13 * + Peripheral State and Errors functions
mbed_official 532:fe11edbda85c 14 *
mbed_official 532:fe11edbda85c 15 @verbatim
mbed_official 532:fe11edbda85c 16 ==============================================================================
mbed_official 87:085cde657901 17 ##### How to use this driver #####
mbed_official 532:fe11edbda85c 18 ==============================================================================
mbed_official 87:085cde657901 19 [..]
mbed_official 87:085cde657901 20 (#) Program the required configuration through following parameters:
mbed_official 87:085cde657901 21 the Transfer Mode, the output color mode and the output offset using
mbed_official 87:085cde657901 22 HAL_DMA2D_Init() function.
mbed_official 87:085cde657901 23
mbed_official 87:085cde657901 24 (#) Program the required configuration through following parameters:
mbed_official 87:085cde657901 25 the input color mode, the input color, input alpha value, alpha mode
mbed_official 87:085cde657901 26 and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
mbed_official 87:085cde657901 27 or/and background layer.
mbed_official 87:085cde657901 28
mbed_official 87:085cde657901 29 *** Polling mode IO operation ***
mbed_official 87:085cde657901 30 =================================
mbed_official 87:085cde657901 31 [..]
mbed_official 87:085cde657901 32 (+) Configure the pdata, Destination and data length and Enable
mbed_official 87:085cde657901 33 the transfer using HAL_DMA2D_Start()
mbed_official 87:085cde657901 34 (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
mbed_official 87:085cde657901 35 user can specify the value of timeout according to his end application.
mbed_official 87:085cde657901 36
mbed_official 87:085cde657901 37 *** Interrupt mode IO operation ***
mbed_official 87:085cde657901 38 ===================================
mbed_official 87:085cde657901 39 [..]
mbed_official 87:085cde657901 40 (#) Configure the pdata, Destination and data length and Enable
mbed_official 87:085cde657901 41 the transfer using HAL_DMA2D_Start_IT()
mbed_official 87:085cde657901 42 (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
mbed_official 87:085cde657901 43 (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
mbed_official 87:085cde657901 44 add his own function by customization of function pointer XferCpltCallback and
mbed_official 87:085cde657901 45 XferErrorCallback (i.e a member of DMA2D handle structure).
mbed_official 87:085cde657901 46
mbed_official 87:085cde657901 47 -@- In Register-to-Memory transfer mode, the pdata parameter is the register
mbed_official 87:085cde657901 48 color, in Memory-to-memory or memory-to-memory with pixel format
mbed_official 369:2e96f1b71984 49 conversion the pdata is the source address.
mbed_official 87:085cde657901 50
mbed_official 87:085cde657901 51 -@- Configure the foreground source address, the background source address,
mbed_official 87:085cde657901 52 the Destination and data length and Enable the transfer using
mbed_official 87:085cde657901 53 HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
mbed_official 87:085cde657901 54 in interrupt mode.
mbed_official 87:085cde657901 55
mbed_official 87:085cde657901 56 -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
mbed_official 87:085cde657901 57 are used if the memory to memory with blending transfer mode is selected.
mbed_official 87:085cde657901 58
mbed_official 87:085cde657901 59 (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
mbed_official 87:085cde657901 60 HAL_DMA2D_EnableCLUT() functions.
mbed_official 87:085cde657901 61
mbed_official 87:085cde657901 62 (#) Optionally, configure and enable LineInterrupt using the following function:
mbed_official 87:085cde657901 63 HAL_DMA2D_ProgramLineEvent().
mbed_official 87:085cde657901 64
mbed_official 87:085cde657901 65 (#) The transfer can be suspended, continued and aborted using the following
mbed_official 87:085cde657901 66 functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
mbed_official 87:085cde657901 67
mbed_official 87:085cde657901 68 (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
mbed_official 87:085cde657901 69
mbed_official 87:085cde657901 70 *** DMA2D HAL driver macros list ***
mbed_official 87:085cde657901 71 =============================================
mbed_official 87:085cde657901 72 [..]
mbed_official 226:b062af740e40 73 Below the list of most used macros in DMA2D HAL driver :
mbed_official 87:085cde657901 74
mbed_official 87:085cde657901 75 (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
mbed_official 87:085cde657901 76 (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
mbed_official 87:085cde657901 77 (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
mbed_official 226:b062af740e40 78 (+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
mbed_official 226:b062af740e40 79 (+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
mbed_official 226:b062af740e40 80 (+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
mbed_official 226:b062af740e40 81 (+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
mbed_official 87:085cde657901 82
mbed_official 87:085cde657901 83 [..]
mbed_official 87:085cde657901 84 (@) You can refer to the DMA2D HAL driver header file for more useful macros
mbed_official 87:085cde657901 85
mbed_official 87:085cde657901 86 @endverbatim
mbed_official 87:085cde657901 87 ******************************************************************************
mbed_official 87:085cde657901 88 * @attention
mbed_official 87:085cde657901 89 *
mbed_official 532:fe11edbda85c 90 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 91 *
mbed_official 87:085cde657901 92 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 93 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 94 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 95 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 96 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 97 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 98 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 99 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 100 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 101 * without specific prior written permission.
mbed_official 87:085cde657901 102 *
mbed_official 87:085cde657901 103 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 104 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 105 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 106 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 107 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 108 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 109 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 110 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 111 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 112 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 113 *
mbed_official 87:085cde657901 114 ******************************************************************************
mbed_official 87:085cde657901 115 */
mbed_official 87:085cde657901 116
mbed_official 87:085cde657901 117 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 118 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 119
mbed_official 87:085cde657901 120 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 121 * @{
mbed_official 87:085cde657901 122 */
mbed_official 532:fe11edbda85c 123 /** @addtogroup DMA2D
mbed_official 87:085cde657901 124 * @brief DMA2D HAL module driver
mbed_official 87:085cde657901 125 * @{
mbed_official 87:085cde657901 126 */
mbed_official 87:085cde657901 127
mbed_official 87:085cde657901 128 #ifdef HAL_DMA2D_MODULE_ENABLED
mbed_official 87:085cde657901 129
mbed_official 106:ced8cbb51063 130 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 87:085cde657901 131
mbed_official 532:fe11edbda85c 132 /* Private types -------------------------------------------------------------*/
mbed_official 87:085cde657901 133 /* Private define ------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 134 /** @addtogroup DMA2D_Private_Defines
mbed_official 532:fe11edbda85c 135 * @{
mbed_official 532:fe11edbda85c 136 */
mbed_official 87:085cde657901 137 #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
mbed_official 87:085cde657901 138 #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
mbed_official 532:fe11edbda85c 139 /**
mbed_official 532:fe11edbda85c 140 * @}
mbed_official 532:fe11edbda85c 141 */
mbed_official 532:fe11edbda85c 142
mbed_official 87:085cde657901 143 /* Private variables ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 144 /* Private constants ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 145 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 146 /* Private function prototypes -----------------------------------------------*/
mbed_official 532:fe11edbda85c 147 /** @addtogroup DMA2D_Private_Functions_Prototypes
mbed_official 532:fe11edbda85c 148 * @{
mbed_official 532:fe11edbda85c 149 */
mbed_official 532:fe11edbda85c 150 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
mbed_official 532:fe11edbda85c 151 /**
mbed_official 532:fe11edbda85c 152 * @}
mbed_official 532:fe11edbda85c 153 */
mbed_official 87:085cde657901 154
mbed_official 87:085cde657901 155 /* Private functions ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 156 /* Exported functions --------------------------------------------------------*/
mbed_official 532:fe11edbda85c 157 /** @addtogroup DMA2D_Exported_Functions
mbed_official 87:085cde657901 158 * @{
mbed_official 87:085cde657901 159 */
mbed_official 87:085cde657901 160
mbed_official 87:085cde657901 161 /** @defgroup DMA2D_Group1 Initialization and Configuration functions
mbed_official 87:085cde657901 162 * @brief Initialization and Configuration functions
mbed_official 87:085cde657901 163 *
mbed_official 87:085cde657901 164 @verbatim
mbed_official 87:085cde657901 165 ===============================================================================
mbed_official 87:085cde657901 166 ##### Initialization and Configuration functions #####
mbed_official 87:085cde657901 167 ===============================================================================
mbed_official 87:085cde657901 168 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 169 (+) Initialize and configure the DMA2D
mbed_official 87:085cde657901 170 (+) De-initialize the DMA2D
mbed_official 87:085cde657901 171
mbed_official 87:085cde657901 172 @endverbatim
mbed_official 87:085cde657901 173 * @{
mbed_official 87:085cde657901 174 */
mbed_official 87:085cde657901 175
mbed_official 87:085cde657901 176 /**
mbed_official 87:085cde657901 177 * @brief Initializes the DMA2D according to the specified
mbed_official 87:085cde657901 178 * parameters in the DMA2D_InitTypeDef and create the associated handle.
mbed_official 87:085cde657901 179 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 180 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 181 * @retval HAL status
mbed_official 87:085cde657901 182 */
mbed_official 87:085cde657901 183 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 184 {
mbed_official 87:085cde657901 185 uint32_t tmp = 0;
mbed_official 87:085cde657901 186
mbed_official 87:085cde657901 187 /* Check the DMA2D peripheral state */
mbed_official 613:bc40b8d2aec4 188 if(hdma2d == NULL)
mbed_official 87:085cde657901 189 {
mbed_official 87:085cde657901 190 return HAL_ERROR;
mbed_official 87:085cde657901 191 }
mbed_official 87:085cde657901 192
mbed_official 87:085cde657901 193 /* Check the parameters */
mbed_official 87:085cde657901 194 assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
mbed_official 87:085cde657901 195 assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
mbed_official 87:085cde657901 196 assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
mbed_official 87:085cde657901 197 assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
mbed_official 87:085cde657901 198
mbed_official 87:085cde657901 199 if(hdma2d->State == HAL_DMA2D_STATE_RESET)
mbed_official 87:085cde657901 200 {
mbed_official 532:fe11edbda85c 201 /* Allocate lock resource and initialize it */
mbed_official 532:fe11edbda85c 202 hdma2d->Lock = HAL_UNLOCKED;
mbed_official 87:085cde657901 203 /* Init the low level hardware */
mbed_official 87:085cde657901 204 HAL_DMA2D_MspInit(hdma2d);
mbed_official 87:085cde657901 205 }
mbed_official 87:085cde657901 206
mbed_official 87:085cde657901 207 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 208 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 209
mbed_official 87:085cde657901 210 /* DMA2D CR register configuration -------------------------------------------*/
mbed_official 87:085cde657901 211 /* Get the CR register value */
mbed_official 87:085cde657901 212 tmp = hdma2d->Instance->CR;
mbed_official 87:085cde657901 213
mbed_official 87:085cde657901 214 /* Clear Mode bits */
mbed_official 87:085cde657901 215 tmp &= (uint32_t)~DMA2D_CR_MODE;
mbed_official 87:085cde657901 216
mbed_official 87:085cde657901 217 /* Prepare the value to be wrote to the CR register */
mbed_official 87:085cde657901 218 tmp |= hdma2d->Init.Mode;
mbed_official 87:085cde657901 219
mbed_official 87:085cde657901 220 /* Write to DMA2D CR register */
mbed_official 87:085cde657901 221 hdma2d->Instance->CR = tmp;
mbed_official 87:085cde657901 222
mbed_official 87:085cde657901 223 /* DMA2D OPFCCR register configuration ---------------------------------------*/
mbed_official 87:085cde657901 224 /* Get the OPFCCR register value */
mbed_official 87:085cde657901 225 tmp = hdma2d->Instance->OPFCCR;
mbed_official 87:085cde657901 226
mbed_official 87:085cde657901 227 /* Clear Color Mode bits */
mbed_official 87:085cde657901 228 tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
mbed_official 87:085cde657901 229
mbed_official 87:085cde657901 230 /* Prepare the value to be wrote to the OPFCCR register */
mbed_official 87:085cde657901 231 tmp |= hdma2d->Init.ColorMode;
mbed_official 87:085cde657901 232
mbed_official 87:085cde657901 233 /* Write to DMA2D OPFCCR register */
mbed_official 87:085cde657901 234 hdma2d->Instance->OPFCCR = tmp;
mbed_official 87:085cde657901 235
mbed_official 87:085cde657901 236 /* DMA2D OOR register configuration ------------------------------------------*/
mbed_official 87:085cde657901 237 /* Get the OOR register value */
mbed_official 87:085cde657901 238 tmp = hdma2d->Instance->OOR;
mbed_official 87:085cde657901 239
mbed_official 87:085cde657901 240 /* Clear Offset bits */
mbed_official 87:085cde657901 241 tmp &= (uint32_t)~DMA2D_OOR_LO;
mbed_official 87:085cde657901 242
mbed_official 87:085cde657901 243 /* Prepare the value to be wrote to the OOR register */
mbed_official 87:085cde657901 244 tmp |= hdma2d->Init.OutputOffset;
mbed_official 87:085cde657901 245
mbed_official 87:085cde657901 246 /* Write to DMA2D OOR register */
mbed_official 87:085cde657901 247 hdma2d->Instance->OOR = tmp;
mbed_official 87:085cde657901 248
mbed_official 87:085cde657901 249 /* Update error code */
mbed_official 87:085cde657901 250 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
mbed_official 87:085cde657901 251
mbed_official 87:085cde657901 252 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 253 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 254
mbed_official 87:085cde657901 255 return HAL_OK;
mbed_official 87:085cde657901 256 }
mbed_official 87:085cde657901 257
mbed_official 87:085cde657901 258 /**
mbed_official 87:085cde657901 259 * @brief Deinitializes the DMA2D peripheral registers to their default reset
mbed_official 87:085cde657901 260 * values.
mbed_official 87:085cde657901 261 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 262 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 263 * @retval None
mbed_official 87:085cde657901 264 */
mbed_official 87:085cde657901 265
mbed_official 87:085cde657901 266 HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 267 {
mbed_official 87:085cde657901 268 /* Check the DMA2D peripheral state */
mbed_official 613:bc40b8d2aec4 269 if(hdma2d == NULL)
mbed_official 87:085cde657901 270 {
mbed_official 87:085cde657901 271 return HAL_ERROR;
mbed_official 87:085cde657901 272 }
mbed_official 87:085cde657901 273
mbed_official 87:085cde657901 274 /* DeInit the low level hardware */
mbed_official 87:085cde657901 275 HAL_DMA2D_MspDeInit(hdma2d);
mbed_official 87:085cde657901 276
mbed_official 87:085cde657901 277 /* Update error code */
mbed_official 87:085cde657901 278 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
mbed_official 87:085cde657901 279
mbed_official 87:085cde657901 280 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 281 hdma2d->State = HAL_DMA2D_STATE_RESET;
mbed_official 87:085cde657901 282
mbed_official 106:ced8cbb51063 283 /* Release Lock */
mbed_official 106:ced8cbb51063 284 __HAL_UNLOCK(hdma2d);
mbed_official 106:ced8cbb51063 285
mbed_official 87:085cde657901 286 return HAL_OK;
mbed_official 87:085cde657901 287 }
mbed_official 87:085cde657901 288
mbed_official 87:085cde657901 289 /**
mbed_official 87:085cde657901 290 * @brief Initializes the DMA2D MSP.
mbed_official 87:085cde657901 291 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 292 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 293 * @retval None
mbed_official 87:085cde657901 294 */
mbed_official 87:085cde657901 295 __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
mbed_official 87:085cde657901 296 {
mbed_official 87:085cde657901 297 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 298 the HAL_DMA2D_MspInit could be implemented in the user file
mbed_official 87:085cde657901 299 */
mbed_official 87:085cde657901 300 }
mbed_official 87:085cde657901 301
mbed_official 87:085cde657901 302 /**
mbed_official 87:085cde657901 303 * @brief DeInitializes the DMA2D MSP.
mbed_official 87:085cde657901 304 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 305 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 306 * @retval None
mbed_official 87:085cde657901 307 */
mbed_official 87:085cde657901 308 __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
mbed_official 87:085cde657901 309 {
mbed_official 87:085cde657901 310 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 311 the HAL_DMA2D_MspDeInit could be implemented in the user file
mbed_official 87:085cde657901 312 */
mbed_official 87:085cde657901 313 }
mbed_official 87:085cde657901 314
mbed_official 87:085cde657901 315 /**
mbed_official 87:085cde657901 316 * @}
mbed_official 87:085cde657901 317 */
mbed_official 87:085cde657901 318
mbed_official 87:085cde657901 319 /** @defgroup DMA2D_Group2 IO operation functions
mbed_official 87:085cde657901 320 * @brief IO operation functions
mbed_official 87:085cde657901 321 *
mbed_official 87:085cde657901 322 @verbatim
mbed_official 87:085cde657901 323 ===============================================================================
mbed_official 87:085cde657901 324 ##### IO operation functions #####
mbed_official 87:085cde657901 325 ===============================================================================
mbed_official 87:085cde657901 326 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 327 (+) Configure the pdata, destination address and data size and
mbed_official 87:085cde657901 328 Start DMA2D transfer.
mbed_official 87:085cde657901 329 (+) Configure the source for foreground and background, destination address
mbed_official 87:085cde657901 330 and data size and Start MultiBuffer DMA2D transfer.
mbed_official 87:085cde657901 331 (+) Configure the pdata, destination address and data size and
mbed_official 87:085cde657901 332 Start DMA2D transfer with interrupt.
mbed_official 87:085cde657901 333 (+) Configure the source for foreground and background, destination address
mbed_official 87:085cde657901 334 and data size and Start MultiBuffer DMA2D transfer with interrupt.
mbed_official 87:085cde657901 335 (+) Abort DMA2D transfer.
mbed_official 87:085cde657901 336 (+) Suspend DMA2D transfer.
mbed_official 87:085cde657901 337 (+) Continue DMA2D transfer.
mbed_official 226:b062af740e40 338 (+) Poll for transfer complete.
mbed_official 226:b062af740e40 339 (+) handle DMA2D interrupt request.
mbed_official 87:085cde657901 340
mbed_official 87:085cde657901 341 @endverbatim
mbed_official 87:085cde657901 342 * @{
mbed_official 87:085cde657901 343 */
mbed_official 87:085cde657901 344
mbed_official 87:085cde657901 345 /**
mbed_official 87:085cde657901 346 * @brief Start the DMA2D Transfer.
mbed_official 87:085cde657901 347 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 348 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 349 * @param pdata: Configure the source memory Buffer address if
mbed_official 87:085cde657901 350 * the memory to memory or memory to memory with pixel format
mbed_official 87:085cde657901 351 * conversion DMA2D mode is selected, and configure
mbed_official 369:2e96f1b71984 352 * the color value if register to memory DMA2D mode is selected.
mbed_official 87:085cde657901 353 * @param DstAddress: The destination memory Buffer address.
mbed_official 87:085cde657901 354 * @param Width: The width of data to be transferred from source to destination.
mbed_official 532:fe11edbda85c 355 * @param Height: The height of data to be transferred from source to destination.
mbed_official 87:085cde657901 356 * @retval HAL status
mbed_official 87:085cde657901 357 */
mbed_official 532:fe11edbda85c 358 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
mbed_official 87:085cde657901 359 {
mbed_official 87:085cde657901 360 /* Process locked */
mbed_official 87:085cde657901 361 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 362
mbed_official 87:085cde657901 363 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 364 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 365
mbed_official 87:085cde657901 366 /* Check the parameters */
mbed_official 532:fe11edbda85c 367 assert_param(IS_DMA2D_LINE(Height));
mbed_official 87:085cde657901 368 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 369
mbed_official 87:085cde657901 370 /* Disable the Peripheral */
mbed_official 87:085cde657901 371 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 372
mbed_official 87:085cde657901 373 /* Configure the source, destination address and the data size */
mbed_official 532:fe11edbda85c 374 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
mbed_official 87:085cde657901 375
mbed_official 87:085cde657901 376 /* Enable the Peripheral */
mbed_official 87:085cde657901 377 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 378
mbed_official 87:085cde657901 379 return HAL_OK;
mbed_official 87:085cde657901 380 }
mbed_official 87:085cde657901 381
mbed_official 87:085cde657901 382 /**
mbed_official 87:085cde657901 383 * @brief Start the DMA2D Transfer with interrupt enabled.
mbed_official 87:085cde657901 384 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 385 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 386 * @param pdata: Configure the source memory Buffer address if
mbed_official 87:085cde657901 387 * the memory to memory or memory to memory with pixel format
mbed_official 87:085cde657901 388 * conversion DMA2D mode is selected, and configure
mbed_official 369:2e96f1b71984 389 * the color value if register to memory DMA2D mode is selected.
mbed_official 87:085cde657901 390 * @param DstAddress: The destination memory Buffer address.
mbed_official 87:085cde657901 391 * @param Width: The width of data to be transferred from source to destination.
mbed_official 532:fe11edbda85c 392 * @param Height: The height of data to be transferred from source to destination.
mbed_official 87:085cde657901 393 * @retval HAL status
mbed_official 87:085cde657901 394 */
mbed_official 532:fe11edbda85c 395 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
mbed_official 87:085cde657901 396 {
mbed_official 87:085cde657901 397 /* Process locked */
mbed_official 87:085cde657901 398 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 399
mbed_official 87:085cde657901 400 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 401 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 402
mbed_official 87:085cde657901 403 /* Check the parameters */
mbed_official 532:fe11edbda85c 404 assert_param(IS_DMA2D_LINE(Height));
mbed_official 87:085cde657901 405 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 406
mbed_official 87:085cde657901 407 /* Disable the Peripheral */
mbed_official 87:085cde657901 408 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 409
mbed_official 87:085cde657901 410 /* Configure the source, destination address and the data size */
mbed_official 532:fe11edbda85c 411 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
mbed_official 87:085cde657901 412
mbed_official 87:085cde657901 413 /* Enable the transfer complete interrupt */
mbed_official 87:085cde657901 414 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 87:085cde657901 415
mbed_official 87:085cde657901 416 /* Enable the transfer Error interrupt */
mbed_official 87:085cde657901 417 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 87:085cde657901 418
mbed_official 87:085cde657901 419 /* Enable the Peripheral */
mbed_official 87:085cde657901 420 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 421
mbed_official 87:085cde657901 422 /* Enable the configuration error interrupt */
mbed_official 87:085cde657901 423 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 87:085cde657901 424
mbed_official 87:085cde657901 425 return HAL_OK;
mbed_official 87:085cde657901 426 }
mbed_official 87:085cde657901 427
mbed_official 87:085cde657901 428 /**
mbed_official 87:085cde657901 429 * @brief Start the multi-source DMA2D Transfer.
mbed_official 87:085cde657901 430 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 431 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 432 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
mbed_official 369:2e96f1b71984 433 * @param SrcAddress2: The source memory Buffer address of the background layer.
mbed_official 87:085cde657901 434 * @param DstAddress: The destination memory Buffer address
mbed_official 87:085cde657901 435 * @param Width: The width of data to be transferred from source to destination.
mbed_official 532:fe11edbda85c 436 * @param Height: The height of data to be transferred from source to destination.
mbed_official 87:085cde657901 437 * @retval HAL status
mbed_official 87:085cde657901 438 */
mbed_official 532:fe11edbda85c 439 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
mbed_official 87:085cde657901 440 {
mbed_official 87:085cde657901 441 /* Process locked */
mbed_official 87:085cde657901 442 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 443
mbed_official 87:085cde657901 444 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 445 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 446
mbed_official 87:085cde657901 447 /* Check the parameters */
mbed_official 532:fe11edbda85c 448 assert_param(IS_DMA2D_LINE(Height));
mbed_official 87:085cde657901 449 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 450
mbed_official 87:085cde657901 451 /* Disable the Peripheral */
mbed_official 87:085cde657901 452 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 453
mbed_official 87:085cde657901 454 /* Configure DMA2D Stream source2 address */
mbed_official 87:085cde657901 455 hdma2d->Instance->BGMAR = SrcAddress2;
mbed_official 87:085cde657901 456
mbed_official 87:085cde657901 457 /* Configure the source, destination address and the data size */
mbed_official 532:fe11edbda85c 458 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
mbed_official 87:085cde657901 459
mbed_official 87:085cde657901 460 /* Enable the Peripheral */
mbed_official 87:085cde657901 461 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 462
mbed_official 87:085cde657901 463 return HAL_OK;
mbed_official 87:085cde657901 464 }
mbed_official 87:085cde657901 465
mbed_official 87:085cde657901 466 /**
mbed_official 87:085cde657901 467 * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
mbed_official 87:085cde657901 468 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 469 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 470 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
mbed_official 369:2e96f1b71984 471 * @param SrcAddress2: The source memory Buffer address of the background layer.
mbed_official 87:085cde657901 472 * @param DstAddress: The destination memory Buffer address.
mbed_official 87:085cde657901 473 * @param Width: The width of data to be transferred from source to destination.
mbed_official 532:fe11edbda85c 474 * @param Height: The height of data to be transferred from source to destination.
mbed_official 87:085cde657901 475 * @retval HAL status
mbed_official 87:085cde657901 476 */
mbed_official 532:fe11edbda85c 477 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
mbed_official 87:085cde657901 478 {
mbed_official 87:085cde657901 479 /* Process locked */
mbed_official 87:085cde657901 480 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 481
mbed_official 87:085cde657901 482 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 483 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 484
mbed_official 87:085cde657901 485 /* Check the parameters */
mbed_official 532:fe11edbda85c 486 assert_param(IS_DMA2D_LINE(Height));
mbed_official 87:085cde657901 487 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 488
mbed_official 87:085cde657901 489 /* Disable the Peripheral */
mbed_official 87:085cde657901 490 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 369:2e96f1b71984 491
mbed_official 369:2e96f1b71984 492 /* Configure DMA2D Stream source2 address */
mbed_official 369:2e96f1b71984 493 hdma2d->Instance->BGMAR = SrcAddress2;
mbed_official 87:085cde657901 494
mbed_official 87:085cde657901 495 /* Configure the source, destination address and the data size */
mbed_official 532:fe11edbda85c 496 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
mbed_official 87:085cde657901 497
mbed_official 87:085cde657901 498 /* Enable the configuration error interrupt */
mbed_official 87:085cde657901 499 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 87:085cde657901 500
mbed_official 87:085cde657901 501 /* Enable the transfer complete interrupt */
mbed_official 87:085cde657901 502 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 87:085cde657901 503
mbed_official 87:085cde657901 504 /* Enable the transfer Error interrupt */
mbed_official 87:085cde657901 505 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 87:085cde657901 506
mbed_official 87:085cde657901 507 /* Enable the Peripheral */
mbed_official 87:085cde657901 508 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 509
mbed_official 87:085cde657901 510 return HAL_OK;
mbed_official 87:085cde657901 511 }
mbed_official 87:085cde657901 512
mbed_official 87:085cde657901 513 /**
mbed_official 87:085cde657901 514 * @brief Abort the DMA2D Transfer.
mbed_official 87:085cde657901 515 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 516 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 517 * @retval HAL status
mbed_official 87:085cde657901 518 */
mbed_official 87:085cde657901 519 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 520 {
mbed_official 369:2e96f1b71984 521 uint32_t tickstart = 0;
mbed_official 87:085cde657901 522
mbed_official 87:085cde657901 523 /* Disable the DMA2D */
mbed_official 87:085cde657901 524 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 525
mbed_official 369:2e96f1b71984 526 /* Get tick */
mbed_official 369:2e96f1b71984 527 tickstart = HAL_GetTick();
mbed_official 87:085cde657901 528
mbed_official 87:085cde657901 529 /* Check if the DMA2D is effectively disabled */
mbed_official 87:085cde657901 530 while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
mbed_official 87:085cde657901 531 {
mbed_official 369:2e96f1b71984 532 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
mbed_official 87:085cde657901 533 {
mbed_official 87:085cde657901 534 /* Update error code */
mbed_official 87:085cde657901 535 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 536
mbed_official 87:085cde657901 537 /* Change the DMA2D state */
mbed_official 87:085cde657901 538 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 539
mbed_official 87:085cde657901 540 /* Process Unlocked */
mbed_official 87:085cde657901 541 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 542
mbed_official 87:085cde657901 543 return HAL_TIMEOUT;
mbed_official 87:085cde657901 544 }
mbed_official 87:085cde657901 545 }
mbed_official 87:085cde657901 546 /* Process Unlocked */
mbed_official 87:085cde657901 547 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 548
mbed_official 87:085cde657901 549 /* Change the DMA2D state*/
mbed_official 87:085cde657901 550 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 551
mbed_official 87:085cde657901 552 return HAL_OK;
mbed_official 87:085cde657901 553 }
mbed_official 87:085cde657901 554
mbed_official 87:085cde657901 555 /**
mbed_official 87:085cde657901 556 * @brief Suspend the DMA2D Transfer.
mbed_official 87:085cde657901 557 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 558 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 559 * @retval HAL status
mbed_official 87:085cde657901 560 */
mbed_official 87:085cde657901 561 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 562 {
mbed_official 369:2e96f1b71984 563 uint32_t tickstart = 0;
mbed_official 87:085cde657901 564
mbed_official 87:085cde657901 565 /* Suspend the DMA2D transfer */
mbed_official 87:085cde657901 566 hdma2d->Instance->CR |= DMA2D_CR_SUSP;
mbed_official 87:085cde657901 567
mbed_official 369:2e96f1b71984 568 /* Get tick */
mbed_official 369:2e96f1b71984 569 tickstart = HAL_GetTick();
mbed_official 87:085cde657901 570
mbed_official 87:085cde657901 571 /* Check if the DMA2D is effectively suspended */
mbed_official 87:085cde657901 572 while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
mbed_official 87:085cde657901 573 {
mbed_official 369:2e96f1b71984 574 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
mbed_official 87:085cde657901 575 {
mbed_official 87:085cde657901 576 /* Update error code */
mbed_official 87:085cde657901 577 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 578
mbed_official 87:085cde657901 579 /* Change the DMA2D state */
mbed_official 87:085cde657901 580 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 581
mbed_official 87:085cde657901 582 return HAL_TIMEOUT;
mbed_official 87:085cde657901 583 }
mbed_official 87:085cde657901 584 }
mbed_official 87:085cde657901 585 /* Change the DMA2D state*/
mbed_official 87:085cde657901 586 hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
mbed_official 87:085cde657901 587
mbed_official 87:085cde657901 588 return HAL_OK;
mbed_official 87:085cde657901 589 }
mbed_official 87:085cde657901 590
mbed_official 87:085cde657901 591 /**
mbed_official 87:085cde657901 592 * @brief Resume the DMA2D Transfer.
mbed_official 87:085cde657901 593 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 594 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 595 * @retval HAL status
mbed_official 87:085cde657901 596 */
mbed_official 87:085cde657901 597 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 598 {
mbed_official 87:085cde657901 599 /* Resume the DMA2D transfer */
mbed_official 87:085cde657901 600 hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
mbed_official 87:085cde657901 601
mbed_official 87:085cde657901 602 /* Change the DMA2D state*/
mbed_official 87:085cde657901 603 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 604
mbed_official 87:085cde657901 605 return HAL_OK;
mbed_official 87:085cde657901 606 }
mbed_official 87:085cde657901 607
mbed_official 87:085cde657901 608 /**
mbed_official 87:085cde657901 609 * @brief Polling for transfer complete or CLUT loading.
mbed_official 87:085cde657901 610 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 611 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 612 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 613 * @retval HAL status
mbed_official 87:085cde657901 614 */
mbed_official 87:085cde657901 615 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
mbed_official 87:085cde657901 616 {
mbed_official 87:085cde657901 617 uint32_t tmp, tmp1;
mbed_official 369:2e96f1b71984 618 uint32_t tickstart = 0;
mbed_official 87:085cde657901 619
mbed_official 87:085cde657901 620 /* Polling for DMA2D transfer */
mbed_official 87:085cde657901 621 if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
mbed_official 87:085cde657901 622 {
mbed_official 369:2e96f1b71984 623 /* Get tick */
mbed_official 369:2e96f1b71984 624 tickstart = HAL_GetTick();
mbed_official 87:085cde657901 625
mbed_official 87:085cde657901 626 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
mbed_official 87:085cde657901 627 {
mbed_official 87:085cde657901 628 tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 87:085cde657901 629 tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 87:085cde657901 630
mbed_official 87:085cde657901 631 if((tmp != RESET) || (tmp1 != RESET))
mbed_official 87:085cde657901 632 {
mbed_official 87:085cde657901 633 /* Clear the transfer and configuration error flags */
mbed_official 87:085cde657901 634 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 87:085cde657901 635 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 87:085cde657901 636
mbed_official 87:085cde657901 637 /* Change DMA2D state */
mbed_official 87:085cde657901 638 hdma2d->State= HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 639
mbed_official 87:085cde657901 640 /* Process unlocked */
mbed_official 87:085cde657901 641 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 642
mbed_official 87:085cde657901 643 return HAL_ERROR;
mbed_official 87:085cde657901 644 }
mbed_official 87:085cde657901 645 /* Check for the Timeout */
mbed_official 87:085cde657901 646 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 647 {
mbed_official 369:2e96f1b71984 648 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 87:085cde657901 649 {
mbed_official 87:085cde657901 650 /* Process unlocked */
mbed_official 87:085cde657901 651 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 652
mbed_official 87:085cde657901 653 /* Update error code */
mbed_official 87:085cde657901 654 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 655
mbed_official 87:085cde657901 656 /* Change the DMA2D state */
mbed_official 87:085cde657901 657 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 658
mbed_official 87:085cde657901 659 return HAL_TIMEOUT;
mbed_official 87:085cde657901 660 }
mbed_official 87:085cde657901 661 }
mbed_official 87:085cde657901 662 }
mbed_official 87:085cde657901 663 }
mbed_official 87:085cde657901 664 /* Polling for CLUT loading */
mbed_official 87:085cde657901 665 if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
mbed_official 87:085cde657901 666 {
mbed_official 369:2e96f1b71984 667 /* Get tick */
mbed_official 369:2e96f1b71984 668 tickstart = HAL_GetTick();
mbed_official 87:085cde657901 669
mbed_official 87:085cde657901 670 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
mbed_official 87:085cde657901 671 {
mbed_official 87:085cde657901 672 if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
mbed_official 87:085cde657901 673 {
mbed_official 87:085cde657901 674 /* Clear the transfer and configuration error flags */
mbed_official 87:085cde657901 675 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
mbed_official 87:085cde657901 676
mbed_official 87:085cde657901 677 /* Change DMA2D state */
mbed_official 87:085cde657901 678 hdma2d->State= HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 679
mbed_official 87:085cde657901 680 return HAL_ERROR;
mbed_official 87:085cde657901 681 }
mbed_official 87:085cde657901 682 /* Check for the Timeout */
mbed_official 87:085cde657901 683 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 684 {
mbed_official 369:2e96f1b71984 685 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 87:085cde657901 686 {
mbed_official 87:085cde657901 687 /* Update error code */
mbed_official 87:085cde657901 688 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 689
mbed_official 87:085cde657901 690 /* Change the DMA2D state */
mbed_official 87:085cde657901 691 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 692
mbed_official 87:085cde657901 693 return HAL_TIMEOUT;
mbed_official 87:085cde657901 694 }
mbed_official 87:085cde657901 695 }
mbed_official 87:085cde657901 696 }
mbed_official 87:085cde657901 697 }
mbed_official 87:085cde657901 698 /* Clear the transfer complete flag */
mbed_official 87:085cde657901 699 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
mbed_official 87:085cde657901 700
mbed_official 87:085cde657901 701 /* Clear the CLUT loading flag */
mbed_official 87:085cde657901 702 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
mbed_official 87:085cde657901 703
mbed_official 87:085cde657901 704 /* Change DMA2D state */
mbed_official 87:085cde657901 705 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 706
mbed_official 87:085cde657901 707 /* Process unlocked */
mbed_official 87:085cde657901 708 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 709
mbed_official 87:085cde657901 710 return HAL_OK;
mbed_official 87:085cde657901 711 }
mbed_official 87:085cde657901 712 /**
mbed_official 87:085cde657901 713 * @brief Handles DMA2D interrupt request.
mbed_official 87:085cde657901 714 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 715 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 716 * @retval HAL status
mbed_official 87:085cde657901 717 */
mbed_official 87:085cde657901 718 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 719 {
mbed_official 87:085cde657901 720 /* Transfer Error Interrupt management ***************************************/
mbed_official 87:085cde657901 721 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
mbed_official 87:085cde657901 722 {
mbed_official 106:ced8cbb51063 723 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
mbed_official 87:085cde657901 724 {
mbed_official 87:085cde657901 725 /* Disable the transfer Error interrupt */
mbed_official 87:085cde657901 726 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 87:085cde657901 727
mbed_official 87:085cde657901 728 /* Update error code */
mbed_official 87:085cde657901 729 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
mbed_official 87:085cde657901 730
mbed_official 87:085cde657901 731 /* Clear the transfer error flag */
mbed_official 87:085cde657901 732 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 87:085cde657901 733
mbed_official 87:085cde657901 734 /* Change DMA2D state */
mbed_official 87:085cde657901 735 hdma2d->State = HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 736
mbed_official 87:085cde657901 737 /* Process Unlocked */
mbed_official 87:085cde657901 738 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 739
mbed_official 613:bc40b8d2aec4 740 if(hdma2d->XferErrorCallback != NULL)
mbed_official 87:085cde657901 741 {
mbed_official 87:085cde657901 742 /* Transfer error Callback */
mbed_official 87:085cde657901 743 hdma2d->XferErrorCallback(hdma2d);
mbed_official 87:085cde657901 744 }
mbed_official 87:085cde657901 745 }
mbed_official 87:085cde657901 746 }
mbed_official 87:085cde657901 747 /* Configuration Error Interrupt management **********************************/
mbed_official 87:085cde657901 748 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
mbed_official 87:085cde657901 749 {
mbed_official 106:ced8cbb51063 750 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
mbed_official 87:085cde657901 751 {
mbed_official 87:085cde657901 752 /* Disable the Configuration Error interrupt */
mbed_official 87:085cde657901 753 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 87:085cde657901 754
mbed_official 87:085cde657901 755 /* Clear the Configuration error flag */
mbed_official 87:085cde657901 756 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 87:085cde657901 757
mbed_official 87:085cde657901 758 /* Update error code */
mbed_official 87:085cde657901 759 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
mbed_official 87:085cde657901 760
mbed_official 87:085cde657901 761 /* Change DMA2D state */
mbed_official 87:085cde657901 762 hdma2d->State = HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 763
mbed_official 87:085cde657901 764 /* Process Unlocked */
mbed_official 87:085cde657901 765 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 766
mbed_official 613:bc40b8d2aec4 767 if(hdma2d->XferErrorCallback != NULL)
mbed_official 87:085cde657901 768 {
mbed_official 87:085cde657901 769 /* Transfer error Callback */
mbed_official 87:085cde657901 770 hdma2d->XferErrorCallback(hdma2d);
mbed_official 87:085cde657901 771 }
mbed_official 87:085cde657901 772 }
mbed_official 87:085cde657901 773 }
mbed_official 87:085cde657901 774 /* Transfer Complete Interrupt management ************************************/
mbed_official 87:085cde657901 775 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
mbed_official 87:085cde657901 776 {
mbed_official 106:ced8cbb51063 777 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
mbed_official 87:085cde657901 778 {
mbed_official 87:085cde657901 779 /* Disable the transfer complete interrupt */
mbed_official 87:085cde657901 780 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 87:085cde657901 781
mbed_official 87:085cde657901 782 /* Clear the transfer complete flag */
mbed_official 87:085cde657901 783 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
mbed_official 87:085cde657901 784
mbed_official 87:085cde657901 785 /* Update error code */
mbed_official 87:085cde657901 786 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
mbed_official 87:085cde657901 787
mbed_official 87:085cde657901 788 /* Change DMA2D state */
mbed_official 87:085cde657901 789 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 790
mbed_official 87:085cde657901 791 /* Process Unlocked */
mbed_official 87:085cde657901 792 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 793
mbed_official 613:bc40b8d2aec4 794 if(hdma2d->XferCpltCallback != NULL)
mbed_official 87:085cde657901 795 {
mbed_official 87:085cde657901 796 /* Transfer complete Callback */
mbed_official 87:085cde657901 797 hdma2d->XferCpltCallback(hdma2d);
mbed_official 87:085cde657901 798 }
mbed_official 87:085cde657901 799 }
mbed_official 87:085cde657901 800 }
mbed_official 87:085cde657901 801 }
mbed_official 87:085cde657901 802
mbed_official 87:085cde657901 803 /**
mbed_official 87:085cde657901 804 * @}
mbed_official 87:085cde657901 805 */
mbed_official 87:085cde657901 806
mbed_official 87:085cde657901 807 /** @defgroup DMA2D_Group3 Peripheral Control functions
mbed_official 87:085cde657901 808 * @brief Peripheral Control functions
mbed_official 87:085cde657901 809 *
mbed_official 87:085cde657901 810 @verbatim
mbed_official 87:085cde657901 811 ===============================================================================
mbed_official 87:085cde657901 812 ##### Peripheral Control functions #####
mbed_official 87:085cde657901 813 ===============================================================================
mbed_official 87:085cde657901 814 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 815 (+) Configure the DMA2D foreground or/and background parameters.
mbed_official 87:085cde657901 816 (+) Configure the DMA2D CLUT transfer.
mbed_official 87:085cde657901 817 (+) Enable DMA2D CLUT.
mbed_official 87:085cde657901 818 (+) Disable DMA2D CLUT.
mbed_official 87:085cde657901 819 (+) Configure the line watermark
mbed_official 87:085cde657901 820
mbed_official 87:085cde657901 821 @endverbatim
mbed_official 87:085cde657901 822 * @{
mbed_official 87:085cde657901 823 */
mbed_official 87:085cde657901 824 /**
mbed_official 87:085cde657901 825 * @brief Configure the DMA2D Layer according to the specified
mbed_official 87:085cde657901 826 * parameters in the DMA2D_InitTypeDef and create the associated handle.
mbed_official 226:b062af740e40 827 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 828 * the configuration information for the DMA2D.
mbed_official 226:b062af740e40 829 * @param LayerIdx: DMA2D Layer index.
mbed_official 87:085cde657901 830 * This parameter can be one of the following values:
mbed_official 87:085cde657901 831 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 832 * @retval HAL status
mbed_official 87:085cde657901 833 */
mbed_official 87:085cde657901 834 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 87:085cde657901 835 {
mbed_official 87:085cde657901 836 DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
mbed_official 87:085cde657901 837
mbed_official 87:085cde657901 838 uint32_t tmp = 0;
mbed_official 87:085cde657901 839
mbed_official 87:085cde657901 840 /* Process locked */
mbed_official 87:085cde657901 841 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 842
mbed_official 87:085cde657901 843 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 844 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 845
mbed_official 87:085cde657901 846 /* Check the parameters */
mbed_official 87:085cde657901 847 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 848 assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
mbed_official 87:085cde657901 849 if(hdma2d->Init.Mode != DMA2D_R2M)
mbed_official 87:085cde657901 850 {
mbed_official 87:085cde657901 851 assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
mbed_official 87:085cde657901 852 if(hdma2d->Init.Mode != DMA2D_M2M)
mbed_official 87:085cde657901 853 {
mbed_official 87:085cde657901 854 assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
mbed_official 87:085cde657901 855 }
mbed_official 87:085cde657901 856 }
mbed_official 87:085cde657901 857
mbed_official 87:085cde657901 858 /* Configure the background DMA2D layer */
mbed_official 87:085cde657901 859 if(LayerIdx == 0)
mbed_official 87:085cde657901 860 {
mbed_official 87:085cde657901 861 /* DMA2D BGPFCR register configuration -----------------------------------*/
mbed_official 87:085cde657901 862 /* Get the BGPFCCR register value */
mbed_official 87:085cde657901 863 tmp = hdma2d->Instance->BGPFCCR;
mbed_official 87:085cde657901 864
mbed_official 87:085cde657901 865 /* Clear Input color mode, alpha value and alpha mode bits */
mbed_official 87:085cde657901 866 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
mbed_official 87:085cde657901 867
mbed_official 369:2e96f1b71984 868 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
mbed_official 369:2e96f1b71984 869 {
mbed_official 369:2e96f1b71984 870 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 369:2e96f1b71984 871 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
mbed_official 369:2e96f1b71984 872 }
mbed_official 369:2e96f1b71984 873 else
mbed_official 369:2e96f1b71984 874 {
mbed_official 369:2e96f1b71984 875 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 369:2e96f1b71984 876 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
mbed_official 369:2e96f1b71984 877 }
mbed_official 87:085cde657901 878
mbed_official 87:085cde657901 879 /* Write to DMA2D BGPFCCR register */
mbed_official 87:085cde657901 880 hdma2d->Instance->BGPFCCR = tmp;
mbed_official 87:085cde657901 881
mbed_official 87:085cde657901 882 /* DMA2D BGOR register configuration -------------------------------------*/
mbed_official 87:085cde657901 883 /* Get the BGOR register value */
mbed_official 87:085cde657901 884 tmp = hdma2d->Instance->BGOR;
mbed_official 87:085cde657901 885
mbed_official 87:085cde657901 886 /* Clear colors bits */
mbed_official 87:085cde657901 887 tmp &= (uint32_t)~DMA2D_BGOR_LO;
mbed_official 87:085cde657901 888
mbed_official 87:085cde657901 889 /* Prepare the value to be wrote to the BGOR register */
mbed_official 87:085cde657901 890 tmp |= pLayerCfg->InputOffset;
mbed_official 87:085cde657901 891
mbed_official 87:085cde657901 892 /* Write to DMA2D BGOR register */
mbed_official 87:085cde657901 893 hdma2d->Instance->BGOR = tmp;
mbed_official 369:2e96f1b71984 894
mbed_official 369:2e96f1b71984 895 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
mbed_official 369:2e96f1b71984 896 {
mbed_official 369:2e96f1b71984 897 /* Prepare the value to be wrote to the BGCOLR register */
mbed_official 613:bc40b8d2aec4 898 tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
mbed_official 369:2e96f1b71984 899
mbed_official 369:2e96f1b71984 900 /* Write to DMA2D BGCOLR register */
mbed_official 369:2e96f1b71984 901 hdma2d->Instance->BGCOLR = tmp;
mbed_official 369:2e96f1b71984 902 }
mbed_official 87:085cde657901 903 }
mbed_official 87:085cde657901 904 /* Configure the foreground DMA2D layer */
mbed_official 87:085cde657901 905 else
mbed_official 87:085cde657901 906 {
mbed_official 87:085cde657901 907 /* DMA2D FGPFCR register configuration -----------------------------------*/
mbed_official 87:085cde657901 908 /* Get the FGPFCCR register value */
mbed_official 87:085cde657901 909 tmp = hdma2d->Instance->FGPFCCR;
mbed_official 87:085cde657901 910
mbed_official 87:085cde657901 911 /* Clear Input color mode, alpha value and alpha mode bits */
mbed_official 87:085cde657901 912 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
mbed_official 87:085cde657901 913
mbed_official 369:2e96f1b71984 914 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
mbed_official 369:2e96f1b71984 915 {
mbed_official 369:2e96f1b71984 916 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 369:2e96f1b71984 917 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
mbed_official 369:2e96f1b71984 918 }
mbed_official 369:2e96f1b71984 919 else
mbed_official 369:2e96f1b71984 920 {
mbed_official 369:2e96f1b71984 921 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 369:2e96f1b71984 922 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
mbed_official 369:2e96f1b71984 923 }
mbed_official 87:085cde657901 924
mbed_official 87:085cde657901 925 /* Write to DMA2D FGPFCCR register */
mbed_official 87:085cde657901 926 hdma2d->Instance->FGPFCCR = tmp;
mbed_official 87:085cde657901 927
mbed_official 87:085cde657901 928 /* DMA2D FGOR register configuration -------------------------------------*/
mbed_official 87:085cde657901 929 /* Get the FGOR register value */
mbed_official 87:085cde657901 930 tmp = hdma2d->Instance->FGOR;
mbed_official 87:085cde657901 931
mbed_official 87:085cde657901 932 /* Clear colors bits */
mbed_official 87:085cde657901 933 tmp &= (uint32_t)~DMA2D_FGOR_LO;
mbed_official 87:085cde657901 934
mbed_official 87:085cde657901 935 /* Prepare the value to be wrote to the FGOR register */
mbed_official 87:085cde657901 936 tmp |= pLayerCfg->InputOffset;
mbed_official 87:085cde657901 937
mbed_official 87:085cde657901 938 /* Write to DMA2D FGOR register */
mbed_official 87:085cde657901 939 hdma2d->Instance->FGOR = tmp;
mbed_official 369:2e96f1b71984 940
mbed_official 369:2e96f1b71984 941 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
mbed_official 369:2e96f1b71984 942 {
mbed_official 369:2e96f1b71984 943 /* Prepare the value to be wrote to the FGCOLR register */
mbed_official 613:bc40b8d2aec4 944 tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
mbed_official 369:2e96f1b71984 945
mbed_official 369:2e96f1b71984 946 /* Write to DMA2D FGCOLR register */
mbed_official 369:2e96f1b71984 947 hdma2d->Instance->FGCOLR = tmp;
mbed_official 369:2e96f1b71984 948 }
mbed_official 87:085cde657901 949 }
mbed_official 87:085cde657901 950 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 951 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 952
mbed_official 87:085cde657901 953 /* Process unlocked */
mbed_official 87:085cde657901 954 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 955
mbed_official 87:085cde657901 956 return HAL_OK;
mbed_official 87:085cde657901 957 }
mbed_official 87:085cde657901 958
mbed_official 87:085cde657901 959 /**
mbed_official 87:085cde657901 960 * @brief Configure the DMA2D CLUT Transfer.
mbed_official 87:085cde657901 961 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 962 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 963 * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
mbed_official 87:085cde657901 964 * the configuration information for the color look up table.
mbed_official 226:b062af740e40 965 * @param LayerIdx: DMA2D Layer index.
mbed_official 87:085cde657901 966 * This parameter can be one of the following values:
mbed_official 87:085cde657901 967 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 968 * @retval HAL status
mbed_official 87:085cde657901 969 */
mbed_official 87:085cde657901 970 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
mbed_official 87:085cde657901 971 {
mbed_official 87:085cde657901 972 uint32_t tmp = 0, tmp1 = 0;
mbed_official 87:085cde657901 973
mbed_official 87:085cde657901 974 /* Check the parameters */
mbed_official 87:085cde657901 975 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 976 assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
mbed_official 87:085cde657901 977 assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
mbed_official 87:085cde657901 978
mbed_official 87:085cde657901 979 /* Configure the CLUT of the background DMA2D layer */
mbed_official 87:085cde657901 980 if(LayerIdx == 0)
mbed_official 87:085cde657901 981 {
mbed_official 87:085cde657901 982 /* Get the BGCMAR register value */
mbed_official 87:085cde657901 983 tmp = hdma2d->Instance->BGCMAR;
mbed_official 87:085cde657901 984
mbed_official 87:085cde657901 985 /* Clear CLUT address bits */
mbed_official 87:085cde657901 986 tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
mbed_official 87:085cde657901 987
mbed_official 87:085cde657901 988 /* Prepare the value to be wrote to the BGCMAR register */
mbed_official 87:085cde657901 989 tmp |= (uint32_t)CLUTCfg.pCLUT;
mbed_official 87:085cde657901 990
mbed_official 87:085cde657901 991 /* Write to DMA2D BGCMAR register */
mbed_official 87:085cde657901 992 hdma2d->Instance->BGCMAR = tmp;
mbed_official 87:085cde657901 993
mbed_official 87:085cde657901 994 /* Get the BGPFCCR register value */
mbed_official 87:085cde657901 995 tmp = hdma2d->Instance->BGPFCCR;
mbed_official 87:085cde657901 996
mbed_official 87:085cde657901 997 /* Clear CLUT size and CLUT address bits */
mbed_official 87:085cde657901 998 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
mbed_official 87:085cde657901 999
mbed_official 87:085cde657901 1000 /* Get the CLUT size */
mbed_official 87:085cde657901 1001 tmp1 = CLUTCfg.Size << 16;
mbed_official 87:085cde657901 1002
mbed_official 87:085cde657901 1003 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 87:085cde657901 1004 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
mbed_official 87:085cde657901 1005
mbed_official 87:085cde657901 1006 /* Write to DMA2D BGPFCCR register */
mbed_official 87:085cde657901 1007 hdma2d->Instance->BGPFCCR = tmp;
mbed_official 87:085cde657901 1008 }
mbed_official 87:085cde657901 1009 /* Configure the CLUT of the foreground DMA2D layer */
mbed_official 87:085cde657901 1010 else
mbed_official 87:085cde657901 1011 {
mbed_official 87:085cde657901 1012 /* Get the FGCMAR register value */
mbed_official 87:085cde657901 1013 tmp = hdma2d->Instance->FGCMAR;
mbed_official 87:085cde657901 1014
mbed_official 87:085cde657901 1015 /* Clear CLUT address bits */
mbed_official 87:085cde657901 1016 tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
mbed_official 87:085cde657901 1017
mbed_official 87:085cde657901 1018 /* Prepare the value to be wrote to the FGCMAR register */
mbed_official 87:085cde657901 1019 tmp |= (uint32_t)CLUTCfg.pCLUT;
mbed_official 87:085cde657901 1020
mbed_official 87:085cde657901 1021 /* Write to DMA2D FGCMAR register */
mbed_official 87:085cde657901 1022 hdma2d->Instance->FGCMAR = tmp;
mbed_official 87:085cde657901 1023
mbed_official 87:085cde657901 1024 /* Get the FGPFCCR register value */
mbed_official 87:085cde657901 1025 tmp = hdma2d->Instance->FGPFCCR;
mbed_official 87:085cde657901 1026
mbed_official 87:085cde657901 1027 /* Clear CLUT size and CLUT address bits */
mbed_official 87:085cde657901 1028 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
mbed_official 87:085cde657901 1029
mbed_official 87:085cde657901 1030 /* Get the CLUT size */
mbed_official 87:085cde657901 1031 tmp1 = CLUTCfg.Size << 8;
mbed_official 87:085cde657901 1032
mbed_official 87:085cde657901 1033 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 87:085cde657901 1034 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
mbed_official 87:085cde657901 1035
mbed_official 87:085cde657901 1036 /* Write to DMA2D FGPFCCR register */
mbed_official 87:085cde657901 1037 hdma2d->Instance->FGPFCCR = tmp;
mbed_official 87:085cde657901 1038 }
mbed_official 87:085cde657901 1039
mbed_official 87:085cde657901 1040 return HAL_OK;
mbed_official 87:085cde657901 1041 }
mbed_official 87:085cde657901 1042
mbed_official 87:085cde657901 1043 /**
mbed_official 87:085cde657901 1044 * @brief Enable the DMA2D CLUT Transfer.
mbed_official 87:085cde657901 1045 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1046 * the configuration information for the DMA2D.
mbed_official 226:b062af740e40 1047 * @param LayerIdx: DMA2D Layer index.
mbed_official 87:085cde657901 1048 * This parameter can be one of the following values:
mbed_official 87:085cde657901 1049 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 1050 * @retval HAL status
mbed_official 87:085cde657901 1051 */
mbed_official 87:085cde657901 1052 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 87:085cde657901 1053 {
mbed_official 87:085cde657901 1054 /* Check the parameters */
mbed_official 87:085cde657901 1055 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 1056
mbed_official 87:085cde657901 1057 if(LayerIdx == 0)
mbed_official 87:085cde657901 1058 {
mbed_official 87:085cde657901 1059 /* Enable the CLUT loading for the background */
mbed_official 87:085cde657901 1060 hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
mbed_official 87:085cde657901 1061 }
mbed_official 87:085cde657901 1062 else
mbed_official 87:085cde657901 1063 {
mbed_official 87:085cde657901 1064 /* Enable the CLUT loading for the foreground */
mbed_official 87:085cde657901 1065 hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
mbed_official 87:085cde657901 1066 }
mbed_official 87:085cde657901 1067
mbed_official 87:085cde657901 1068 return HAL_OK;
mbed_official 87:085cde657901 1069 }
mbed_official 87:085cde657901 1070
mbed_official 87:085cde657901 1071 /**
mbed_official 87:085cde657901 1072 * @brief Disable the DMA2D CLUT Transfer.
mbed_official 87:085cde657901 1073 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1074 * the configuration information for the DMA2D.
mbed_official 226:b062af740e40 1075 * @param LayerIdx: DMA2D Layer index.
mbed_official 87:085cde657901 1076 * This parameter can be one of the following values:
mbed_official 87:085cde657901 1077 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 1078 * @retval HAL status
mbed_official 87:085cde657901 1079 */
mbed_official 87:085cde657901 1080 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 87:085cde657901 1081 {
mbed_official 87:085cde657901 1082 /* Check the parameters */
mbed_official 87:085cde657901 1083 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 1084
mbed_official 87:085cde657901 1085 if(LayerIdx == 0)
mbed_official 87:085cde657901 1086 {
mbed_official 87:085cde657901 1087 /* Disable the CLUT loading for the background */
mbed_official 87:085cde657901 1088 hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
mbed_official 87:085cde657901 1089 }
mbed_official 87:085cde657901 1090 else
mbed_official 87:085cde657901 1091 {
mbed_official 87:085cde657901 1092 /* Disable the CLUT loading for the foreground */
mbed_official 87:085cde657901 1093 hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
mbed_official 87:085cde657901 1094 }
mbed_official 87:085cde657901 1095
mbed_official 87:085cde657901 1096 return HAL_OK;
mbed_official 87:085cde657901 1097 }
mbed_official 87:085cde657901 1098
mbed_official 87:085cde657901 1099 /**
mbed_official 87:085cde657901 1100 * @brief Define the configuration of the line watermark .
mbed_official 87:085cde657901 1101 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1102 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1103 * @param Line: Line Watermark configuration.
mbed_official 226:b062af740e40 1104 * @retval HAL status
mbed_official 87:085cde657901 1105 */
mbed_official 87:085cde657901 1106
mbed_official 87:085cde657901 1107 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
mbed_official 87:085cde657901 1108 {
mbed_official 87:085cde657901 1109 /* Process locked */
mbed_official 87:085cde657901 1110 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 1111
mbed_official 87:085cde657901 1112 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 1113 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 1114
mbed_official 87:085cde657901 1115 /* Check the parameters */
mbed_official 87:085cde657901 1116 assert_param(IS_DMA2D_LineWatermark(Line));
mbed_official 87:085cde657901 1117
mbed_official 87:085cde657901 1118 /* Sets the Line watermark configuration */
mbed_official 87:085cde657901 1119 DMA2D->LWR = (uint32_t)Line;
mbed_official 87:085cde657901 1120
mbed_official 87:085cde657901 1121 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 1122 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 1123
mbed_official 87:085cde657901 1124 /* Process unlocked */
mbed_official 87:085cde657901 1125 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 1126
mbed_official 87:085cde657901 1127 return HAL_OK;
mbed_official 87:085cde657901 1128 }
mbed_official 87:085cde657901 1129
mbed_official 87:085cde657901 1130 /**
mbed_official 87:085cde657901 1131 * @}
mbed_official 87:085cde657901 1132 */
mbed_official 87:085cde657901 1133
mbed_official 87:085cde657901 1134 /** @defgroup DMA2D_Group4 Peripheral State functions
mbed_official 87:085cde657901 1135 * @brief Peripheral State functions
mbed_official 87:085cde657901 1136 *
mbed_official 87:085cde657901 1137 @verbatim
mbed_official 87:085cde657901 1138 ===============================================================================
mbed_official 87:085cde657901 1139 ##### Peripheral State and Errors functions #####
mbed_official 87:085cde657901 1140 ===============================================================================
mbed_official 87:085cde657901 1141 [..]
mbed_official 226:b062af740e40 1142 This subsection provides functions allowing to :
mbed_official 87:085cde657901 1143 (+) Check the DMA2D state
mbed_official 87:085cde657901 1144 (+) Get error code
mbed_official 87:085cde657901 1145
mbed_official 87:085cde657901 1146 @endverbatim
mbed_official 87:085cde657901 1147 * @{
mbed_official 87:085cde657901 1148 */
mbed_official 87:085cde657901 1149
mbed_official 87:085cde657901 1150 /**
mbed_official 87:085cde657901 1151 * @brief Return the DMA2D state
mbed_official 87:085cde657901 1152 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1153 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1154 * @retval HAL state
mbed_official 87:085cde657901 1155 */
mbed_official 87:085cde657901 1156 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 1157 {
mbed_official 87:085cde657901 1158 return hdma2d->State;
mbed_official 87:085cde657901 1159 }
mbed_official 87:085cde657901 1160
mbed_official 87:085cde657901 1161 /**
mbed_official 87:085cde657901 1162 * @brief Return the DMA2D error code
mbed_official 87:085cde657901 1163 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1164 * the configuration information for DMA2D.
mbed_official 87:085cde657901 1165 * @retval DMA2D Error Code
mbed_official 87:085cde657901 1166 */
mbed_official 87:085cde657901 1167 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 1168 {
mbed_official 87:085cde657901 1169 return hdma2d->ErrorCode;
mbed_official 87:085cde657901 1170 }
mbed_official 87:085cde657901 1171
mbed_official 87:085cde657901 1172 /**
mbed_official 87:085cde657901 1173 * @}
mbed_official 87:085cde657901 1174 */
mbed_official 87:085cde657901 1175
mbed_official 87:085cde657901 1176
mbed_official 87:085cde657901 1177 /**
mbed_official 87:085cde657901 1178 * @brief Set the DMA2D Transfer parameter.
mbed_official 87:085cde657901 1179 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1180 * the configuration information for the specified DMA2D.
mbed_official 87:085cde657901 1181 * @param pdata: The source memory Buffer address
mbed_official 87:085cde657901 1182 * @param DstAddress: The destination memory Buffer address
mbed_official 87:085cde657901 1183 * @param Width: The width of data to be transferred from source to destination.
mbed_official 532:fe11edbda85c 1184 * @param Height: The height of data to be transferred from source to destination.
mbed_official 87:085cde657901 1185 * @retval HAL status
mbed_official 87:085cde657901 1186 */
mbed_official 532:fe11edbda85c 1187 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
mbed_official 87:085cde657901 1188 {
mbed_official 87:085cde657901 1189 uint32_t tmp = 0;
mbed_official 87:085cde657901 1190 uint32_t tmp1 = 0;
mbed_official 87:085cde657901 1191 uint32_t tmp2 = 0;
mbed_official 87:085cde657901 1192 uint32_t tmp3 = 0;
mbed_official 87:085cde657901 1193 uint32_t tmp4 = 0;
mbed_official 87:085cde657901 1194
mbed_official 87:085cde657901 1195 tmp = Width << 16;
mbed_official 87:085cde657901 1196
mbed_official 87:085cde657901 1197 /* Configure DMA2D data size */
mbed_official 532:fe11edbda85c 1198 hdma2d->Instance->NLR = (Height | tmp);
mbed_official 87:085cde657901 1199
mbed_official 87:085cde657901 1200 /* Configure DMA2D destination address */
mbed_official 87:085cde657901 1201 hdma2d->Instance->OMAR = DstAddress;
mbed_official 87:085cde657901 1202
mbed_official 87:085cde657901 1203 /* Register to memory DMA2D mode selected */
mbed_official 87:085cde657901 1204 if (hdma2d->Init.Mode == DMA2D_R2M)
mbed_official 87:085cde657901 1205 {
mbed_official 87:085cde657901 1206 tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
mbed_official 87:085cde657901 1207 tmp2 = pdata & DMA2D_OCOLR_RED_1;
mbed_official 87:085cde657901 1208 tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
mbed_official 87:085cde657901 1209 tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
mbed_official 87:085cde657901 1210
mbed_official 87:085cde657901 1211 /* Prepare the value to be wrote to the OCOLR register according to the color mode */
mbed_official 87:085cde657901 1212 if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
mbed_official 87:085cde657901 1213 {
mbed_official 87:085cde657901 1214 tmp = (tmp3 | tmp2 | tmp1| tmp4);
mbed_official 87:085cde657901 1215 }
mbed_official 87:085cde657901 1216 else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
mbed_official 87:085cde657901 1217 {
mbed_official 87:085cde657901 1218 tmp = (tmp3 | tmp2 | tmp4);
mbed_official 87:085cde657901 1219 }
mbed_official 87:085cde657901 1220 else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
mbed_official 87:085cde657901 1221 {
mbed_official 87:085cde657901 1222 tmp2 = (tmp2 >> 19);
mbed_official 87:085cde657901 1223 tmp3 = (tmp3 >> 10);
mbed_official 87:085cde657901 1224 tmp4 = (tmp4 >> 3 );
mbed_official 87:085cde657901 1225 tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
mbed_official 87:085cde657901 1226 }
mbed_official 87:085cde657901 1227 else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
mbed_official 87:085cde657901 1228 {
mbed_official 87:085cde657901 1229 tmp1 = (tmp1 >> 31);
mbed_official 87:085cde657901 1230 tmp2 = (tmp2 >> 19);
mbed_official 87:085cde657901 1231 tmp3 = (tmp3 >> 11);
mbed_official 87:085cde657901 1232 tmp4 = (tmp4 >> 3 );
mbed_official 87:085cde657901 1233 tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
mbed_official 87:085cde657901 1234 }
mbed_official 87:085cde657901 1235 else /* DMA2D_CMode = DMA2D_ARGB4444 */
mbed_official 87:085cde657901 1236 {
mbed_official 87:085cde657901 1237 tmp1 = (tmp1 >> 28);
mbed_official 87:085cde657901 1238 tmp2 = (tmp2 >> 20);
mbed_official 87:085cde657901 1239 tmp3 = (tmp3 >> 12);
mbed_official 87:085cde657901 1240 tmp4 = (tmp4 >> 4 );
mbed_official 87:085cde657901 1241 tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
mbed_official 87:085cde657901 1242 }
mbed_official 87:085cde657901 1243 /* Write to DMA2D OCOLR register */
mbed_official 87:085cde657901 1244 hdma2d->Instance->OCOLR = tmp;
mbed_official 369:2e96f1b71984 1245 }
mbed_official 87:085cde657901 1246 else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
mbed_official 87:085cde657901 1247 {
mbed_official 87:085cde657901 1248 /* Configure DMA2D source address */
mbed_official 87:085cde657901 1249 hdma2d->Instance->FGMAR = pdata;
mbed_official 87:085cde657901 1250 }
mbed_official 87:085cde657901 1251 }
mbed_official 87:085cde657901 1252
mbed_official 87:085cde657901 1253 /**
mbed_official 87:085cde657901 1254 * @}
mbed_official 87:085cde657901 1255 */
mbed_official 106:ced8cbb51063 1256 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 87:085cde657901 1257 #endif /* HAL_DMA2D_MODULE_ENABLED */
mbed_official 87:085cde657901 1258 /**
mbed_official 87:085cde657901 1259 * @}
mbed_official 87:085cde657901 1260 */
mbed_official 87:085cde657901 1261
mbed_official 87:085cde657901 1262 /**
mbed_official 87:085cde657901 1263 * @}
mbed_official 87:085cde657901 1264 */
mbed_official 87:085cde657901 1265
mbed_official 87:085cde657901 1266 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/