Modified version of the mbed library for use with the Nucleo boards.
Dependents: EEPROMWrite Full-Project
Fork of mbed-src by
targets/hal/TARGET_STM/TARGET_STM32F0/gpio_irq_api.c@630:825f75ca301e, 2015-09-28 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Sep 28 10:45:10 2015 +0100
- Revision:
- 630:825f75ca301e
- Parent:
- 469:fc4922e0c183
Synchronized with git revision 54fbe4144faf309c37205a5d39fa665daa919f10
Full URL: https://github.com/mbedmicro/mbed/commit/54fbe4144faf309c37205a5d39fa665daa919f10/
NUCLEO_F031K6 : Add new target
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 441:d2c15dda23c1 | 1 | /* mbed Microcontroller Library |
mbed_official | 441:d2c15dda23c1 | 2 | ******************************************************************************* |
mbed_official | 441:d2c15dda23c1 | 3 | * Copyright (c) 2014, STMicroelectronics |
mbed_official | 441:d2c15dda23c1 | 4 | * All rights reserved. |
mbed_official | 441:d2c15dda23c1 | 5 | * |
mbed_official | 441:d2c15dda23c1 | 6 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 441:d2c15dda23c1 | 7 | * modification, are permitted provided that the following conditions are met: |
mbed_official | 441:d2c15dda23c1 | 8 | * |
mbed_official | 441:d2c15dda23c1 | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 441:d2c15dda23c1 | 10 | * this list of conditions and the following disclaimer. |
mbed_official | 441:d2c15dda23c1 | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 441:d2c15dda23c1 | 12 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 441:d2c15dda23c1 | 13 | * and/or other materials provided with the distribution. |
mbed_official | 441:d2c15dda23c1 | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 441:d2c15dda23c1 | 15 | * may be used to endorse or promote products derived from this software |
mbed_official | 441:d2c15dda23c1 | 16 | * without specific prior written permission. |
mbed_official | 441:d2c15dda23c1 | 17 | * |
mbed_official | 441:d2c15dda23c1 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 441:d2c15dda23c1 | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 441:d2c15dda23c1 | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 441:d2c15dda23c1 | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 441:d2c15dda23c1 | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 441:d2c15dda23c1 | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 441:d2c15dda23c1 | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 441:d2c15dda23c1 | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 441:d2c15dda23c1 | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 441:d2c15dda23c1 | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 441:d2c15dda23c1 | 28 | ******************************************************************************* |
mbed_official | 441:d2c15dda23c1 | 29 | */ |
mbed_official | 441:d2c15dda23c1 | 30 | #include <stddef.h> |
mbed_official | 441:d2c15dda23c1 | 31 | #include "cmsis.h" |
mbed_official | 441:d2c15dda23c1 | 32 | #include "gpio_irq_api.h" |
mbed_official | 441:d2c15dda23c1 | 33 | #include "pinmap.h" |
mbed_official | 441:d2c15dda23c1 | 34 | #include "mbed_error.h" |
mbed_official | 441:d2c15dda23c1 | 35 | |
mbed_official | 441:d2c15dda23c1 | 36 | #define EDGE_NONE (0) |
mbed_official | 441:d2c15dda23c1 | 37 | #define EDGE_RISE (1) |
mbed_official | 441:d2c15dda23c1 | 38 | #define EDGE_FALL (2) |
mbed_official | 441:d2c15dda23c1 | 39 | #define EDGE_BOTH (3) |
mbed_official | 441:d2c15dda23c1 | 40 | |
mbed_official | 441:d2c15dda23c1 | 41 | // Number of EXTI irq vectors (EXTI0_1, EXTI2_3, EXTI4_15) |
mbed_official | 441:d2c15dda23c1 | 42 | #define CHANNEL_NUM (3) |
mbed_official | 441:d2c15dda23c1 | 43 | |
mbed_official | 441:d2c15dda23c1 | 44 | // Max pins for one line (max with EXTI4_15) |
mbed_official | 441:d2c15dda23c1 | 45 | #define MAX_PIN_LINE (12) |
mbed_official | 441:d2c15dda23c1 | 46 | |
mbed_official | 441:d2c15dda23c1 | 47 | typedef struct gpio_channel { |
mbed_official | 441:d2c15dda23c1 | 48 | uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts |
mbed_official | 441:d2c15dda23c1 | 49 | uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance |
mbed_official | 441:d2c15dda23c1 | 50 | uint32_t channel_gpio[MAX_PIN_LINE]; // base address of gpio port group |
mbed_official | 441:d2c15dda23c1 | 51 | uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group |
mbed_official | 441:d2c15dda23c1 | 52 | } gpio_channel_t; |
mbed_official | 441:d2c15dda23c1 | 53 | |
mbed_official | 441:d2c15dda23c1 | 54 | static gpio_channel_t channels[CHANNEL_NUM] = { |
mbed_official | 441:d2c15dda23c1 | 55 | {.pin_mask = 0}, |
mbed_official | 441:d2c15dda23c1 | 56 | {.pin_mask = 0}, |
mbed_official | 441:d2c15dda23c1 | 57 | {.pin_mask = 0} |
mbed_official | 441:d2c15dda23c1 | 58 | }; |
mbed_official | 441:d2c15dda23c1 | 59 | |
mbed_official | 441:d2c15dda23c1 | 60 | // Used to return the index for channels array. |
mbed_official | 441:d2c15dda23c1 | 61 | static uint32_t pin_base_nr[16] = { |
mbed_official | 441:d2c15dda23c1 | 62 | // EXTI0_1 |
mbed_official | 441:d2c15dda23c1 | 63 | 0, // pin 0 |
mbed_official | 441:d2c15dda23c1 | 64 | 1, // pin 1 |
mbed_official | 441:d2c15dda23c1 | 65 | // EXTI2_3 |
mbed_official | 441:d2c15dda23c1 | 66 | 0, // pin 2 |
mbed_official | 441:d2c15dda23c1 | 67 | 1, // pin 3 |
mbed_official | 441:d2c15dda23c1 | 68 | // EXTI4_15 |
mbed_official | 441:d2c15dda23c1 | 69 | 0, // pin 4 |
mbed_official | 441:d2c15dda23c1 | 70 | 1, // pin 5 |
mbed_official | 441:d2c15dda23c1 | 71 | 2, // pin 6 |
mbed_official | 441:d2c15dda23c1 | 72 | 3, // pin 7 |
mbed_official | 441:d2c15dda23c1 | 73 | 4, // pin 8 |
mbed_official | 441:d2c15dda23c1 | 74 | 5, // pin 9 |
mbed_official | 441:d2c15dda23c1 | 75 | 6, // pin 10 |
mbed_official | 441:d2c15dda23c1 | 76 | 7, // pin 11 |
mbed_official | 441:d2c15dda23c1 | 77 | 8, // pin 12 |
mbed_official | 441:d2c15dda23c1 | 78 | 9, // pin 13 |
mbed_official | 441:d2c15dda23c1 | 79 | 10, // pin 14 |
mbed_official | 441:d2c15dda23c1 | 80 | 11 // pin 15 |
mbed_official | 441:d2c15dda23c1 | 81 | }; |
mbed_official | 441:d2c15dda23c1 | 82 | |
mbed_official | 441:d2c15dda23c1 | 83 | static gpio_irq_handler irq_handler; |
mbed_official | 441:d2c15dda23c1 | 84 | |
mbed_official | 630:825f75ca301e | 85 | static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line) { |
mbed_official | 441:d2c15dda23c1 | 86 | gpio_channel_t *gpio_channel = &channels[irq_index]; |
mbed_official | 441:d2c15dda23c1 | 87 | uint32_t gpio_idx; |
mbed_official | 441:d2c15dda23c1 | 88 | |
mbed_official | 441:d2c15dda23c1 | 89 | for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) { |
mbed_official | 441:d2c15dda23c1 | 90 | uint32_t current_mask = (1 << gpio_idx); |
mbed_official | 441:d2c15dda23c1 | 91 | |
mbed_official | 441:d2c15dda23c1 | 92 | if (gpio_channel->pin_mask & current_mask) { |
mbed_official | 441:d2c15dda23c1 | 93 | // Retrieve the gpio and pin that generate the irq |
mbed_official | 441:d2c15dda23c1 | 94 | GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]); |
mbed_official | 441:d2c15dda23c1 | 95 | uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx])); |
mbed_official | 441:d2c15dda23c1 | 96 | |
mbed_official | 441:d2c15dda23c1 | 97 | // Clear interrupt flag |
mbed_official | 441:d2c15dda23c1 | 98 | if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) { |
mbed_official | 441:d2c15dda23c1 | 99 | __HAL_GPIO_EXTI_CLEAR_FLAG(pin); |
mbed_official | 441:d2c15dda23c1 | 100 | |
mbed_official | 441:d2c15dda23c1 | 101 | if (gpio_channel->channel_ids[gpio_idx] == 0) continue; |
mbed_official | 441:d2c15dda23c1 | 102 | |
mbed_official | 441:d2c15dda23c1 | 103 | // Check which edge has generated the irq |
mbed_official | 441:d2c15dda23c1 | 104 | if ((gpio->IDR & pin) == 0) { |
mbed_official | 441:d2c15dda23c1 | 105 | irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL); |
mbed_official | 441:d2c15dda23c1 | 106 | } else { |
mbed_official | 441:d2c15dda23c1 | 107 | irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE); |
mbed_official | 441:d2c15dda23c1 | 108 | } |
mbed_official | 441:d2c15dda23c1 | 109 | } |
mbed_official | 441:d2c15dda23c1 | 110 | } |
mbed_official | 441:d2c15dda23c1 | 111 | } |
mbed_official | 441:d2c15dda23c1 | 112 | } |
mbed_official | 441:d2c15dda23c1 | 113 | |
mbed_official | 441:d2c15dda23c1 | 114 | // EXTI lines 0 to 1 |
mbed_official | 630:825f75ca301e | 115 | static void gpio_irq0(void) { |
mbed_official | 441:d2c15dda23c1 | 116 | handle_interrupt_in(0, 2); |
mbed_official | 441:d2c15dda23c1 | 117 | } |
mbed_official | 441:d2c15dda23c1 | 118 | |
mbed_official | 441:d2c15dda23c1 | 119 | // EXTI lines 2 to 3 |
mbed_official | 630:825f75ca301e | 120 | static void gpio_irq1(void) { |
mbed_official | 441:d2c15dda23c1 | 121 | handle_interrupt_in(1, 2); |
mbed_official | 441:d2c15dda23c1 | 122 | } |
mbed_official | 441:d2c15dda23c1 | 123 | |
mbed_official | 441:d2c15dda23c1 | 124 | // EXTI lines 4 to 15 |
mbed_official | 630:825f75ca301e | 125 | static void gpio_irq2(void) { |
mbed_official | 441:d2c15dda23c1 | 126 | handle_interrupt_in(2, 12); |
mbed_official | 441:d2c15dda23c1 | 127 | } |
mbed_official | 441:d2c15dda23c1 | 128 | |
mbed_official | 441:d2c15dda23c1 | 129 | extern uint32_t Set_GPIO_Clock(uint32_t port_idx); |
mbed_official | 441:d2c15dda23c1 | 130 | |
mbed_official | 630:825f75ca301e | 131 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { |
mbed_official | 441:d2c15dda23c1 | 132 | IRQn_Type irq_n = (IRQn_Type)0; |
mbed_official | 441:d2c15dda23c1 | 133 | uint32_t vector = 0; |
mbed_official | 441:d2c15dda23c1 | 134 | uint32_t irq_index; |
mbed_official | 441:d2c15dda23c1 | 135 | gpio_channel_t *gpio_channel; |
mbed_official | 441:d2c15dda23c1 | 136 | uint32_t gpio_idx; |
mbed_official | 441:d2c15dda23c1 | 137 | |
mbed_official | 441:d2c15dda23c1 | 138 | if (pin == NC) return -1; |
mbed_official | 441:d2c15dda23c1 | 139 | |
mbed_official | 441:d2c15dda23c1 | 140 | uint32_t port_index = STM_PORT(pin); |
mbed_official | 441:d2c15dda23c1 | 141 | uint32_t pin_index = STM_PIN(pin); |
mbed_official | 441:d2c15dda23c1 | 142 | |
mbed_official | 441:d2c15dda23c1 | 143 | // Select irq number and interrupt routine |
mbed_official | 441:d2c15dda23c1 | 144 | if ((pin_index == 0) || (pin_index == 1)) { |
mbed_official | 441:d2c15dda23c1 | 145 | irq_n = EXTI0_1_IRQn; |
mbed_official | 441:d2c15dda23c1 | 146 | vector = (uint32_t)&gpio_irq0; |
mbed_official | 441:d2c15dda23c1 | 147 | irq_index = 0; |
mbed_official | 441:d2c15dda23c1 | 148 | } else if ((pin_index == 2) || (pin_index == 3)) { |
mbed_official | 441:d2c15dda23c1 | 149 | irq_n = EXTI2_3_IRQn; |
mbed_official | 441:d2c15dda23c1 | 150 | vector = (uint32_t)&gpio_irq1; |
mbed_official | 441:d2c15dda23c1 | 151 | irq_index = 1; |
mbed_official | 441:d2c15dda23c1 | 152 | } else if ((pin_index > 3) && (pin_index < 16)) { |
mbed_official | 441:d2c15dda23c1 | 153 | irq_n = EXTI4_15_IRQn; |
mbed_official | 441:d2c15dda23c1 | 154 | vector = (uint32_t)&gpio_irq2; |
mbed_official | 441:d2c15dda23c1 | 155 | irq_index = 2; |
mbed_official | 441:d2c15dda23c1 | 156 | } else { |
mbed_official | 441:d2c15dda23c1 | 157 | error("InterruptIn error: pin not supported.\n"); |
mbed_official | 441:d2c15dda23c1 | 158 | return -1; |
mbed_official | 441:d2c15dda23c1 | 159 | } |
mbed_official | 441:d2c15dda23c1 | 160 | |
mbed_official | 441:d2c15dda23c1 | 161 | // Enable GPIO clock |
mbed_official | 441:d2c15dda23c1 | 162 | uint32_t gpio_add = Set_GPIO_Clock(port_index); |
mbed_official | 441:d2c15dda23c1 | 163 | |
mbed_official | 441:d2c15dda23c1 | 164 | // Configure GPIO |
mbed_official | 441:d2c15dda23c1 | 165 | pin_function(pin, STM_PIN_DATA(STM_MODE_IT_FALLING, GPIO_NOPULL, 0)); |
mbed_official | 441:d2c15dda23c1 | 166 | |
mbed_official | 441:d2c15dda23c1 | 167 | // Enable EXTI interrupt |
mbed_official | 441:d2c15dda23c1 | 168 | NVIC_SetVector(irq_n, vector); |
mbed_official | 441:d2c15dda23c1 | 169 | NVIC_EnableIRQ(irq_n); |
mbed_official | 441:d2c15dda23c1 | 170 | |
mbed_official | 441:d2c15dda23c1 | 171 | // Save informations for future use |
mbed_official | 441:d2c15dda23c1 | 172 | obj->irq_n = irq_n; |
mbed_official | 441:d2c15dda23c1 | 173 | obj->irq_index = irq_index; |
mbed_official | 441:d2c15dda23c1 | 174 | obj->event = EDGE_NONE; |
mbed_official | 441:d2c15dda23c1 | 175 | obj->pin = pin; |
mbed_official | 441:d2c15dda23c1 | 176 | |
mbed_official | 441:d2c15dda23c1 | 177 | gpio_channel = &channels[irq_index]; |
mbed_official | 441:d2c15dda23c1 | 178 | gpio_idx = pin_base_nr[pin_index]; |
mbed_official | 441:d2c15dda23c1 | 179 | gpio_channel->pin_mask |= (1 << gpio_idx); |
mbed_official | 441:d2c15dda23c1 | 180 | gpio_channel->channel_ids[gpio_idx] = id; |
mbed_official | 441:d2c15dda23c1 | 181 | gpio_channel->channel_gpio[gpio_idx] = gpio_add; |
mbed_official | 441:d2c15dda23c1 | 182 | gpio_channel->channel_pin[gpio_idx] = pin_index; |
mbed_official | 441:d2c15dda23c1 | 183 | |
mbed_official | 441:d2c15dda23c1 | 184 | irq_handler = handler; |
mbed_official | 441:d2c15dda23c1 | 185 | |
mbed_official | 441:d2c15dda23c1 | 186 | return 0; |
mbed_official | 441:d2c15dda23c1 | 187 | } |
mbed_official | 441:d2c15dda23c1 | 188 | |
mbed_official | 630:825f75ca301e | 189 | void gpio_irq_free(gpio_irq_t *obj) { |
mbed_official | 441:d2c15dda23c1 | 190 | gpio_channel_t *gpio_channel = &channels[obj->irq_index]; |
mbed_official | 441:d2c15dda23c1 | 191 | uint32_t pin_index = STM_PIN(obj->pin); |
mbed_official | 441:d2c15dda23c1 | 192 | uint32_t gpio_idx = pin_base_nr[pin_index]; |
mbed_official | 441:d2c15dda23c1 | 193 | |
mbed_official | 441:d2c15dda23c1 | 194 | gpio_channel->pin_mask &= ~(1 << gpio_idx); |
mbed_official | 441:d2c15dda23c1 | 195 | gpio_channel->channel_ids[gpio_idx] = 0; |
mbed_official | 441:d2c15dda23c1 | 196 | gpio_channel->channel_gpio[gpio_idx] = 0; |
mbed_official | 441:d2c15dda23c1 | 197 | gpio_channel->channel_pin[gpio_idx] = 0; |
mbed_official | 441:d2c15dda23c1 | 198 | |
mbed_official | 441:d2c15dda23c1 | 199 | // Disable EXTI line |
mbed_official | 441:d2c15dda23c1 | 200 | pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
mbed_official | 441:d2c15dda23c1 | 201 | obj->event = EDGE_NONE; |
mbed_official | 441:d2c15dda23c1 | 202 | } |
mbed_official | 441:d2c15dda23c1 | 203 | |
mbed_official | 630:825f75ca301e | 204 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { |
mbed_official | 441:d2c15dda23c1 | 205 | uint32_t mode = STM_MODE_IT_EVT_RESET; |
mbed_official | 441:d2c15dda23c1 | 206 | uint32_t pull = GPIO_NOPULL; |
mbed_official | 441:d2c15dda23c1 | 207 | |
mbed_official | 441:d2c15dda23c1 | 208 | if (enable) { |
mbed_official | 441:d2c15dda23c1 | 209 | if (event == IRQ_RISE) { |
mbed_official | 441:d2c15dda23c1 | 210 | if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) { |
mbed_official | 441:d2c15dda23c1 | 211 | mode = STM_MODE_IT_RISING_FALLING; |
mbed_official | 441:d2c15dda23c1 | 212 | obj->event = EDGE_BOTH; |
mbed_official | 441:d2c15dda23c1 | 213 | } else { // NONE or RISE |
mbed_official | 441:d2c15dda23c1 | 214 | mode = STM_MODE_IT_RISING; |
mbed_official | 441:d2c15dda23c1 | 215 | obj->event = EDGE_RISE; |
mbed_official | 441:d2c15dda23c1 | 216 | } |
mbed_official | 441:d2c15dda23c1 | 217 | } |
mbed_official | 441:d2c15dda23c1 | 218 | if (event == IRQ_FALL) { |
mbed_official | 441:d2c15dda23c1 | 219 | if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) { |
mbed_official | 441:d2c15dda23c1 | 220 | mode = STM_MODE_IT_RISING_FALLING; |
mbed_official | 441:d2c15dda23c1 | 221 | obj->event = EDGE_BOTH; |
mbed_official | 441:d2c15dda23c1 | 222 | } else { // NONE or FALL |
mbed_official | 441:d2c15dda23c1 | 223 | mode = STM_MODE_IT_FALLING; |
mbed_official | 441:d2c15dda23c1 | 224 | obj->event = EDGE_FALL; |
mbed_official | 441:d2c15dda23c1 | 225 | } |
mbed_official | 441:d2c15dda23c1 | 226 | } |
mbed_official | 441:d2c15dda23c1 | 227 | } else { // Disable |
mbed_official | 441:d2c15dda23c1 | 228 | if (event == IRQ_RISE) { |
mbed_official | 441:d2c15dda23c1 | 229 | if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) { |
mbed_official | 441:d2c15dda23c1 | 230 | mode = STM_MODE_IT_FALLING; |
mbed_official | 441:d2c15dda23c1 | 231 | obj->event = EDGE_FALL; |
mbed_official | 441:d2c15dda23c1 | 232 | } else { // NONE or RISE |
mbed_official | 441:d2c15dda23c1 | 233 | mode = STM_MODE_IT_EVT_RESET; |
mbed_official | 441:d2c15dda23c1 | 234 | obj->event = EDGE_NONE; |
mbed_official | 441:d2c15dda23c1 | 235 | } |
mbed_official | 441:d2c15dda23c1 | 236 | } |
mbed_official | 441:d2c15dda23c1 | 237 | if (event == IRQ_FALL) { |
mbed_official | 441:d2c15dda23c1 | 238 | if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) { |
mbed_official | 441:d2c15dda23c1 | 239 | mode = STM_MODE_IT_RISING; |
mbed_official | 441:d2c15dda23c1 | 240 | obj->event = EDGE_RISE; |
mbed_official | 441:d2c15dda23c1 | 241 | } else { // NONE or FALL |
mbed_official | 441:d2c15dda23c1 | 242 | mode = STM_MODE_IT_EVT_RESET; |
mbed_official | 441:d2c15dda23c1 | 243 | obj->event = EDGE_NONE; |
mbed_official | 441:d2c15dda23c1 | 244 | } |
mbed_official | 441:d2c15dda23c1 | 245 | } |
mbed_official | 441:d2c15dda23c1 | 246 | } |
mbed_official | 441:d2c15dda23c1 | 247 | |
mbed_official | 441:d2c15dda23c1 | 248 | pin_function(obj->pin, STM_PIN_DATA(mode, pull, 0)); |
mbed_official | 441:d2c15dda23c1 | 249 | } |
mbed_official | 441:d2c15dda23c1 | 250 | |
mbed_official | 630:825f75ca301e | 251 | void gpio_irq_enable(gpio_irq_t *obj) { |
mbed_official | 441:d2c15dda23c1 | 252 | NVIC_EnableIRQ(obj->irq_n); |
mbed_official | 441:d2c15dda23c1 | 253 | } |
mbed_official | 441:d2c15dda23c1 | 254 | |
mbed_official | 630:825f75ca301e | 255 | void gpio_irq_disable(gpio_irq_t *obj) { |
mbed_official | 441:d2c15dda23c1 | 256 | NVIC_DisableIRQ(obj->irq_n); |
mbed_official | 441:d2c15dda23c1 | 257 | obj->event = EDGE_NONE; |
mbed_official | 441:d2c15dda23c1 | 258 | } |