p igmon

Important changes to forums and questions

All forums and questions are now archived. To start a new conversation or read the latest updates go to forums.mbed.com.

10 years ago.

Nucleo F401RE DMA Register can not access.

I want to I2S Transmit with DMA. But can not Write DMA Stream4 Register [I changed Program for see problem easy.]

#include "mbed.h"
#include "stm32f401xe.h"

Serial pc(SERIAL_TX, SERIAL_RX);
 
#define my_DMA1_Stream4_BASE (uint32_t)0x40026070
#define my_DMA1_Stream4 ((my_DMA_Stream_TypeDef *) my_DMA1_Stream4_BASE)

typedef struct
{
  __IO uint32_t CR;     /*!< DMA stream x configuration register      */
  __IO uint32_t NDTR;   /*!< DMA stream x number of data register     */
  __IO uint32_t PAR;    /*!< DMA stream x peripheral address register */
  __IO uint32_t M0AR;   /*!< DMA stream x memory 0 address register   */
  __IO uint32_t M1AR;   /*!< DMA stream x memory 1 address register   */
  __IO uint32_t FCR;    /*!< DMA stream x FIFO control register       */
} my_DMA_Stream_TypeDef;

int main() {
    my_DMA1_Stream4->CR = 0x55555555; 

    pc.printf("DMA CR Addr = %4x data = %4x \n\r" ,&my_DMA1_Stream4->CR ,my_DMA1_Stream4->CR);// 1st
    pc.printf("DMA CR Addr = %4x data = %4x \n\r" ,&my_DMA1_Stream4->CR ,my_DMA1_Stream4->CR);// 2nd
   
 
  while(1) { 
        wait_ms(500);
  }
}

print out1

DMA1_STREAM4_CR Address =40026070 data =   0... not 0x55555555
DMA1_STREAM4_CR Address =40026070 data =   0 ... not 0x55555555

print out2

typedef struct
{
 uint32_t CR;     /*!< DMA stream x configuration register    REMOVE __IO     */
  __IO uint32_t NDTR;   /*!< DMA stream x number of data register     */
.....


DMA1_STREAM4_CR Address =40026070 data =   55555555
DMA1_STREAM4_CR Address =40026070 data =   0 ... not 0x55555555

Is there any caution before access DMA Registers?

I know   __IO mean volatile. for I/O access.

1 Answer

Erik -
10 years ago.

I should make this a standard disclaimer, but I don't have this one myself so can't try it.

But don't you have to enable the peripheral/clocking of the peripheral first? Trying that on a freescale one would not even return 0, it would lock up the entire controller. It might very well simply return 0 on Nucleo devices if it isn't clocked/active.

Accepted Answer

Thanks. But Really Problem is more one. So I Changed Simple Program for see PROBLEM.

posted by p igmon 18 May 2014

Yes I see HCLK for DMA again,Thanks.

posted by p igmon 18 May 2014

I added

__DMA1_CLK_ENABLE();

printout 
DMA CR Addr = 40026070 data = 5555554
DMA CR Addr = 40026070 data = 4155554

it seems run well !! Thanks )

posted by p igmon 18 May 2014