Revision 420:8e6e2662709e, committed 2014-11-27

Comitter:

mbed_official

Date:

Thu Nov 27 11:45:07 2014 +0000

Parent:

419:d1a75cbecf6e

Child:

421:cc1c4962551c

Commit message:

Synchronized with git revision 8a3087825b914b36a82ec694c2caf529295f8ad1

Full URL: https://github.com/mbedmicro/mbed/commit/8a3087825b914b36a82ec694c2caf529295f8ad1/

Targets: RZ_A1H - Fix RTOS build error (Cortex A)

Changed in this revision

--- a/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_IAR/MK20D5.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_IAR/MK20D5.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -6,7 +6,9 @@
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
 define symbol __ICFEDIT_region_ROM_end__   = 0x0001ffff;
-define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe000;
+define symbol __ICFEDIT_region_NVIC_start__   = 0x1fffe000;
+define symbol __ICFEDIT_region_NVIC_end__   = 0x1fffe0f7;
+define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0f8;
 define symbol __ICFEDIT_region_RAM_end__   = 0x1fffffff;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x400;
@@ -44,6 +46,6 @@
 
 place in ROM_region   { readonly };
 
-place in RAM_region   { readwrite, block CSTACK, block HEAP };
+place in RAM_region   { readwrite, block HEAP, block CSTACK };
 
 place in FlexRAM_region   { section .flex_ram };

--- a/targets/cmsis/TARGET_Freescale/TARGET_K22F/TOOLCHAIN_IAR/MK22F51212.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_Freescale/TARGET_K22F/TOOLCHAIN_IAR/MK22F51212.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -6,29 +6,24 @@
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
 define symbol __ICFEDIT_region_ROM_end__   = 0x0007ffff;
-define symbol __ICFEDIT_region_RAM_start__ = 0x1fff8000;
+define symbol __ICFEDIT_region_NVIC_start__   = 0x1fff0000;
+define symbol __ICFEDIT_region_NVIC_end__   = 0x1fff0197;
+define symbol __ICFEDIT_region_RAM_start__ = 0x1fff0198;
 define symbol __ICFEDIT_region_RAM_end__   = 0x1fffffff;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x2000;
 define symbol __ICFEDIT_size_heap__   = 0x4000;
 /**** End of ICF editor section. ###ICF###*/
 
-define symbol __region_RAM2_start__ 		= 0x20000000;
-define symbol __region_RAM2_end__ 			= 0x20007fff;
-
-define symbol __FlashConfig_start__			= 0x00000400;
-define symbol __FlashConfig_end__   		= 0x0000040f;
+define symbol __region_RAM2_start__ = 0x20000000;
+define symbol __region_RAM2_end__ 	= 0x2000ffff;
 
-define symbol __region_FlexNVM_start__ 	= 0x10000000;
-define symbol __region_FlexNVM_end__   	= 0x1001ffff;
-
-define symbol __region_FlexRAM_start__ 	= 0x14000000;
-define symbol __region_FlexRAM_end__   	= 0x14000fff;
+define symbol __FlashConfig_start__	= 0x00000400;
+define symbol __FlashConfig_end__  	= 0x0000040f;
 
 define memory mem with size = 4G;
-define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1)  to __ICFEDIT_region_ROM_end__] | mem:[from __region_FlexNVM_start__ to __region_FlexNVM_end__];
-define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
-define region FlexRAM_region = mem:[from __region_FlexRAM_start__ to __region_FlexRAM_end__];
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1)  to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
 
 define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
 define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
@@ -44,6 +39,4 @@
 
 place in ROM_region   { readonly };
 
-place in RAM_region   { readwrite, block CSTACK, block HEAP };
-
-place in FlexRAM_region   { section .flex_ram };
+place in RAM_region   { readwrite, block HEAP, block CSTACK };

--- a/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/TOOLCHAIN_IAR/MKL05Z4.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/TOOLCHAIN_IAR/MKL05Z4.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -6,7 +6,9 @@
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
 define symbol __ICFEDIT_region_ROM_end__   = 0x00007fff;
-define symbol __ICFEDIT_region_RAM_start__ = 0x1ffffc00;
+define symbol __ICFEDIT_region_NVIC_start__   = 0x1ffffc00;
+define symbol __ICFEDIT_region_NVIC_end__   = 0x1ffffcbf;
+define symbol __ICFEDIT_region_RAM_start__ = 0x1ffffcc0;
 define symbol __ICFEDIT_region_RAM_end__   = 0x1fffffff;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x200;
@@ -37,4 +39,4 @@
 
 place in ROM_region   { readonly };
 
-place in RAM_region   { readwrite, block CSTACK, block HEAP };
+place in RAM_region   { readwrite, block HEAP, block CSTACK };

--- a/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/TOOLCHAIN_IAR/MKL25Z4.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/TOOLCHAIN_IAR/MKL25Z4.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -6,7 +6,9 @@
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
 define symbol __ICFEDIT_region_ROM_end__   = 0x0001ffff;
-define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff000;
+define symbol __ICFEDIT_region_NVIC_start__   = 0x1ffff000;
+define symbol __ICFEDIT_region_NVIC_end__   = 0x1ffff0bf;
+define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0;
 define symbol __ICFEDIT_region_RAM_end__   = 0x1fffffff;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x400;
@@ -37,4 +39,4 @@
 
 place in ROM_region   { readonly };
 
-place in RAM_region   { readwrite, block CSTACK, block HEAP };
+place in RAM_region   { readwrite, block HEAP, block CSTACK };

--- a/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/TOOLCHAIN_IAR/MKL46Z4.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/TOOLCHAIN_IAR/MKL46Z4.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -6,7 +6,9 @@
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
 define symbol __ICFEDIT_region_ROM_end__   = 0x0002ffff;
-define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe000;
+define symbol __ICFEDIT_region_NVIC_start__   = 0x1fffe000;
+define symbol __ICFEDIT_region_NVIC_end__   = 0x1fffe0bf;
+define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0c0;
 define symbol __ICFEDIT_region_RAM_end__   = 0x1fffffff;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x800;
@@ -37,4 +39,4 @@
 
 place in ROM_region   { readonly };
 
-place in RAM_region   { readwrite, block CSTACK, block HEAP };
+place in RAM_region   { readwrite, block HEAP, block CSTACK };

--- a/targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_IAR/MK64F.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_IAR/MK64F.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -6,7 +6,9 @@
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
 define symbol __ICFEDIT_region_ROM_end__   = 0x000fffff;
-define symbol __ICFEDIT_region_RAM_start__ = 0x1fff0000;
+define symbol __ICFEDIT_region_NVIC_start__   = 0x1fff0000;
+define symbol __ICFEDIT_region_NVIC_end__   = 0x1fff0197;
+define symbol __ICFEDIT_region_RAM_start__ = 0x1fff0198;
 define symbol __ICFEDIT_region_RAM_end__   = 0x1fffffff;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x2000;
@@ -41,6 +43,6 @@
 
 place in ROM_region   { readonly };
 
-place in RAM_region   { readwrite, block CSTACK, block HEAP };
+place in RAM_region   { readwrite, block HEAP, block CSTACK };
 
 place in FlexRAM_region   { section .flex_ram };

--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_IAR/stm32f10x.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_IAR/stm32f10x.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -6,7 +6,9 @@
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
 define symbol __ICFEDIT_region_ROM_end__   = 0x0801FFFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_NVIC_start__   = 0x20000000;
+define symbol __ICFEDIT_region_NVIC_end__   = 0x200000EB;
+define symbol __ICFEDIT_region_RAM_start__ = 0x200000EC;
 define symbol __ICFEDIT_region_RAM_end__   = 0x20004FFF;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x800;
@@ -27,4 +29,4 @@
 
 place in ROM_region   { readonly };
 place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
+                        block HEAP, block CSTACK };
\ No newline at end of file

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/TOOLCHAIN_IAR/stm32f302x8.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/TOOLCHAIN_IAR/stm32f302x8.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -5,8 +5,8 @@
 
 /* [RAM = 16kb = 0x4000] Vector table dynamic copy: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
 define symbol __NVIC_start__          = 0x20000000;
-define symbol __NVIC_end__            = 0x20000191; /* Add 4 more bytes to be aligned on 8 bytes */
-define symbol __region_RAM_start__    = 0x20000192;
+define symbol __NVIC_end__            = 0x20000187; /*aligned on 8 bytes */
+define symbol __region_RAM_start__    = 0x20000188;
 define symbol __region_RAM_end__      = 0x20003FFF;
 
 /* Memory regions */

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F334R8/TOOLCHAIN_IAR/stm32f334x8.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F334R8/TOOLCHAIN_IAR/stm32f334x8.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -5,8 +5,8 @@
 
 /* [RAM = 16kb = 0x4000] Vector table dynamic copy: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
 define symbol __NVIC_start__          = 0x20000000;
-define symbol __NVIC_end__            = 0x20000191; /* Add 4 more bytes to be aligned on 8 bytes */
-define symbol __region_RAM_start__    = 0x20000192;
+define symbol __NVIC_end__            = 0x20000187; /*aligned on 8 bytes */
+define symbol __region_RAM_start__    = 0x20000188;
 define symbol __region_RAM_end__      = 0x20003FFF;
 define symbol __region_CCMRAM_start__ = 0x10000000;
 define symbol __region_CCMRAM_end__   = 0x10000FFF;

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/TOOLCHAIN_IAR/STM32F407.icf	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/TOOLCHAIN_IAR/STM32F407.icf	Thu Nov 27 11:45:07 2014 +0000
@@ -6,7 +6,9 @@
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
 define symbol __ICFEDIT_region_ROM_end__   = 0x080FFFFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __NVIC_start__          = 0x20000000;
+define symbol __NVIC_end__            = 0x20000187; /* Aligned on 8 bytes */
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000188;
 define symbol __ICFEDIT_region_RAM_end__   = 0x2001FFFF;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x2000;

--- a/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/PeripheralNames.h	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/PeripheralNames.h	Thu Nov 27 11:45:07 2014 +0000
@@ -76,6 +76,7 @@
 typedef enum {
     SPI_0 = 0,
     SPI_1,
+    SPI_2,
 } SPIName;
 
 typedef enum {

--- a/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/spi_api.c	Thu Nov 27 07:45:07 2014 +0000
+++ b/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/spi_api.c	Thu Nov 27 11:45:07 2014 +0000
@@ -27,24 +27,28 @@
 static const PinMap PinMap_SPI_SCLK[] = {
     {P10_12, SPI_0, 4},
     {P11_12, SPI_1, 2},
+    {P8_3,   SPI_2, 3},
     {NC   , NC   , 0}
 };
 
 static const PinMap PinMap_SPI_SSEL[] = {
     {P10_13, SPI_0, 4},
     {P11_13, SPI_1, 2},
+    {P8_4,   SPI_2, 3},
     {NC   , NC   , 0}
 };
 
 static const PinMap PinMap_SPI_MOSI[] = {
     {P10_14, SPI_0, 4},
     {P11_14, SPI_1, 2},
+    {P8_5,   SPI_2, 3},
     {NC   , NC   , 0}
 };
 
 static const PinMap PinMap_SPI_MISO[] = {
     {P10_15, SPI_0, 4},
     {P11_15, SPI_1, 2},
+    {P8_6,   SPI_2, 3},
     {NC   , NC   , 0}
 };
 
@@ -73,6 +77,7 @@
     switch ((int)obj->spi) {
         case SPI_0: CPGSTBCR10 &= ~(0x80); break;
         case SPI_1: CPGSTBCR10 &= ~(0x40); break;
+        case SPI_2: CPGSTBCR10 &= ~(0x20); break;
     }
     dummy = CPGSTBCR10;