Revision 4:6ebbf25b9167, committed 2014-07-16

Comitter:

Sissors

Date:

Wed Jul 16 19:31:35 2014 +0000

Parent:

3:3dd9466e73fc

Child:

5:3dd1ab9bbc59

Commit message:

First Nucleo, first version added: F401RE

Changed in this revision

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/Devices/FastIO_K20D50M.h	Wed Jul 16 19:31:35 2014 +0000
@@ -0,0 +1,26 @@
+#ifdef TARGET_K20D50M
+
+#include "mbed.h"
+#include "pinmap.h"
+
+typedef struct {
+    uint32_t mask;
+} fastio_vars;
+
+#define PORT_BASE       ((GPIO_Type *)(PTA_BASE + ((unsigned int)pin >> PORT_SHIFT) * 0x40))
+#define PINMASK         (1 << ((pin & 0x7F) >> 2))
+#define PCR             ((__IO uint32_t*)(PORTA_BASE + pin))
+
+#define INIT_PIN        container.mask = PINMASK; pin_function(pin, 1)
+#define DESTROY_PIN     
+
+#define SET_DIR_INPUT   (PORT_BASE->PDDR &= ~PINMASK)
+#define SET_DIR_OUTPUT  (PORT_BASE->PDDR |= PINMASK)
+#define SET_MODE(pull)  (*PCR = (*PCR & ~0x3) | pull)
+
+#define WRITE_PIN_SET   (PORT_BASE->PSOR |= container.mask)
+#define WRITE_PIN_CLR   (PORT_BASE->PCOR |= container.mask)
+
+#define READ_PIN        ((PORT_BASE->PDIR & container.mask) ? 1 : 0)
+
+#endif

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/Devices/FastIO_KLXX.h	Wed Jul 16 19:31:35 2014 +0000
@@ -0,0 +1,26 @@
+#ifdef TARGET_KLXX
+
+#include "mbed.h"
+#include "pinmap.h"
+
+typedef struct {
+    uint32_t mask;
+} fastio_vars;
+
+#define PORT_BASE       ((FGPIO_Type *)(FPTA_BASE + ((unsigned int)pin >> PORT_SHIFT) * 0x40))
+#define PINMASK         (1 << ((pin & 0x7F) >> 2))
+#define PCR             ((__IO uint32_t*)(PORTA_BASE + pin))
+
+#define INIT_PIN        container.mask = PINMASK; pin_function(pin, 1)
+#define DESTROY_PIN     
+
+#define SET_DIR_INPUT   (PORT_BASE->PDDR &= ~PINMASK)
+#define SET_DIR_OUTPUT  (PORT_BASE->PDDR |= PINMASK)
+#define SET_MODE(pull)  (*PCR = (*PCR & ~0x3) | pull)
+
+#define WRITE_PIN_SET   (PORT_BASE->PSOR |= PINMASK)
+#define WRITE_PIN_CLR   (PORT_BASE->PCOR |= PINMASK)
+
+#define READ_PIN        ((PORT_BASE->PDIR & container.mask) ? 1 : 0)
+
+#endif

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/Devices/FastIO_LPC11UXX.h	Wed Jul 16 19:31:35 2014 +0000
@@ -0,0 +1,38 @@
+#ifdef TARGET_LPC11UXX
+
+#include "mbed.h"
+#include "pinmap.h"
+
+typedef struct {
+    uint32_t mask;
+} fastio_vars;
+
+#define PORT            ((unsigned int)pin >> PORT_SHIFT)
+#define PINMASK         (1 << ((int)pin & 0x1F))
+static inline void initpin(PinName pin);
+
+#define INIT_PIN        container.mask = PINMASK; initpin(pin)
+#define DESTROY_PIN     
+
+#define SET_DIR_INPUT   (LPC_GPIO->DIR[PORT] &= ~PINMASK)
+#define SET_DIR_OUTPUT  (LPC_GPIO->DIR[PORT] |= PINMASK)
+#define SET_MODE(pull)  (pin_mode(pin, pull))
+
+#define WRITE_PIN_SET   (LPC_GPIO->SET[PORT] = PINMASK)
+#define WRITE_PIN_CLR   (LPC_GPIO->CLR[PORT] = PINMASK)
+
+#define READ_PIN        ((LPC_GPIO->PIN[PORT] & container.mask) ? 1 : 0)
+
+static inline void initpin(PinName pin) {
+    int f = ((pin == P0_0)  ||
+    (pin == P0_10) ||
+    (pin == P0_11) ||
+    (pin == P0_12) ||
+    (pin == P0_13) ||
+    (pin == P0_14) ||
+    (pin == P0_15)) ? (1) : (0);
+
+    pin_function(pin, f);
+}
+
+#endif
\ No newline at end of file

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/Devices/FastIO_LPC1768.h	Wed Jul 16 19:31:35 2014 +0000
@@ -0,0 +1,28 @@
+#ifdef TARGET_LPC1768
+
+#include "mbed.h"
+#include "pinmap.h"
+
+typedef struct {
+    uint32_t mask;
+} fastio_vars;
+
+#define LPC_GPIO            ((LPC_GPIO_TypeDef*)(pin & ~0x1F))
+#define PINMASK             (1UL << (((pin) - P0_0)%32))
+
+#define PINSELREG           (*(volatile uint32_t*)(LPC_PINCON_BASE + 4*(((pin) - P0_0)/16)))
+#define PINSELMASK          (0x03 << (((pin - P0_0)%16)*2) )
+
+#define INIT_PIN            container.mask = PINMASK; (PINSELREG &= ~PINSELMASK)
+#define DESTROY_PIN     
+
+#define SET_DIR_INPUT       (LPC_GPIO->FIODIR &= ~PINMASK)
+#define SET_DIR_OUTPUT      (LPC_GPIO->FIODIR |= PINMASK)
+#define SET_MODE(pull)      (pin_mode(pin, pull))
+
+#define WRITE_PIN_SET       (LPC_GPIO->FIOSET = PINMASK)
+#define WRITE_PIN_CLR       (LPC_GPIO->FIOCLR = PINMASK)
+
+#define READ_PIN            ((LPC_GPIO->FIOPIN & container.mask) ? 1 : 0)
+
+#endif
\ No newline at end of file

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/Devices/FastIO_LPC81X.h	Wed Jul 16 19:31:35 2014 +0000
@@ -0,0 +1,41 @@
+#ifdef TARGET_LPC81X
+
+#include "mbed.h"
+#include "pinmap.h"
+
+typedef struct {
+    __I  uint32_t *reg_in;
+    uint32_t mask;
+} fastio_vars;
+
+#define PINMASK         (1 << ((int)pin & 0x1F))
+static void gpio_enable(void);
+
+#define INIT_PIN        container.mask = PINMASK; container.reg_in = &LPC_GPIO_PORT->PIN0; gpio_enable(); pin_function(pin, 0)
+#define DESTROY_PIN     
+
+#define SET_DIR_INPUT   (LPC_GPIO_PORT->DIR0 &= ~PINMASK)
+#define SET_DIR_OUTPUT  (LPC_GPIO_PORT->DIR0 |= PINMASK)
+#define SET_MODE(pull)  (pin_mode(pin, pull))
+
+#define WRITE_PIN_SET   (LPC_GPIO_PORT->SET0 = PINMASK)
+#define WRITE_PIN_CLR   (LPC_GPIO_PORT->CLR0 = PINMASK)
+
+#define READ_PIN        ((*container.reg_in & container.mask) ? 1 : 0)
+
+static int  gpio_enabled = 0;
+static void gpio_enable(void)
+{
+    if (!gpio_enabled) {
+        gpio_enabled = 1;
+
+        /* Enable AHB clock to the GPIO domain. */
+        LPC_SYSCON->SYSAHBCLKCTRL |= (1<<6);
+
+        /* Peripheral reset control to GPIO and GPIO INT, a "1" bring it out of reset. */
+        LPC_SYSCON->PRESETCTRL &= ~(0x1<<10);
+        LPC_SYSCON->PRESETCTRL |=  (0x1<<10);
+    }
+}
+
+#endif
\ No newline at end of file

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/Devices/FastIO_NUCLEO_F401.h	Wed Jul 16 19:31:35 2014 +0000
@@ -0,0 +1,25 @@
+#ifdef TARGET_NUCLEO_F401RE
+
+#include "mbed.h"
+#include "pinmap.h"
+
+typedef struct {
+    uint32_t mask;
+} fastio_vars;
+
+#define PINMASK             (1 << STM_PIN(pin))
+#define PORT                ((GPIO_TypeDef *)(GPIOA_BASE + 0x0400 * STM_PORT(pin)))
+
+#define INIT_PIN            RCC->AHB1ENR |= (1 << STM_PORT(pin)); container.mask = PINMASK
+#define DESTROY_PIN     
+
+#define SET_DIR_INPUT       (PORT->MODER &= ~(GPIO_MODER_MODER0 << (STM_PIN(pin) * 2)))
+#define SET_DIR_OUTPUT      (PORT->MODER |= (GPIO_MODER_MODER0_0 << (STM_PIN(pin) * 2)))
+#define SET_MODE(pull)      pin_mode(pin, pull);
+
+#define WRITE_PIN_SET       (PORT->BSRRL = PINMASK)
+#define WRITE_PIN_CLR       (PORT->BSRRH = PINMASK)
+
+#define READ_PIN            ((PORT->IDR & container.mask) ? 1 : 0)
+
+#endif

--- a/FastIO.h	Sat Jul 12 09:48:05 2014 +0000
+++ b/FastIO.h	Wed Jul 16 19:31:35 2014 +0000
@@ -6,6 +6,7 @@
 #include "FastIO_LPC81X.h"
 #include "FastIO_KLXX.h"
 #include "FastIO_K20D50M.h"
+#include "FastIO_NUCLEO_F401.h"
 
 #ifndef INIT_PIN
 #warning Target is not supported by FastIO

--- a/FastIO_K20D50M.h	Sat Jul 12 09:48:05 2014 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,26 +0,0 @@
-#ifdef TARGET_K20D50M
-
-#include "mbed.h"
-#include "pinmap.h"
-
-typedef struct {
-    uint32_t mask;
-} fastio_vars;
-
-#define PORT_BASE       ((GPIO_Type *)(PTA_BASE + ((unsigned int)pin >> PORT_SHIFT) * 0x40))
-#define PINMASK         (1 << ((pin & 0x7F) >> 2))
-#define PCR             ((__IO uint32_t*)(PORTA_BASE + pin))
-
-#define INIT_PIN        container.mask = PINMASK; pin_function(pin, 1)
-#define DESTROY_PIN     
-
-#define SET_DIR_INPUT   (PORT_BASE->PDDR &= ~PINMASK)
-#define SET_DIR_OUTPUT  (PORT_BASE->PDDR |= PINMASK)
-#define SET_MODE(pull)  (*PCR = (*PCR & ~0x3) | pull)
-
-#define WRITE_PIN_SET   (PORT_BASE->PSOR |= container.mask)
-#define WRITE_PIN_CLR   (PORT_BASE->PCOR |= container.mask)
-
-#define READ_PIN        ((PORT_BASE->PDIR & container.mask) ? 1 : 0)
-
-#endif

--- a/FastIO_KLXX.h	Sat Jul 12 09:48:05 2014 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,26 +0,0 @@
-#ifdef TARGET_KLXX
-
-#include "mbed.h"
-#include "pinmap.h"
-
-typedef struct {
-    uint32_t mask;
-} fastio_vars;
-
-#define PORT_BASE       ((FGPIO_Type *)(FPTA_BASE + ((unsigned int)pin >> PORT_SHIFT) * 0x40))
-#define PINMASK         (1 << ((pin & 0x7F) >> 2))
-#define PCR             ((__IO uint32_t*)(PORTA_BASE + pin))
-
-#define INIT_PIN        container.mask = PINMASK; pin_function(pin, 1)
-#define DESTROY_PIN     
-
-#define SET_DIR_INPUT   (PORT_BASE->PDDR &= ~PINMASK)
-#define SET_DIR_OUTPUT  (PORT_BASE->PDDR |= PINMASK)
-#define SET_MODE(pull)  (*PCR = (*PCR & ~0x3) | pull)
-
-#define WRITE_PIN_SET   (PORT_BASE->PSOR |= PINMASK)
-#define WRITE_PIN_CLR   (PORT_BASE->PCOR |= PINMASK)
-
-#define READ_PIN        ((PORT_BASE->PDIR & container.mask) ? 1 : 0)
-
-#endif

--- a/FastIO_LPC11UXX.h	Sat Jul 12 09:48:05 2014 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,38 +0,0 @@
-#ifdef TARGET_LPC11UXX
-
-#include "mbed.h"
-#include "pinmap.h"
-
-typedef struct {
-    uint32_t mask;
-} fastio_vars;
-
-#define PORT            ((unsigned int)pin >> PORT_SHIFT)
-#define PINMASK         (1 << ((int)pin & 0x1F))
-static inline void initpin(PinName pin);
-
-#define INIT_PIN        container.mask = PINMASK; initpin(pin)
-#define DESTROY_PIN     
-
-#define SET_DIR_INPUT   (LPC_GPIO->DIR[PORT] &= ~PINMASK)
-#define SET_DIR_OUTPUT  (LPC_GPIO->DIR[PORT] |= PINMASK)
-#define SET_MODE(pull)  (pin_mode(pin, pull))
-
-#define WRITE_PIN_SET   (LPC_GPIO->SET[PORT] = PINMASK)
-#define WRITE_PIN_CLR   (LPC_GPIO->CLR[PORT] = PINMASK)
-
-#define READ_PIN        ((LPC_GPIO->PIN[PORT] & container.mask) ? 1 : 0)
-
-static inline void initpin(PinName pin) {
-    int f = ((pin == P0_0)  ||
-    (pin == P0_10) ||
-    (pin == P0_11) ||
-    (pin == P0_12) ||
-    (pin == P0_13) ||
-    (pin == P0_14) ||
-    (pin == P0_15)) ? (1) : (0);
-
-    pin_function(pin, f);
-}
-
-#endif
\ No newline at end of file

--- a/FastIO_LPC1768.h	Sat Jul 12 09:48:05 2014 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,28 +0,0 @@
-#ifdef TARGET_LPC1768
-
-#include "mbed.h"
-#include "pinmap.h"
-
-typedef struct {
-    uint32_t mask;
-} fastio_vars;
-
-#define LPC_GPIO            ((LPC_GPIO_TypeDef*)(pin & ~0x1F))
-#define PINMASK             (1UL << (((pin) - P0_0)%32))
-
-#define PINSELREG           (*(volatile uint32_t*)(LPC_PINCON_BASE + 4*(((pin) - P0_0)/16)))
-#define PINSELMASK          (0x03 << (((pin - P0_0)%16)*2) )
-
-#define INIT_PIN            container.mask = PINMASK; (PINSELREG &= ~PINSELMASK)
-#define DESTROY_PIN     
-
-#define SET_DIR_INPUT       (LPC_GPIO->FIODIR &= ~PINMASK)
-#define SET_DIR_OUTPUT      (LPC_GPIO->FIODIR |= PINMASK)
-#define SET_MODE(pull)      (pin_mode(pin, pull))
-
-#define WRITE_PIN_SET       (LPC_GPIO->FIOSET = PINMASK)
-#define WRITE_PIN_CLR       (LPC_GPIO->FIOCLR = PINMASK)
-
-#define READ_PIN            ((LPC_GPIO->FIOPIN & container.mask) ? 1 : 0)
-
-#endif
\ No newline at end of file

--- a/FastIO_LPC81X.h	Sat Jul 12 09:48:05 2014 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,41 +0,0 @@
-#ifdef TARGET_LPC81X
-
-#include "mbed.h"
-#include "pinmap.h"
-
-typedef struct {
-    __I  uint32_t *reg_in;
-    uint32_t mask;
-} fastio_vars;
-
-#define PINMASK         (1 << ((int)pin & 0x1F))
-static void gpio_enable(void);
-
-#define INIT_PIN        container.mask = PINMASK; container.reg_in = &LPC_GPIO_PORT->PIN0; gpio_enable(); pin_function(pin, 0)
-#define DESTROY_PIN     
-
-#define SET_DIR_INPUT   (LPC_GPIO_PORT->DIR0 &= ~PINMASK)
-#define SET_DIR_OUTPUT  (LPC_GPIO_PORT->DIR0 |= PINMASK)
-#define SET_MODE(pull)  (pin_mode(pin, pull))
-
-#define WRITE_PIN_SET   (LPC_GPIO_PORT->SET0 = PINMASK)
-#define WRITE_PIN_CLR   (LPC_GPIO_PORT->CLR0 = PINMASK)
-
-#define READ_PIN        ((*container.reg_in & container.mask) ? 1 : 0)
-
-static int  gpio_enabled = 0;
-static void gpio_enable(void)
-{
-    if (!gpio_enabled) {
-        gpio_enabled = 1;
-
-        /* Enable AHB clock to the GPIO domain. */
-        LPC_SYSCON->SYSAHBCLKCTRL |= (1<<6);
-
-        /* Peripheral reset control to GPIO and GPIO INT, a "1" bring it out of reset. */
-        LPC_SYSCON->PRESETCTRL &= ~(0x1<<10);
-        LPC_SYSCON->PRESETCTRL |=  (0x1<<10);
-    }
-}
-
-#endif
\ No newline at end of file