pulse counter stm32

Dependencies:   mbed

Files at this revision

API Documentation at this revision

Comitter:
c128
Date:
Tue Sep 29 14:05:36 2015 +0000
Child:
1:3d22d4e6de38
Commit message:
pulse counter stm32

Changed in this revision

counter.cpp Show annotated file Show diff for this revision Revisions of this file
mbed.bld Show annotated file Show diff for this revision Revisions of this file
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/counter.cpp	Tue Sep 29 14:05:36 2015 +0000
@@ -0,0 +1,26 @@
+// reference this code http://www.fmf.uni-lj.si/~ponikvar/STM32F407%20project/Timer2_Counting.pdf
+#include "mbed.h"
+#include "stm32f4xx.h"
+
+int main(){
+ RCC->AHB1ENR |= 0x01 + 0x10; // Clock for PortA, E
+ RCC->APB1ENR |= 0x01; // Clock for Timer2
+ GPIOA->MODER |= 0x00000008; // all inputs but: PA1 => AF mode
+ GPIOA->AFR[0] |= 0x00000010; // select AF1 (TIM2) for PA01 -> TIM2_CH2
+
+ TIM2->CCMR1 |= 0x0100; // Ch. 2 as TI2
+ TIM2->SMCR |= 0x0007; // Ext. clk mode 1
+ TIM2->SMCR |= 0x0060; // TI2FP2 as ext. clock
+ TIM2->CR1 |= 0x0001; // enable counting
+
+ while (1) {
+        int16_t count1;
+        count1=TIM2->CNT; //OK 401 411 TICKER 030
+
+        printf("%d\r\n", count1);
+        wait(1.0);
+ if (GPIOE->IDR & 0x01) TIM2->CNT = 0; // reset counter
+ if (GPIOE->IDR & 0x02) TIM2->CR1 |= 0x01; // enable counter
+ if (GPIOE->IDR & 0x04) TIM2->CR1 &= ~0x01; // disable counter
+ };
+} 
\ No newline at end of file
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mbed.bld	Tue Sep 29 14:05:36 2015 +0000
@@ -0,0 +1,1 @@
+http://mbed.org/users/mbed_official/code/mbed/builds/4f6c30876dfa
\ No newline at end of file