Chris Heald / KL25Z_I2C_busreset

Forked from Frank's excellent library and extended to include I2C0 on PTC8 & PTC9. "This tool allows you to recover from an I2C bus lockup on I2C0 (PTE24, PTE25) and I2C1 (PTE0, PTE1). The reset is only carried out when the corresponding I2C bus is enabled."

Fork of KL25Z_I2C_busreset by Frank Vannieuwkerke

Files at this revision

API Documentation at this revision

Revision 2:a166055977ec, committed 2015-02-24

Comitter:
ateyercheese
Date:
Tue Feb 24 17:49:59 2015 +0000
Parent:
1:fe493f707844
Child:
3:7584a206afd4
Child:
4:f37d94865920
Commit message:
Updated Comments inline with pin changes

Changed in this revision

I2C_busreset.cpp Show annotated file Show diff for this revision Revisions of this file 
--- a/I2C_busreset.cpp	Tue Feb 24 12:49:17 2015 +0000
+++ b/I2C_busreset.cpp	Tue Feb 24 17:49:59 2015 +0000
@@ -17,22 +17,22 @@
         I2C0->C1 &= 0x7f;                 // Disable I2C0 bus
         PORTC->PCR[8] = PORT_PCR_MUX(1);  // PTC8 Alt1 (pin)
         PORTC->PCR[9] = PORT_PCR_MUX(1);  // PTC9 Alt1 (pin)
-        if((PTC->PDIR & 0x3) != 3)        // When PTC8 / PTC9 are not 1 : I2C1 bus lock-up
+        if((PTC->PDIR & 0x3) != 3)        // When PTC8 / PTC9 are not 1 : I2C0 bus lock-up
         {
-            PTC->PDDR |= 0x2;             // Set PTE1 as a GPIO output so we can bit bang it
-            PTC->PDOR |= 0x2;             // Set PTE1 (SCL) pin high;
+            PTC->PDDR |= 0x2;             // Set PTC8 as a GPIO output so we can bit bang it
+            PTC->PDOR |= 0x2;             // Set PTC8 (SCL) pin high;
             wait_ms(1);
             while(!(PTC->PDIR & 0x1))     // bit bang SCL until the offending device releases the bus
             {   
-                PTC->PDOR &= 0xfffffffd;  // Set PTE1 (SCL) pin low;
+                PTC->PDOR &= 0xfffffffd;  // Set PTC8 (SCL) pin low;
                 wait_ms(1);
-                PTC->PDOR |= 0x2;         // Set PTE1 (SCL) pin high;
+                PTC->PDOR |= 0x2;         // Set PTC8 (SCL) pin high;
                 wait_ms(1);
             }
         }
         // Reinstate I2C1 bus pins
-        PORTC->PCR[8] = PORT_PCR_MUX(2);  // PTE1 Alt2 (SCL)
-        PORTC->PCR[9] = PORT_PCR_MUX(2);  // PTE0 Alt2 (SDA)
+        PORTC->PCR[8] = PORT_PCR_MUX(2);  // PTC8 Alt2 (SCL)
+        PORTC->PCR[9] = PORT_PCR_MUX(2);  // PTC9 Alt2 (SDA)
         I2C0->C1 |= 0x80;                 // Enable I2C0 bus
     }