Revision 13:5a32a1922fbc, committed 2017-08-08

Comitter:

Helmut64

Date:

Tue Aug 08 08:49:06 2017 +0000

Parent:

12:aa287e51c09e

Child:

14:0a23f0ff71ce

Commit message:

Updated target to TARGET_DISCO_L072CZ_LRWAN1; Use latest mbed version.; No need to set the system clock anymore because LRWAN1 is not included in mbed.; Updated to latest SX1276GenericLib.

Changed in this revision

--- a/PinMap.h	Tue Jul 11 11:37:03 2017 +0000
+++ b/PinMap.h	Tue Aug 08 08:49:06 2017 +0000
@@ -10,18 +10,11 @@
  #define FEATURE_LORA   1
 #elif TARGET_DISCO_L072CZ_LRWAN1
  #define FEATURE_LORA   1
- #define B_L072Z_LRWAN1_LORA    1 // the STM Lora Board
 #endif
 
 
 
-#if  defined(TARGET_STM32L0)
-
-#ifdef B_L072Z_LRWAN1_LORA      // B-L072Z-LRWAN1 LoRa Board using the Murta SX1276
-#define USER_BUTTON     PB_2    // Red not PC13 as used on the Nucleo
-#define LED2            PA_5    // Green
-#define LED3            PB_6    // Blue
-#define LED4            PB_7    // Red
+#if defined(TARGET_DISCO_L072CZ_LRWAN1)
 
 #define LORA_SPI_MOSI   PA_7
 #define LORA_SPI_MISO   PA_6
@@ -31,14 +24,13 @@
 #define LORA_DIO0       PB_4
 #define LORA_DIO1       PB_1
 #define LORA_DIO2       PB_0
-#define LORA_DIO3       (PinName)0x2D //PC_13
+#define LORA_DIO3       PC_13
 #define LORA_DIO4       PA_5
 #define LORA_DIO5       PA_4
 #define LORA_ANT_RX     PA_1
 #define LORA_ANT_TX     PC_2
 #define LORA_ANT_BOOST  PC_1
 #define LORA_TCXO       PA_12   // 32 MHz
-#endif // B_L072Z_LRWAN1_LORA
 
 
 

--- a/SX1276GenericLib.lib	Tue Jul 11 11:37:03 2017 +0000
+++ b/SX1276GenericLib.lib	Tue Aug 08 08:49:06 2017 +0000
@@ -1,1 +1,1 @@
-http://developer.mbed.org/users/Helmut64/code/SX1276GenericLib/#b2d98328fcba
+http://developer.mbed.org/users/Helmut64/code/SX1276GenericLib/#019da451b283

--- a/SX1276GenericPingPong/GenericPingPong.cpp	Tue Jul 11 11:37:03 2017 +0000
+++ b/SX1276GenericPingPong/GenericPingPong.cpp	Tue Aug 08 08:49:06 2017 +0000
@@ -101,7 +101,7 @@
 {
 #if( defined ( TARGET_KL25Z ) || defined ( TARGET_LPC11U6X ) )
     DigitalOut *led = new DigitalOut(LED2);
-#elif defined(TARGET_NUCLEO_L073RZ)
+#elif defined(TARGET_NUCLEO_L073RZ) || defined(TARGET_DISCO_L072CZ_LRWAN1)
     DigitalOut *led = new DigitalOut(LED4);   // RX red
     led3 = new DigitalOut(LED3);  // TX blue
 #else

--- a/main.cpp	Tue Jul 11 11:37:03 2017 +0000
+++ b/main.cpp	Tue Aug 08 08:49:06 2017 +0000
@@ -9,67 +9,20 @@
  * IMPORTANT NOTE
  * Use the Nucleo-L073RZ target for the STM B_L072Z_LRWAN1 LoRa board 
  */
-DigitalOut myled(LED1);
+DigitalOut myled(LED2);
 BufferedSerial *ser;
 
 int main() {
-    SystemClock_Config();
     ser = new BufferedSerial(USBTX, USBRX);
     ser->baud(115200*2);
     ser->format(8);
     ser->printf("Hello World\n\r");
     myled = 1;
-    
+
     SX1276PingPong();
 }
 
 
-
-
-void SystemClock_Config(void)
-{
-#ifdef B_L072Z_LRWAN1_LORA
-    /* 
-     * The L072Z_LRWAN1_LORA clock setup is somewhat differnt from the Nucleo board.
-     * It has no LSE.
-     */
-    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-
-    /* Enable HSE Oscillator and Activate PLL with HSE as source */
-    RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSI;
-    RCC_OscInitStruct.HSEState            = RCC_HSE_OFF;
-    RCC_OscInitStruct.HSIState            = RCC_HSI_ON;
-    RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
-    RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
-    RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
-    RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLLMUL_6;
-    RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLLDIV_3;
-
-    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
-        // Error_Handler();
-    }
-
-    /* Set Voltage scale1 as MCU will run at 32MHz */
-    __HAL_RCC_PWR_CLK_ENABLE();
-    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
-    /* Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 */
-    while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) != RESET) {};
-
-    /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
-    clocks dividers */
-    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
-    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
-        // Error_Handler();
-    }
-#endif
-}
-
 void dump(const char *title, const void *data, int len, bool dwords)
 {
     dprintf("dump(\"%s\", 0x%x, %d bytes)", title, data, len);

--- a/mbed.bld	Tue Jul 11 11:37:03 2017 +0000
+++ b/mbed.bld	Tue Aug 08 08:49:06 2017 +0000
@@ -1,1 +1,1 @@
-https://mbed.org/users/mbed_official/code/mbed/builds/64910690c574
\ No newline at end of file
+https://mbed.org/users/mbed_official/code/mbed/builds/fd96258d940d
\ No newline at end of file