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lpc17xx_timer.h

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00001 /**********************************************************************
00002 * $Id$      lpc17xx_timer.h             2010-05-21
00003 *//**
00004 * @file     lpc17xx_timer.h
00005 * @brief    Contains all macro definitions and function prototypes
00006 *           support for Timer firmware library on LPC17xx
00007 * @version  2.0
00008 * @date     21. May. 2010
00009 * @author   NXP MCU SW Application Team
00010 *
00011 * Copyright(C) 2010, NXP Semiconductor
00012 * All rights reserved.
00013 *
00014 ***********************************************************************
00015 * Software that is described herein is for illustrative purposes only
00016 * which provides customers with programming information regarding the
00017 * products. This software is supplied "AS IS" without any warranties.
00018 * NXP Semiconductors assumes no responsibility or liability for the
00019 * use of the software, conveys no license or title under any patent,
00020 * copyright, or mask work right to the product. NXP Semiconductors
00021 * reserves the right to make changes in the software without
00022 * notification. NXP Semiconductors also make no representation or
00023 * warranty that such application will be suitable for the specified
00024 * use without further testing or modification.
00025 **********************************************************************/
00026 
00027 /* Peripheral group ----------------------------------------------------------- */
00028 /** @defgroup TIM TIM (Timer)
00029  * @ingroup LPC1700CMSIS_FwLib_Drivers
00030  * @{
00031  */
00032 
00033 #ifndef __LPC17XX_TIMER_H_
00034 #define __LPC17XX_TIMER_H_
00035 
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039 
00040 #ifdef __cplusplus
00041 extern "C"
00042 {
00043 #endif
00044 
00045 /* Private Macros ------------------------------------------------------------- */
00046 /** @defgroup TIM_Private_Macros TIM Private Macros
00047  * @{
00048  */
00049 
00050 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00051 /**********************************************************************
00052 ** Interrupt information
00053 **********************************************************************/
00054 /** Macro to clean interrupt pending */
00055 #define TIM_IR_CLR(n) _BIT(n)
00056 
00057 /**********************************************************************
00058 ** Timer interrupt register definitions
00059 **********************************************************************/
00060 /** Macro for getting a timer match interrupt bit */
00061 #define TIM_MATCH_INT(n)        (_BIT(n & 0x0F))
00062 /** Macro for getting a capture event interrupt bit */
00063 #define TIM_CAP_INT(n)     (_BIT(((n & 0x0F) + 4)))
00064 
00065 /**********************************************************************
00066 * Timer control register definitions
00067 **********************************************************************/
00068 /** Timer/counter enable bit */
00069 #define TIM_ENABLE          ((uint32_t)(1<<0))
00070 /** Timer/counter reset bit */
00071 #define TIM_RESET           ((uint32_t)(1<<1))
00072 /** Timer control bit mask */
00073 #define TIM_TCR_MASKBIT     ((uint32_t)(3))
00074 
00075 /**********************************************************************
00076 * Timer match control register definitions
00077 **********************************************************************/
00078 /** Bit location for interrupt on MRx match, n = 0 to 3 */
00079 #define TIM_INT_ON_MATCH(n)         (_BIT((n * 3)))
00080 /** Bit location for reset on MRx match, n = 0 to 3 */
00081 #define TIM_RESET_ON_MATCH(n)       (_BIT(((n * 3) + 1)))
00082 /** Bit location for stop on MRx match, n = 0 to 3 */
00083 #define TIM_STOP_ON_MATCH(n)        (_BIT(((n * 3) + 2)))
00084 /** Timer Match control bit mask */
00085 #define TIM_MCR_MASKBIT            ((uint32_t)(0x0FFF))
00086 /** Timer Match control bit mask for specific channel*/
00087 #define TIM_MCR_CHANNEL_MASKBIT(n)      ((uint32_t)(7<<(n*3)))
00088 
00089 /**********************************************************************
00090 * Timer capture control register definitions
00091 **********************************************************************/
00092 /** Bit location for CAP.n on CRx rising edge, n = 0 to 3 */
00093 #define TIM_CAP_RISING(n)       (_BIT((n * 3)))
00094 /** Bit location for CAP.n on CRx falling edge, n = 0 to 3 */
00095 #define TIM_CAP_FALLING(n)      (_BIT(((n * 3) + 1)))
00096 /** Bit location for CAP.n on CRx interrupt enable, n = 0 to 3 */
00097 #define TIM_INT_ON_CAP(n)       (_BIT(((n * 3) + 2)))
00098 /** Mask bit for rising and falling edge bit */
00099 #define TIM_EDGE_MASK(n)        (_SBF((n * 3), 0x03))
00100 /** Timer capture control bit mask */
00101 #define TIM_CCR_MASKBIT         ((uint32_t)(0x3F))
00102 /** Timer Capture control bit mask for specific channel*/
00103 #define TIM_CCR_CHANNEL_MASKBIT(n)      ((uint32_t)(7<<(n*3)))
00104 
00105 /**********************************************************************
00106 * Timer external match register definitions
00107 **********************************************************************/
00108 /** Bit location for output state change of MAT.n when external match
00109    happens, n = 0 to 3 */
00110 #define TIM_EM(n)               _BIT(n)
00111 /** Output state change of MAT.n when external match happens: no change */
00112 #define TIM_EM_NOTHING      ((uint8_t)(0x0))
00113 /** Output state change of MAT.n when external match happens: low */
00114 #define TIM_EM_LOW          ((uint8_t)(0x1))
00115 /** Output state change of MAT.n when external match happens: high */
00116 #define TIM_EM_HIGH         ((uint8_t)(0x2))
00117 /** Output state change of MAT.n when external match happens: toggle */
00118 #define TIM_EM_TOGGLE       ((uint8_t)(0x3))
00119 /** Macro for setting for the MAT.n change state bits */
00120 #define TIM_EM_SET(n,s)     (_SBF(((n << 1) + 4), (s & 0x03)))
00121 /** Mask for the MAT.n change state bits */
00122 #define TIM_EM_MASK(n)      (_SBF(((n << 1) + 4), 0x03))
00123 /** Timer external match bit mask */
00124 #define TIM_EMR_MASKBIT 0x0FFF
00125 
00126 /**********************************************************************
00127 * Timer Count Control Register definitions
00128 **********************************************************************/
00129 /** Mask to get the Counter/timer mode bits */
00130 #define TIM_CTCR_MODE_MASK  0x3
00131 /** Mask to get the count input select bits */
00132 #define TIM_CTCR_INPUT_MASK 0xC
00133 /** Timer Count control bit mask */
00134 #define TIM_CTCR_MASKBIT    0xF
00135 #define TIM_COUNTER_MODE ((uint8_t)(1))
00136 
00137 
00138 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00139 /** Macro to determine if it is valid TIMER peripheral */
00140 #define PARAM_TIMx(n)   ((((uint32_t *)n)==((uint32_t *)LPC_TIM0)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM1)) \
00141 || (((uint32_t *)n)==((uint32_t *)LPC_TIM2)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM3)))
00142 
00143 /* Macro check interrupt type */
00144 #define PARAM_TIM_INT_TYPE(TYPE)    ((TYPE ==TIM_MR0_INT)||(TYPE ==TIM_MR1_INT)\
00145 ||(TYPE ==TIM_MR2_INT)||(TYPE ==TIM_MR3_INT)\
00146 ||(TYPE ==TIM_CR0_INT)||(TYPE ==TIM_CR1_INT))
00147 
00148 /* Macro check TIMER mode */
00149 #define PARAM_TIM_MODE_OPT(MODE)    ((MODE == TIM_TIMER_MODE)||(MODE == TIM_COUNTER_RISING_MODE)\
00150 || (MODE == TIM_COUNTER_RISING_MODE)||(MODE == TIM_COUNTER_RISING_MODE))
00151 
00152 /* Macro check TIMER prescale value */
00153 #define PARAM_TIM_PRESCALE_OPT(OPT) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))
00154 
00155 /* Macro check TIMER counter intput mode */
00156 #define PARAM_TIM_COUNTER_INPUT_OPT(OPT)    ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))
00157 
00158 /* Macro check TIMER external match mode */
00159 #define PARAM_TIM_EXTMATCH_OPT(OPT) ((OPT == TIM_EXTMATCH_NOTHING)||(OPT == TIM_EXTMATCH_LOW)\
00160 ||(OPT == TIM_EXTMATCH_HIGH)||(OPT == TIM_EXTMATCH_TOGGLE))
00161 
00162 /* Macro check TIMER external match mode */
00163 #define PARAM_TIM_CAP_MODE_OPT(OPT) ((OPT == TIM_CAPTURE_NONE)||(OPT == TIM_CAPTURE_RISING) \
00164 ||(OPT == TIM_CAPTURE_FALLING)||(OPT == TIM_CAPTURE_ANY))
00165 
00166 /**
00167  * @}
00168  */
00169 
00170 
00171 /* Public Types --------------------------------------------------------------- */
00172 /** @defgroup TIM_Public_Types TIM Public Types
00173  * @{
00174  */
00175 
00176 /***********************************************************************
00177  * Timer device enumeration
00178 **********************************************************************/
00179 /** @brief interrupt type */
00180 typedef enum
00181 {
00182     TIM_MR0_INT  =0, /*!< interrupt for Match channel 0*/
00183     TIM_MR1_INT  =1, /*!< interrupt for Match channel 1*/
00184     TIM_MR2_INT  =2, /*!< interrupt for Match channel 2*/
00185     TIM_MR3_INT  =3, /*!< interrupt for Match channel 3*/
00186     TIM_CR0_INT  =4, /*!< interrupt for Capture channel 0*/
00187     TIM_CR1_INT  =5 /*!< interrupt for Capture channel 1*/
00188 }TIM_INT_TYPE;
00189 
00190 /** @brief Timer/counter operating mode */
00191 typedef enum
00192 {
00193     TIM_TIMER_MODE  = 0,             /*!< Timer mode */
00194     TIM_COUNTER_RISING_MODE ,        /*!< Counter rising mode */
00195     TIM_COUNTER_FALLING_MODE ,       /*!< Counter falling mode */
00196     TIM_COUNTER_ANY_MODE             /*!< Counter on both edges */
00197 } TIM_MODE_OPT;
00198 
00199 /** @brief Timer/Counter prescale option */
00200 typedef enum
00201 {
00202     TIM_PRESCALE_TICKVAL  = 0,       /*!< Prescale in absolute value */
00203     TIM_PRESCALE_USVAL               /*!< Prescale in microsecond value */
00204 } TIM_PRESCALE_OPT;
00205 
00206 /** @brief Counter input option */
00207 typedef enum
00208 {
00209     TIM_COUNTER_INCAP0  = 0,         /*!< CAPn.0 input pin for TIMERn */
00210     TIM_COUNTER_INCAP1 ,             /*!< CAPn.1 input pin for TIMERn */
00211 } TIM_COUNTER_INPUT_OPT;
00212 
00213 /** @brief Timer/Counter external match option */
00214 typedef enum
00215 {
00216     TIM_EXTMATCH_NOTHING  = 0,       /*!< Do nothing for external output pin if match */
00217     TIM_EXTMATCH_LOW ,               /*!< Force external output pin to low if match */
00218     TIM_EXTMATCH_HIGH ,              /*!< Force external output pin to high if match */
00219     TIM_EXTMATCH_TOGGLE              /*!< Toggle external output pin if match */
00220 }TIM_EXTMATCH_OPT;
00221 
00222 /** @brief Timer/counter capture mode options */
00223 typedef enum {
00224     TIM_CAPTURE_NONE  = 0,   /*!< No Capture */
00225     TIM_CAPTURE_RISING ,     /*!< Rising capture mode */
00226     TIM_CAPTURE_FALLING ,    /*!< Falling capture mode */
00227     TIM_CAPTURE_ANY          /*!< On both edges */
00228 } TIM_CAP_MODE_OPT;
00229 
00230 /** @brief Configuration structure in TIMER mode */
00231 typedef struct
00232 {
00233 
00234     uint8_t PrescaleOption;     /**< Timer Prescale option, should be:
00235                                     - TIM_PRESCALE_TICKVAL: Prescale in absolute value
00236                                     - TIM_PRESCALE_USVAL: Prescale in microsecond value
00237                                     */
00238     uint8_t Reserved[3];        /**< Reserved */
00239     uint32_t PrescaleValue;     /**< Prescale value */
00240 } TIM_TIMERCFG_Type;
00241 
00242 /** @brief Configuration structure in COUNTER mode */
00243 typedef struct {
00244 
00245     uint8_t CounterOption;      /**< Counter Option, should be:
00246                                 - TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn
00247                                 - TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn
00248                                 */
00249     uint8_t CountInputSelect;
00250     uint8_t Reserved[2];
00251 } TIM_COUNTERCFG_Type;
00252 
00253 /** @brief Match channel configuration structure */
00254 typedef struct {
00255     uint8_t MatchChannel;   /**< Match channel, should be in range
00256                             from 0..3 */
00257     uint8_t IntOnMatch;     /**< Interrupt On match, should be:
00258                             - ENABLE: Enable this function.
00259                             - DISABLE: Disable this function.
00260                             */
00261     uint8_t StopOnMatch;    /**< Stop On match, should be:
00262                             - ENABLE: Enable this function.
00263                             - DISABLE: Disable this function.
00264                             */
00265     uint8_t ResetOnMatch;   /**< Reset On match, should be:
00266                             - ENABLE: Enable this function.
00267                             - DISABLE: Disable this function.
00268                             */
00269 
00270     uint8_t ExtMatchOutputType; /**< External Match Output type, should be:
00271                              -   TIM_EXTMATCH_NOTHING:  Do nothing for external output pin if match
00272                              -   TIM_EXTMATCH_LOW:  Force external output pin to low if match
00273                              -   TIM_EXTMATCH_HIGH: Force external output pin to high if match
00274                              -   TIM_EXTMATCH_TOGGLE: Toggle external output pin if match.
00275                             */
00276     uint8_t Reserved[3];    /** Reserved */
00277     uint32_t MatchValue;    /** Match value */
00278 } TIM_MATCHCFG_Type;
00279 
00280 /** @brief Capture Input configuration structure */
00281 typedef struct {
00282     uint8_t CaptureChannel; /**< Capture channel, should be in range
00283                             from 0..1 */
00284     uint8_t RisingEdge;     /**< caption rising edge, should be:
00285                             - ENABLE: Enable rising edge.
00286                             - DISABLE: Disable this function.
00287                             */
00288     uint8_t FallingEdge;        /**< caption falling edge, should be:
00289                             - ENABLE: Enable falling edge.
00290                             - DISABLE: Disable this function.
00291                                 */
00292     uint8_t IntOnCaption;   /**< Interrupt On caption, should be:
00293                             - ENABLE: Enable interrupt function.
00294                             - DISABLE: Disable this function.
00295                             */
00296 
00297 } TIM_CAPTURECFG_Type;
00298 
00299 /**
00300  * @}
00301  */
00302 
00303 
00304 /* Public Functions ----------------------------------------------------------- */
00305 /** @defgroup TIM_Public_Functions TIM Public Functions
00306  * @{
00307  */
00308 /* Init/DeInit TIM functions -----------*/
00309 void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
00310 void TIM_DeInit(LPC_TIM_TypeDef *TIMx);
00311 
00312 /* TIM interrupt functions -------------*/
00313 void TIM_ClearIntPending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00314 void TIM_ClearIntCapturePending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00315 FlagStatus TIM_GetIntStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00316 FlagStatus TIM_GetIntCaptureStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00317 
00318 /* TIM configuration functions --------*/
00319 void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
00320 void TIM_ConfigMatch(LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct);
00321 void TIM_UpdateMatchValue(LPC_TIM_TypeDef *TIMx,uint8_t MatchChannel, uint32_t MatchValue);
00322 void TIM_SetMatchExt(LPC_TIM_TypeDef *TIMx,TIM_EXTMATCH_OPT ext_match );
00323 void TIM_ConfigCapture(LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct);
00324 void TIM_Cmd(LPC_TIM_TypeDef *TIMx, FunctionalState NewState);
00325 
00326 uint32_t TIM_GetCaptureValue(LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel);
00327 void TIM_ResetCounter(LPC_TIM_TypeDef *TIMx);
00328 
00329 /**
00330  * @}
00331  */
00332 #ifdef __cplusplus
00333 }
00334 #endif
00335 
00336 #endif /* __LPC17XX_TIMER_H_ */
00337 
00338 /**
00339  * @}
00340  */
00341 
00342 /* --------------------------------- End Of File ------------------------------ */