Revision 10:a0c5bb26d159, committed 2016-04-11

Comitter:

va009039

Date:

Mon Apr 11 20:01:05 2016 +0900

Parent:

9:7e19f12b81b4

Child:

11:937bd817d5bf

Commit message:

add write_eeprom and read_eeprom.

Changed in this revision

--- a/IAP.h	Mon Apr 11 03:09:59 2016 +0000
+++ b/IAP.h	Mon Apr 11 20:01:05 2016 +0900
@@ -450,7 +450,7 @@
      */
     int   reserved_flash_area_size( void );
 
-#if defined(TARGET_LPC11UXX)
+#if defined(TARGET_LPC11UXX)||defined(TARGET_STM32L1)
 
     /** Copy RAM to EEPROM (LPC11U24)
      *

--- a/IAP_STM32L1.cpp	Mon Apr 11 03:09:59 2016 +0000
+++ b/IAP_STM32L1.cpp	Mon Apr 11 20:01:05 2016 +0900
@@ -160,35 +160,36 @@
     return 0;
 }
 
-#if defined(TARGET_LPC11UXX)
+struct EEPROM_Unlock {
+    EEPROM_Unlock() { HAL_FLASHEx_DATAEEPROM_Unlock(); }
+    ~EEPROM_Unlock() { HAL_FLASHEx_DATAEEPROM_Lock(); }
+};
 
 int IAP::write_eeprom( char *source_addr, char *target_addr, int size )
 {
-    IAP_command[ 0 ]    = IAPCommand_EEPROM_Write;
-    IAP_command[ 1 ]    = (unsigned int)target_addr;    //  Destination EEPROM address where data bytes are to be written. This address should be a 256 byte boundary.
-    IAP_command[ 2 ]    = (unsigned int)source_addr;    //  Source RAM address from which data bytes are to be read. This address should be a word boundary.
-    IAP_command[ 3 ]    = size;                         //  Number of bytes to be written. Should be 256 | 512 | 1024 | 4096.
-    IAP_command[ 4 ]    = cclk_kHz;                     //  CPU Clock Frequency (CCLK) in kHz.
-
-    iap_entry( IAP_command, IAP_result );
-
-    return ( (int)IAP_result[ 0 ] );
+    if (!IS_FLASH_DATA_ADDRESS((uint32_t)target_addr) || !IS_FLASH_DATA_ADDRESS((uint32_t)target_addr + size -1)) {
+        return DST_ADDR_NOT_MAPPED;
+    }
+    EEPROM_Unlock unlock;
+    for(int i = 0; i < size; i++, source_addr++, target_addr++) {
+        if (HAL_OK != HAL_FLASHEx_DATAEEPROM_Program(TYPEPROGRAMDATA_BYTE, (uint32_t)target_addr, *source_addr)) {
+            return INVALID_COMMAND;
+        }
+    }
+    return CMD_SUCCESS;
 }
 
 int IAP::read_eeprom( char *source_addr, char *target_addr, int size )
 {
-    IAP_command[ 0 ]    = IAPCommand_EEPROM_Read;
-    IAP_command[ 1 ]    = (unsigned int)source_addr;    //  Source EEPROM address from which data bytes are to be read. This address should be a word boundary.
-    IAP_command[ 2 ]    = (unsigned int)target_addr;    //  Destination RAM address where data bytes are to be written. This address should be a 256 byte boundary.
-    IAP_command[ 3 ]    = size;                         //  Number of bytes to be written. Should be 256 | 512 | 1024 | 4096.
-    IAP_command[ 4 ]    = cclk_kHz;                     //  CPU Clock Frequency (CCLK) in kHz.
-
-    iap_entry( IAP_command, IAP_result );
-
-    return ( (int)IAP_result[ 0 ] );
+    if (!IS_FLASH_DATA_ADDRESS((uint32_t)source_addr) || !IS_FLASH_DATA_ADDRESS((uint32_t)source_addr + size - 1)) {
+        return SRC_ADDR_NOT_MAPPED;
+    }
+    EEPROM_Unlock unlock;
+    memcpy(target_addr, source_addr, size);
+    return CMD_SUCCESS;
 }
 
-#elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X)
+#if defined(TARGET_LPC81X) || defined(TARGET_LPC82X)
 
 int IAP::erase_page( int start, int end )
 {