Revision 15:09f072efa71e, committed 2018-03-28

Comitter:

tyftyftyf

Date:

Wed Mar 28 21:23:40 2018 +0000

Parent:

14:057ce8fa00ab

Child:

16:6be55d010301

Commit message:

fix build error

Changed in this revision

--- a/I2Cdev.h	Wed Mar 28 21:06:57 2018 +0000
+++ b/I2Cdev.h	Wed Mar 28 21:23:40 2018 +0000
@@ -8,6 +8,8 @@
 #ifndef I2Cdev_h
 #define I2Cdev_h
 
+#include "mbed.h"
+
 #ifndef I2C_SDA
     #define I2C_SDA p28
     #define I2C_SCL p27

--- a/MPU6050.cpp	Wed Mar 28 21:06:57 2018 +0000
+++ b/MPU6050.cpp	Wed Mar 28 21:23:40 2018 +0000
@@ -3509,11 +3509,25 @@
     setClockSource(MPU60X0_CLOCK_PLL_XGYRO);
     setFullScaleGyroRange(MPU60X0_GYRO_FS_2000);
     setFullScaleAccelRange(MPU60X0_ACCEL_FS_2);
+    
+    tX[0] = 0; tX[1] = 1; tX[2] = 0;
+    tY[0] = 1; tY[1] = 0; tY[2] = 0;
+    tZ[0] = 0; tZ[1] = 0; tZ[2] = 1;  // was -1  transformation is done within lib.
 
     //data = 1000 / rate - 1;
     //setRate(data);    
 }
 
+/** Disable MPU-6050 standby mode. Really only used for MPU-9250
+ * @param 
+ * @see 
+ * @see MPU60X0_RA_PWR_MGMT_2
+ * @see 
+ */
+void MPU6050::setStandbyDisable() {
+    i2Cdev.writeByte(devAddr, MPU60X0_RA_PWR_MGMT_2, 0x00);
+}
+
 void MPU6050::initialize9250MasterMode(){
     
     uint8_t buff[3];
@@ -3594,7 +3608,7 @@
     if(  buff[0] != 72 ){
         debugSerial.printf("%d", buff[0]);
         debugSerial.printf(", ");
-        debugSerial.println("AK does not match");
+        debugSerial.printf("AK does not match\n");
     }
 
     /* get the magnetometer calibration */
@@ -3722,13 +3736,13 @@
         if( !writeAKRegister(AK8963_RA_CNTL1, AK8963_MODE_POWERDOWN) ){
             return -1;
         }
-        delay(100); // long wait between AK8963 mode changes  
+        Thread::wait(100); // long wait between AK8963 mode changes  
 
         // set AK8963 to 16 bit resolution, 8 Hz update rate
         if( !writeAKRegister(AK8963_RA_CNTL1,0x12) ){
             return -1;
         }
-        delay(100); // long wait between AK8963 mode changes     
+        Thread::wait(100); // long wait between AK8963 mode changes     
 
         // instruct the MPU9250 to get 7 bytes of data from the AK8963 at the sample rate
         readAKRegisters(AK8963_RA_HXL,sizeof(data),&data[0]);
@@ -3877,12 +3891,12 @@
 
 }
 
-void MPU60X0::readRegister(uint8_t subAddress, uint8_t count, uint8_t* dest) {
+void MPU6050::readRegister(uint8_t subAddress, uint8_t count, uint8_t* dest) {
     i2Cdev.readBytes(devAddr, subAddress, count, dest);
 }
 
 /* writes a register to the AK8963 given a register address and data */
-bool MPU60X0::writeAKRegister(uint8_t subAddress, uint8_t data) {
+bool MPU6050::writeAKRegister(uint8_t subAddress, uint8_t data) {
     uint8_t count = 1;
     uint8_t buff[1];
     
@@ -3903,7 +3917,7 @@
 
 
 /* reads registers from the AK8963 */
-void MPU60X0::readAKRegisters(uint8_t subAddress, uint8_t count, uint8_t* dest) {
+void MPU6050::readAKRegisters(uint8_t subAddress, uint8_t count, uint8_t* dest) {
     
     writeRegister(MPU60X0_RA_I2C_SLV0_ADDR, magDevAddr | I2C_READ_FLAG); // set slave 0 to the AK8963 and set for read
     writeRegister(MPU60X0_RA_I2C_SLV0_REG,  subAddress); // set the register to the desired AK8963 sub address
@@ -3913,7 +3927,7 @@
 
 }
 
-bool MPU60X0::writeRegister(uint8_t subAddress, uint8_t data) {
+bool MPU6050::writeRegister(uint8_t subAddress, uint8_t data) {
     uint8_t buff[1];
 
     i2Cdev.writeByte(devAddr, subAddress, data);

--- a/MPU6050.h	Wed Mar 28 21:06:57 2018 +0000
+++ b/MPU6050.h	Wed Mar 28 21:23:40 2018 +0000
@@ -411,6 +411,386 @@
 #define MPU6050_DMP_MEMORY_BANK_SIZE    256
 #define MPU6050_DMP_MEMORY_CHUNK_SIZE   16
 
+
+
+#define MPU60X0_ADDRESS_AD0_LOW     0x68 // address pin low (GND), default for InvenSense evaluation board
+#define MPU60X0_ADDRESS_AD0_HIGH    0x69 // address pin high (VCC)
+#define MPU60X0_DEFAULT_ADDRESS     MPU60X0_ADDRESS_AD0_LOW
+#define MPU60X0_DEFAULT_SS_PIN      4
+
+#define MPU60X0_RA_XG_OFFS_TC       0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD
+#define MPU60X0_RA_YG_OFFS_TC       0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD
+#define MPU60X0_RA_ZG_OFFS_TC       0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD
+#define MPU60X0_RA_X_FINE_GAIN      0x03 //[7:0] X_FINE_GAIN
+#define MPU60X0_RA_Y_FINE_GAIN      0x04 //[7:0] Y_FINE_GAIN
+#define MPU60X0_RA_Z_FINE_GAIN      0x05 //[7:0] Z_FINE_GAIN
+#define MPU60X0_RA_XA_OFFS_H        0x06 //[15:0] XA_OFFS
+#define MPU60X0_RA_XA_OFFS_L_TC     0x07
+#define MPU60X0_RA_YA_OFFS_H        0x08 //[15:0] YA_OFFS
+#define MPU60X0_RA_YA_OFFS_L_TC     0x09
+#define MPU60X0_RA_ZA_OFFS_H        0x0A //[15:0] ZA_OFFS
+#define MPU60X0_RA_ZA_OFFS_L_TC     0x0B
+#define MPU60X0_RA_XG_OFFS_USRH     0x13 //[15:0] XG_OFFS_USR
+#define MPU60X0_RA_XG_OFFS_USRL     0x14
+#define MPU60X0_RA_YG_OFFS_USRH     0x15 //[15:0] YG_OFFS_USR
+#define MPU60X0_RA_YG_OFFS_USRL     0x16
+#define MPU60X0_RA_ZG_OFFS_USRH     0x17 //[15:0] ZG_OFFS_USR
+#define MPU60X0_RA_ZG_OFFS_USRL     0x18
+#define MPU60X0_RA_SMPLRT_DIV       0x19
+#define MPU60X0_RA_CONFIG           0x1A
+#define MPU60X0_RA_GYRO_CONFIG      0x1B
+#define MPU60X0_RA_ACCEL_CONFIG     0x1C
+#define MPU9250_RA_ACCEL_CONFIG2    0x1D
+#define MPU60X0_RA_FF_THR           0x1D
+#define MPU60X0_RA_FF_DUR           0x1E
+#define MPU60X0_RA_MOT_THR          0x1F
+#define MPU60X0_RA_MOT_DUR          0x20
+#define MPU60X0_RA_ZRMOT_THR        0x21
+#define MPU60X0_RA_ZRMOT_DUR        0x22
+#define MPU60X0_RA_FIFO_EN          0x23
+#define MPU60X0_RA_I2C_MST_CTRL     0x24
+#define MPU60X0_RA_I2C_SLV0_ADDR    0x25
+#define MPU60X0_RA_I2C_SLV0_REG     0x26
+#define MPU60X0_RA_I2C_SLV0_CTRL    0x27
+#define MPU60X0_RA_I2C_SLV1_ADDR    0x28
+#define MPU60X0_RA_I2C_SLV1_REG     0x29
+#define MPU60X0_RA_I2C_SLV1_CTRL    0x2A
+#define MPU60X0_RA_I2C_SLV2_ADDR    0x2B
+#define MPU60X0_RA_I2C_SLV2_REG     0x2C
+#define MPU60X0_RA_I2C_SLV2_CTRL    0x2D
+#define MPU60X0_RA_I2C_SLV3_ADDR    0x2E
+#define MPU60X0_RA_I2C_SLV3_REG     0x2F
+#define MPU60X0_RA_I2C_SLV3_CTRL    0x30
+#define MPU60X0_RA_I2C_SLV4_ADDR    0x31
+#define MPU60X0_RA_I2C_SLV4_REG     0x32
+#define MPU60X0_RA_I2C_SLV4_DO      0x33
+#define MPU60X0_RA_I2C_SLV4_CTRL    0x34
+#define MPU60X0_RA_I2C_SLV4_DI      0x35
+#define MPU60X0_RA_I2C_MST_STATUS   0x36
+#define MPU60X0_RA_INT_PIN_CFG      0x37
+#define MPU60X0_RA_INT_ENABLE       0x38
+#define MPU60X0_RA_DMP_INT_STATUS   0x39
+#define MPU60X0_RA_INT_STATUS       0x3A
+#define MPU60X0_RA_ACCEL_XOUT_H     0x3B
+#define MPU60X0_RA_ACCEL_XOUT_L     0x3C
+#define MPU60X0_RA_ACCEL_YOUT_H     0x3D
+#define MPU60X0_RA_ACCEL_YOUT_L     0x3E
+#define MPU60X0_RA_ACCEL_ZOUT_H     0x3F
+#define MPU60X0_RA_ACCEL_ZOUT_L     0x40
+#define MPU60X0_RA_TEMP_OUT_H       0x41
+#define MPU60X0_RA_TEMP_OUT_L       0x42
+#define MPU60X0_RA_GYRO_XOUT_H      0x43
+#define MPU60X0_RA_GYRO_XOUT_L      0x44
+#define MPU60X0_RA_GYRO_YOUT_H      0x45
+#define MPU60X0_RA_GYRO_YOUT_L      0x46
+#define MPU60X0_RA_GYRO_ZOUT_H      0x47
+#define MPU60X0_RA_GYRO_ZOUT_L      0x48
+#define MPU60X0_RA_EXT_SENS_DATA_00 0x49
+#define MPU60X0_RA_EXT_SENS_DATA_01 0x4A
+#define MPU60X0_RA_EXT_SENS_DATA_02 0x4B
+#define MPU60X0_RA_EXT_SENS_DATA_03 0x4C
+#define MPU60X0_RA_EXT_SENS_DATA_04 0x4D
+#define MPU60X0_RA_EXT_SENS_DATA_05 0x4E
+#define MPU60X0_RA_EXT_SENS_DATA_06 0x4F
+#define MPU60X0_RA_EXT_SENS_DATA_07 0x50
+#define MPU60X0_RA_EXT_SENS_DATA_08 0x51
+#define MPU60X0_RA_EXT_SENS_DATA_09 0x52
+#define MPU60X0_RA_EXT_SENS_DATA_10 0x53
+#define MPU60X0_RA_EXT_SENS_DATA_11 0x54
+#define MPU60X0_RA_EXT_SENS_DATA_12 0x55
+#define MPU60X0_RA_EXT_SENS_DATA_13 0x56
+#define MPU60X0_RA_EXT_SENS_DATA_14 0x57
+#define MPU60X0_RA_EXT_SENS_DATA_15 0x58
+#define MPU60X0_RA_EXT_SENS_DATA_16 0x59
+#define MPU60X0_RA_EXT_SENS_DATA_17 0x5A
+#define MPU60X0_RA_EXT_SENS_DATA_18 0x5B
+#define MPU60X0_RA_EXT_SENS_DATA_19 0x5C
+#define MPU60X0_RA_EXT_SENS_DATA_20 0x5D
+#define MPU60X0_RA_EXT_SENS_DATA_21 0x5E
+#define MPU60X0_RA_EXT_SENS_DATA_22 0x5F
+#define MPU60X0_RA_EXT_SENS_DATA_23 0x60
+#define MPU60X0_RA_MOT_DETECT_STATUS    0x61
+#define MPU60X0_RA_I2C_SLV0_DO      0x63
+#define MPU60X0_RA_I2C_SLV1_DO      0x64
+#define MPU60X0_RA_I2C_SLV2_DO      0x65
+#define MPU60X0_RA_I2C_SLV3_DO      0x66
+#define MPU60X0_RA_I2C_MST_DELAY_CTRL   0x67
+#define MPU60X0_RA_SIGNAL_PATH_RESET    0x68
+#define MPU60X0_RA_MOT_DETECT_CTRL      0x69
+#define MPU60X0_RA_USER_CTRL        0x6A
+#define MPU60X0_RA_PWR_MGMT_1       0x6B
+#define MPU60X0_RA_PWR_MGMT_2       0x6C
+#define MPU60X0_RA_BANK_SEL         0x6D
+#define MPU60X0_RA_MEM_START_ADDR   0x6E
+#define MPU60X0_RA_MEM_R_W          0x6F
+#define MPU60X0_RA_DMP_CFG_1        0x70
+#define MPU60X0_RA_DMP_CFG_2        0x71
+#define MPU60X0_RA_FIFO_COUNTH      0x72
+#define MPU60X0_RA_FIFO_COUNTL      0x73
+#define MPU60X0_RA_FIFO_R_W         0x74
+#define MPU60X0_RA_WHO_AM_I         0x75
+
+#define MPU60X0_TC_PWR_MODE_BIT     7
+#define MPU60X0_TC_OFFSET_BIT       6
+#define MPU60X0_TC_OFFSET_LENGTH    6
+#define MPU60X0_TC_OTP_BNK_VLD_BIT  0
+
+#define MPU60X0_VDDIO_LEVEL_VLOGIC  0
+#define MPU60X0_VDDIO_LEVEL_VDD     1
+
+#define MPU60X0_CFG_EXT_SYNC_SET_BIT    5
+#define MPU60X0_CFG_EXT_SYNC_SET_LENGTH 3
+#define MPU60X0_CFG_DLPF_CFG_BIT    2
+#define MPU60X0_CFG_DLPF_CFG_LENGTH 3
+
+#define MPU60X0_EXT_SYNC_DISABLED       0x0
+#define MPU60X0_EXT_SYNC_TEMP_OUT_L     0x1
+#define MPU60X0_EXT_SYNC_GYRO_XOUT_L    0x2
+#define MPU60X0_EXT_SYNC_GYRO_YOUT_L    0x3
+#define MPU60X0_EXT_SYNC_GYRO_ZOUT_L    0x4
+#define MPU60X0_EXT_SYNC_ACCEL_XOUT_L   0x5
+#define MPU60X0_EXT_SYNC_ACCEL_YOUT_L   0x6
+#define MPU60X0_EXT_SYNC_ACCEL_ZOUT_L   0x7
+
+#define MPU60X0_DLPF_BW_256         0x00
+#define MPU60X0_DLPF_BW_184         0x01
+#define MPU60X0_DLPF_BW_98          0x02
+#define MPU60X0_DLPF_BW_42          0x03
+#define MPU60X0_DLPF_BW_20          0x04
+#define MPU60X0_DLPF_BW_10          0x05
+#define MPU60X0_DLPF_BW_5           0x06
+
+#define MPU60X0_GCONFIG_FS_SEL_BIT      4
+#define MPU60X0_GCONFIG_FS_SEL_LENGTH   2
+
+#define MPU60X0_GYRO_FS_250         0x00
+#define MPU60X0_GYRO_FS_500         0x01
+#define MPU60X0_GYRO_FS_1000        0x02
+#define MPU60X0_GYRO_FS_2000        0x03
+
+#define MPU60X0_ACONFIG_XA_ST_BIT           7
+#define MPU60X0_ACONFIG_YA_ST_BIT           6
+#define MPU60X0_ACONFIG_ZA_ST_BIT           5
+#define MPU60X0_ACONFIG_AFS_SEL_BIT         4
+#define MPU60X0_ACONFIG_AFS_SEL_LENGTH      2
+#define MPU60X0_ACONFIG_ACCEL_HPF_BIT       2
+#define MPU60X0_ACONFIG_ACCEL_HPF_LENGTH    3
+
+#define MPU60X0_ACCEL_FS_2          0x00
+#define MPU60X0_ACCEL_FS_4          0x01
+#define MPU60X0_ACCEL_FS_8          0x02
+#define MPU60X0_ACCEL_FS_16         0x03
+
+#define MPU60X0_DHPF_RESET          0x00
+#define MPU60X0_DHPF_5              0x01
+#define MPU60X0_DHPF_2P5            0x02
+#define MPU60X0_DHPF_1P25           0x03
+#define MPU60X0_DHPF_0P63           0x04
+#define MPU60X0_DHPF_HOLD           0x07
+
+#define MPU60X0_TEMP_FIFO_EN_BIT    7
+#define MPU60X0_XG_FIFO_EN_BIT      6
+#define MPU60X0_YG_FIFO_EN_BIT      5
+#define MPU60X0_ZG_FIFO_EN_BIT      4
+#define MPU60X0_ACCEL_FIFO_EN_BIT   3
+#define MPU60X0_SLV2_FIFO_EN_BIT    2
+#define MPU60X0_SLV1_FIFO_EN_BIT    1
+#define MPU60X0_SLV0_FIFO_EN_BIT    0
+
+#define MPU60X0_MULT_MST_EN_BIT     7
+#define MPU60X0_WAIT_FOR_ES_BIT     6
+#define MPU60X0_SLV_3_FIFO_EN_BIT   5
+#define MPU60X0_I2C_MST_P_NSR_BIT   4
+#define MPU60X0_I2C_MST_CLK_BIT     3
+#define MPU60X0_I2C_MST_CLK_LENGTH  4
+
+#define MPU60X0_CLOCK_DIV_348       0x0
+#define MPU60X0_CLOCK_DIV_333       0x1
+#define MPU60X0_CLOCK_DIV_320       0x2
+#define MPU60X0_CLOCK_DIV_308       0x3
+#define MPU60X0_CLOCK_DIV_296       0x4
+#define MPU60X0_CLOCK_DIV_286       0x5
+#define MPU60X0_CLOCK_DIV_276       0x6
+#define MPU60X0_CLOCK_DIV_267       0x7
+#define MPU60X0_CLOCK_DIV_258       0x8
+#define MPU60X0_CLOCK_DIV_500       0x9
+#define MPU60X0_CLOCK_DIV_471       0xA
+#define MPU60X0_CLOCK_DIV_444       0xB
+#define MPU60X0_CLOCK_DIV_421       0xC
+#define MPU60X0_CLOCK_DIV_400       0xD
+#define MPU60X0_CLOCK_DIV_381       0xE
+#define MPU60X0_CLOCK_DIV_364       0xF
+
+#define MPU60X0_I2C_SLV_RW_BIT      7
+#define MPU60X0_I2C_SLV_ADDR_BIT    6
+#define MPU60X0_I2C_SLV_ADDR_LENGTH 7
+#define MPU60X0_I2C_SLV_EN_BIT      7
+#define MPU60X0_I2C_SLV_BYTE_SW_BIT 6
+#define MPU60X0_I2C_SLV_REG_DIS_BIT 5
+#define MPU60X0_I2C_SLV_GRP_BIT     4
+#define MPU60X0_I2C_SLV_LEN_BIT     3
+#define MPU60X0_I2C_SLV_LEN_LENGTH  4
+
+#define MPU60X0_I2C_SLV4_RW_BIT         7
+#define MPU60X0_I2C_SLV4_ADDR_BIT       6
+#define MPU60X0_I2C_SLV4_ADDR_LENGTH    7
+#define MPU60X0_I2C_SLV4_EN_BIT         7
+#define MPU60X0_I2C_SLV4_INT_EN_BIT     6
+#define MPU60X0_I2C_SLV4_REG_DIS_BIT    5
+#define MPU60X0_I2C_SLV4_MST_DLY_BIT    4
+#define MPU60X0_I2C_SLV4_MST_DLY_LENGTH 5
+
+#define MPU60X0_MST_PASS_THROUGH_BIT    7
+#define MPU60X0_MST_I2C_SLV4_DONE_BIT   6
+#define MPU60X0_MST_I2C_LOST_ARB_BIT    5
+#define MPU60X0_MST_I2C_SLV4_NACK_BIT   4
+#define MPU60X0_MST_I2C_SLV3_NACK_BIT   3
+#define MPU60X0_MST_I2C_SLV2_NACK_BIT   2
+#define MPU60X0_MST_I2C_SLV1_NACK_BIT   1
+#define MPU60X0_MST_I2C_SLV0_NACK_BIT   0
+
+#define MPU60X0_INTCFG_INT_LEVEL_BIT        7
+#define MPU60X0_INTCFG_INT_OPEN_BIT         6
+#define MPU60X0_INTCFG_LATCH_INT_EN_BIT     5
+#define MPU60X0_INTCFG_INT_RD_CLEAR_BIT     4
+#define MPU60X0_INTCFG_FSYNC_INT_LEVEL_BIT  3
+#define MPU60X0_INTCFG_FSYNC_INT_EN_BIT     2
+#define MPU60X0_INTCFG_I2C_BYPASS_EN_BIT    1
+#define MPU60X0_INTCFG_CLKOUT_EN_BIT        0
+
+#define MPU60X0_INTMODE_ACTIVEHIGH  0x00
+#define MPU60X0_INTMODE_ACTIVELOW   0x01
+
+#define MPU60X0_INTDRV_PUSHPULL     0x00
+#define MPU60X0_INTDRV_OPENDRAIN    0x01
+
+#define MPU60X0_INTLATCH_50USPULSE  0x00
+#define MPU60X0_INTLATCH_WAITCLEAR  0x01
+
+#define MPU60X0_INTCLEAR_STATUSREAD 0x00
+#define MPU60X0_INTCLEAR_ANYREAD    0x01
+
+#define MPU60X0_INTERRUPT_FF_BIT            7
+#define MPU60X0_INTERRUPT_MOT_BIT           6
+#define MPU60X0_INTERRUPT_ZMOT_BIT          5
+#define MPU60X0_INTERRUPT_FIFO_OFLOW_BIT    4
+#define MPU60X0_INTERRUPT_I2C_MST_INT_BIT   3
+#define MPU60X0_INTERRUPT_PLL_RDY_INT_BIT   2
+#define MPU60X0_INTERRUPT_DMP_INT_BIT       1
+#define MPU60X0_INTERRUPT_DATA_RDY_BIT      0
+
+#define MPU60X0_INTERRUPT_FF                0x80
+#define MPU60X0_INTERRUPT_MOT               0x40
+#define MPU60X0_INTERRUPT_ZMOT              0x20
+#define MPU60X0_INTERRUPT_FIFO_OFLOW        0x10
+#define MPU60X0_INTERRUPT_I2C_MST_INT       0x08
+#define MPU60X0_INTERRUPT_PLL_RDY_INT       0x04
+#define MPU60X0_INTERRUPT_DMP_INT           0x02
+#define MPU60X0_INTERRUPT_DATA_RDY          0x01
+
+// TODO: figure out what these actually do
+// UMPL source code is not very obivous
+#define MPU60X0_DMPINT_5_BIT            5
+#define MPU60X0_DMPINT_4_BIT            4
+#define MPU60X0_DMPINT_3_BIT            3
+#define MPU60X0_DMPINT_2_BIT            2
+#define MPU60X0_DMPINT_1_BIT            1
+#define MPU60X0_DMPINT_0_BIT            0
+
+#define MPU60X0_MOTION_MOT_XNEG_BIT     7
+#define MPU60X0_MOTION_MOT_XPOS_BIT     6
+#define MPU60X0_MOTION_MOT_YNEG_BIT     5
+#define MPU60X0_MOTION_MOT_YPOS_BIT     4
+#define MPU60X0_MOTION_MOT_ZNEG_BIT     3
+#define MPU60X0_MOTION_MOT_ZPOS_BIT     2
+#define MPU60X0_MOTION_MOT_ZRMOT_BIT    0
+
+#define MPU60X0_DELAYCTRL_DELAY_ES_SHADOW_BIT   7
+#define MPU60X0_DELAYCTRL_I2C_SLV4_DLY_EN_BIT   4
+#define MPU60X0_DELAYCTRL_I2C_SLV3_DLY_EN_BIT   3
+#define MPU60X0_DELAYCTRL_I2C_SLV2_DLY_EN_BIT   2
+#define MPU60X0_DELAYCTRL_I2C_SLV1_DLY_EN_BIT   1
+#define MPU60X0_DELAYCTRL_I2C_SLV0_DLY_EN_BIT   0
+
+#define MPU60X0_PATHRESET_GYRO_RESET_BIT    2
+#define MPU60X0_PATHRESET_ACCEL_RESET_BIT   1
+#define MPU60X0_PATHRESET_TEMP_RESET_BIT    0
+
+#define MPU60X0_DETECT_ACCEL_ON_DELAY_BIT       5
+#define MPU60X0_DETECT_ACCEL_ON_DELAY_LENGTH    2
+#define MPU60X0_DETECT_FF_COUNT_BIT             3
+#define MPU60X0_DETECT_FF_COUNT_LENGTH          2
+#define MPU60X0_DETECT_MOT_COUNT_BIT            1
+#define MPU60X0_DETECT_MOT_COUNT_LENGTH         2
+
+#define MPU60X0_DETECT_DECREMENT_RESET  0x0
+#define MPU60X0_DETECT_DECREMENT_1      0x1
+#define MPU60X0_DETECT_DECREMENT_2      0x2
+#define MPU60X0_DETECT_DECREMENT_4      0x3
+
+#define MPU60X0_USERCTRL_DMP_EN_BIT             7
+#define MPU60X0_USERCTRL_FIFO_EN_BIT            6
+#define MPU60X0_USERCTRL_I2C_MST_EN_BIT         5
+#define MPU60X0_USERCTRL_I2C_IF_DIS_BIT         4
+#define MPU60X0_USERCTRL_DMP_RESET_BIT          3
+#define MPU60X0_USERCTRL_FIFO_RESET_BIT         2
+#define MPU60X0_USERCTRL_I2C_MST_RESET_BIT      1
+#define MPU60X0_USERCTRL_SIG_COND_RESET_BIT     0
+
+#define MPU60X0_PWR1_DEVICE_RESET_BIT   7
+#define MPU60X0_PWR1_SLEEP_BIT          6
+#define MPU60X0_PWR1_CYCLE_BIT          5
+#define MPU60X0_PWR1_TEMP_DIS_BIT       3
+#define MPU60X0_PWR1_CLKSEL_BIT         2
+#define MPU60X0_PWR1_CLKSEL_LENGTH      3
+
+#define MPU60X0_CLOCK_INTERNAL          0x00
+#define MPU60X0_CLOCK_PLL_XGYRO         0x01
+#define MPU60X0_CLOCK_PLL_YGYRO         0x02
+#define MPU60X0_CLOCK_PLL_ZGYRO         0x03
+#define MPU60X0_CLOCK_PLL_EXT32K        0x04
+#define MPU60X0_CLOCK_PLL_EXT19M        0x05
+#define MPU60X0_CLOCK_KEEP_RESET        0x07
+
+#define MPU60X0_PWR2_LP_WAKE_CTRL_BIT       7
+#define MPU60X0_PWR2_LP_WAKE_CTRL_LENGTH    2
+#define MPU60X0_PWR2_STBY_XA_BIT            5
+#define MPU60X0_PWR2_STBY_YA_BIT            4
+#define MPU60X0_PWR2_STBY_ZA_BIT            3
+#define MPU60X0_PWR2_STBY_XG_BIT            2
+#define MPU60X0_PWR2_STBY_YG_BIT            1
+#define MPU60X0_PWR2_STBY_ZG_BIT            0
+
+#define MPU60X0_WAKE_FREQ_1P25      0x0
+#define MPU60X0_WAKE_FREQ_2P5       0x1
+#define MPU60X0_WAKE_FREQ_5         0x2
+#define MPU60X0_WAKE_FREQ_10        0x3
+
+#define MPU60X0_BANKSEL_PRFTCH_EN_BIT       6
+#define MPU60X0_BANKSEL_CFG_USER_BANK_BIT   5
+#define MPU60X0_BANKSEL_MEM_SEL_BIT         4
+#define MPU60X0_BANKSEL_MEM_SEL_LENGTH      5
+
+#define MPU60X0_WHO_AM_I_BIT        6
+#define MPU60X0_WHO_AM_I_LENGTH     6
+
+#define MPU60X0_DMP_MEMORY_BANKS        8
+#define MPU60X0_DMP_MEMORY_BANK_SIZE    256
+#define MPU60X0_DMP_MEMORY_CHUNK_SIZE   16
+
+
+#define I2C_SLV0_EN     0x80
+#define I2C_SLV4_EN     0x80
+#define I2C_READ_FLAG   0x80
+#define SEN_ENABLE      0x00
+#define I2C_MST_EN      0x20
+#define I2C_MST_CLK     0x0D
+#define PWR_RESET       0x80
+        
+#define INT_DISABLE     0x00
+#define INT_PULSE_50US  0x00
+#define INT_RAW_RDY_EN  0x01
+
 enum mpu9250_dlpf_bandwidth
 {
     DLPF_BANDWIDTH_184HZ,
@@ -841,6 +1221,7 @@
         bool writeAKRegister(uint8_t subAddress, uint8_t data);
         bool writeRegister(uint8_t subAddress, uint8_t data);
         void readRegister(uint8_t subAddress, uint8_t count, uint8_t* dest);
+        void setStandbyDisable();
 #endif
 
         // special methods for MotionApps 2.0 implementation
@@ -1054,6 +1435,14 @@
         uint8_t buffer[14];
 #endif
         uint8_t magDevAddr;
+        
+#ifdef MPU9250
+        // transformation matrix
+        /* transform the accel and gyro axes to match the magnetometer axes */
+        int16_t tX[3];// = {0,  1,  0}; 
+        int16_t tY[3];// = {1,  0,  0};
+        int16_t tZ[3];// = {0,  0, 1};  //was -1  transformation is done within lib.
+#endif
 };
 
 #endif /* _MPU6050_H_ */
\ No newline at end of file