mbed official
The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
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mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
Revision 11:1c1ebd0324fa, committed 2009-08-28
- Comitter:
- rolf.meyer@arm.com
- Date:
- Fri Aug 28 12:10:11 2009 +0000
- Parent:
- 10:fcb9359f0959
- Child:
- 12:f63353af7be8
- Commit message:
- A shiny new version
Changed in this revision
--- a/AnalogIn.h Thu May 14 14:44:00 2009 +0000
+++ b/AnalogIn.h Fri Aug 28 12:10:11 2009 +0000
@@ -6,6 +6,9 @@
#ifndef MBED_ANALOGIN_H
#define MBED_ANALOGIN_H
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
#include "Base.h"
namespace mbed {
@@ -18,7 +21,7 @@
* >
* > #include "mbed.h"
* >
- * > AnalogIn temperature(20);
+ * > AnalogIn temperature(p20);
* >
* > int main() {
* > while(1) {
@@ -36,17 +39,17 @@
* Create an AnalogIn, connected to the specified pin
*
* Variables:
- * pin - AnalogIn pin to connect to (15 - 20)
+ * pin - AnalogIn pin to connect to
* name - (optional) A string to identify the object
*/
- AnalogIn(int pin, const char *name = NULL);
+ AnalogIn(PinName pin, const char *name = NULL);
/* Function: read
* Read the input voltage, represented as a float in the range [0.0, 1.0]
*
* Variables:
* returns - A floating-point value representing the current input voltage,
- * measured as a percentage (0.0 = 0v, 1.0 = 3.3v)
+ * measured as a percentage
*/
float read();
@@ -55,14 +58,11 @@
*
* Variables:
* returns - 16-bit unsigned short representing the current input voltage,
- * normalised to a 16-bit value (0x0000 = 0v, 0xFFFF = 3.3v)
+ * normalised to a 16-bit value
*/
unsigned short read_u16();
- // functions to be removed in time...
- float read_v();
- int read_mv();
-
+#ifdef MBED_OPERATORS
/* Function: operator float
* An operator shorthand for <read()>
*
@@ -75,18 +75,20 @@
* > if(volume.read() > 0.25) { ... }
* > if(volume > 0.25) { ... }
*/
- operator float();
+ operator float();
+#endif
+#ifdef MBED_RPC
virtual const struct rpc_method *get_rpc_methods();
static struct rpc_class *get_rpc_class();
+#endif
protected:
-
- int _id;
-
+
+ ADCName _adc;
+
};
-}
+} // namespace mbed
#endif
-
--- a/AnalogOut.h Thu May 14 14:44:00 2009 +0000
+++ b/AnalogOut.h Fri Aug 28 12:10:11 2009 +0000
@@ -6,12 +6,31 @@
#ifndef MBED_ANALOGOUT_H
#define MBED_ANALOGOUT_H
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
#include "Base.h"
namespace mbed {
/* Class: AnalogOut
* An analog output, used for setting the voltage on a pin
+ *
+ * Example:
+ * > // Make a sawtooth output
+ * >
+ * > #include "mbed.h"
+ * >
+ * > AnalogOut tri(p18);
+ * > int main() {
+ * > while(1) {
+ * > tri = tri + 0.01;
+ * > wait_us(1);
+ * > if(tri == 1) {
+ * > tri = 0;
+ * > }
+ * > }
+ * > }
*/
class AnalogOut : public Base {
@@ -23,18 +42,18 @@
* Variables:
* pin - AnalogOut pin to connect to (18)
*/
- AnalogOut(int pin, const char *name = NULL);
+ AnalogOut(PinName pin, const char *name = NULL);
- /* Function: write
- * Set the output voltage, specified as a percentage (float)
- *
- * Variables:
- * percent - A floating-point value representing the output voltage,
- * specified as a percentage. The value should lie between
- * 0.0f (representing 0v / 0%) and 1.0f (representing 3.3v / 100%).
- * Values outside this range will be saturated to 0.0f or 1.0f.
- */
- void write(float percent);
+ /* Function: write
+ * Set the output voltage, specified as a percentage (float)
+ *
+ * Variables:
+ * percent - A floating-point value representing the output voltage,
+ * specified as a percentage. The value should lie between
+ * 0.0f (representing 0v / 0%) and 1.0f (representing 3.3v / 100%).
+ * Values outside this range will be saturated to 0.0f or 1.0f.
+ */
+ void write(float value);
/* Function: write_u16
* Set the output voltage, represented as an unsigned short in the range [0x0, 0xFFFF]
@@ -45,22 +64,21 @@
*/
void write_u16(unsigned short value);
- void write_v(float v);
- void write_mv(int mv);
-
/* Function: read
- * Return the current output voltage setting, measured as a percentage (float)
+ * Return the current output voltage setting, measured as a percentage (float)
*
* Variables:
- * returns - A floating-point value representing the current voltage being output on the pin,
- * measured as a percentage. The returned value will lie between
- * 0.0f (representing 0v / 0%) and 1.0f (representing 3.3v / 100%).
- *
- * Note:
- * This value may not match exactly the value set by a previous <write>.
- */
+ * returns - A floating-point value representing the current voltage being output on the pin,
+ * measured as a percentage. The returned value will lie between
+ * 0.0f (representing 0v / 0%) and 1.0f (representing 3.3v / 100%).
+ *
+ * Note:
+ * This value may not match exactly the value set by a previous <write>.
+ */
float read();
+
+#ifdef MBED_OPERATORS
/* Function: operator=
* An operator shorthand for <write()>
*/
@@ -68,16 +86,23 @@
AnalogOut& operator= (AnalogOut& rhs);
/* Function: operator float()
- * An operator shorthand for <read()>
- */
+ * An operator shorthand for <read()>
+ */
operator float();
+#endif
+#ifdef MBED_RPC
virtual const struct rpc_method *get_rpc_methods();
static struct rpc_class *get_rpc_class();
+#endif
+
+protected:
+
+ DACName _dac;
};
-}
+} // namespace mbed
#endif
--- a/Base.h Thu May 14 14:44:00 2009 +0000
+++ b/Base.h Fri Aug 28 12:10:11 2009 +0000
@@ -6,11 +6,15 @@
#ifndef MBED_BASE_H
#define MBED_BASE_H
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
#include <cstdlib>
#include "DirHandle.h"
namespace mbed {
+#ifdef MBED_RPC
struct rpc_function {
const char *name;
void (*caller)(const char*, char*);
@@ -21,6 +25,7 @@
const rpc_function *static_functions;
struct rpc_class *next;
};
+#endif
/* Class Base
* The base class for most things
@@ -48,6 +53,8 @@
*/
const char *name();
+#ifdef MBED_RPC
+
/* Function rpc
* Call the given method with the given arguments, and write the
* result into the string pointed to by result. The default
@@ -59,7 +66,9 @@
* arguments - A list of arguments separated by spaces.
* result - A pointer to a string to write the result into. May
* be NULL, in which case nothing is written.
- * returns - true if method corresponds to a valid rpc method, or
+ *
+ * Returns
+ * true if method corresponds to a valid rpc method, or
* false otherwise.
*/
virtual bool rpc(const char *method, const char *arguments, char *result);
@@ -70,7 +79,6 @@
* RPC_METHOD_END or RPC_METHOD_SUPER(Superclass).
*
* Example
- *
* > class Example : public Base {
* > int foo(int a, int b) { return a + b; }
* > virtual const struct rpc_method *get_rpc_methods() {
@@ -95,6 +103,8 @@
*/
static bool rpc(const char *name, const char *method, const char *arguments, char *result);
+#endif
+
/* Function lookup
* Lookup and return the object that has the given name.
*
@@ -116,10 +126,12 @@
private:
+#ifdef MBED_RPC
static rpc_class *_classes;
static const rpc_function _base_funcs[];
static rpc_class _base_class;
+#endif
void delete_self();
static void list_objs(const char *arguments, char *result);
@@ -129,6 +141,7 @@
public:
+#ifdef MBED_RPC
/* Function add_rpc_class
* Add the class to the list of classes which can have static
* methods called via rpc (the static methods which can be called
@@ -190,6 +203,7 @@
}
return p->_name;
}
+#endif
};
--- a/BusIn.h Thu May 14 14:44:00 2009 +0000
+++ b/BusIn.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,10 +1,14 @@
-/* mbed Microcontroller Library - BusIn
- * Copyright (c) 2007-2008, sford
+/* mbed Microcontroller Library - DigitalIn
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford, rmeyer
*/
#ifndef MBED_BUSIN_H
#define MBED_BUSIN_H
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
#include "Base.h"
#include "DigitalIn.h"
@@ -17,25 +21,25 @@
public:
- /* Group: Configuration Methods */
+ /* Group: Configuration Methods */
- /* Constructor: BusIn
- * Create an BusIn, connected to the specified pins
- *
- * Variables:
- * p<n> - DigitalIn pin to connect to bus bit <n> (5-30, NOT_CONNECTED)
+ /* Constructor: BusIn
+ * Create an BusIn, connected to the specified pins
+ *
+ * Variables:
+ * p<n> - DigitalIn pin to connect to bus bit <n> (p5-p30, NC)
*
* Note:
* It is only required to specify as many pin variables as is required
- * for the bus; the rest will default to NOT_CONNECTED
- */
- BusIn(int p0, int p1 = NOT_CONNECTED, int p2 = NOT_CONNECTED, int p3 = NOT_CONNECTED,
- int p4 = NOT_CONNECTED, int p5 = NOT_CONNECTED, int p6 = NOT_CONNECTED, int p7 = NOT_CONNECTED,
- int p8 = NOT_CONNECTED, int p9 = NOT_CONNECTED, int p10 = NOT_CONNECTED, int p11 = NOT_CONNECTED,
- int p12 = NOT_CONNECTED, int p13 = NOT_CONNECTED, int p14 = NOT_CONNECTED, int p15 = NOT_CONNECTED,
+ * for the bus; the rest will default to NC (not connected)
+ */
+ BusIn(PinName p0, PinName p1 = NC, PinName p2 = NC, PinName p3 = NC,
+ PinName p4 = NC, PinName p5 = NC, PinName p6 = NC, PinName p7 = NC,
+ PinName p8 = NC, PinName p9 = NC, PinName p10 = NC, PinName p11 = NC,
+ PinName p12 = NC, PinName p13 = NC, PinName p14 = NC, PinName p15 = NC,
const char *name = NULL);
- BusIn(int pins[16], const char *name = NULL);
+ BusIn(PinName pins[16], const char *name = NULL);
virtual ~BusIn();
@@ -48,26 +52,32 @@
* returns - An integer with each bit corresponding to the value read from the associated DigitalIn pin
*/
int read();
-
- /* Group: Access Method Shorthand */
+
+#ifdef MBED_OPERATORS
+ /* Group: Access Method Shorthand */
- /* Function: operator int()
- * A shorthand for <read>
- */
- operator int();
+ /* Function: operator int()
+ * A shorthand for <read>
+ */
+ operator int();
+#endif
+#ifdef MBED_RPC
virtual const struct rpc_method *get_rpc_methods();
static struct rpc_class *get_rpc_class();
+#endif
protected:
- DigitalIn* _pin[16];
+ DigitalIn* _pin[16];
- static void construct(const char *arguments, char *res);
-
+#ifdef MBED_RPC
+ static void construct(const char *arguments, char *res);
+#endif
+
};
-}
+} // namespace mbed
#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/BusInOut.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,116 @@
+/* mbed Microcontroller Library - BusInOut
+ * Copyright (c) 2009 ARM Limited. All rights reserved.
+ * sford, rmeyer
+ */
+
+#ifndef MBED_BUSINOUT_H
+#define MBED_BUSINOUT_H
+
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
+#include "Base.h"
+#include "DigitalInOut.h"
+
+namespace mbed {
+
+/* Class: BusInOut
+ * A digital input output bus, used for setting the state of a collection of pins
+ */
+class BusInOut : public Base {
+
+public:
+
+ /* Group: Configuration Methods */
+
+ /* Constructor: BusInOut
+ * Create an BusInOut, connected to the specified pins
+ *
+ * Variables:
+ * p<n> - DigitalInOut pin to connect to bus bit p<n> (p5-p30, NC)
+ *
+ * Note:
+ * It is only required to specify as many pin variables as is required
+ * for the bus; the rest will default to NC (not connected)
+ */
+ BusInOut(PinName p0, PinName p1 = NC, PinName p2 = NC, PinName p3 = NC,
+ PinName p4 = NC, PinName p5 = NC, PinName p6 = NC, PinName p7 = NC,
+ PinName p8 = NC, PinName p9 = NC, PinName p10 = NC, PinName p11 = NC,
+ PinName p12 = NC, PinName p13 = NC, PinName p14 = NC, PinName p15 = NC,
+ const char *name = NULL);
+
+ BusInOut(PinName pins[16], const char *name = NULL);
+
+ virtual ~BusInOut();
+
+ /* Group: Access Methods */
+
+ /* Function: write
+ * Write the value to the output bus
+ *
+ * Variables:
+ * value - An integer specifying a bit to write for every corresponding DigitalInOut pin
+ */
+ void write(int value);
+
+
+ /* Function: read
+ * Read the value currently output on the bus
+ *
+ * Variables:
+ * returns - An integer with each bit corresponding to associated DigitalInOut pin setting
+ */
+ int read();
+
+ /* Function: output
+ * Set as an output
+ */
+ void output();
+
+ /* Function: input
+ * Set as an input
+ */
+ void input();
+
+ /* Function: mode
+ * Set the input pin mode
+ *
+ * Variables:
+ * mode - PullUp, PullDown, PullNone
+ */
+ void mode(PinMode pull);
+
+#ifdef MBED_OPERATORS
+ /* Group: Access Method Shorthand */
+
+ /* Function: operator=
+ * A shorthand for <write>
+ */
+ BusInOut& operator= (int v);
+ BusInOut& operator= (BusInOut& rhs);
+
+ /* Function: operator int()
+ * A shorthand for <read>
+ */
+ operator int();
+#endif
+
+#ifdef MBED_RPC
+ virtual const struct rpc_method *get_rpc_methods();
+ static struct rpc_class *get_rpc_class();
+#endif
+
+protected:
+
+ DigitalInOut* _pin[16];
+
+#ifdef MBED_RPC
+ static void construct(const char *arguments, char *res);
+#endif
+
+};
+
+} // namespace mbed
+
+#endif
+
--- a/BusOut.h Thu May 14 14:44:00 2009 +0000
+++ b/BusOut.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,10 +1,14 @@
/* mbed Microcontroller Library - BusOut
- * Copyright (c) 2007-2008, sford
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford, rmeyer
*/
#ifndef MBED_BUSOUT_H
#define MBED_BUSOUT_H
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
#include "Base.h"
#include "DigitalOut.h"
@@ -17,68 +21,74 @@
public:
- /* Group: Configuration Methods */
-
- /* Constructor: BusOut
- * Create an BusOut, connected to the specified pins
- *
- * Variables:
- * p<n> - DigitalOut pin to connect to bus bit <n> (5-30, NOT_CONNECTED)
+ /* Group: Configuration Methods */
+
+ /* Constructor: BusOut
+ * Create an BusOut, connected to the specified pins
+ *
+ * Variables:
+ * p<n> - DigitalOut pin to connect to bus bit <n> (p5-p30, NC)
*
* Note:
* It is only required to specify as many pin variables as is required
- * for the bus; the rest will default to NOT_CONNECTED
+ * for the bus; the rest will default to NC (not connected)
*/
- BusOut(int p0, int p1 = NOT_CONNECTED, int p2 = NOT_CONNECTED, int p3 = NOT_CONNECTED,
- int p4 = NOT_CONNECTED, int p5 = NOT_CONNECTED, int p6 = NOT_CONNECTED, int p7 = NOT_CONNECTED,
- int p8 = NOT_CONNECTED, int p9 = NOT_CONNECTED, int p10 = NOT_CONNECTED, int p11 = NOT_CONNECTED,
- int p12 = NOT_CONNECTED, int p13 = NOT_CONNECTED, int p14 = NOT_CONNECTED, int p15 = NOT_CONNECTED,
+ BusOut(PinName p0, PinName p1 = NC, PinName p2 = NC, PinName p3 = NC,
+ PinName p4 = NC, PinName p5 = NC, PinName p6 = NC, PinName p7 = NC,
+ PinName p8 = NC, PinName p9 = NC, PinName p10 = NC, PinName p11 = NC,
+ PinName p12 = NC, PinName p13 = NC, PinName p14 = NC, PinName p15 = NC,
const char *name = NULL);
- BusOut(int pins[16], const char *name = NULL);
+ BusOut(PinName pins[16], const char *name = NULL);
- virtual ~BusOut();
+ virtual ~BusOut();
- /* Group: Access Methods */
+ /* Group: Access Methods */
- /* Function: write
- * Write the value to the output bus
- *
- * Variables:
- * value - An integer specifying a bit to write for every corresponding DigitalOut pin
- */
+ /* Function: write
+ * Write the value to the output bus
+ *
+ * Variables:
+ * value - An integer specifying a bit to write for every corresponding DigitalOut pin
+ */
void write(int value);
- /* Function: read
- * Read the value currently output on the bus
- *
- * Variables:
- * returns - An integer with each bit corresponding to associated DigitalOut pin setting
- */
+ /* Function: read
+ * Read the value currently output on the bus
+ *
+ * Variables:
+ * returns - An integer with each bit corresponding to associated DigitalOut pin setting
+ */
int read();
- /* Group: Access Method Shorthand */
+#ifdef MBED_OPERATORS
+ /* Group: Access Method Shorthand */
/* Function: operator=
- * A shorthand for <write>
- */
- BusOut& operator= (int v);
- BusOut& operator= (BusOut& rhs);
-
- /* Function: operator int()
- * A shorthand for <read>
- */
- operator int();
+ * A shorthand for <write>
+ */
+ BusOut& operator= (int v);
+ BusOut& operator= (BusOut& rhs);
+ /* Function: operator int()
+ * A shorthand for <read>
+ */
+ operator int();
+#endif
+
+#ifdef MBED_RPC
virtual const struct rpc_method *get_rpc_methods();
static struct rpc_class *get_rpc_class();
+#endif
protected:
- DigitalOut* _pin[16];
+ DigitalOut* _pin[16];
- static void construct(const char *arguments, char *res);
+#ifdef MBED_RPC
+ static void construct(const char *arguments, char *res);
+#endif
};
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/CAN.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,207 @@
+/* mbed Microcontroller Library - can
+ * Copyright (c) 2009 ARM Limited. All rights reserved.
+ * rmeyer
+ */
+
+#ifndef MBED_CAN_H
+#define MBED_CAN_H
+
+#include "Base.h"
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
+
+#include "can_helper.h"
+
+#include <string.h>
+
+namespace mbed {
+
+/* Class: CANMessage
+ *
+ */
+class CANMessage : public CAN_Message {
+
+public:
+
+ /* Constructor: CANMessage
+ * Creates empty CAN message.
+ */
+ CANMessage() {
+ len = 8;
+ type = CANData;
+ format = CANStandard;
+ id = 0;
+ memset(data, 0, 8);
+ }
+
+ /* Constructor: CANMessage
+ * Creates CAN message with specific content.
+ */
+ CANMessage(int _id, const char *_data, char _len = 8, CANType _type = CANData, CANFormat _format = CANStandard) {
+ len = _len & 0xF;
+ type = _type;
+ format = _format;
+ id = _id;
+ memcpy(data, _data, _len);
+ }
+
+ /* Constructor: CANMessage
+ * Creates CAN remote message.
+ */
+ CANMessage(int _id, CANFormat _format = CANStandard) {
+ len = 0;
+ type = CANRemote;
+ format = _format;
+ id = _id;
+ memset(data, 0, 8);
+ }
+#if 0 // Inhereted from CAN_Message, for documentation only
+
+ /* Variable: id
+ * The message id.
+ *
+ * If format is CANStandard it must be an 11 bit long id
+ * If format is CANExtended it must be an 29 bit long id
+ */
+ unsigned int id;
+
+ /* Variable: data
+ * Space for 8 byte payload.
+ *
+ * If type is CANData data can store up to 8 byte data.
+ */
+ unsigned char data[8];
+
+ /* Variable: len
+ * Length of data in bytes.
+ *
+ * If type is CANData data can store up to 8 byte data.
+ */
+ unsigned char len;
+
+ /* Variable: format
+ * Defines if the message has standard or extended format.
+ *
+ * Defines the type of message id:
+ * Default is CANStandard which implies 11 bit id.
+ * CANExtended means 29 bit message id.
+ */
+ CANFormat format;
+
+ /* Variable: type
+ * Defines the type of a message.
+ *
+ * The message type can rather be CANData for a message with data (default).
+ * Or CANRemote for a request of a specific CAN message.
+ */
+ CANType type; // 0 - DATA FRAME, 1 - REMOTE FRAME
+#endif
+};
+
+/* Class: CAN
+ * A can bus client, used for communicating with can devices
+ */
+class CAN : public Base {
+
+public:
+
+ /* Constructor: CAN
+ * Creates an CAN interface connected to specific pins.
+ *
+ * Example:
+ * > #include "mbed.h"
+ * > #include "CAN.h"
+ * >
+ * > Ticker ticker;
+ * > DigitalOut led1(LED1);
+ * > DigitalOut led2(LED2);
+ * > CAN can1(p9, p10);
+ * > CAN can2(p30, p29);
+ * >
+ * > char counter = 0;
+ * >
+ * > void send() {
+ * > if(can1.write(CANMessage(1337, &counter, 1))) {
+ * > printf("Message sent: %d\n", counter);
+ * > counter++;
+ * > }
+ * > led1 = !led1;
+ * > }
+ * >
+ * > int main() {
+ * > ticker.attach(&send, 1);
+ * > CANMessage msg;
+ * > while(1) {
+ * > if(can2.read(msg)) {
+ * > printf("Message received: %d\n\n", msg.data[0]);
+ * > led2 = !led2;
+ * > }
+ * > wait(0.2);
+ * > }
+ * > }
+ *
+ * Variables:
+ * rd - read from transmitter
+ * td - transmit to transmitter
+ */
+ CAN(PinName rd, PinName td);
+ virtual ~CAN();
+
+ /* Function: frequency
+ * Set the frequency of the CAN interface
+ *
+ * Variables:
+ * hz - The bus frequency in hertz
+ */
+ void frequency(int hz);
+
+ /* Function: write
+ * Write a CANMessage to the bus.
+ *
+ * Variables:
+ * msg - The CANMessage to write.
+ *
+ * Returns:
+ * 0 - If write failed.
+ * 1 - If write was successful.
+ */
+ int write(CANMessage msg);
+
+ /* Function: read
+ * Read a CANMessage from the bus.
+ *
+ * Variables:
+ * msg - A CANMessage to read to.
+ *
+ * Returns:
+ * 0 - If no message arrived.
+ * 1 - If message arrived.
+ */
+ int read(CANMessage &msg);
+
+ /* Function: reset
+ * Reset CAN interface.
+ *
+ * To use after error overflow.
+ */
+ void reset();
+
+ /* Function: rderror
+ * Returns number of read errors to detect read overflow errors.
+ */
+ unsigned char rderror();
+
+ /* Function: tderror
+ * Returns number of write errors to detect write overflow errors.
+ */
+ unsigned char tderror();
+
+private:
+
+ CANName _id;
+};
+
+} // namespace mbed
+
+#endif // MBED_CAN_H
--- a/Debug.h Thu May 14 14:44:00 2009 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,62 +0,0 @@
-/* mbed Microcontroller Library - Debug
- * Copyright (c) 2007-2008, sford
- */
-
-#ifndef MBED_DEBUG_H
-#define MBED_DEBUG_H
-
-#include <cstdio>
-#include <cstdlib>
-#define __ASSERT_MSG
-#include <assert.h>
-
-namespace mbed {
-
-/* Section: debug
- * Error reporting and debugging functions
- */
-
-void mbedinfo(std::FILE *fp = stdout);
-
-#define error(...) (std::fprintf(stderr, __VA_ARGS__), std::abort())
-
-// As seen by user, for documentation purposes only
-#if 0
-/* Function: error
- * Report a fatal runtime error. Attempts to report the specified error message through the
- * USB serial port, then dies with a fatal runtime error (siren lights)
- *
- * Variables:
- * format - printf-style format string, followed by associated variables
- */
-void error(const char* format, ...);
-#endif
-
-void ERROR(const char* format, ...);// __attribute__((deprecated));
-void ASSERT(int condition, const char* format = 0, ...);// __attribute__((deprecated));
-void DEBUG(const char* format, ...);// __attribute__((deprecated));
-
-/* Function: DEBUG_LED1
- * Set the state of LED1
- */
-void DEBUG_LED1(int v);
-
-/* Function: DEBUG_LED2
- * Set the state of LED2
- */
-void DEBUG_LED2(int v);
-
-/* Function: DEBUG_LED3
- * Set the state of LED3
- */
-void DEBUG_LED3(int v);
-
-/* Function: DEBUG_LED4
- * Set the state of LED4
- */
-void DEBUG_LED4(int v);
-
-} // namepsace mbed
-
-#endif
-
--- a/DigitalIn.h Thu May 14 14:44:00 2009 +0000
+++ b/DigitalIn.h Fri Aug 28 12:10:11 2009 +0000
@@ -6,9 +6,10 @@
#ifndef MBED_DIGITALIN_H
#define MBED_DIGITALIN_H
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
#include "Base.h"
-#include "LPC2300.h"
-#include "FunctionPointer.h"
namespace mbed {
@@ -20,8 +21,8 @@
* >
* > #include "mbed.h"
* >
- * > DigitalIn enable(5);
- * > DigitalOut led(1);
+ * > DigitalIn enable(p5);
+ * > DigitalOut led(LED1);
* >
* > int main() {
* > while(1) {
@@ -31,99 +32,56 @@
* > wait(0.25);
* > }
* > }
- *
- * Implementation Note:
- * pin 19 and 20 can not be used with the rise/fall methods
*/
class DigitalIn : public Base {
public:
- /* Constructor: DigitalIn
- * Create a DigitalIn connected to the specified pin
- *
- * Variables:
- * pin - DigitalIn pin to connect to (5-30)
+ /* Constructor: DigitalIn
+ * Create a DigitalIn connected to the specified pin
+ *
+ * Variables:
+ * pin - DigitalIn pin to connect to
* name - (optional) A string to identify the object
- */
- DigitalIn(int pin, const char *name = NULL);
+ */
+ DigitalIn(PinName pin, const char *name = NULL);
- /* Function: read
- * Read the input, represented as 0 or 1 (int)
- *
- * Variables:
- * returns - An integer representing the state of the input pin,
- * 0 for logical 0 (0v) and 1 for logical 1 (3.3v)
- */
- int read();
-
- /* Function: rise
- * Attach a function to call when a rising edge occurs on the input
- *
- * Variables:
- * fptr - A pointer to a void function, or 0 to set as none
- */
- void rise(void (*fptr)(void));
-
- /* Function: rise
- * Attach a member function to call when a rising edge occurs on the input
- *
+ /* Function: read
+ * Read the input, represented as 0 or 1 (int)
+ *
* Variables:
- * tptr - pointer to the object to call the member function on
- * mptr - pointer to the member function to be called
+ * returns - An integer representing the state of the input pin,
+ * 0 for logical 0 and 1 for logical 1
*/
- template<typename T>
- void rise(T* tptr, void (T::*mptr)(void)) {
- _rise.attach(tptr, mptr);
- setup_interrupt(1, 1);
- }
+ int read();
- /* Function: fall
- * Attach a function to call when a falling edge occurs on the input
- *
- * Variables:
- * fptr - A pointer to a void function, or 0 to set as none
- */
- void fall(void (*fptr)(void));
-
- /* Function: fall
- * Attach a member function to call when a falling edge occurs on the input
- *
+ /* Function: mode
+ * Set the input pin mode
+ *
* Variables:
- * tptr - pointer to the object to call the member function on
- * mptr - pointer to the member function to be called
+ * mode - PullUp, PullDown, PullNone
*/
- template<typename T>
- void fall(T* tptr, void (T::*mptr)(void)) {
- _fall.attach(tptr, mptr);
- setup_interrupt(0, 1);
- }
-
+ void mode(PinMode pull);
+
+#ifdef MBED_OPERATORS
/* Function: operator int()
* An operator shorthand for <read()>
*/
- operator int();
-
- // interrupt
- static void _irq();
- static DigitalIn *_irq_objects[48];
+ operator int();
+#endif
- // rpc
+#ifdef MBED_RPC
virtual const struct rpc_method *get_rpc_methods();
static struct rpc_class *get_rpc_class();
+#endif
protected:
- LPC2300::GPIORF* _rf;
- unsigned int _mask;
- int _id;
+ PinName _pin;
- void setup_interrupt(int rising, int enable);
- FunctionPointer _rise;
- FunctionPointer _fall;
};
-}
+} // namespace mbed
#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/DigitalInOut.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,93 @@
+/* mbed Microcontroller Library - DigitalInOut
+ * Copyright (c) 2006-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+#ifndef MBED_DIGITALINOUT_H
+#define MBED_DIGITALINOUT_H
+
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
+#include "Base.h"
+
+namespace mbed {
+
+/* Class: DigitalInOut
+ * A digital input/output, used for setting or reading a bi-directional pin
+ */
+class DigitalInOut : public Base {
+
+public:
+
+ /* Constructor: DigitalInOut
+ * Create a DigitalInOut connected to the specified pin
+ *
+ * Variables:
+ * pin - DigitalInOut pin to connect to
+ */
+ DigitalInOut(PinName pin, const char* name = NULL);
+
+ /* Function: write
+ * Set the output, specified as 0 or 1 (int)
+ *
+ * Variables:
+ * value - An integer specifying the pin output value,
+ * 0 for logical 0 and 1 (or any other non-zero value) for logical 1
+ */
+ void write(int value);
+
+ /* Function: read
+ * Return the output setting, represented as 0 or 1 (int)
+ *
+ * Variables:
+ * returns - An integer representing the output setting of the pin if it is an output,
+ * or read the input if set as an input
+ */
+ int read();
+
+ /* Function: output
+ * Set as an output
+ */
+ void output();
+
+ /* Function: input
+ * Set as an input
+ */
+ void input();
+
+ /* Function: mode
+ * Set the input pin mode
+ *
+ * Variables:
+ * mode - PullUp, PullDown, PullNone
+ */
+ void mode(PinMode pull);
+
+#ifdef MBED_OPERATORS
+ /* Function: operator=
+ * A shorthand for <write>
+ */
+ DigitalInOut& operator= (int v);
+ DigitalInOut& operator= (DigitalInOut& rhs);
+
+ /* Function: operator int()
+ * A shorthand for <read>
+ */
+ operator int();
+#endif
+
+#ifdef MBED_RPC
+ virtual const struct rpc_method *get_rpc_methods();
+ static struct rpc_class *get_rpc_class();
+#endif
+
+protected:
+
+ PinName _pin;
+
+};
+
+} // namespace mbed
+
+#endif
--- a/DigitalOut.h Thu May 14 14:44:00 2009 +0000
+++ b/DigitalOut.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,77 +1,88 @@
/* mbed Microcontroller Library - DigitalOut
- * Copyright (c) 2007-2008, sford
- */
+ * Copyright (c) 2006-2009 ARM Limited. All rights reserved.
+ * sford
+ */
#ifndef MBED_DIGITALOUT_H
#define MBED_DIGITALOUT_H
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
#include "Base.h"
-#include "LPC2300.h"
namespace mbed {
/* Class: DigitalOut
* A digital output, used for setting the state of a pin
+ *
+ * Example:
+ * > // Toggle a LED
+ * > #include "mbed.h"
+ * >
+ * > DigitalOut led(LED1);
+ * >
+ * > int main() {
+ * > while(1) {
+ * > led = !led;
+ * > wait(0.2);
+ * > }
+ * > }
*/
class DigitalOut : public Base {
public:
- /* Group: Configuration Methods */
-
- /* Constructor: DigitalOut
- * Create a DigitalOut connected to the specified pin
- *
- * Variables:
- * pin - DigitalOut pin to connect to (5-30)
- */
- DigitalOut(int pin, const char* name = NULL);
+ /* Constructor: DigitalOut
+ * Create a DigitalOut connected to the specified pin
+ *
+ * Variables:
+ * pin - DigitalOut pin to connect to
+ */
+ DigitalOut(PinName pin, const char* name = NULL);
- /* Group: Access Methods */
-
- /* Function: write
- * Set the output, specified as 0 or 1 (int)
- *
- * Variables:
- * value - An integer specifying the pin output value,
- * 0 for logical 0 (0v) and 1 (or any other non-zero value) for logical 1 (3.3v).
- */
+ /* Function: write
+ * Set the output, specified as 0 or 1 (int)
+ *
+ * Variables:
+ * value - An integer specifying the pin output value,
+ * 0 for logical 0 and 1 (or any other non-zero value) for logical 1
+ */
void write(int value);
- /* Function: read
- * Return the output setting, represented as 0 or 1 (int)
- *
- * Variables:
- * returns - An integer representing the output setting of the pin,
- * 0 for logical 0 (0v) and 1 for logical 1 (3.3v)
- */
+ /* Function: read
+ * Return the output setting, represented as 0 or 1 (int)
+ *
+ * Variables:
+ * returns - An integer representing the output setting of the pin,
+ * 0 for logical 0 and 1 for logical 1
+ */
int read();
- virtual const struct rpc_method *get_rpc_methods();
- static struct rpc_class *get_rpc_class();
-
- /* Group: Access Method Shorthand */
-
- /* Function: operator=
- * A shorthand for <write>
- */
- DigitalOut& operator= (int v);
- DigitalOut& operator= (DigitalOut& rhs);
-
+#ifdef MBED_OPERATORS
+ /* Function: operator=
+ * A shorthand for <write>
+ */
+ DigitalOut& operator= (int value);
+ DigitalOut& operator= (DigitalOut& rhs);
+
/* Function: operator int()
* A shorthand for <read>
*/
- operator int();
+ operator int();
+#endif
+
+#ifdef MBED_RPC
+ virtual const struct rpc_method *get_rpc_methods();
+ static struct rpc_class *get_rpc_class();
+#endif
protected:
-
- LPC2300::GPIORF* _rf;
- unsigned int _mask;
- int _id;
-
+
+ PinName _pin;
+
};
-}
+} // namespace mbed
-#endif
-
+#endif
--- a/DirHandle.h Thu May 14 14:44:00 2009 +0000
+++ b/DirHandle.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,5 +1,8 @@
-/* Copyright 2008 ARM Limited. All rights reserved. */
-
+/* mbed Microcontroller Library - DirHandler
+ * Copyright (c) 2008-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
#ifndef MBED_DIRHANDLE_H
#define MBED_DIRHANDLE_H
@@ -46,10 +49,10 @@
* Return the directory entry at the current position, and
* advances the position to the next entry.
*
- * Variables
- * returns - A pointer to a dirent structure representing the
- * directory entry at the current position, or NULL on reaching
- * end of directory or error.
+ * Returns
+ * A pointer to a dirent structure representing the
+ * directory entry at the current position, or NULL on reaching
+ * end of directory or error.
*/
virtual struct dirent *readdir()=0;
@@ -61,8 +64,8 @@
/* Function telldir
* Returns the current position of the DirHandle.
*
- * Variables
- * returns - The current position, or -1 on error.
+ * Returns
+ * The current position, or -1 on error.
*/
virtual off_t telldir() { return -1; }
@@ -77,7 +80,7 @@
};
-} /* namespace mbed */
+} // namespace mbed
typedef mbed::DirHandle DIR;
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Ethernet.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,130 @@
+/* mbed Microcontroller Library - Ethernet
+ * Copyright (c) 2009 ARM Limited. All rights reserved.
+ * sford, rmeyer
+ */
+
+#ifndef MBED_ETHERNET_H
+#define MBED_ETHERNET_H
+
+#include "Base.h"
+
+namespace mbed {
+
+/* Class: Ethernet
+ * An ethernet interface, to use with the ethernet pins.
+ *
+ * Example:
+ * > // Read destination and source from every ethernet packet
+ * >
+ * > #include "mbed.h"
+ * >
+ * > Ethernet eth;
+ * >
+ * > int main() {
+ * > char buf[0x600];
+ * >
+ * > while(1) {
+ * > int size = eth.receive();
+ * > if(size > 0) {
+ * > eth.read(buf, size);
+ * > printf("Destination: %02X:%02X:%02X:%02X:%02X:%02X\n",
+ * > buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+ * > printf("Source: %02X:%02X:%02X:%02X:%02X:%02X\n",
+ * > buf[6], buf[7], buf[8], buf[9], buf[10], buf[11]);
+ * > }
+ * >
+ * > wait(1);
+ * > }
+ * > }
+ *
+ */
+class Ethernet : public Base {
+
+public:
+
+ /* Constructor: Ethernet
+ * Initialise the ethernet interface.
+ */
+ Ethernet();
+
+ /* Destructor: Ethernet
+ * Powers the hardware down.
+ */
+ virtual ~Ethernet();
+
+ /* Function: write
+ * Writes into an outgoing ethernet packet.
+ *
+ * It will append size bytes of data to the previously written bytes.
+ *
+ * Variables:
+ * data - An array to write.
+ * size - The size of data.
+ *
+ * Returns:
+ * The number of written bytes.
+ */
+ int write(const char *data, int size);
+
+ /* Function: send
+ * Send an outgoing ethernet packet.
+ *
+ * After filling in the data in an ethernet packet it must be send.
+ * Send will provide a new packet to write to.
+ *
+ * Returns:
+ * 0 - If the sending was failed.
+ * 1 - If the package is successfully sent.
+ */
+ int send();
+
+ /* Function: receive
+ * Recevies an arrived ethernet packet.
+ *
+ * Receiving an ethernet packet will drop the last received ethernet packet
+ * and make a new ethernet packet ready to read.
+ * If no ethernet packet is arrived it will return 0.
+ *
+ * Returns:
+ * 0 - If no ethernet packet is arrived.
+ * The size of the arrived packet.
+ */
+ int receive();
+
+ /* Function: read
+ * Read from an recevied ethernet packet.
+ *
+ * After receive returnd a number bigger than 0it is
+ * possible to read bytes from this packet.
+ * Read will write up to size bytes into data.
+ *
+ * It is possible to use read multible times.
+ * Each time read will start reading after the last read byte before.
+ *
+ * Returns:
+ * The number of byte read.
+ */
+ int read(char *data, int size);
+
+ /* Function: address
+ * Gives the ethernet address of the mbed.
+ *
+ * Variables:
+ * mac - Must be a pointer to a 6 byte char array to copy the ethernet address in.
+ */
+ void address(char *mac);
+
+ /* Function: link
+ * Returns if an ethernet link is pressent or not.
+ *
+ * Returns:
+ * 0 - If no ethernet link is pressent.
+ * 1 - If an ethernet link is pressent.
+ */
+ int link();
+
+};
+
+} // namespace mbed
+
+#endif
--- a/FileHandle.h Thu May 14 14:44:00 2009 +0000 +++ b/FileHandle.h Fri Aug 28 12:10:11 2009 +0000 @@ -1,7 +1,8 @@ -/* mbed Microcontroller Library - FileHandle - * Copyright (c) 2007-2008, sford - */ - +/* mbed Microcontroller Library - FileHandler + * Copyright (c) 2007-2009 ARM Limited. All rights reserved. + * sford + */ + #ifndef MBED_FILEHANDLE_H #define MBED_FILEHANDLE_H
--- a/FileLike.h Thu May 14 14:44:00 2009 +0000 +++ b/FileLike.h Fri Aug 28 12:10:11 2009 +0000 @@ -1,5 +1,8 @@ -/* Copyright 2008 ARM Limited. All rights reserved. */ - +/* mbed Microcontroller Library - FileLike + * Copyright (c) 2008-2009 ARM Limited. All rights reserved. + * sford + */ + #ifndef MBED_FILELIKE_H #define MBED_FILELIKE_H
--- a/FileSystemLike.h Thu May 14 14:44:00 2009 +0000 +++ b/FileSystemLike.h Fri Aug 28 12:10:11 2009 +0000 @@ -1,5 +1,8 @@ -/* Copyright 2008 ARM Limited. All rights reserved. */ - +/* mbed Microcontroller Library - FileSystemLike + * Copyright (c) 2008-2009 ARM Limited. All rights reserved. + * sford + */ + #ifndef MBED_FILESYSTEMLIKE_H #define MBED_FILESYSTEMLIKE_H
--- a/FunctionPointer.h Thu May 14 14:44:00 2009 +0000 +++ b/FunctionPointer.h Fri Aug 28 12:10:11 2009 +0000 @@ -1,7 +1,8 @@ /* mbed Microcontroller Library - FunctionPointer - * Copyright (c) 2007-2008, sford - */ - + * Copyright (c) 2007-2009 ARM Limited. All rights reserved. + * sford + */ + #ifndef MBED_FUNCTIONPOINTER_H #define MBED_FUNCTIONPOINTER_H @@ -81,6 +82,6 @@ }; -} +} // namespace mbed #endif
--- a/I2C.h Thu May 14 14:44:00 2009 +0000
+++ b/I2C.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,80 +1,88 @@
/* mbed Microcontroller Library - I2C
- * Copyright (c) 2007-2008, sford
- */
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford
+ */
#ifndef MBED_I2C_H
#define MBED_I2C_H
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
#include "Base.h"
namespace mbed {
/* Class: I2C
* An I2C Master, used for communicating with I2C slave devices
+ *
+ * Example:
+ * > // Read from I2C slave at address 0x1234
+ * >
+ * > #include "mbed.h"
+ * >
+ * > I2C i2c(p28, p27);
+ * >
+ * > int main() {
+ * > int address = 0x1234;
+ * > char data[2];
+ * > i2c.read(address,data,2);
+ * > // ...
+ * > }
*/
class I2C : public Base {
public:
- /* Group: Configuration Methods */
+ /* Constructor: I2C
+ * Create an I2C Master interface, connected to the specified pins
+ *
+ * Variables:
+ * sda - I2C data line pin
+ * scl - I2C clock line pin
+ */
+ I2C(PinName sda, PinName scl, const char *name = NULL);
- /* Constructor: I2C
- * Create an I2C Master interface, connected to the specified pins
- *
- * Variables:
- * sda - I2C data line pin
- * scl - I2C clock line pin
+ /* Function: frequency
+ * Set the frequency of the I2C interface
+ *
+ * Variables:
+ * hz - The bus frequency in hertz
+ */
+ void frequency(int hz);
+
+ /* Function: read
+ * Read from an I2C slave
*
- * Pin Options:
- * (9, 10) or (28, 27)
- */
- I2C(int sda, int scl, const char *name = NULL);
-
- /* Function: frequency
- * Set the frequency of the I2C interface
- *
- * Variables:
- * hz - The bus frequency in hertz
- */
- void frequency(int hz);
-
- /* Group: Access Methods */
-
- /* Function: read
- * Read from an I2C slave
- *
- * Variables:
- * address - 7-bit I2C slave address (0-127)
- * data - Pointer to the byte-array to read data in to
- * length - Number of bytes to read
- */
- void read(int address, char* data, int length);
+ * Variables:
+ * address - 7-bit I2C slave address (0-127)
+ * data - Pointer to the byte-array to read data in to
+ * length - Number of bytes to read
+ * returns - 0 on success (ack), or 1 on failure (nack)
+ */
+ int read(int address, char *data, int length);
- /* Function: write
- * Write to an I2C slave
- *
- * Variables:
- * address - 7-bit I2C slave address (0-127)
- * data - Pointer to the byte-array data to send
- * length - Number of bytes to send
- */
- void write(int address, char* data, int length);
-
+ /* Function: write
+ * Write to an I2C slave
+ *
+ * Variables:
+ * address - 7-bit I2C slave address (0-127)
+ * data - Pointer to the byte-array data to send
+ * length - Number of bytes to send
+ * returns - 0 on success (ack), or 1 on failure (nack)
+ */
+ int write(int address, const char *data, int length);
+
protected:
- void configure();
-
- int _id;
+ I2CName _i2c;
+
+ void aquire();
+ static I2C *_owner;
+ int _hz;
- int _uid;
- static int _uidcounter;
-
- int _hz;
- static int _config[3];
-
};
-}
+} // namespace mbed
#endif
-
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/InterruptIn.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,125 @@
+/* mbed Microcontroller Library - InterruptIn
+ * Copyright (c) 2006-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+#ifndef MBED_INTERRUPTIN_H
+#define MBED_INTERRUPTIN_H
+
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
+#include "Base.h"
+#include "FunctionPointer.h"
+
+namespace mbed {
+
+/* Class: InterruptIn
+ * A digital interrupt input, used to call a function on a rising or falling edge
+ *
+ * Example:
+ * > // Flash an LED while waiting for events
+ * >
+ * > #include "mbed.h"
+ * >
+ * > InterruptIn event(p16);
+ * > DigitalOut led(LED1);
+ * >
+ * > void trigger() {
+ * > printf("triggered!\n");
+ * > }
+ * >
+ * > int main() {
+ * > event.rise(&trigger);
+ * > while(1) {
+ * > led = !led;
+ * > wait(0.25);
+ * > }
+ * > }
+ */
+class InterruptIn : public Base {
+
+public:
+
+ /* Constructor: InterruptIn
+ * Create an InterruptIn connected to the specified pin
+ *
+ * Variables:
+ * pin - InterruptIn pin to connect to
+ * name - (optional) A string to identify the object
+ */
+ InterruptIn(PinName pin, const char *name = NULL);
+
+ int read();
+#ifdef MBED_OPERATORS
+ operator int();
+
+#endif
+
+ /* Function: rise
+ * Attach a function to call when a rising edge occurs on the input
+ *
+ * Variables:
+ * fptr - A pointer to a void function, or 0 to set as none
+ */
+ void rise(void (*fptr)(void));
+
+ /* Function: rise
+ * Attach a member function to call when a rising edge occurs on the input
+ *
+ * Variables:
+ * tptr - pointer to the object to call the member function on
+ * mptr - pointer to the member function to be called
+ */
+ template<typename T>
+ void rise(T* tptr, void (T::*mptr)(void)) {
+ _rise.attach(tptr, mptr);
+ setup_interrupt(1, 1);
+ }
+
+ /* Function: fall
+ * Attach a function to call when a falling edge occurs on the input
+ *
+ * Variables:
+ * fptr - A pointer to a void function, or 0 to set as none
+ */
+ void fall(void (*fptr)(void));
+
+ /* Function: fall
+ * Attach a member function to call when a falling edge occurs on the input
+ *
+ * Variables:
+ * tptr - pointer to the object to call the member function on
+ * mptr - pointer to the member function to be called
+ */
+ template<typename T>
+ void fall(T* tptr, void (T::*mptr)(void)) {
+ _fall.attach(tptr, mptr);
+ setup_interrupt(0, 1);
+ }
+
+ /* Function: mode
+ * Set the input pin mode
+ *
+ * Variables:
+ * mode - PullUp, PullDown, PullNone
+ */
+ void mode(PinMode pull);
+
+
+ static void _irq();
+ static InterruptIn *_irq_objects[48];
+
+protected:
+
+ PinName _pin;
+ FunctionPointer _rise;
+ FunctionPointer _fall;
+
+ void setup_interrupt(int rising, int enable);
+
+};
+
+} // namespace mbed
+
+#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC1768/LPC1768.sct Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,12 @@
+
+LR_IROM1 0x00000000 0x80000 { ; load region size_region
+ ER_IROM1 0x00000000 0x80000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x10000000 0x8000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC1768/LPC17xx.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,968 @@
+/******************************************************************************
+ * @file: LPC17xx.h
+ * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File for
+ * NXP LPC17xx Device Series
+ * @version: V1.04
+ * @date: 2. July 2009
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (C) 2008 ARM Limited. All rights reserved.
+ *
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M3
+ * processor based microcontrollers. This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ ******************************************************************************/
+
+
+#ifndef __LPC17xx_H__
+#define __LPC17xx_H__
+
+/*
+ * ==========================================================================
+ * ---------- Interrupt Number Definition -----------------------------------
+ * ==========================================================================
+ */
+
+typedef enum IRQn
+{
+/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
+ NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
+ MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
+ BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
+ UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
+ SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
+ DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
+ PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
+ SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
+
+/****** LPC17xx Specific Interrupt Numbers *******************************************************/
+ WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */
+ TIMER0_IRQn = 1, /*!< Timer0 Interrupt */
+ TIMER1_IRQn = 2, /*!< Timer1 Interrupt */
+ TIMER2_IRQn = 3, /*!< Timer2 Interrupt */
+ TIMER3_IRQn = 4, /*!< Timer3 Interrupt */
+ UART0_IRQn = 5, /*!< UART0 Interrupt */
+ UART1_IRQn = 6, /*!< UART1 Interrupt */
+ UART2_IRQn = 7, /*!< UART2 Interrupt */
+ UART3_IRQn = 8, /*!< UART3 Interrupt */
+ PWM1_IRQn = 9, /*!< PWM1 Interrupt */
+ I2C0_IRQn = 10, /*!< I2C0 Interrupt */
+ I2C1_IRQn = 11, /*!< I2C1 Interrupt */
+ I2C2_IRQn = 12, /*!< I2C2 Interrupt */
+ SPI_IRQn = 13, /*!< SPI Interrupt */
+ SSP0_IRQn = 14, /*!< SSP0 Interrupt */
+ SSP1_IRQn = 15, /*!< SSP1 Interrupt */
+ PLL0_IRQn = 16, /*!< PLL0 Lock (Main PLL) Interrupt */
+ RTC_IRQn = 17, /*!< Real Time Clock Interrupt */
+ EINT0_IRQn = 18, /*!< External Interrupt 0 Interrupt */
+ EINT1_IRQn = 19, /*!< External Interrupt 1 Interrupt */
+ EINT2_IRQn = 20, /*!< External Interrupt 2 Interrupt */
+ EINT3_IRQn = 21, /*!< External Interrupt 3 Interrupt */
+ ADC_IRQn = 22, /*!< A/D Converter Interrupt */
+ BOD_IRQn = 23, /*!< Brown-Out Detect Interrupt */
+ USB_IRQn = 24, /*!< USB Interrupt */
+ CAN_IRQn = 25, /*!< CAN Interrupt */
+ DMA_IRQn = 26, /*!< General Purpose DMA Interrupt */
+ I2S_IRQn = 27, /*!< I2S Interrupt */
+ ENET_IRQn = 28, /*!< Ethernet Interrupt */
+ RIT_IRQn = 29, /*!< Repetitive Interrupt Timer Interrupt */
+ MCPWM_IRQn = 30, /*!< Motor Control PWM Interrupt */
+ QEI_IRQn = 31, /*!< Quadrature Encoder Interface Interrupt */
+ PLL1_IRQn = 32, /*!< PLL1 Lock (USB PLL) Interrupt */
+} IRQn_Type;
+
+
+/*
+ * ==========================================================================
+ * ----------- Processor and Core Peripheral Section ------------------------
+ * ==========================================================================
+ */
+
+/* Configuration of the Cortex-M3 Processor and Core Peripherals */
+#define __MPU_PRESENT 1 /*!< MPU present or not */
+#define __NVIC_PRIO_BITS 5 /*!< Number of Bits used for Priority Levels */
+#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
+
+
+#include <core_cm3.h> /* Cortex-M3 processor and core peripherals */
+#include "system_LPC17xx.h" /* System Header */
+
+
+/******************************************************************************/
+/* Device Specific Peripheral registers structures */
+/******************************************************************************/
+
+#if defined ( __CC_ARM )
+#pragma anon_unions
+#endif
+
+/*------------- System Control (SC) ------------------------------------------*/
+typedef struct
+{
+ __IO uint32_t FLASHCFG; /* Flash Accelerator Module */
+ uint32_t RESERVED0[31];
+ __IO uint32_t PLL0CON; /* Clocking and Power Control */
+ __IO uint32_t PLL0CFG;
+ __I uint32_t PLL0STAT;
+ __O uint32_t PLL0FEED;
+ uint32_t RESERVED1[4];
+ __IO uint32_t PLL1CON;
+ __IO uint32_t PLL1CFG;
+ __I uint32_t PLL1STAT;
+ __O uint32_t PLL1FEED;
+ uint32_t RESERVED2[4];
+ __IO uint32_t PCON;
+ __IO uint32_t PCONP;
+ uint32_t RESERVED3[15];
+ __IO uint32_t CCLKCFG;
+ __IO uint32_t USBCLKCFG;
+ __IO uint32_t CLKSRCSEL;
+ uint32_t RESERVED4[12];
+ __IO uint32_t EXTINT; /* External Interrupts */
+ uint32_t RESERVED5;
+ __IO uint32_t EXTMODE;
+ __IO uint32_t EXTPOLAR;
+ uint32_t RESERVED6[12];
+ __IO uint32_t RSID; /* Reset */
+ uint32_t RESERVED7[7];
+ __IO uint32_t SCS; /* Syscon Miscellaneous Registers */
+ __IO uint32_t IRCTRIM; /* Clock Dividers */
+ __IO uint32_t PCLKSEL0;
+ __IO uint32_t PCLKSEL1;
+ uint32_t RESERVED8[4];
+ __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */
+ uint32_t RESERVED9;
+ __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */
+ } LPC_SC_TypeDef;
+
+/*------------- Pin Connect Block (PINCON) -----------------------------------*/
+typedef struct
+{
+ __IO uint32_t PINSEL0;
+ __IO uint32_t PINSEL1;
+ __IO uint32_t PINSEL2;
+ __IO uint32_t PINSEL3;
+ __IO uint32_t PINSEL4;
+ __IO uint32_t PINSEL5;
+ __IO uint32_t PINSEL6;
+ __IO uint32_t PINSEL7;
+ __IO uint32_t PINSEL8;
+ __IO uint32_t PINSEL9;
+ __IO uint32_t PINSEL10;
+ uint32_t RESERVED0[5];
+ __IO uint32_t PINMODE0;
+ __IO uint32_t PINMODE1;
+ __IO uint32_t PINMODE2;
+ __IO uint32_t PINMODE3;
+ __IO uint32_t PINMODE4;
+ __IO uint32_t PINMODE5;
+ __IO uint32_t PINMODE6;
+ __IO uint32_t PINMODE7;
+ __IO uint32_t PINMODE8;
+ __IO uint32_t PINMODE9;
+ __IO uint32_t PINMODE_OD0;
+ __IO uint32_t PINMODE_OD1;
+ __IO uint32_t PINMODE_OD2;
+ __IO uint32_t PINMODE_OD3;
+ __IO uint32_t PINMODE_OD4;
+ __IO uint32_t I2CPADCFG;
+} LPC_PINCON_TypeDef;
+
+/*------------- General Purpose Input/Output (GPIO) --------------------------*/
+typedef struct
+{
+ __IO uint32_t FIODIR;
+ uint32_t RESERVED0[3];
+ __IO uint32_t FIOMASK;
+ __IO uint32_t FIOPIN;
+ __IO uint32_t FIOSET;
+ __O uint32_t FIOCLR;
+} LPC_GPIO_TypeDef;
+
+typedef struct
+{
+ __I uint32_t IntStatus;
+ __I uint32_t IO0IntStatR;
+ __I uint32_t IO0IntStatF;
+ __O uint32_t IO0IntClr;
+ __IO uint32_t IO0IntEnR;
+ __IO uint32_t IO0IntEnF;
+ uint32_t RESERVED0[3];
+ __I uint32_t IO2IntStatR;
+ __I uint32_t IO2IntStatF;
+ __O uint32_t IO2IntClr;
+ __IO uint32_t IO2IntEnR;
+ __IO uint32_t IO2IntEnF;
+} LPC_GPIOINT_TypeDef;
+
+/*------------- Timer (TIM) --------------------------------------------------*/
+typedef struct
+{
+ __IO uint32_t IR;
+ __IO uint32_t TCR;
+ __IO uint32_t TC;
+ __IO uint32_t PR;
+ __IO uint32_t PC;
+ __IO uint32_t MCR;
+ __IO uint32_t MR0;
+ __IO uint32_t MR1;
+ __IO uint32_t MR2;
+ __IO uint32_t MR3;
+ __IO uint32_t CCR;
+ __I uint32_t CR0;
+ __I uint32_t CR1;
+ uint32_t RESERVED0[2];
+ __IO uint32_t EMR;
+ uint32_t RESERVED1[24];
+ __IO uint32_t CTCR;
+} LPC_TIM_TypeDef;
+
+/*------------- Pulse-Width Modulation (PWM) ---------------------------------*/
+typedef struct
+{
+ __IO uint32_t IR;
+ __IO uint32_t TCR;
+ __IO uint32_t TC;
+ __IO uint32_t PR;
+ __IO uint32_t PC;
+ __IO uint32_t MCR;
+ __IO uint32_t MR0;
+ __IO uint32_t MR1;
+ __IO uint32_t MR2;
+ __IO uint32_t MR3;
+ __IO uint32_t CCR;
+ __I uint32_t CR0;
+ __I uint32_t CR1;
+ __I uint32_t CR2;
+ __I uint32_t CR3;
+ uint32_t RESERVED0;
+ __IO uint32_t MR4;
+ __IO uint32_t MR5;
+ __IO uint32_t MR6;
+ __IO uint32_t PCR;
+ __IO uint32_t LER;
+ uint32_t RESERVED1[7];
+ __IO uint32_t CTCR;
+} LPC_PWM_TypeDef;
+
+/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
+typedef struct
+{
+ union {
+ __I uint8_t RBR;
+ __O uint8_t THR;
+ __IO uint8_t DLL;
+ uint32_t RESERVED0;
+ };
+ union {
+ __IO uint8_t DLM;
+ __IO uint32_t IER;
+ };
+ union {
+ __I uint32_t IIR;
+ __O uint8_t FCR;
+ };
+ __IO uint8_t LCR;
+ uint8_t RESERVED1[7];
+ __I uint8_t LSR;
+ uint8_t RESERVED2[7];
+ __IO uint8_t SCR;
+ uint8_t RESERVED3[3];
+ __IO uint32_t ACR;
+ __IO uint8_t ICR;
+ uint8_t RESERVED4[3];
+ __IO uint8_t FDR;
+ uint8_t RESERVED5[7];
+ __IO uint8_t TER;
+ uint8_t RESERVED6[39];
+ __I uint8_t FIFOLVL;
+} LPC_UART_TypeDef;
+
+typedef struct
+{
+ union {
+ __I uint8_t RBR;
+ __O uint8_t THR;
+ __IO uint8_t DLL;
+ uint32_t RESERVED0;
+ };
+ union {
+ __IO uint8_t DLM;
+ __IO uint32_t IER;
+ };
+ union {
+ __I uint32_t IIR;
+ __O uint8_t FCR;
+ };
+ __IO uint8_t LCR;
+ uint8_t RESERVED1[7];
+ __I uint8_t LSR;
+ uint8_t RESERVED2[7];
+ __IO uint8_t SCR;
+ uint8_t RESERVED3[3];
+ __IO uint32_t ACR;
+ __IO uint8_t ICR;
+ uint8_t RESERVED4[3];
+ __IO uint8_t FDR;
+ uint8_t RESERVED5[7];
+ __IO uint8_t TER;
+ uint8_t RESERVED6[39];
+ __I uint8_t FIFOLVL;
+ uint8_t RESERVED7[363];
+ __IO uint32_t DMAREQSEL;
+} LPC_UART0_TypeDef;
+
+typedef struct
+{
+ union {
+ __I uint8_t RBR;
+ __O uint8_t THR;
+ __IO uint8_t DLL;
+ uint32_t RESERVED0;
+ };
+ union {
+ __IO uint8_t DLM;
+ __IO uint32_t IER;
+ };
+ union {
+ __I uint32_t IIR;
+ __O uint8_t FCR;
+ };
+ __IO uint8_t LCR;
+ uint8_t RESERVED1[3];
+ __IO uint8_t MCR;
+ uint8_t RESERVED2[3];
+ __I uint8_t LSR;
+ uint8_t RESERVED3[3];
+ __I uint8_t MSR;
+ uint8_t RESERVED4[3];
+ __IO uint8_t SCR;
+ uint8_t RESERVED5[3];
+ __IO uint32_t ACR;
+ uint32_t RESERVED6;
+ __IO uint32_t FDR;
+ uint32_t RESERVED7;
+ __IO uint8_t TER;
+ uint8_t RESERVED8[27];
+ __IO uint8_t RS485CTRL;
+ uint8_t RESERVED9[3];
+ __IO uint8_t ADRMATCH;
+ uint8_t RESERVED10[3];
+ __IO uint8_t RS485DLY;
+ uint8_t RESERVED11[3];
+ __I uint8_t FIFOLVL;
+} LPC_UART1_TypeDef;
+
+/*------------- Serial Peripheral Interface (SPI) ----------------------------*/
+typedef struct
+{
+ __IO uint32_t SPCR;
+ __I uint32_t SPSR;
+ __IO uint32_t SPDR;
+ __IO uint32_t SPCCR;
+ uint32_t RESERVED0[3];
+ __IO uint32_t SPINT;
+} LPC_SPI_TypeDef;
+
+/*------------- Synchronous Serial Communication (SSP) -----------------------*/
+typedef struct
+{
+ __IO uint32_t CR0;
+ __IO uint32_t CR1;
+ __IO uint32_t DR;
+ __I uint32_t SR;
+ __IO uint32_t CPSR;
+ __IO uint32_t IMSC;
+ __IO uint32_t RIS;
+ __IO uint32_t MIS;
+ __IO uint32_t ICR;
+ __IO uint32_t DMACR;
+} LPC_SSP_TypeDef;
+
+/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
+typedef struct
+{
+ __IO uint32_t I2CONSET;
+ __I uint32_t I2STAT;
+ __IO uint32_t I2DAT;
+ __IO uint32_t I2ADR0;
+ __IO uint32_t I2SCLH;
+ __IO uint32_t I2SCLL;
+ __O uint32_t I2CONCLR;
+ __IO uint32_t MMCTRL;
+ __IO uint32_t I2ADR1;
+ __IO uint32_t I2ADR2;
+ __IO uint32_t I2ADR3;
+ __I uint32_t I2DATA_BUFFER;
+ __IO uint32_t I2MASK0;
+ __IO uint32_t I2MASK1;
+ __IO uint32_t I2MASK2;
+ __IO uint32_t I2MASK3;
+} LPC_I2C_TypeDef;
+
+/*------------- Inter IC Sound (I2S) -----------------------------------------*/
+typedef struct
+{
+ __IO uint32_t I2SDAO;
+ __IO uint32_t I2SDAI;
+ __O uint32_t I2STXFIFO;
+ __I uint32_t I2SRXFIFO;
+ __I uint32_t I2SSTATE;
+ __IO uint32_t I2SDMA1;
+ __IO uint32_t I2SDMA2;
+ __IO uint32_t I2SIRQ;
+ __IO uint32_t I2STXRATE;
+ __IO uint32_t I2SRXRATE;
+ __IO uint32_t I2STXBITRATE;
+ __IO uint32_t I2SRXBITRATE;
+ __IO uint32_t I2STXMODE;
+ __IO uint32_t I2SRXMODE;
+} LPC_I2S_TypeDef;
+
+/*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/
+typedef struct
+{
+ __IO uint32_t RICOMPVAL;
+ __IO uint32_t RIMASK;
+ __IO uint8_t RICTRL;
+ uint8_t RESERVED0[3];
+ __IO uint32_t RICOUNTER;
+} LPC_RIT_TypeDef;
+
+/*------------- Real-Time Clock (RTC) ----------------------------------------*/
+typedef struct
+{
+ __IO uint8_t ILR;
+ uint8_t RESERVED0[7];
+ __IO uint8_t CCR;
+ uint8_t RESERVED1[3];
+ __IO uint8_t CIIR;
+ uint8_t RESERVED2[3];
+ __IO uint8_t AMR;
+ uint8_t RESERVED3[3];
+ __I uint32_t CTIME0;
+ __I uint32_t CTIME1;
+ __I uint32_t CTIME2;
+ __IO uint8_t SEC;
+ uint8_t RESERVED4[3];
+ __IO uint8_t MIN;
+ uint8_t RESERVED5[3];
+ __IO uint8_t HOUR;
+ uint8_t RESERVED6[3];
+ __IO uint8_t DOM;
+ uint8_t RESERVED7[3];
+ __IO uint8_t DOW;
+ uint8_t RESERVED8[3];
+ __IO uint16_t DOY;
+ uint16_t RESERVED9;
+ __IO uint8_t MONTH;
+ uint8_t RESERVED10[3];
+ __IO uint16_t YEAR;
+ uint16_t RESERVED11;
+ __IO uint32_t CALIBRATION;
+ __IO uint32_t GPREG0;
+ __IO uint32_t GPREG1;
+ __IO uint32_t GPREG2;
+ __IO uint32_t GPREG3;
+ __IO uint32_t GPREG4;
+ __IO uint8_t RTC_AUXEN;
+ uint8_t RESERVED12[3];
+ __IO uint8_t RTC_AUX;
+ uint8_t RESERVED13[3];
+ __IO uint8_t ALSEC;
+ uint8_t RESERVED14[3];
+ __IO uint8_t ALMIN;
+ uint8_t RESERVED15[3];
+ __IO uint8_t ALHOUR;
+ uint8_t RESERVED16[3];
+ __IO uint8_t ALDOM;
+ uint8_t RESERVED17[3];
+ __IO uint8_t ALDOW;
+ uint8_t RESERVED18[3];
+ __IO uint16_t ALDOY;
+ uint16_t RESERVED19;
+ __IO uint8_t ALMON;
+ uint8_t RESERVED20[3];
+ __IO uint16_t ALYEAR;
+ uint16_t RESERVED21;
+} LPC_RTC_TypeDef;
+
+/*------------- Watchdog Timer (WDT) -----------------------------------------*/
+typedef struct
+{
+ __IO uint8_t WDMOD;
+ uint8_t RESERVED0[3];
+ __IO uint32_t WDTC;
+ __O uint8_t WDFEED;
+ uint8_t RESERVED1[3];
+ __I uint32_t WDTV;
+ __IO uint32_t WDCLKSEL;
+} LPC_WDT_TypeDef;
+
+/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/
+typedef struct
+{
+ __IO uint32_t ADCR;
+ __IO uint32_t ADGDR;
+ uint32_t RESERVED0;
+ __IO uint32_t ADINTEN;
+ __I uint32_t ADDR0;
+ __I uint32_t ADDR1;
+ __I uint32_t ADDR2;
+ __I uint32_t ADDR3;
+ __I uint32_t ADDR4;
+ __I uint32_t ADDR5;
+ __I uint32_t ADDR6;
+ __I uint32_t ADDR7;
+ __I uint32_t ADSTAT;
+ __IO uint32_t ADTRM;
+} LPC_ADC_TypeDef;
+
+/*------------- Digital-to-Analog Converter (DAC) ----------------------------*/
+typedef struct
+{
+ __IO uint32_t DACR;
+ __IO uint32_t DACCTRL;
+ __IO uint16_t DACCNTVAL;
+} LPC_DAC_TypeDef;
+
+/*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/
+typedef struct
+{
+ __I uint32_t MCCON;
+ __O uint32_t MCCON_SET;
+ __O uint32_t MCCON_CLR;
+ __I uint32_t MCCAPCON;
+ __O uint32_t MCCAPCON_SET;
+ __O uint32_t MCCAPCON_CLR;
+ __IO uint32_t MCTIM0;
+ __IO uint32_t MCTIM1;
+ __IO uint32_t MCTIM2;
+ __IO uint32_t MCPER0;
+ __IO uint32_t MCPER1;
+ __IO uint32_t MCPER2;
+ __IO uint32_t MCPW0;
+ __IO uint32_t MCPW1;
+ __IO uint32_t MCPW2;
+ __IO uint32_t MCDEADTIME;
+ __IO uint32_t MCCCP;
+ __IO uint32_t MCCR0;
+ __IO uint32_t MCCR1;
+ __IO uint32_t MCCR2;
+ __I uint32_t MCINTEN;
+ __O uint32_t MCINTEN_SET;
+ __O uint32_t MCINTEN_CLR;
+ __I uint32_t MCCNTCON;
+ __O uint32_t MCCNTCON_SET;
+ __O uint32_t MCCNTCON_CLR;
+ __I uint32_t MCINTFLAG;
+ __O uint32_t MCINTFLAG_SET;
+ __O uint32_t MCINTFLAG_CLR;
+ __O uint32_t MCCAP_CLR;
+} LPC_MCPWM_TypeDef;
+
+/*------------- Quadrature Encoder Interface (QEI) ---------------------------*/
+typedef struct
+{
+ __O uint32_t QEICON;
+ __I uint32_t QEISTAT;
+ __IO uint32_t QEICONF;
+ __I uint32_t QEIPOS;
+ __IO uint32_t QEIMAXPOS;
+ __IO uint32_t CMPOS0;
+ __IO uint32_t CMPOS1;
+ __IO uint32_t CMPOS2;
+ __I uint32_t INXCNT;
+ __IO uint32_t INXCMP;
+ __IO uint32_t QEILOAD;
+ __I uint32_t QEITIME;
+ __I uint32_t QEIVEL;
+ __I uint32_t QEICAP;
+ __IO uint32_t VELCOMP;
+ __IO uint32_t FILTER;
+ uint32_t RESERVED0[998];
+ __O uint32_t QEIIEC;
+ __O uint32_t QEIIES;
+ __I uint32_t QEIINTSTAT;
+ __I uint32_t QEIIE;
+ __O uint32_t QEICLR;
+ __O uint32_t QEISET;
+} LPC_QEI_TypeDef;
+
+/*------------- Controller Area Network (CAN) --------------------------------*/
+typedef struct
+{
+ __IO uint32_t mask[512]; /* ID Masks */
+} LPC_CANAF_RAM_TypeDef;
+
+typedef struct /* Acceptance Filter Registers */
+{
+ __IO uint32_t AFMR;
+ __IO uint32_t SFF_sa;
+ __IO uint32_t SFF_GRP_sa;
+ __IO uint32_t EFF_sa;
+ __IO uint32_t EFF_GRP_sa;
+ __IO uint32_t ENDofTable;
+ __I uint32_t LUTerrAd;
+ __I uint32_t LUTerr;
+ __IO uint32_t FCANIE;
+ __IO uint32_t FCANIC0;
+ __IO uint32_t FCANIC1;
+} LPC_CANAF_TypeDef;
+
+typedef struct /* Central Registers */
+{
+ __I uint32_t CANTxSR;
+ __I uint32_t CANRxSR;
+ __I uint32_t CANMSR;
+} LPC_CANCR_TypeDef;
+
+typedef struct /* Controller Registers */
+{
+ __IO uint32_t MOD;
+ __O uint32_t CMR;
+ __IO uint32_t GSR;
+ __I uint32_t ICR;
+ __IO uint32_t IER;
+ __IO uint32_t BTR;
+ __IO uint32_t EWL;
+ __I uint32_t SR;
+ __IO uint32_t RFS;
+ __IO uint32_t RID;
+ __IO uint32_t RDA;
+ __IO uint32_t RDB;
+ __IO uint32_t TFI1;
+ __IO uint32_t TID1;
+ __IO uint32_t TDA1;
+ __IO uint32_t TDB1;
+ __IO uint32_t TFI2;
+ __IO uint32_t TID2;
+ __IO uint32_t TDA2;
+ __IO uint32_t TDB2;
+ __IO uint32_t TFI3;
+ __IO uint32_t TID3;
+ __IO uint32_t TDA3;
+ __IO uint32_t TDB3;
+} LPC_CAN_TypeDef;
+
+/*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/
+typedef struct /* Common Registers */
+{
+ __I uint32_t DMACIntStat;
+ __I uint32_t DMACIntTCStat;
+ __O uint32_t DMACIntTCClear;
+ __I uint32_t DMACIntErrStat;
+ __O uint32_t DMACIntErrClr;
+ __I uint32_t DMACRawIntTCStat;
+ __I uint32_t DMACRawIntErrStat;
+ __I uint32_t DMACEnbldChns;
+ __IO uint32_t DMACSoftBReq;
+ __IO uint32_t DMACSoftSReq;
+ __IO uint32_t DMACSoftLBReq;
+ __IO uint32_t DMACSoftLSReq;
+ __IO uint32_t DMACConfig;
+ __IO uint32_t DMACSync;
+} LPC_GPDMA_TypeDef;
+
+typedef struct /* Channel Registers */
+{
+ __IO uint32_t DMACCSrcAddr;
+ __IO uint32_t DMACCDestAddr;
+ __IO uint32_t DMACCLLI;
+ __IO uint32_t DMACCControl;
+ __IO uint32_t DMACCConfig;
+} LPC_GPDMACH_TypeDef;
+
+/*------------- Universal Serial Bus (USB) -----------------------------------*/
+typedef struct
+{
+ __I uint32_t HcRevision; /* USB Host Registers */
+ __IO uint32_t HcControl;
+ __IO uint32_t HcCommandStatus;
+ __IO uint32_t HcInterruptStatus;
+ __IO uint32_t HcInterruptEnable;
+ __IO uint32_t HcInterruptDisable;
+ __IO uint32_t HcHCCA;
+ __I uint32_t HcPeriodCurrentED;
+ __IO uint32_t HcControlHeadED;
+ __IO uint32_t HcControlCurrentED;
+ __IO uint32_t HcBulkHeadED;
+ __IO uint32_t HcBulkCurrentED;
+ __I uint32_t HcDoneHead;
+ __IO uint32_t HcFmInterval;
+ __I uint32_t HcFmRemaining;
+ __I uint32_t HcFmNumber;
+ __IO uint32_t HcPeriodicStart;
+ __IO uint32_t HcLSTreshold;
+ __IO uint32_t HcRhDescriptorA;
+ __IO uint32_t HcRhDescriptorB;
+ __IO uint32_t HcRhStatus;
+ __IO uint32_t HcRhPortStatus1;
+ __IO uint32_t HcRhPortStatus2;
+ uint32_t RESERVED0[40];
+ __I uint32_t Module_ID;
+
+ __I uint32_t OTGIntSt; /* USB On-The-Go Registers */
+ __IO uint32_t OTGIntEn;
+ __O uint32_t OTGIntSet;
+ __O uint32_t OTGIntClr;
+ __IO uint32_t OTGStCtrl;
+ __IO uint32_t OTGTmr;
+ uint32_t RESERVED1[58];
+
+ __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */
+ __IO uint32_t USBDevIntEn;
+ __O uint32_t USBDevIntClr;
+ __O uint32_t USBDevIntSet;
+
+ __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */
+ __I uint32_t USBCmdData;
+
+ __I uint32_t USBRxData; /* USB Device Transfer Registers */
+ __O uint32_t USBTxData;
+ __I uint32_t USBRxPLen;
+ __O uint32_t USBTxPLen;
+ __IO uint32_t USBCtrl;
+ __O uint32_t USBDevIntPri;
+
+ __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */
+ __IO uint32_t USBEpIntEn;
+ __O uint32_t USBEpIntClr;
+ __O uint32_t USBEpIntSet;
+ __O uint32_t USBEpIntPri;
+
+ __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/
+ __O uint32_t USBEpInd;
+ __IO uint32_t USBMaxPSize;
+
+ __I uint32_t USBDMARSt; /* USB Device DMA Registers */
+ __O uint32_t USBDMARClr;
+ __O uint32_t USBDMARSet;
+ uint32_t RESERVED2[9];
+ __IO uint32_t USBUDCAH;
+ __I uint32_t USBEpDMASt;
+ __O uint32_t USBEpDMAEn;
+ __O uint32_t USBEpDMADis;
+ __I uint32_t USBDMAIntSt;
+ __IO uint32_t USBDMAIntEn;
+ uint32_t RESERVED3[2];
+ __I uint32_t USBEoTIntSt;
+ __O uint32_t USBEoTIntClr;
+ __O uint32_t USBEoTIntSet;
+ __I uint32_t USBNDDRIntSt;
+ __O uint32_t USBNDDRIntClr;
+ __O uint32_t USBNDDRIntSet;
+ __I uint32_t USBSysErrIntSt;
+ __O uint32_t USBSysErrIntClr;
+ __O uint32_t USBSysErrIntSet;
+ uint32_t RESERVED4[15];
+
+ __I uint32_t I2C_RX; /* USB OTG I2C Registers */
+ __O uint32_t I2C_WO;
+ __I uint32_t I2C_STS;
+ __IO uint32_t I2C_CTL;
+ __IO uint32_t I2C_CLKHI;
+ __O uint32_t I2C_CLKLO;
+ uint32_t RESERVED5[823];
+
+ union {
+ __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */
+ __IO uint32_t OTGClkCtrl;
+ };
+ union {
+ __I uint32_t USBClkSt;
+ __I uint32_t OTGClkSt;
+ };
+} LPC_USB_TypeDef;
+
+/*------------- Ethernet Media Access Controller (EMAC) ----------------------*/
+typedef struct
+{
+ __IO uint32_t MAC1; /* MAC Registers */
+ __IO uint32_t MAC2;
+ __IO uint32_t IPGT;
+ __IO uint32_t IPGR;
+ __IO uint32_t CLRT;
+ __IO uint32_t MAXF;
+ __IO uint32_t SUPP;
+ __IO uint32_t TEST;
+ __IO uint32_t MCFG;
+ __IO uint32_t MCMD;
+ __IO uint32_t MADR;
+ __O uint32_t MWTD;
+ __I uint32_t MRDD;
+ __I uint32_t MIND;
+ uint32_t RESERVED0[2];
+ __IO uint32_t SA0;
+ __IO uint32_t SA1;
+ __IO uint32_t SA2;
+ uint32_t RESERVED1[45];
+ __IO uint32_t Command; /* Control Registers */
+ __I uint32_t Status;
+ __IO uint32_t RxDescriptor;
+ __IO uint32_t RxStatus;
+ __IO uint32_t RxDescriptorNumber;
+ __I uint32_t RxProduceIndex;
+ __IO uint32_t RxConsumeIndex;
+ __IO uint32_t TxDescriptor;
+ __IO uint32_t TxStatus;
+ __IO uint32_t TxDescriptorNumber;
+ __IO uint32_t TxProduceIndex;
+ __I uint32_t TxConsumeIndex;
+ uint32_t RESERVED2[10];
+ __I uint32_t TSV0;
+ __I uint32_t TSV1;
+ __I uint32_t RSV;
+ uint32_t RESERVED3[3];
+ __IO uint32_t FlowControlCounter;
+ __I uint32_t FlowControlStatus;
+ uint32_t RESERVED4[34];
+ __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */
+ __IO uint32_t RxFilterWoLStatus;
+ __IO uint32_t RxFilterWoLClear;
+ uint32_t RESERVED5;
+ __IO uint32_t HashFilterL;
+ __IO uint32_t HashFilterH;
+ uint32_t RESERVED6[882];
+ __I uint32_t IntStatus; /* Module Control Registers */
+ __IO uint32_t IntEnable;
+ __O uint32_t IntClear;
+ __O uint32_t IntSet;
+ uint32_t RESERVED7;
+ __IO uint32_t PowerDown;
+ uint32_t RESERVED8;
+ __IO uint32_t Module_ID;
+} LPC_EMAC_TypeDef;
+
+#if defined ( __CC_ARM )
+#pragma anon_unions
+#endif
+
+
+/******************************************************************************/
+/* Peripheral memory map */
+/******************************************************************************/
+/* Base addresses */
+#define LPC_FLASH_BASE (0x00000000UL)
+#define LPC_RAM_BASE (0x10000000UL)
+#define LPC_GPIO_BASE (0x2009C000UL)
+#define LPC_APB0_BASE (0x40000000UL)
+#define LPC_APB1_BASE (0x40080000UL)
+#define LPC_AHB_BASE (0x50000000UL)
+#define LPC_CM3_BASE (0xE0000000UL)
+
+/* APB0 peripherals */
+#define LPC_WDT_BASE (LPC_APB0_BASE + 0x00000)
+#define LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000)
+#define LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000)
+#define LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000)
+#define LPC_UART1_BASE (LPC_APB0_BASE + 0x10000)
+#define LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000)
+#define LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000)
+#define LPC_SPI_BASE (LPC_APB0_BASE + 0x20000)
+#define LPC_RTC_BASE (LPC_APB0_BASE + 0x24000)
+#define LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080)
+#define LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000)
+#define LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000)
+#define LPC_ADC_BASE (LPC_APB0_BASE + 0x34000)
+#define LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000)
+#define LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000)
+#define LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000)
+#define LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000)
+#define LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000)
+#define LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000)
+
+/* APB1 peripherals */
+#define LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000)
+#define LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000)
+#define LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000)
+#define LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000)
+#define LPC_UART2_BASE (LPC_APB1_BASE + 0x18000)
+#define LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000)
+#define LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000)
+#define LPC_I2S_BASE (LPC_APB1_BASE + 0x28000)
+#define LPC_RIT_BASE (LPC_APB1_BASE + 0x30000)
+#define LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000)
+#define LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000)
+#define LPC_SC_BASE (LPC_APB1_BASE + 0x7C000)
+
+/* AHB peripherals */
+#define LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000)
+#define LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000)
+#define LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100)
+#define LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120)
+#define LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140)
+#define LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160)
+#define LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180)
+#define LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0)
+#define LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0)
+#define LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0)
+#define LPC_USB_BASE (LPC_AHB_BASE + 0x0C000)
+
+/* GPIOs */
+#define LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000)
+#define LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020)
+#define LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040)
+#define LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060)
+#define LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080)
+
+
+/******************************************************************************/
+/* Peripheral declaration */
+/******************************************************************************/
+#define LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE )
+#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )
+#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
+#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
+#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
+#define LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )
+#define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )
+#define LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )
+#define LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )
+#define LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )
+#define LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )
+#define LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE )
+#define LPC_UART0 ((LPC_UART0_TypeDef *) LPC_UART0_BASE )
+#define LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE )
+#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )
+#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )
+#define LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )
+#define LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )
+#define LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )
+#define LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )
+#define LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE )
+#define LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE )
+#define LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE )
+#define LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )
+#define LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )
+#define LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )
+#define LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )
+#define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )
+#define LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE )
+#define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
+#define LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )
+#define LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )
+#define LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )
+#define LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )
+#define LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )
+#define LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE )
+#define LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )
+#define LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )
+#define LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )
+#define LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )
+#define LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )
+#define LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )
+#define LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )
+#define LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )
+#define LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )
+#define LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )
+#define LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )
+
+#endif // __LPC17xx_H__
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC1768/core_cm3.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,1410 @@
+/******************************************************************************
+ * @file: core_cm3.h
+ * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File
+ * @version: V1.30 PRE-RELEASE
+ * @date: 30. July 2009
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (C) 2009 ARM Limited. All rights reserved.
+ *
+ * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
+ * processor based microcontrollers. This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ ******************************************************************************/
+
+#ifndef __CM3_CORE_H__
+#define __CM3_CORE_H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */
+#define __CM3_CMSIS_VERSION_SUB (0x30) /*!< [15:0] CMSIS HAL sub version */
+#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
+
+#define __CORTEX_M (0x03) /*!< Cortex core */
+
+/**
+ * Lint configuration \n
+ * ----------------------- \n
+ *
+ * The following Lint messages will be suppressed and not shown: \n
+ * \n
+ * --- Error 10: --- \n
+ * register uint32_t __regBasePri __asm("basepri"); \n
+ * Error 10: Expecting ';' \n
+ * \n
+ * --- Error 530: --- \n
+ * return(__regBasePri); \n
+ * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n
+ * \n
+ * --- Error 550: --- \n
+ * __regBasePri = (basePri & 0x1ff); \n
+ * } \n
+ * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n
+ * \n
+ * --- Error 754: --- \n
+ * uint32_t RESERVED0[24]; \n
+ * Info 754: local structure member '<some, not used in the HAL>' (line 109, file ./cm3_core.h) not referenced \n
+ * \n
+ * --- Error 750: --- \n
+ * #define __CM3_CORE_H__ \n
+ * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n
+ * \n
+ * --- Error 528: --- \n
+ * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n
+ * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n
+ * \n
+ * --- Error 751: --- \n
+ * } InterruptType_Type; \n
+ * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n
+ * \n
+ * \n
+ * Note: To re-enable a Message, insert a space before 'lint' * \n
+ *
+ */
+
+/*lint -save */
+/*lint -e10 */
+/*lint -e530 */
+/*lint -e550 */
+/*lint -e754 */
+/*lint -e750 */
+/*lint -e528 */
+/*lint -e751 */
+
+
+#include <stdint.h> /* Include standard types */
+
+#if defined (__ICCARM__)
+ #include <intrinsics.h> /* IAR Intrinsics */
+#endif
+
+
+#ifndef __NVIC_PRIO_BITS
+ #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */
+#endif
+
+
+
+
+/**
+ * IO definitions
+ *
+ * define access restrictions to peripheral registers
+ */
+
+#ifdef __cplusplus
+#define __I volatile /*!< defines 'read only' permissions */
+#else
+#define __I volatile const /*!< defines 'read only' permissions */
+#endif
+#define __O volatile /*!< defines 'write only' permissions */
+#define __IO volatile /*!< defines 'read / write' permissions */
+
+
+
+/*******************************************************************************
+ * Register Abstraction
+ ******************************************************************************/
+
+
+/* System Reset */
+#define NVIC_VECTRESET 0 /*!< Vector Reset Bit */
+#define NVIC_SYSRESETREQ 2 /*!< System Reset Request */
+#define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */
+#define NVIC_AIRCR_ENDIANESS 15 /*!< Endianess */
+
+/* Core Debug */
+#define CoreDebug_DEMCR_TRCENA (1 << 24) /*!< DEMCR TRCENA enable */
+#define ITM_TCR_ITMENA 1 /*!< ITM enable */
+
+
+
+
+/* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */
+typedef struct
+{
+ __IO uint32_t ISER[8]; /*!< Interrupt Set Enable Register */
+ uint32_t RESERVED0[24];
+ __IO uint32_t ICER[8]; /*!< Interrupt Clear Enable Register */
+ uint32_t RSERVED1[24];
+ __IO uint32_t ISPR[8]; /*!< Interrupt Set Pending Register */
+ uint32_t RESERVED2[24];
+ __IO uint32_t ICPR[8]; /*!< Interrupt Clear Pending Register */
+ uint32_t RESERVED3[24];
+ __IO uint32_t IABR[8]; /*!< Interrupt Active bit Register */
+ uint32_t RESERVED4[56];
+ __IO uint8_t IP[240]; /*!< Interrupt Priority Register, 8Bit wide */
+ uint32_t RESERVED5[644];
+ __O uint32_t STIR; /*!< Software Trigger Interrupt Register */
+} NVIC_Type;
+
+
+/* memory mapping struct for System Control Block */
+typedef struct
+{
+ __I uint32_t CPUID; /*!< CPU ID Base Register */
+ __IO uint32_t ICSR; /*!< Interrupt Control State Register */
+ __IO uint32_t VTOR; /*!< Vector Table Offset Register */
+ __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */
+ __IO uint32_t SCR; /*!< System Control Register */
+ __IO uint32_t CCR; /*!< Configuration Control Register */
+ __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */
+ __IO uint32_t SHCSR; /*!< System Handler Control and State Register */
+ __IO uint32_t CFSR; /*!< Configurable Fault Status Register */
+ __IO uint32_t HFSR; /*!< Hard Fault Status Register */
+ __IO uint32_t DFSR; /*!< Debug Fault Status Register */
+ __IO uint32_t MMFAR; /*!< Mem Manage Address Register */
+ __IO uint32_t BFAR; /*!< Bus Fault Address Register */
+ __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */
+ __I uint32_t PFR[2]; /*!< Processor Feature Register */
+ __I uint32_t DFR; /*!< Debug Feature Register */
+ __I uint32_t ADR; /*!< Auxiliary Feature Register */
+ __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */
+ __I uint32_t ISAR[5]; /*!< ISA Feature Register */
+} SCB_Type;
+
+
+/* memory mapping struct for SysTick */
+typedef struct
+{
+ __IO uint32_t CTRL; /*!< SysTick Control and Status Register */
+ __IO uint32_t LOAD; /*!< SysTick Reload Value Register */
+ __IO uint32_t VAL; /*!< SysTick Current Value Register */
+ __I uint32_t CALIB; /*!< SysTick Calibration Register */
+} SysTick_Type;
+
+
+/* memory mapping structur for ITM */
+typedef struct
+{
+ __O union
+ {
+ __O uint8_t u8; /*!< ITM Stimulus Port 8-bit */
+ __O uint16_t u16; /*!< ITM Stimulus Port 16-bit */
+ __O uint32_t u32; /*!< ITM Stimulus Port 32-bit */
+ } PORT [32]; /*!< ITM Stimulus Port Registers */
+ uint32_t RESERVED0[864];
+ __IO uint32_t TER; /*!< ITM Trace Enable Register */
+ uint32_t RESERVED1[15];
+ __IO uint32_t TPR; /*!< ITM Trace Privilege Register */
+ uint32_t RESERVED2[15];
+ __IO uint32_t TCR; /*!< ITM Trace Control Register */
+ uint32_t RESERVED3[29];
+ __IO uint32_t IWR; /*!< ITM Integration Write Register */
+ __IO uint32_t IRR; /*!< ITM Integration Read Register */
+ __IO uint32_t IMCR; /*!< ITM Integration Mode Control Register */
+ uint32_t RESERVED4[43];
+ __IO uint32_t LAR; /*!< ITM Lock Access Register */
+ __IO uint32_t LSR; /*!< ITM Lock Status Register */
+ uint32_t RESERVED5[6];
+ __I uint32_t PID4; /*!< ITM Product ID Registers */
+ __I uint32_t PID5;
+ __I uint32_t PID6;
+ __I uint32_t PID7;
+ __I uint32_t PID0;
+ __I uint32_t PID1;
+ __I uint32_t PID2;
+ __I uint32_t PID3;
+ __I uint32_t CID0;
+ __I uint32_t CID1;
+ __I uint32_t CID2;
+ __I uint32_t CID3;
+} ITM_Type;
+
+
+/* memory mapped struct for Interrupt Type */
+typedef struct
+{
+ uint32_t RESERVED0;
+ __I uint32_t ICTR; /*!< Interrupt Control Type Register */
+#if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
+ __IO uint32_t ACTLR; /*!< Auxiliary Control Register */
+#else
+ uint32_t RESERVED1;
+#endif
+} InterruptType_Type;
+
+
+/* Memory Protection Unit */
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1)
+typedef struct
+{
+ __I uint32_t TYPE; /*!< MPU Type Register */
+ __IO uint32_t CTRL; /*!< MPU Control Register */
+ __IO uint32_t RNR; /*!< MPU Region RNRber Register */
+ __IO uint32_t RBAR; /*!< MPU Region Base Address Register */
+ __IO uint32_t RASR; /*!< MPU Region Attribute and Size Register */
+ __IO uint32_t RBAR_A1; /*!< MPU Alias 1 Region Base Address Register */
+ __IO uint32_t RASR_A1; /*!< MPU Alias 1 Region Attribute and Size Register */
+ __IO uint32_t RBAR_A2; /*!< MPU Alias 2 Region Base Address Register */
+ __IO uint32_t RASR_A2; /*!< MPU Alias 2 Region Attribute and Size Register */
+ __IO uint32_t RBAR_A3; /*!< MPU Alias 3 Region Base Address Register */
+ __IO uint32_t RASR_A3; /*!< MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+#endif
+
+
+/* Core Debug Register */
+typedef struct
+{
+ __IO uint32_t DHCSR; /*!< Debug Halting Control and Status Register */
+ __O uint32_t DCRSR; /*!< Debug Core Register Selector Register */
+ __IO uint32_t DCRDR; /*!< Debug Core Register Data Register */
+ __IO uint32_t DEMCR; /*!< Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+
+/* Memory mapping of Cortex-M3 Hardware */
+#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */
+#define ITM_BASE (0xE0000000) /*!< ITM Base Address */
+#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */
+#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */
+#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */
+#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */
+
+#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */
+#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */
+#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */
+#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */
+#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */
+#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1)
+ #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */
+ #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */
+#endif
+
+
+/*******************************************************************************
+ * Hardware Abstraction Layer
+ ******************************************************************************/
+
+
+#if defined ( __CC_ARM )
+ #define __ASM __asm /*!< asm keyword for ARM Compiler */
+ #define __INLINE __inline /*!< inline keyword for ARM Compiler */
+
+#elif defined ( __ICCARM__ )
+ #define __ASM __asm /*!< asm keyword for IAR Compiler */
+ #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
+
+#elif defined ( __GNUC__ )
+ #define __ASM __asm /*!< asm keyword for GNU Compiler */
+ #define __INLINE inline /*!< inline keyword for GNU Compiler */
+
+#elif defined ( __TASKING__ )
+ #define __ASM __asm /*!< asm keyword for TASKING Compiler */
+ #define __INLINE inline /*!< inline keyword for TASKING Compiler */
+
+#endif
+
+
+/* ################### Compiler specific Intrinsics ########################### */
+
+#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+#define __enable_fault_irq __enable_fiq
+#define __disable_fault_irq __disable_fiq
+
+#define __NOP __nop
+#define __WFI __wfi
+#define __WFE __wfe
+#define __SEV __sev
+#define __ISB() __isb(0)
+#define __DSB() __dsb(0)
+#define __DMB() __dmb(0)
+#define __REV __rev
+#define __RBIT __rbit
+#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr))
+#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr))
+#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr))
+#define __STREXB(value, ptr) __strex(value, ptr)
+#define __STREXH(value, ptr) __strex(value, ptr)
+#define __STREXW(value, ptr) __strex(value, ptr)
+
+
+/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */
+/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */
+/* intrinsic void __enable_irq(); */
+/* intrinsic void __disable_irq(); */
+
+
+/**
+ * @brief Return the Process Stack Pointer
+ *
+ * @param none
+ * @return uint32_t ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+extern uint32_t __get_PSP(void);
+
+/**
+ * @brief Set the Process Stack Pointer
+ *
+ * @param uint32_t Process Stack Pointer
+ * @return none
+ *
+ * Assign the value ProcessStackPointer to the MSP
+ * (process stack pointer) Cortex processor register
+ */
+extern void __set_PSP(uint32_t topOfProcStack);
+
+/**
+ * @brief Return the Main Stack Pointer
+ *
+ * @param none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+extern uint32_t __get_MSP(void);
+
+/**
+ * @brief Set the Main Stack Pointer
+ *
+ * @param uint32_t Main Stack Pointer
+ * @return none
+ *
+ * Assign the value mainStackPointer to the MSP
+ * (main stack pointer) Cortex processor register
+ */
+extern void __set_MSP(uint32_t topOfMainStack);
+
+/**
+ * @brief Reverse byte order in unsigned short value
+ *
+ * @param uint16_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+extern uint32_t __REV16(uint16_t value);
+
+/*
+ * @brief Reverse byte order in signed short value with sign extension to integer
+ *
+ * @param int16_t value to reverse
+ * @return int32_t reversed value
+ *
+ * Reverse byte order in signed short value with sign extension to integer
+ */
+extern int32_t __REVSH(int16_t value);
+
+
+#if (__ARMCC_VERSION < 400000)
+
+/**
+ * @brief Remove the exclusive lock created by ldrex
+ *
+ * @param none
+ * @return none
+ *
+ * Removes the exclusive lock which is created by ldrex.
+ */
+extern void __CLREX(void);
+
+/**
+ * @brief Return the Base Priority value
+ *
+ * @param none
+ * @return uint32_t BasePriority
+ *
+ * Return the content of the base priority register
+ */
+extern uint32_t __get_BASEPRI(void);
+
+/**
+ * @brief Set the Base Priority value
+ *
+ * @param uint32_t BasePriority
+ * @return none
+ *
+ * Set the base priority register
+ */
+extern void __set_BASEPRI(uint32_t basePri);
+
+/**
+ * @brief Return the Priority Mask value
+ *
+ * @param none
+ * @return uint32_t PriMask
+ *
+ * Return the state of the priority mask bit from the priority mask
+ * register
+ */
+extern uint32_t __get_PRIMASK(void);
+
+/**
+ * @brief Set the Priority Mask value
+ *
+ * @param uint32_t PriMask
+ * @return none
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+extern void __set_PRIMASK(uint32_t priMask);
+
+/**
+ * @brief Return the Fault Mask value
+ *
+ * @param none
+ * @return uint32_t FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+extern uint32_t __get_FAULTMASK(void);
+
+/**
+ * @brief Set the Fault Mask value
+ *
+ * @param uint32_t faultMask value
+ * @return none
+ *
+ * Set the fault mask register
+ */
+extern void __set_FAULTMASK(uint32_t faultMask);
+
+/**
+ * @brief Return the Control Register value
+ *
+ * @param none
+ * @return uint32_t Control value
+ *
+ * Return the content of the control register
+ */
+extern uint32_t __get_CONTROL(void);
+
+/**
+ * @brief Set the Control Register value
+ *
+ * @param uint32_t Control value
+ * @return none
+ *
+ * Set the control register
+ */
+extern void __set_CONTROL(uint32_t control);
+
+#else /* (__ARMCC_VERSION >= 400000) */
+
+
+/**
+ * @brief Remove the exclusive lock created by ldrex
+ *
+ * @param none
+ * @return none
+ *
+ * Removes the exclusive lock which is created by ldrex.
+ */
+#define __CLREX __clrex
+
+/**
+ * @brief Return the Base Priority value
+ *
+ * @param none
+ * @return uint32_t BasePriority
+ *
+ * Return the content of the base priority register
+ */
+static __INLINE uint32_t __get_BASEPRI(void)
+{
+ register uint32_t __regBasePri __ASM("basepri");
+ return(__regBasePri);
+}
+
+/**
+ * @brief Set the Base Priority value
+ *
+ * @param uint32_t BasePriority
+ * @return none
+ *
+ * Set the base priority register
+ */
+static __INLINE void __set_BASEPRI(uint32_t basePri)
+{
+ register uint32_t __regBasePri __ASM("basepri");
+ __regBasePri = (basePri & 0xff);
+}
+
+/**
+ * @brief Return the Priority Mask value
+ *
+ * @param none
+ * @return uint32_t PriMask
+ *
+ * Return the state of the priority mask bit from the priority mask
+ * register
+ */
+static __INLINE uint32_t __get_PRIMASK(void)
+{
+ register uint32_t __regPriMask __ASM("primask");
+ return(__regPriMask);
+}
+
+/**
+ * @brief Set the Priority Mask value
+ *
+ * @param uint32_t PriMask
+ * @return none
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+static __INLINE void __set_PRIMASK(uint32_t priMask)
+{
+ register uint32_t __regPriMask __ASM("primask");
+ __regPriMask = (priMask);
+}
+
+/**
+ * @brief Return the Fault Mask value
+ *
+ * @param none
+ * @return uint32_t FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+static __INLINE uint32_t __get_FAULTMASK(void)
+{
+ register uint32_t __regFaultMask __ASM("faultmask");
+ return(__regFaultMask);
+}
+
+/**
+ * @brief Set the Fault Mask value
+ *
+ * @param uint32_t faultMask value
+ * @return none
+ *
+ * Set the fault mask register
+ */
+static __INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+ register uint32_t __regFaultMask __ASM("faultmask");
+ __regFaultMask = (faultMask & 1);
+}
+
+/**
+ * @brief Return the Control Register value
+ *
+ * @param none
+ * @return uint32_t Control value
+ *
+ * Return the content of the control register
+ */
+static __INLINE uint32_t __get_CONTROL(void)
+{
+ register uint32_t __regControl __ASM("control");
+ return(__regControl);
+}
+
+/**
+ * @brief Set the Control Register value
+ *
+ * @param uint32_t Control value
+ * @return none
+ *
+ * Set the control register
+ */
+static __INLINE void __set_CONTROL(uint32_t control)
+{
+ register uint32_t __regControl __ASM("control");
+ __regControl = control;
+}
+
+#endif /* __ARMCC_VERSION */
+
+
+
+#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+
+#define __enable_irq __enable_interrupt /*!< global Interrupt enable */
+#define __disable_irq __disable_interrupt /*!< global Interrupt disable */
+
+static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); }
+static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); }
+
+#define __NOP __no_operation() /*!< no operation intrinsic in IAR Compiler */
+static __INLINE void __WFI() { __ASM ("wfi"); }
+static __INLINE void __WFE() { __ASM ("wfe"); }
+static __INLINE void __SEV() { __ASM ("sev"); }
+static __INLINE void __CLREX() { __ASM ("clrex"); }
+
+/* intrinsic void __ISB(void) */
+/* intrinsic void __DSB(void) */
+/* intrinsic void __DMB(void) */
+/* intrinsic void __set_PRIMASK(); */
+/* intrinsic void __get_PRIMASK(); */
+/* intrinsic void __set_FAULTMASK(); */
+/* intrinsic void __get_FAULTMASK(); */
+/* intrinsic uint32_t __REV(uint32_t value); */
+/* intrinsic uint32_t __REVSH(uint32_t value); */
+/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */
+/* intrinsic unsigned long __LDREX(unsigned long *); */
+
+
+/**
+ * @brief Return the Process Stack Pointer
+ *
+ * @param none
+ * @return uint32_t ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+extern uint32_t __get_PSP(void);
+
+/**
+ * @brief Set the Process Stack Pointer
+ *
+ * @param uint32_t Process Stack Pointer
+ * @return none
+ *
+ * Assign the value ProcessStackPointer to the MSP
+ * (process stack pointer) Cortex processor register
+ */
+extern void __set_PSP(uint32_t topOfProcStack);
+
+/**
+ * @brief Return the Main Stack Pointer
+ *
+ * @param none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+extern uint32_t __get_MSP(void);
+
+/**
+ * @brief Set the Main Stack Pointer
+ *
+ * @param uint32_t Main Stack Pointer
+ * @return none
+ *
+ * Assign the value mainStackPointer to the MSP
+ * (main stack pointer) Cortex processor register
+ */
+extern void __set_MSP(uint32_t topOfMainStack);
+
+/**
+ * @brief Reverse byte order in unsigned short value
+ *
+ * @param uint16_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+extern uint32_t __REV16(uint16_t value);
+
+/**
+ * @brief Reverse bit order of value
+ *
+ * @param uint32_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse bit order of value
+ */
+extern uint32_t __RBIT(uint32_t value);
+
+/**
+ * @brief LDR Exclusive
+ *
+ * @param uint8_t* address
+ * @return uint8_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint8_t __LDREXB(uint8_t *addr);
+
+/**
+ * @brief LDR Exclusive
+ *
+ * @param uint16_t* address
+ * @return uint16_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint16_t __LDREXH(uint16_t *addr);
+
+/**
+ * @brief LDR Exclusive
+ *
+ * @param uint32_t* address
+ * @return uint32_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint32_t __LDREXW(uint32_t *addr);
+
+/**
+ * @brief STR Exclusive
+ *
+ * @param uint8_t *address
+ * @param uint8_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXB(uint8_t value, uint8_t *addr);
+
+/**
+ * @brief STR Exclusive
+ *
+ * @param uint16_t *address
+ * @param uint16_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXH(uint16_t value, uint16_t *addr);
+
+/**
+ * @brief STR Exclusive
+ *
+ * @param uint32_t *address
+ * @param uint32_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXW(uint32_t value, uint32_t *addr);
+
+
+
+#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+
+static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); }
+static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); }
+
+static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); }
+static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); }
+
+static __INLINE void __NOP() { __ASM volatile ("nop"); }
+static __INLINE void __WFI() { __ASM volatile ("wfi"); }
+static __INLINE void __WFE() { __ASM volatile ("wfe"); }
+static __INLINE void __SEV() { __ASM volatile ("sev"); }
+static __INLINE void __ISB() { __ASM volatile ("isb"); }
+static __INLINE void __DSB() { __ASM volatile ("dsb"); }
+static __INLINE void __DMB() { __ASM volatile ("dmb"); }
+static __INLINE void __CLREX() { __ASM volatile ("clrex"); }
+
+
+/**
+ * @brief Return the Process Stack Pointer
+ *
+ * @param none
+ * @return uint32_t ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+extern uint32_t __get_PSP(void);
+
+/**
+ * @brief Set the Process Stack Pointer
+ *
+ * @param uint32_t Process Stack Pointer
+ * @return none
+ *
+ * Assign the value ProcessStackPointer to the MSP
+ * (process stack pointer) Cortex processor register
+ */
+extern void __set_PSP(uint32_t topOfProcStack);
+
+/**
+ * @brief Return the Main Stack Pointer
+ *
+ * @param none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+extern uint32_t __get_MSP(void);
+
+/**
+ * @brief Set the Main Stack Pointer
+ *
+ * @param uint32_t Main Stack Pointer
+ * @return none
+ *
+ * Assign the value mainStackPointer to the MSP
+ * (main stack pointer) Cortex processor register
+ */
+extern void __set_MSP(uint32_t topOfMainStack);
+
+/**
+ * @brief Return the Base Priority value
+ *
+ * @param none
+ * @return uint32_t BasePriority
+ *
+ * Return the content of the base priority register
+ */
+extern uint32_t __get_BASEPRI(void);
+
+/**
+ * @brief Set the Base Priority value
+ *
+ * @param uint32_t BasePriority
+ * @return none
+ *
+ * Set the base priority register
+ */
+extern void __set_BASEPRI(uint32_t basePri);
+
+/**
+ * @brief Return the Priority Mask value
+ *
+ * @param none
+ * @return uint32_t PriMask
+ *
+ * Return the state of the priority mask bit from the priority mask
+ * register
+ */
+extern uint32_t __get_PRIMASK(void);
+
+/**
+ * @brief Set the Priority Mask value
+ *
+ * @param uint32_t PriMask
+ * @return none
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+extern void __set_PRIMASK(uint32_t priMask);
+
+/**
+ * @brief Return the Fault Mask value
+ *
+ * @param none
+ * @return uint32_t FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+extern uint32_t __get_FAULTMASK(void);
+
+/**
+ * @brief Set the Fault Mask value
+ *
+ * @param uint32_t faultMask value
+ * @return none
+ *
+ * Set the fault mask register
+ */
+extern void __set_FAULTMASK(uint32_t faultMask);
+
+/**
+ * @brief Return the Control Register value
+*
+* @param none
+* @return uint32_t Control value
+ *
+ * Return the content of the control register
+ */
+extern uint32_t __get_CONTROL(void);
+
+/**
+ * @brief Set the Control Register value
+ *
+ * @param uint32_t Control value
+ * @return none
+ *
+ * Set the control register
+ */
+extern void __set_CONTROL(uint32_t control);
+
+/**
+ * @brief Reverse byte order in integer value
+ *
+ * @param uint32_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in integer value
+ */
+extern uint32_t __REV(uint32_t value);
+
+/**
+ * @brief Reverse byte order in unsigned short value
+ *
+ * @param uint16_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+extern uint32_t __REV16(uint16_t value);
+
+/*
+ * Reverse byte order in signed short value with sign extension to integer
+ *
+ * @param int16_t value to reverse
+ * @return int32_t reversed value
+ *
+ * @brief Reverse byte order in signed short value with sign extension to integer
+ */
+extern int32_t __REVSH(int16_t value);
+
+/**
+ * @brief Reverse bit order of value
+ *
+ * @param uint32_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse bit order of value
+ */
+extern uint32_t __RBIT(uint32_t value);
+
+/**
+ * @brief LDR Exclusive
+ *
+ * @param uint8_t* address
+ * @return uint8_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint8_t __LDREXB(uint8_t *addr);
+
+/**
+ * @brief LDR Exclusive
+ *
+ * @param uint16_t* address
+ * @return uint16_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint16_t __LDREXH(uint16_t *addr);
+
+/**
+ * @brief LDR Exclusive
+ *
+ * @param uint32_t* address
+ * @return uint32_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint32_t __LDREXW(uint32_t *addr);
+
+/**
+ * @brief STR Exclusive
+ *
+ * @param uint8_t *address
+ * @param uint8_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXB(uint8_t value, uint8_t *addr);
+
+/**
+ * @brief STR Exclusive
+ *
+ * @param uint16_t *address
+ * @param uint16_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXH(uint16_t value, uint16_t *addr);
+
+/**
+ * @brief STR Exclusive
+ *
+ * @param uint32_t *address
+ * @param uint32_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXW(uint32_t value, uint32_t *addr);
+
+
+#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
+/* TASKING carm specific functions */
+
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all instrinsics,
+ * Including the CMSIS ones.
+ */
+
+#endif
+
+
+
+/* ########################## NVIC functions #################################### */
+
+
+/**
+ * @brief Set the Priority Grouping in NVIC Interrupt Controller
+ *
+ * @param uint32_t priority_grouping is priority grouping field
+ * @return none
+ *
+ * Set the priority grouping field using the required unlock sequence.
+ * The parameter priority_grouping is assigned to the field
+ * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used.
+ * In case of a conflict between priority grouping and available
+ * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+ */
+static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ uint32_t reg_value;
+ uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
+
+ reg_value = SCB->AIRCR; /* read old register configuration */
+ reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */
+ reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (PriorityGroupTmp << 8))); /* Insert write key and priorty group */
+ SCB->AIRCR = reg_value;
+}
+
+/**
+ * @brief Get the Priority Grouping from NVIC Interrupt Controller
+ *
+ * @param none
+ * @return uint32_t priority grouping field
+ *
+ * Get the priority grouping from NVIC Interrupt Controller.
+ * priority grouping is SCB->AIRCR [10:8] PRIGROUP field.
+ */
+static __INLINE uint32_t NVIC_GetPriorityGrouping(void)
+{
+ return ((SCB->AIRCR >> 8) & 0x07); /* read priority grouping field */
+}
+
+/**
+ * @brief Enable Interrupt in NVIC Interrupt Controller
+ *
+ * @param IRQn_Type IRQn specifies the interrupt number
+ * @return none
+ *
+ * Enable a device specific interupt in the NVIC interrupt controller.
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
+}
+
+/**
+ * @brief Disable the interrupt line for external interrupt specified
+ *
+ * @param IRQn_Type IRQn is the positive number of the external interrupt
+ * @return none
+ *
+ * Disable a device specific interupt in the NVIC interrupt controller.
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+ NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
+}
+
+/**
+ * @brief Read the interrupt pending bit for a device specific interrupt source
+ *
+ * @param IRQn_Type IRQn is the number of the device specifc interrupt
+ * @return uint32_t 1 if pending interrupt else 0
+ *
+ * Read the pending register in NVIC and return 1 if its status is pending,
+ * otherwise it returns 0
+ */
+static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+ return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
+}
+
+/**
+ * @brief Set the pending bit for an external interrupt
+ *
+ * @param IRQn_Type IRQn is the Number of the interrupt
+ * @return none
+ *
+ * Set the pending bit for the specified interrupt.
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+ NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
+}
+
+/**
+ * @brief Clear the pending bit for an external interrupt
+ *
+ * @param IRQn_Type IRQn is the Number of the interrupt
+ * @return none
+ *
+ * Clear the pending bit for the specified interrupt.
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+ NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
+}
+
+/**
+ * @brief Read the active bit for an external interrupt
+ *
+ * @param IRQn_Type IRQn is the Number of the interrupt
+ * @return uint32_t 1 if active else 0
+ *
+ * Read the active register in NVIC and returns 1 if its status is active,
+ * otherwise it returns 0.
+ */
+static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+{
+ return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
+}
+
+/**
+ * @brief Set the priority for an interrupt
+ *
+ * @param IRQn_Type IRQn is the Number of the interrupt
+ * @param priority is the priority for the interrupt
+ * @return none
+ *
+ * Set the priority for the specified interrupt. The interrupt
+ * number can be positive to specify an external (device specific)
+ * interrupt, or negative to specify an internal (core) interrupt. \n
+ *
+ * Note: The priority cannot be set for every core interrupt.
+ */
+static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ if(IRQn < 0) {
+ SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */
+ else {
+ NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */
+}
+
+/**
+ * @brief Read the priority for an interrupt
+ *
+ * @param IRQn_Type IRQn is the Number of the interrupt
+ * @return uint32_t priority is the priority for the interrupt
+ *
+ * Read the priority for the specified interrupt. The interrupt
+ * number can be positive to specify an external (device specific)
+ * interrupt, or negative to specify an internal (core) interrupt.
+ *
+ * The returned priority value is automatically aligned to the implemented
+ * priority bits of the microcontroller.
+ *
+ * Note: The priority cannot be set for every core interrupt.
+ */
+static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+ if(IRQn < 0) {
+ return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */
+ else {
+ return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
+}
+
+
+/**
+ * @brief Encode the priority for an interrupt
+ *
+ * @param uint32_t PriorityGroup is the used priority group
+ * @param uint32_t PreemptPriority is the preemptive priority value (starting from 0)
+ * @param uint32_t SubPriority is the sub priority value (starting from 0)
+ * @return uint32_t the priority for the interrupt
+ *
+ * Encode the priority for an interrupt with the given priority group,
+ * preemptive priority value and sub priority value.
+ * In case of a conflict between priority grouping and available
+ * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
+ *
+ * The returned priority value can be used for NVIC_SetPriority(...) function
+ */
+static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
+ SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
+
+ return (
+ ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
+ ((SubPriority & ((1 << (SubPriorityBits )) - 1)))
+ );
+}
+
+
+/**
+ * @brief Decode the priority of an interrupt
+ *
+ * @param uint32_t Priority the priority for the interrupt
+ * @param uint32_t PrioGroup is the used priority group
+ * @param uint32_t* pPreemptPrio is the preemptive priority value (starting from 0)
+ * @param uint32_t* pSubPrio is the sub priority value (starting from 0)
+ * @return none
+ *
+ * Decode an interrupt priority value with the given priority group to
+ * preemptive priority value and sub priority value.
+ * In case of a conflict between priority grouping and available
+ * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
+ *
+ * The priority value can be retrieved with NVIC_GetPriority(...) function
+ */
+static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
+{
+ uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
+ SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
+
+ *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
+ *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1);
+}
+
+
+
+/* ################################## SysTick function ############################################ */
+
+#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0)
+
+/* SysTick constants */
+#define SYSTICK_ENABLE 0 /* Config-Bit to start or stop the SysTick Timer */
+#define SYSTICK_TICKINT 1 /* Config-Bit to enable or disable the SysTick interrupt */
+#define SYSTICK_CLKSOURCE 2 /* Clocksource has the offset 2 in SysTick Control and Status Register */
+#define SYSTICK_MAXCOUNT ((1<<24) -1) /* SysTick MaxCount */
+
+/**
+ * @brief Initialize and start the SysTick counter and its interrupt.
+ *
+ * @param uint32_t ticks is the number of ticks between two interrupts
+ * @return none
+ *
+ * Initialise the system tick timer and its interrupt and start the
+ * system tick timer / counter in free running mode to generate
+ * periodical interrupts.
+ */
+static __INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+ if (ticks > SYSTICK_MAXCOUNT) return (1); /* Reload value impossible */
+
+ SysTick->LOAD = (ticks & SYSTICK_MAXCOUNT) - 1; /* set reload register */
+ NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */
+ SysTick->VAL = (0x00); /* Load the SysTick Counter Value */
+ SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<<SYSTICK_ENABLE) | (1<<SYSTICK_TICKINT); /* Enable SysTick IRQ and SysTick Timer */
+ return (0); /* Function successful */
+}
+
+#endif
+
+
+
+
+
+/* ################################## Reset function ############################################ */
+
+/**
+ * @brief Initiate a system reset request.
+ *
+ * @param none
+ * @return none
+ *
+ * Initialize a system reset request to reset the MCU
+ */
+static __INLINE void NVIC_SystemReset(void)
+{
+ SCB->AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<<NVIC_SYSRESETREQ)); /* Keep priority group unchanged */
+ __DSB(); /* Ensure completion of memory access */
+ while(1); /* wait until reset */
+}
+
+
+/* ##################################### Debug In/Output function ########################################### */
+
+extern volatile int ITM_RxBuffer; /* variable to receive characters */
+#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
+
+
+/**
+ * @brief Outputs a character via the ITM channel 0
+ *
+ * @param uint32_t character to output
+ * @return uint32_t input character
+ *
+ * The function outputs a character via the ITM channel 0.
+ * The function returns when no debugger is connected that has booked the output.
+ * It is blocking when a debugger is connected, but the previous character send is not transmitted.
+ */
+static __INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+ if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
+ (ITM->TCR & ITM_TCR_ITMENA) &&
+ (ITM->TER & (1UL << 0)) )
+ {
+ while (ITM->PORT[0].u32 == 0);
+ ITM->PORT[0].u8 = (uint8_t) ch;
+ }
+ return (ch);
+}
+
+
+/**
+ * @brief Inputs a character via variable ITM_RxBuffer
+ *
+ * @param none
+ * @return uint32_t input character
+ *
+ * The function inputs a character via variable ITM_RxBuffer.
+ * The function returns when no debugger is connected that has booked the output.
+ * It is blocking when a debugger is connected, but the previous character send is not transmitted.
+ */
+static __INLINE int ITM_ReceiveChar (void) {
+ int ch = -1; /* no character available */
+
+ if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+ ch = ITM_RxBuffer;
+ ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
+ }
+
+ return (ch);
+}
+
+
+/**
+ * @brief Check if a character via variable ITM_RxBuffer is available
+ *
+ * @param none
+ * @return int 1 = character available, 0 = no character available
+ *
+ * The function checks variable ITM_RxBuffer whether a character is available or not.
+ * The function returns '1' if a character is available and '0' if no character is available.
+ */
+static __INLINE int ITM_CheckChar (void) {
+
+ if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
+ return (0); /* no character available */
+ } else {
+ return (1); /* character available */
+ }
+}
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CM3_CORE_H__ */
+
+/*lint -restore */
Binary file LPC1768/core_cm3.o has changed
Binary file LPC1768/mbed.ar has changed
Binary file LPC1768/mbed_capi.ar has changed
Binary file LPC1768/stackheap.o has changed
Binary file LPC1768/startup_LPC17xx.o has changed
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC1768/system_LPC17xx.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,60 @@
+/******************************************************************************
+ * @file: system_LPC17xx.h
+ * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File
+ * for the NXP LPC17xx Device Series
+ * @version: V1.02
+ * @date: 27. July 2009
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (C) 2009 ARM Limited. All rights reserved.
+ *
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M3
+ * processor based microcontrollers. This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ ******************************************************************************/
+
+
+#ifndef __SYSTEM_LPC17xx_H
+#define __SYSTEM_LPC17xx_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
+
+
+/**
+ * Initialize the system
+ *
+ * @param none
+ * @return none
+ *
+ * @brief Setup the microcontroller system.
+ * Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param none
+ * @return none
+ *
+ * @brief Updates the SystemCoreClock with current core Clock
+ * retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __SYSTEM_LPC17xx_H */
Binary file LPC1768/system_LPC17xx.o has changed
--- a/LPC2300.h Thu May 14 14:44:00 2009 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,13 +0,0 @@ -/* mbed Microcontroller Library - LPC2300 - * Copyright (c) 2007-2008, sford - */ - -#ifndef MBED_LPC2300_H -#define MBED_LPC2300_H - -#include "LPC23xx.h" -#include "LPC2300_HAL.h" -#include "LPC2300_MAP.h" - -#endif -
--- a/LPC2300_HAL.h Thu May 14 14:44:00 2009 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,411 +0,0 @@
-/* mbed Microcontroller Library - LPC2300 HAL
- * Copyright (c) 2007-2008, sford
- *
- * This should be anything specific to abstraction the LPC2300
- *
- * The HAL has no state associated with it. It is just a nice way to poke registers
- * It is still specific to the chip, but a neat interface and a bit more general
- * it is subject ot change and not exposed to the general user
- */
-
-#ifndef MBED_LPC2300_HAL_H
-#define MBED_LPC2300_HAL_H
-
-namespace LPC2300 {
-
-/* Section LPC2300 */
-
-//===================================================================
-// General
-//===================================================================
-
-typedef volatile unsigned int reg32;
-
-#define NOT_CONNECTED (-1)
-
-//===================================================================
-// Pin Connect Block
-//===================================================================
-
-/* Function pin_function
- * Set the port function (0-3)
- */
-void pin_function(int port, int function);
-
-/* Function pin_pullup
- * Set the port resistor to pullup
- */
-void pin_pullup(int port);
-
-/* Function pin_pulldown
- * Set the port resistor to pulldown
- */
-void pin_pulldown(int port);
-
-/* Function pin_pullnone
- * Set the port resistor to none
- */
-void pin_pullnone(int port);
-
-//===================================================================
-// GPIO
-//===================================================================
-
-struct GPIORF {
- volatile unsigned int dir; // 0x00
- volatile unsigned int _nc; // 0x04
- volatile unsigned int _nc2; // 0x08
- volatile unsigned int _nc3; // 0x0C
- volatile unsigned int mask; // 0x10
- volatile unsigned int pin; // 0x14
- volatile unsigned int set; // 0x18
- volatile unsigned int clr; // 0x1C
-};
-
-/* Function gpio_input
- * Set the port GPIO as an input
- */
-void gpio_input(int port);
-
-/* Function gpio_output
- * Set the port GPIO as an output
- */
-void gpio_output(int port);
-
-/* Function gpio_write
- * Write a value to the GPIO port (v & 1)
- */
-void gpio_write(int port, int v);
-
-/* Function gpio_read
- * Read a value from the GPIO port (0 or 1)
- */
-int gpio_read(int port);
-
-//===================================================================
-// GPIO IRQs
-//===================================================================
-
-struct GPIOInterruptsRF {
- reg32 StatR; // 0x00
- reg32 StatF; // 0x04
- reg32 Clr; // 0x08
- reg32 EnR; // 0x0C
- reg32 EnF; // 0x10
-};
-
-/* Function gpio_irq_enable_rising
- * Enable the rising edge interrupt
- */
-void gpio_irq_enable_rising(int port);
-
-/* Function gpio_irq_enable_falling
- * Enable the falling edge interrupt
- */
-void gpio_irq_enable_falling(int port);
-
-/* Function gpio_irq_disable_rising
- * Disable the rising edge interrupt
- */
-void gpio_irq_disable_rising(int port);
-
-/* Function gpio_irq_disable_falling
- * Disable the falling edge interrupt
- */
-void gpio_irq_disable_falling(int port);
-
-/* Function gpio_irq_clear
- * Clear rising and falling interrupt for the port
- */
-void gpio_irq_clear(int port);
-
-int gpio_irq_pending();
-int gpio_irq_pending_rising(int port);
-int gpio_irq_pending_falling(int port);
-
-//===================================================================
-// Analog-to-Digital Converter
-//===================================================================
-
-/* Function adc_poweron
- * Turn on the ADC
- */
-void adc_poweron();
-
-/* Function adc_poweroff
- * Turn off the ADC
- */
-void adc_poweroff();
-
-/* Function adc_init
- * Setup the ADC ready for reading
- */
-void adc_init();
-
-/* Function adc_read
- * Read the value of the ADC (10-bit, id 0-5)
- */
-int adc_read(int id);
-
-//===================================================================
-// Digital-to-Analog Converter
-//===================================================================
-
-/* Function dac_poweron
- * Turn on the DAC
- */
-void dac_poweron();
-
-/* Function dac_poweroff
- * Turn off the DAC
- */
-void dac_poweroff();
-
-/* Function dac_init
- * Setup the DAC ready for writinbg
- */
-void dac_init();
-
-/* Function dac_write
- * Write a value to the DAC (10-bit)
- */
-void dac_write(int value);
-
-/* Function dac_read
- * Read the value currently set as the DAC output (10-bit)
- */
-int dac_read();
-
-//===================================================================
-// PWM
-//===================================================================
-
-struct LPC2368_PWM_RF {
- reg32 IR; // 0x00 - Interrupt Register
- reg32 TCR; // 0x04 - Timer Control Register
- reg32 TC; // 0x08 - Timer Counter
- reg32 PR; // 0x0C - Prescale Register
- reg32 PC; // 0x10 - Prescale Counter
- reg32 MCR; // 0x14 - Match Control Register
- reg32 MR0; // 0x18 - Match Register 0
- reg32 MR1; // 0x1C - Match Register 1
- reg32 MR2; // 0x20 - Match Register 2
- reg32 MR3; // 0x24 - Match Register 3
- reg32 CCR; // 0x28 - Capture Control Register
- reg32 CR0; // 0x2C - Capture Register 1
- reg32 CR1; // 0x30 - Capture Register 2
- reg32 CR2; // 0x34 - Capture Register 3
- reg32 CR3; // 0x38 - Capture Register 4
- reg32 EMR; // 0x3C - External Match Register
- reg32 MR4; // 0x40 - Match Register 4
- reg32 MR5; // 0x44 - Match Register 5
- reg32 MR6; // 0x48 - Match Register 6
- reg32 PCR; // 0x4C - PWM Control Register
- reg32 LER; // 0x50 - Load Enable Register
- reg32 _nc[7]; // 0x54-0x6C
- reg32 CTCR; // 0x70 - Count Control Register
-};
-
-#define LPC2368_PWM ((LPC2368_PWM_RF*)PWM1_BASE_ADDR)
-
-#define TCR_CNT_EN (1 << 0)
-#define TCR_RESET (1 << 1)
-#define TCR_PWM_EN (1 << 3)
-
-//===================================================================
-// SPI Master (SSP)
-//===================================================================
-
-struct SPIRF {
- reg32 CR0; // 0x00
- reg32 CR1; // 0x04
- reg32 DR; // 0x08
- reg32 SR; // 0x0C
- reg32 CPSR; // 0x10
- reg32 IMSC; // 0x14
- reg32 RIS; // 0x18
- reg32 MIS; // 0x1C
- reg32 ICR; // 0x20
- reg32 DMACR; // 0x24
-};
-
-void ssp_format(int id, int bits, int phase, int polarity);
-void ssp_frequency(int id, int hz);
-void ssp_enable(int id);
-void ssp_disable(int id);
-
-
-int ssp_read(int id);
-void ssp_write(int id, int value);
-int ssp_readable(int id);
-int ssp_writeable(int id);
-
-void ssp_poweron(int id);
-void ssp_poweroff(int id);
-
-/*
-int ssp_busy(int id);
-void ssp_clear(int id);
-*/
-
-
-//===================================================================
-// Uart
-//===================================================================
-
-struct UartRF {
- union {
- reg32 RBR; // 0x00 - Receive Buffer Register [DLAB=0]
- reg32 THR; // 0x00 - Transmit Holding Register [DLAB=0]
- reg32 DLL; // 0x00 - Divisor Latch (LSB) [DLAB=1]
- };
- union {
- reg32 DLM; // 0x04 - Divisor Latch (MSB) [DLAB=1]
- reg32 IER; // 0x04 - Interrupt Enable Register [DLAB=0]
- };
- union {
- reg32 IIR; // 0x08 - Interrupt ID Register
- reg32 FCR; // 0x08 - Fifo Control Register
- };
- reg32 LCR; // 0x0C - Line Control Register
- reg32 MCR; // 0x10 - Modem Control Register (UART1 only)
- reg32 LSR; // 0x14 - Line Status Register
- reg32 MSR; // 0x18 - Modem Status Register (UART1 only)
- reg32 SCR; // 0x1C - Scratch Pad Register
- reg32 ACR; // 0x20 - Auto-baud Control Register
- reg32 ICR; // 0x24 - IrDA Control Register (UART3 only)
- reg32 FDR; // 0x28 - Fractional Divider Register
- reg32 _nc; // 0x2C - unused
- reg32 TER; // 0x30 - Transmit Enable Register
-};
-
-enum Parity {
- None = 0,
- Odd,
- Even,
- Forced1,
- Forced0
-};
-
-/* Function uart_poweron
- * Turn on the Uart power
- */
-void uart_poweron(int id);
-
-/* Function uart_poweroff
- * Turn off the Uart power
- */
-void uart_poweroff(int id);
-
-void uart_baud(int id, int baudrate);
-void uart_format(int id, int data_bits, Parity parity, int stop_bits);
-void uart_enable(int id);
-void uart_disable(int id);
-
-int uart_getc(int id);
-void uart_putc(int id, int c);
-int uart_readable(int id);
-int uart_writable(int id);
-
-// I2C
-
-struct I2CRF {
- reg32 I2CONSET; // 0x00 - I2C Control Set Register
- reg32 I2STAT; // 0x04 - I2C Status Register
- reg32 I2DAT; // 0x08 - I2C Data Register
- reg32 I2ADR; // 0x0C - I2C Slave Address Register
- reg32 I2SCLH; // 0x10 - SCH Duty Cycle Register High
- reg32 I2SCLL; // 0x14 - SCL Duty Cycle Register Low
- reg32 I2CONCLR; // 0x18 - I2C Control Clear Register
-};
-
-
-void i2c_poweron(int id);
-void i2c_poweroff(int id);
-void i2c_frequency(int id, int hz);
-void i2c_enable(int id);
-void i2c_conset(int id, int start, int stop, int interrupt, int acknowledge);
-void i2c_conclr(int id, int start, int stop, int interrupt, int acknowledge);
-void i2c_wait_SI(int id);
-void i2c_clear_SI(int id);
-int i2c_status(int id);
-int i2c_start(int id, int address);
-int i2c_write(int id, int value);
-void i2c_stop(int id);
-int i2c_read(int id, int last);
-int i2c_read(int id);
-int i2c_readlast(int id);
-
-// Timer
-
-
-struct TimerRF {
- reg32 ir; // 0x00
- reg32 tcr; // 0x04
- reg32 tc; // 0x08
- reg32 pr; // 0x0C
- reg32 pc; // 0x10
- reg32 mcr; // 0x14
- reg32 mr0; // 0x18
- reg32 mr1; // 0x1C
- reg32 mr2; // 0x20
- reg32 mr3; // 0x24
- reg32 ccr; // 0x28
- reg32 cr0; // 0x2C
- reg32 cr1; // 0x30
- reg32 cr2; // 0x34
- reg32 cr3; // 0x38
- reg32 emr; // 0x3C
- reg32 _nc[12]; // 0x40-0x6C
- reg32 ctcr; // 0x70
-};
-
-/* Function timer_poweron
- * Turn on the Timer power
- */
-void timer_poweron(int id);
-
-/* Function timer_poweroff
- * Turn off the Timer power
- */
-void timer_poweroff(int id);
-
-void timer_start(int id, int hz);
-int timer_read(int id);
-
-//===================================================================
-// VIC
-//===================================================================
-
-struct VicRF {
- reg32 IRQStatus; // 0x000
- reg32 FIQStatus; // 0x004
- reg32 RawIntr; // 0x008
- reg32 IntSelect; // 0x00C
- reg32 IntEnable; // 0x010
- reg32 IntEnClr; // 0x014
- reg32 SoftInt; // 0x018
- reg32 SoftIntClear; // 0x01C
- reg32 Protection; // 0x020
- reg32 SWPriorityMask; // 0x024
- reg32 _nc[54]; // 0x028-0x0FC
- reg32 VectAddr[32]; // 0x100-0x17C
- reg32 _nc2[32]; // 0x180-0x1FC
- reg32 VectPriority[32]; // 0x200-0x27C
- reg32 _nc3[800]; // 0x280-0xEFC
- reg32 Address; // 0xF00
-};
-
-void vic_init();
-void vic_vector(int id, void (*fptr)(void) /*__irq*/ , int priority);
-void vic_enable(int id);
-void vic_disable(int id);
-void vic_priority(int id, int priority);
-void vic_acknowledge();
-
-
-
-} // namespace LPC2300
-
-#endif
-
--- a/LPC2300_MAP.h Thu May 14 14:44:00 2009 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,82 +0,0 @@
-/* mbed Microcontroller Library - LPC2300 MAP
- * Copyright (c) 2007-2008, sford
- *
- * This should be anything to do with the mapping of the LPC2300 on to the particular board implementation
- */
-
-#ifndef MBED_LPC2300_MAP_H
-#define MBED_LPC2300_MAP_H
-
-//===================================================================
-// Define the target board
-//===================================================================
-
-//#define TARGET_MBED64 1
-#define TARGET_PHAT40 1
-//#define TARGET_BREAKOUT 1
-
-//===================================================================
-
-#if TARGET_MBED64
-
-enum {
- LED1 = 65,
- LED2 = 66,
- LED3 = 67,
- LED4 = 68,
- USBTX = 69,
- USBRX = 70
-};
-
-#define LED1_PORT (4*32 + 28)
-#define LED2_PORT (3*32 + 25)
-#define LED3_PORT (4*32 + 29)
-#define LED4_PORT (3*32 + 26)
-
-#elif TARGET_PHAT40
-
-enum {
- NC = 0, // Not Connected
- LED1 = 32,
- LED2 = 33,
- LED3 = 34,
- LED4 = 35,
- USBTX = 36,
- USBRX = 37
-};
-
-#define LED1_PORT (1*32 + 18)
-#define LED2_PORT (1*32 + 20)
-#define LED3_PORT (1*32 + 21)
-#define LED4_PORT (1*32 + 23)
-
-#else
-#error "UNRECOGNISED TARGET"
-#endif
-
-namespace LPC2300 {
-
-#define PORT(x,y) ((x*32 + y))
-#define LIST_END 0xFF
-#define NOT_AVAILABLE 0xFF
-
-struct PortMap {
- unsigned char port; // P0.0 (0) to P4.31 (159)
- unsigned char id; // Resource ID
- unsigned char function; // Pin function
-};
-
-/* returns NOT_AVAILABLE if no port matches the pin */
-int pin_to_port(int pin);
-
-/* returns NULL if no map matches the pin */
-const PortMap* get_port_map(const PortMap* map, int pin);
-
-extern const PortMap ADC_PORTMAP[];
-extern const PortMap DAC_PORTMAP[];
-extern const PortMap PWM_PORTMAP[];
-
-} // namespace LPC2300
-
-#endif
-
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC2368/LPC2368.sct Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,12 @@
+
+LR_IROM1 0x00000000 0x80000 { ; load region size_region
+ ER_IROM1 0x00000000 0x80000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x40000120 0x7EE0 { ; RW data, inc space for realmonitor
+ .ANY (+RW +ZI)
+ }
+}
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC2368/LPC23xx.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,860 @@
+/* mbed Microcontroller Library - LPC23xx CMSIS-like structs
+ * Copyright (C) 2009 ARM Limited. All rights reserved.
+ *
+ * An LPC23xx header file, based on the CMSIS LPC17xx.h and old LPC23xx.h
+ */
+
+#ifndef __LPC23xx_H
+#define __LPC23xx_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/*
+ * ==========================================================================
+ * ---------- Interrupt Number Definition -----------------------------------
+ * ==========================================================================
+ */
+
+typedef enum IRQn
+{
+/****** LPC23xx Specific Interrupt Numbers *******************************************************/
+ WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */
+
+ TIMER0_IRQn = 4, /*!< Timer0 Interrupt */
+ TIMER1_IRQn = 5, /*!< Timer1 Interrupt */
+ UART0_IRQn = 6, /*!< UART0 Interrupt */
+ UART1_IRQn = 7, /*!< UART1 Interrupt */
+ PWM1_IRQn = 8, /*!< PWM1 Interrupt */
+ I2C0_IRQn = 9, /*!< I2C0 Interrupt */
+ SPI_IRQn = 10, /*!< SPI Interrupt */
+ SSP0_IRQn = 10, /*!< SSP0 Interrupt */
+ SSP1_IRQn = 11, /*!< SSP1 Interrupt */
+ PLL0_IRQn = 12, /*!< PLL0 Lock (Main PLL) Interrupt */
+ RTC_IRQn = 13, /*!< Real Time Clock Interrupt */
+ EINT0_IRQn = 14, /*!< External Interrupt 0 Interrupt */
+ EINT1_IRQn = 15, /*!< External Interrupt 1 Interrupt */
+ EINT2_IRQn = 16, /*!< External Interrupt 2 Interrupt */
+ EINT3_IRQn = 17, /*!< External Interrupt 3 Interrupt */
+ ADC_IRQn = 18, /*!< A/D Converter Interrupt */
+ I2C1_IRQn = 19, /*!< I2C1 Interrupt */
+ BOD_IRQn = 20, /*!< Brown-Out Detect Interrupt */
+ ENET_IRQn = 21, /*!< Ethernet Interrupt */
+ USB_IRQn = 22, /*!< USB Interrupt */
+ CAN_IRQn = 23, /*!< CAN Interrupt */
+ MIC_IRQn = 24, /*!< Multimedia Interface Controler */
+ DMA_IRQn = 25, /*!< General Purpose DMA Interrupt */
+ TIMER2_IRQn = 26, /*!< Timer2 Interrupt */
+ TIMER3_IRQn = 27, /*!< Timer3 Interrupt */
+ UART2_IRQn = 28, /*!< UART2 Interrupt */
+ UART3_IRQn = 29, /*!< UART3 Interrupt */
+ I2C2_IRQn = 30, /*!< I2C2 Interrupt */
+ I2S_IRQn = 31, /*!< I2S Interrupt */
+} IRQn_Type;
+
+/*
+ * ==========================================================================
+ * ----------- Processor and Core Peripheral Section ------------------------
+ * ==========================================================================
+ */
+
+/* Configuration of the ARM7 Processor and Core Peripherals */
+#define __MPU_PRESENT 0 /*!< MPU present or not */
+#define __NVIC_PRIO_BITS 4 /*!< Number of Bits used for Priority Levels */
+#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
+
+
+#include <core_arm7.h>
+#include "system_LPC23xx.h" /* System Header */
+
+
+/******************************************************************************/
+/* Device Specific Peripheral registers structures */
+/******************************************************************************/
+
+#pragma anon_unions
+
+/*------------- Vector Interupt Controler (VIC) ------------------------------*/
+typedef struct
+{
+ __I uint32_t IRQStatus;
+ __I uint32_t FIQStatus;
+ __I uint32_t RawIntr;
+ __IO uint32_t IntSelect;
+ __IO uint32_t IntEnable;
+ __O uint32_t IntEnClr;
+ __IO uint32_t SoftInt;
+ __O uint32_t SoftIntClr;
+ __IO uint32_t Protection;
+ __IO uint32_t SWPriorityMask;
+ __IO uint32_t RESERVED0[54];
+ __IO uint32_t VectAddr[32];
+ __IO uint32_t RESERVED1[32];
+ __IO uint32_t VectPriority[32];
+ __IO uint32_t RESERVED2[800];
+ __IO uint32_t Address;
+} LPC_VIC_TypeDef;
+
+/*------------- System Control (SC) ------------------------------------------*/
+typedef struct
+{
+ __IO uint32_t MAMCR;
+ __IO uint32_t MAMTIM;
+ uint32_t RESERVED0[14];
+ __IO uint32_t MEMMAP;
+ uint32_t RESERVED1[15];
+ __IO uint32_t PLL0CON; /* Clocking and Power Control */
+ __IO uint32_t PLL0CFG;
+ __I uint32_t PLL0STAT;
+ __O uint32_t PLL0FEED;
+ uint32_t RESERVED2[12];
+ __IO uint32_t PCON;
+ __IO uint32_t PCONP;
+ uint32_t RESERVED3[15];
+ __IO uint32_t CCLKCFG;
+ __IO uint32_t USBCLKCFG;
+ __IO uint32_t CLKSRCSEL;
+ uint32_t RESERVED4[12];
+ __IO uint32_t EXTINT; /* External Interrupts */
+ __IO uint32_t INTWAKE;
+ __IO uint32_t EXTMODE;
+ __IO uint32_t EXTPOLAR;
+ uint32_t RESERVED6[12];
+ __IO uint32_t RSID; /* Reset */
+ __IO uint32_t CSPR;
+ __IO uint32_t AHBCFG1;
+ __IO uint32_t AHBCFG2;
+ uint32_t RESERVED7[4];
+ __IO uint32_t SCS; /* Syscon Miscellaneous Registers */
+ __IO uint32_t IRCTRIM; /* Clock Dividers */
+ __IO uint32_t PCLKSEL0;
+ __IO uint32_t PCLKSEL1;
+ uint32_t RESERVED8[4];
+ __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */
+ uint32_t RESERVED9;
+// __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */
+ } LPC_SC_TypeDef;
+
+/*------------- Pin Connect Block (PINCON) -----------------------------------*/
+typedef struct
+{
+ __IO uint32_t PINSEL0;
+ __IO uint32_t PINSEL1;
+ __IO uint32_t PINSEL2;
+ __IO uint32_t PINSEL3;
+ __IO uint32_t PINSEL4;
+ __IO uint32_t PINSEL5;
+ __IO uint32_t PINSEL6;
+ __IO uint32_t PINSEL7;
+ __IO uint32_t PINSEL8;
+ __IO uint32_t PINSEL9;
+ __IO uint32_t PINSEL10;
+ uint32_t RESERVED0[5];
+ __IO uint32_t PINMODE0;
+ __IO uint32_t PINMODE1;
+ __IO uint32_t PINMODE2;
+ __IO uint32_t PINMODE3;
+ __IO uint32_t PINMODE4;
+ __IO uint32_t PINMODE5;
+ __IO uint32_t PINMODE6;
+ __IO uint32_t PINMODE7;
+ __IO uint32_t PINMODE8;
+ __IO uint32_t PINMODE9;
+ __IO uint32_t PINMODE_OD0;
+ __IO uint32_t PINMODE_OD1;
+ __IO uint32_t PINMODE_OD2;
+ __IO uint32_t PINMODE_OD3;
+ __IO uint32_t PINMODE_OD4;
+} LPC_PINCON_TypeDef;
+
+/*------------- General Purpose Input/Output (GPIO) --------------------------*/
+typedef struct
+{
+ __IO uint32_t FIODIR;
+ uint32_t RESERVED0[3];
+ __IO uint32_t FIOMASK;
+ __IO uint32_t FIOPIN;
+ __IO uint32_t FIOSET;
+ __O uint32_t FIOCLR;
+} LPC_GPIO_TypeDef;
+
+typedef struct
+{
+ __I uint32_t IntStatus;
+ __I uint32_t IO0IntStatR;
+ __I uint32_t IO0IntStatF;
+ __O uint32_t IO0IntClr;
+ __IO uint32_t IO0IntEnR;
+ __IO uint32_t IO0IntEnF;
+ uint32_t RESERVED0[3];
+ __I uint32_t IO2IntStatR;
+ __I uint32_t IO2IntStatF;
+ __O uint32_t IO2IntClr;
+ __IO uint32_t IO2IntEnR;
+ __IO uint32_t IO2IntEnF;
+} LPC_GPIOINT_TypeDef;
+
+/*------------- Timer (TIM) --------------------------------------------------*/
+typedef struct
+{
+ __IO uint32_t IR;
+ __IO uint32_t TCR;
+ __IO uint32_t TC;
+ __IO uint32_t PR;
+ __IO uint32_t PC;
+ __IO uint32_t MCR;
+ __IO uint32_t MR0;
+ __IO uint32_t MR1;
+ __IO uint32_t MR2;
+ __IO uint32_t MR3;
+ __IO uint32_t CCR;
+ __I uint32_t CR0;
+ __I uint32_t CR1;
+ uint32_t RESERVED0[2];
+ __IO uint32_t EMR;
+ uint32_t RESERVED1[24];
+ __IO uint32_t CTCR;
+} LPC_TIM_TypeDef;
+
+/*------------- Pulse-Width Modulation (PWM) ---------------------------------*/
+typedef struct
+{
+ __IO uint32_t IR;
+ __IO uint32_t TCR;
+ __IO uint32_t TC;
+ __IO uint32_t PR;
+ __IO uint32_t PC;
+ __IO uint32_t MCR;
+ __IO uint32_t MR0;
+ __IO uint32_t MR1;
+ __IO uint32_t MR2;
+ __IO uint32_t MR3;
+ __IO uint32_t CCR;
+ __I uint32_t CR0;
+ __I uint32_t CR1;
+ __I uint32_t CR2;
+ __I uint32_t CR3;
+ uint32_t RESERVED0;
+ __IO uint32_t MR4;
+ __IO uint32_t MR5;
+ __IO uint32_t MR6;
+ __IO uint32_t PCR;
+ __IO uint32_t LER;
+ uint32_t RESERVED1[7];
+ __IO uint32_t CTCR;
+} LPC_PWM_TypeDef;
+
+/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
+typedef struct
+{
+ union {
+ __I uint8_t RBR;
+ __O uint8_t THR;
+ __IO uint8_t DLL;
+ uint32_t RESERVED0;
+ };
+ union {
+ __IO uint8_t DLM;
+ __IO uint32_t IER;
+ };
+ union {
+ __I uint32_t IIR;
+ __O uint8_t FCR;
+ };
+ __IO uint8_t LCR;
+ uint8_t RESERVED1[7];
+ __IO uint8_t LSR;
+ uint8_t RESERVED2[7];
+ __IO uint8_t SCR;
+ uint8_t RESERVED3[3];
+ __IO uint32_t ACR;
+ __IO uint8_t ICR;
+ uint8_t RESERVED4[3];
+ __IO uint8_t FDR;
+ uint8_t RESERVED5[7];
+ __IO uint8_t TER;
+ uint8_t RESERVED6[27];
+ __IO uint8_t RS485CTRL;
+ uint8_t RESERVED7[3];
+ __IO uint8_t ADRMATCH;
+} LPC_UART_TypeDef;
+
+typedef struct
+{
+ union {
+ __I uint8_t RBR;
+ __O uint8_t THR;
+ __IO uint8_t DLL;
+ uint32_t RESERVED0;
+ };
+ union {
+ __IO uint8_t DLM;
+ __IO uint32_t IER;
+ };
+ union {
+ __I uint32_t IIR;
+ __O uint8_t FCR;
+ };
+ __IO uint8_t LCR;
+ uint8_t RESERVED1[3];
+ __IO uint8_t MCR;
+ uint8_t RESERVED2[3];
+ __IO uint8_t LSR;
+ uint8_t RESERVED3[3];
+ __IO uint8_t MSR;
+ uint8_t RESERVED4[3];
+ __IO uint8_t SCR;
+ uint8_t RESERVED5[3];
+ __IO uint32_t ACR;
+ uint32_t RESERVED6;
+ __IO uint32_t FDR;
+ uint32_t RESERVED7;
+ __IO uint8_t TER;
+ uint8_t RESERVED8[27];
+ __IO uint8_t RS485CTRL;
+ uint8_t RESERVED9[3];
+ __IO uint8_t ADRMATCH;
+ uint8_t RESERVED10[3];
+ __IO uint8_t RS485DLY;
+} LPC_UART1_TypeDef;
+
+/*------------- Serial Peripheral Interface (SPI) ----------------------------*/
+typedef struct
+{
+ __IO uint32_t SPCR;
+ __I uint32_t SPSR;
+ __IO uint32_t SPDR;
+ __IO uint32_t SPCCR;
+ uint32_t RESERVED0[3];
+ __IO uint32_t SPINT;
+} LPC_SPI_TypeDef;
+
+/*------------- Synchronous Serial Communication (SSP) -----------------------*/
+typedef struct
+{
+ __IO uint32_t CR0;
+ __IO uint32_t CR1;
+ __IO uint32_t DR;
+ __I uint32_t SR;
+ __IO uint32_t CPSR;
+ __IO uint32_t IMSC;
+ __IO uint32_t RIS;
+ __IO uint32_t MIS;
+ __IO uint32_t ICR;
+ __IO uint32_t DMACR;
+} LPC_SSP_TypeDef;
+
+/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
+typedef struct
+{
+ __IO uint32_t I2CONSET;
+ __I uint32_t I2STAT;
+ __IO uint32_t I2DAT;
+ __IO uint32_t I2ADR0;
+ __IO uint32_t I2SCLH;
+ __IO uint32_t I2SCLL;
+ __O uint32_t I2CONCLR;
+ __IO uint32_t MMCTRL;
+ __IO uint32_t I2ADR1;
+ __IO uint32_t I2ADR2;
+ __IO uint32_t I2ADR3;
+ __I uint32_t I2DATA_BUFFER;
+ __IO uint32_t I2MASK0;
+ __IO uint32_t I2MASK1;
+ __IO uint32_t I2MASK2;
+ __IO uint32_t I2MASK3;
+} LPC_I2C_TypeDef;
+
+/*------------- Inter IC Sound (I2S) -----------------------------------------*/
+typedef struct
+{
+ __IO uint32_t I2SDAO;
+ __I uint32_t I2SDAI;
+ __O uint32_t I2STXFIFO;
+ __I uint32_t I2SRXFIFO;
+ __I uint32_t I2SSTATE;
+ __IO uint32_t I2SDMA1;
+ __IO uint32_t I2SDMA2;
+ __IO uint32_t I2SIRQ;
+ __IO uint32_t I2STXRATE;
+ __IO uint32_t I2SRXRATE;
+ __IO uint32_t I2STXBITRATE;
+ __IO uint32_t I2SRXBITRATE;
+ __IO uint32_t I2STXMODE;
+ __IO uint32_t I2SRXMODE;
+} LPC_I2S_TypeDef;
+
+/*------------- Real-Time Clock (RTC) ----------------------------------------*/
+typedef struct
+{
+ __IO uint8_t ILR;
+ uint8_t RESERVED0[3];
+ __IO uint8_t CCR;
+ uint8_t RESERVED1[3];
+ __IO uint8_t CIIR;
+ uint8_t RESERVED2[3];
+ __IO uint8_t AMR;
+ uint8_t RESERVED3[3];
+ __I uint32_t CTIME0;
+ __I uint32_t CTIME1;
+ __I uint32_t CTIME2;
+ __IO uint8_t SEC;
+ uint8_t RESERVED4[3];
+ __IO uint8_t MIN;
+ uint8_t RESERVED5[3];
+ __IO uint8_t HOUR;
+ uint8_t RESERVED6[3];
+ __IO uint8_t DOM;
+ uint8_t RESERVED7[3];
+ __IO uint8_t DOW;
+ uint8_t RESERVED8[3];
+ __IO uint16_t DOY;
+ uint16_t RESERVED9;
+ __IO uint8_t MONTH;
+ uint8_t RESERVED10[3];
+ __IO uint16_t YEAR;
+ uint16_t RESERVED11;
+ __IO uint32_t CALIBRATION;
+ __IO uint32_t GPREG0;
+ __IO uint32_t GPREG1;
+ __IO uint32_t GPREG2;
+ __IO uint32_t GPREG3;
+ __IO uint32_t GPREG4;
+ __IO uint8_t WAKEUPDIS;
+ uint8_t RESERVED12[3];
+ __IO uint8_t PWRCTRL;
+ uint8_t RESERVED13[3];
+ __IO uint8_t ALSEC;
+ uint8_t RESERVED14[3];
+ __IO uint8_t ALMIN;
+ uint8_t RESERVED15[3];
+ __IO uint8_t ALHOUR;
+ uint8_t RESERVED16[3];
+ __IO uint8_t ALDOM;
+ uint8_t RESERVED17[3];
+ __IO uint8_t ALDOW;
+ uint8_t RESERVED18[3];
+ __IO uint16_t ALDOY;
+ uint16_t RESERVED19;
+ __IO uint8_t ALMON;
+ uint8_t RESERVED20[3];
+ __IO uint16_t ALYEAR;
+ uint16_t RESERVED21;
+} LPC_RTC_TypeDef;
+
+/*------------- Watchdog Timer (WDT) -----------------------------------------*/
+typedef struct
+{
+ __IO uint8_t WDMOD;
+ uint8_t RESERVED0[3];
+ __IO uint32_t WDTC;
+ __O uint8_t WDFEED;
+ uint8_t RESERVED1[3];
+ __I uint32_t WDTV;
+ __IO uint32_t WDCLKSEL;
+} LPC_WDT_TypeDef;
+
+/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/
+typedef struct
+{
+ __IO uint32_t ADCR;
+ __IO uint32_t ADGDR;
+ uint32_t RESERVED0;
+ __IO uint32_t ADINTEN;
+ __I uint32_t ADDR0;
+ __I uint32_t ADDR1;
+ __I uint32_t ADDR2;
+ __I uint32_t ADDR3;
+ __I uint32_t ADDR4;
+ __I uint32_t ADDR5;
+ __I uint32_t ADDR6;
+ __I uint32_t ADDR7;
+ __I uint32_t ADSTAT;
+ __IO uint32_t ADTRM;
+} LPC_ADC_TypeDef;
+
+/*------------- Digital-to-Analog Converter (DAC) ----------------------------*/
+typedef struct
+{
+ __IO uint32_t DACR;
+ __IO uint32_t DACCTRL;
+ __IO uint16_t DACCNTVAL;
+} LPC_DAC_TypeDef;
+
+/*------------- Multimedia Card Interface (MCI) ------------------------------*/
+typedef struct
+{
+ __IO uint32_t MCIPower; /* Power control */
+ __IO uint32_t MCIClock; /* Clock control */
+ __IO uint32_t MCIArgument;
+ __IO uint32_t MMCCommand;
+ __I uint32_t MCIRespCmd;
+ __I uint32_t MCIResponse0;
+ __I uint32_t MCIResponse1;
+ __I uint32_t MCIResponse2;
+ __I uint32_t MCIResponse3;
+ __IO uint32_t MCIDataTimer;
+ __IO uint32_t MCIDataLength;
+ __IO uint32_t MCIDataCtrl;
+ __I uint32_t MCIDataCnt;
+} LPC_MCI_TypeDef;
+
+/*------------- Controller Area Network (CAN) --------------------------------*/
+typedef struct
+{
+ __IO uint32_t mask[512]; /* ID Masks */
+} LPC_CANAF_RAM_TypeDef;
+
+typedef struct /* Acceptance Filter Registers */
+{
+ __IO uint32_t AFMR;
+ __IO uint32_t SFF_sa;
+ __IO uint32_t SFF_GRP_sa;
+ __IO uint32_t EFF_sa;
+ __IO uint32_t EFF_GRP_sa;
+ __IO uint32_t ENDofTable;
+ __I uint32_t LUTerrAd;
+ __I uint32_t LUTerr;
+} LPC_CANAF_TypeDef;
+
+typedef struct /* Central Registers */
+{
+ __I uint32_t CANTxSR;
+ __I uint32_t CANRxSR;
+ __I uint32_t CANMSR;
+} LPC_CANCR_TypeDef;
+
+typedef struct /* Controller Registers */
+{
+ __IO uint32_t MOD;
+ __O uint32_t CMR;
+ __IO uint32_t GSR;
+ __I uint32_t ICR;
+ __IO uint32_t IER;
+ __IO uint32_t BTR;
+ __IO uint32_t EWL;
+ __I uint32_t SR;
+ __IO uint32_t RFS;
+ __IO uint32_t RID;
+ __IO uint32_t RDA;
+ __IO uint32_t RDB;
+ __IO uint32_t TFI1;
+ __IO uint32_t TID1;
+ __IO uint32_t TDA1;
+ __IO uint32_t TDB1;
+ __IO uint32_t TFI2;
+ __IO uint32_t TID2;
+ __IO uint32_t TDA2;
+ __IO uint32_t TDB2;
+ __IO uint32_t TFI3;
+ __IO uint32_t TID3;
+ __IO uint32_t TDA3;
+ __IO uint32_t TDB3;
+} LPC_CAN_TypeDef;
+
+/*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/
+typedef struct /* Common Registers */
+{
+ __I uint32_t DMACIntStat;
+ __I uint32_t DMACIntTCStat;
+ __O uint32_t DMACIntTCClear;
+ __I uint32_t DMACIntErrStat;
+ __O uint32_t DMACIntErrClr;
+ __I uint32_t DMACRawIntTCStat;
+ __I uint32_t DMACRawIntErrStat;
+ __I uint32_t DMACEnbldChns;
+ __IO uint32_t DMACSoftBReq;
+ __IO uint32_t DMACSoftSReq;
+ __IO uint32_t DMACSoftLBReq;
+ __IO uint32_t DMACSoftLSReq;
+ __IO uint32_t DMACConfig;
+ __IO uint32_t DMACSync;
+} LPC_GPDMA_TypeDef;
+
+typedef struct /* Channel Registers */
+{
+ __IO uint32_t DMACCSrcAddr;
+ __IO uint32_t DMACCDestAddr;
+ __IO uint32_t DMACCLLI;
+ __IO uint32_t DMACCControl;
+ __IO uint32_t DMACCConfig;
+} LPC_GPDMACH_TypeDef;
+
+/*------------- Universal Serial Bus (USB) -----------------------------------*/
+typedef struct
+{
+ __I uint32_t HcRevision; /* USB Host Registers */
+ __IO uint32_t HcControl;
+ __IO uint32_t HcCommandStatus;
+ __IO uint32_t HcInterruptStatus;
+ __IO uint32_t HcInterruptEnable;
+ __IO uint32_t HcInterruptDisable;
+ __IO uint32_t HcHCCA;
+ __I uint32_t HcPeriodCurrentED;
+ __IO uint32_t HcControlHeadED;
+ __IO uint32_t HcControlCurrentED;
+ __IO uint32_t HcBulkHeadED;
+ __IO uint32_t HcBulkCurrentED;
+ __I uint32_t HcDoneHead;
+ __IO uint32_t HcFmInterval;
+ __I uint32_t HcFmRemaining;
+ __I uint32_t HcFmNumber;
+ __IO uint32_t HcPeriodicStart;
+ __IO uint32_t HcLSTreshold;
+ __IO uint32_t HcRhDescriptorA;
+ __IO uint32_t HcRhDescriptorB;
+ __IO uint32_t HcRhStatus;
+ __IO uint32_t HcRhPortStatus1;
+ __IO uint32_t HcRhPortStatus2;
+ uint32_t RESERVED0[40];
+ __I uint32_t Module_ID;
+
+ __I uint32_t OTGIntSt; /* USB On-The-Go Registers */
+ __IO uint32_t OTGIntEn;
+ __O uint32_t OTGIntSet;
+ __O uint32_t OTGIntClr;
+ __IO uint32_t OTGStCtrl;
+ __IO uint32_t OTGTmr;
+ uint32_t RESERVED1[58];
+
+ __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */
+ __IO uint32_t USBDevIntEn;
+ __O uint32_t USBDevIntClr;
+ __O uint32_t USBDevIntSet;
+
+ __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */
+ __I uint32_t USBCmdData;
+
+ __I uint32_t USBRxData; /* USB Device Transfer Registers */
+ __O uint32_t USBTxData;
+ __I uint32_t USBRxPLen;
+ __O uint32_t USBTxPLen;
+ __IO uint32_t USBCtrl;
+ __O uint32_t USBDevIntPri;
+
+ __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */
+ __IO uint32_t USBEpIntEn;
+ __O uint32_t USBEpIntClr;
+ __O uint32_t USBEpIntSet;
+ __O uint32_t USBEpIntPri;
+
+ __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/
+ __O uint32_t USBEpInd;
+ __IO uint32_t USBMaxPSize;
+
+ __I uint32_t USBDMARSt; /* USB Device DMA Registers */
+ __O uint32_t USBDMARClr;
+ __O uint32_t USBDMARSet;
+ uint32_t RESERVED2[9];
+ __IO uint32_t USBUDCAH;
+ __I uint32_t USBEpDMASt;
+ __O uint32_t USBEpDMAEn;
+ __O uint32_t USBEpDMADis;
+ __I uint32_t USBDMAIntSt;
+ __IO uint32_t USBDMAIntEn;
+ uint32_t RESERVED3[2];
+ __I uint32_t USBEoTIntSt;
+ __O uint32_t USBEoTIntClr;
+ __O uint32_t USBEoTIntSet;
+ __I uint32_t USBNDDRIntSt;
+ __O uint32_t USBNDDRIntClr;
+ __O uint32_t USBNDDRIntSet;
+ __I uint32_t USBSysErrIntSt;
+ __O uint32_t USBSysErrIntClr;
+ __O uint32_t USBSysErrIntSet;
+ uint32_t RESERVED4[15];
+
+ __I uint32_t I2C_RX; /* USB OTG I2C Registers */
+ __O uint32_t I2C_WO;
+ __I uint32_t I2C_STS;
+ __IO uint32_t I2C_CTL;
+ __IO uint32_t I2C_CLKHI;
+ __O uint32_t I2C_CLKLO;
+ uint32_t RESERVED5[823];
+
+ union {
+ __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */
+ __IO uint32_t OTGClkCtrl;
+ };
+ union {
+ __I uint32_t USBClkSt;
+ __I uint32_t OTGClkSt;
+ };
+} LPC_USB_TypeDef;
+
+/*------------- Ethernet Media Access Controller (EMAC) ----------------------*/
+typedef struct
+{
+ __IO uint32_t MAC1; /* MAC Registers */
+ __IO uint32_t MAC2;
+ __IO uint32_t IPGT;
+ __IO uint32_t IPGR;
+ __IO uint32_t CLRT;
+ __IO uint32_t MAXF;
+ __IO uint32_t SUPP;
+ __IO uint32_t TEST;
+ __IO uint32_t MCFG;
+ __IO uint32_t MCMD;
+ __IO uint32_t MADR;
+ __O uint32_t MWTD;
+ __I uint32_t MRDD;
+ __I uint32_t MIND;
+ uint32_t RESERVED0[2];
+ __IO uint32_t SA0;
+ __IO uint32_t SA1;
+ __IO uint32_t SA2;
+ uint32_t RESERVED1[45];
+ __IO uint32_t Command; /* Control Registers */
+ __I uint32_t Status;
+ __IO uint32_t RxDescriptor;
+ __IO uint32_t RxStatus;
+ __IO uint32_t RxDescriptorNumber;
+ __I uint32_t RxProduceIndex;
+ __IO uint32_t RxConsumeIndex;
+ __IO uint32_t TxDescriptor;
+ __IO uint32_t TxStatus;
+ __IO uint32_t TxDescriptorNumber;
+ __IO uint32_t TxProduceIndex;
+ __I uint32_t TxConsumeIndex;
+ uint32_t RESERVED2[10];
+ __I uint32_t TSV0;
+ __I uint32_t TSV1;
+ __I uint32_t RSV;
+ uint32_t RESERVED3[3];
+ __IO uint32_t FlowControlCounter;
+ __I uint32_t FlowControlStatus;
+ uint32_t RESERVED4[34];
+ __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */
+ __IO uint32_t RxFilterWoLStatus;
+ __IO uint32_t RxFilterWoLClear;
+ uint32_t RESERVED5;
+ __IO uint32_t HashFilterL;
+ __IO uint32_t HashFilterH;
+ uint32_t RESERVED6[882];
+ __I uint32_t IntStatus; /* Module Control Registers */
+ __IO uint32_t IntEnable;
+ __O uint32_t IntClear;
+ __O uint32_t IntSet;
+ uint32_t RESERVED7;
+ __IO uint32_t PowerDown;
+ uint32_t RESERVED8;
+ __IO uint32_t Module_ID;
+} LPC_EMAC_TypeDef;
+
+#pragma no_anon_unions
+
+
+/******************************************************************************/
+/* Peripheral memory map */
+/******************************************************************************/
+/* Base addresses */
+
+/* AHB Peripheral # 0 */
+
+/*
+#define FLASH_BASE (0x00000000UL)
+#define RAM_BASE (0x10000000UL)
+#define GPIO_BASE (0x2009C000UL)
+#define APB0_BASE (0x40000000UL)
+#define APB1_BASE (0x40080000UL)
+#define AHB_BASE (0x50000000UL)
+#define CM3_BASE (0xE0000000UL)
+*/
+
+// TODO - #define VIC_BASE_ADDR 0xFFFFF000
+
+#define LPC_WDT_BASE (0xE0000000)
+#define LPC_TIM0_BASE (0xE0004000)
+#define LPC_TIM1_BASE (0xE0008000)
+#define LPC_UART0_BASE (0xE000C000)
+#define LPC_UART1_BASE (0xE0010000)
+#define LPC_PWM1_BASE (0xE0018000)
+#define LPC_I2C0_BASE (0xE001C000)
+#define LPC_SPI_BASE (0xE0020000)
+#define LPC_RTC_BASE (0xE0024000)
+#define LPC_GPIOINT_BASE (0xE0028080)
+#define LPC_PINCON_BASE (0xE002C000)
+#define LPC_SSP1_BASE (0xE0030000)
+#define LPC_ADC_BASE (0xE0034000)
+#define LPC_CANAF_RAM_BASE (0xE0038000)
+#define LPC_CANAF_BASE (0xE003C000)
+#define LPC_CANCR_BASE (0xE0040000)
+#define LPC_CAN1_BASE (0xE0044000)
+#define LPC_CAN2_BASE (0xE0048000)
+#define LPC_I2C1_BASE (0xE005C000)
+#define LPC_SSP0_BASE (0xE0068000)
+#define LPC_DAC_BASE (0xE006C000)
+#define LPC_TIM2_BASE (0xE0070000)
+#define LPC_TIM3_BASE (0xE0074000)
+#define LPC_UART2_BASE (0xE0078000)
+#define LPC_UART3_BASE (0xE007C000)
+#define LPC_I2C2_BASE (0xE0080000)
+#define LPC_I2S_BASE (0xE0088000)
+#define LPC_MCI_BASE (0xE008C000)
+#define LPC_SC_BASE (0xE01FC000)
+#define LPC_EMAC_BASE (0xFFE00000)
+#define LPC_GPDMA_BASE (0xFFE04000)
+#define LPC_GPDMACH0_BASE (0xFFE04100)
+#define LPC_GPDMACH1_BASE (0xFFE04120)
+#define LPC_USB_BASE (0xE01FC1C0)
+#define LPC_VIC_BASE (0xFFFFF000)
+
+/* GPIOs */
+#define LPC_GPIO0_BASE (0x3FFFC000)
+#define LPC_GPIO1_BASE (0x3FFFC020)
+#define LPC_GPIO2_BASE (0x3FFFC040)
+#define LPC_GPIO3_BASE (0x3FFFC060)
+#define LPC_GPIO4_BASE (0x3FFFC080)
+
+
+/******************************************************************************/
+/* Peripheral declaration */
+/******************************************************************************/
+#define LPC_SC (( LPC_SC_TypeDef *) LPC_SC_BASE)
+#define LPC_GPIO0 (( LPC_GPIO_TypeDef *) LPC_GPIO0_BASE)
+#define LPC_GPIO1 (( LPC_GPIO_TypeDef *) LPC_GPIO1_BASE)
+#define LPC_GPIO2 (( LPC_GPIO_TypeDef *) LPC_GPIO2_BASE)
+#define LPC_GPIO3 (( LPC_GPIO_TypeDef *) LPC_GPIO3_BASE)
+#define LPC_GPIO4 (( LPC_GPIO_TypeDef *) LPC_GPIO4_BASE)
+#define LPC_WDT (( LPC_WDT_TypeDef *) LPC_WDT_BASE)
+#define LPC_TIM0 (( LPC_TIM_TypeDef *) LPC_TIM0_BASE)
+#define LPC_TIM1 (( LPC_TIM_TypeDef *) LPC_TIM1_BASE)
+#define LPC_TIM2 (( LPC_TIM_TypeDef *) LPC_TIM2_BASE)
+#define LPC_TIM3 (( LPC_TIM_TypeDef *) LPC_TIM3_BASE)
+#define LPC_UART0 (( LPC_UART_TypeDef *) LPC_UART0_BASE)
+#define LPC_UART1 (( LPC_UART1_TypeDef *) LPC_UART1_BASE)
+#define LPC_UART2 (( LPC_UART_TypeDef *) LPC_UART2_BASE)
+#define LPC_UART3 (( LPC_UART_TypeDef *) LPC_UART3_BASE)
+#define LPC_PWM1 (( LPC_PWM_TypeDef *) LPC_PWM1_BASE)
+#define LPC_I2C0 (( LPC_I2C_TypeDef *) LPC_I2C0_BASE)
+#define LPC_I2C1 (( LPC_I2C_TypeDef *) LPC_I2C1_BASE)
+#define LPC_I2C2 (( LPC_I2C_TypeDef *) LPC_I2C2_BASE)
+#define LPC_I2S (( LPC_I2S_TypeDef *) LPC_I2S_BASE)
+#define LPC_SPI (( LPC_SPI_TypeDef *) LPC_SPI_BASE)
+#define LPC_RTC (( LPC_RTC_TypeDef *) LPC_RTC_BASE)
+#define LPC_GPIOINT (( LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE)
+#define LPC_PINCON (( LPC_PINCON_TypeDef *) LPC_PINCON_BASE)
+#define LPC_SSP0 (( LPC_SSP_TypeDef *) LPC_SSP0_BASE)
+#define LPC_SSP1 (( LPC_SSP_TypeDef *) LPC_SSP1_BASE)
+#define LPC_ADC (( LPC_ADC_TypeDef *) LPC_ADC_BASE)
+#define LPC_DAC (( LPC_DAC_TypeDef *) LPC_DAC_BASE)
+#define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
+#define LPC_CANAF (( LPC_CANAF_TypeDef *) LPC_CANAF_BASE)
+#define LPC_CANCR (( LPC_CANCR_TypeDef *) LPC_CANCR_BASE)
+#define LPC_CAN1 (( LPC_CAN_TypeDef *) LPC_CAN1_BASE)
+#define LPC_CAN2 (( LPC_CAN_TypeDef *) LPC_CAN2_BASE)
+#define LPC_MIC (( LPC_MIC_TypeDef *) LPC_MIC_BASE)
+#define LPC_EMAC (( LPC_EMAC_TypeDef *) LPC_EMAC_BASE)
+#define LPC_GPDMA (( LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE)
+#define LPC_GPDMACH0 (( LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE)
+#define LPC_GPDMACH1 (( LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE)
+#define LPC_USB (( LPC_USB_TypeDef *) LPC_USB_BASE)
+#define LPC_VIC (( LPC_VIC_TypeDef *) LPC_VIC_BASE)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif // __LPC23xx_H
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC2368/core_arm7.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,242 @@
+/* mbed Microcontroller Library
+ * Copyright (C) 2008-2009 ARM Limited. All rights reserved.
+ *
+ * ARM7 version of CMSIS-like functionality - not advised for use outside mbed!
+ * based on core_cm3.h, V1.20
+ */
+
+#ifndef __ARM7_CORE_H__
+#define __ARM7_CORE_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */
+#define __CM3_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */
+#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
+
+#define __CORTEX_M (0x03) /*!< Cortex core */
+
+/**
+ * Lint configuration \n
+ * ----------------------- \n
+ *
+ * The following Lint messages will be suppressed and not shown: \n
+ * \n
+ * --- Error 10: --- \n
+ * register uint32_t __regBasePri __asm("basepri"); \n
+ * Error 10: Expecting ';' \n
+ * \n
+ * --- Error 530: --- \n
+ * return(__regBasePri); \n
+ * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n
+ * \n
+ * --- Error 550: --- \n
+ * __regBasePri = (basePri & 0x1ff); \n
+ * } \n
+ * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n
+ * \n
+ * --- Error 754: --- \n
+ * uint32_t RESERVED0[24]; \n
+ * Info 754: local structure member '<some, not used in the HAL>' (line 109, file ./cm3_core.h) not referenced \n
+ * \n
+ * --- Error 750: --- \n
+ * #define __CM3_CORE_H__ \n
+ * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n
+ * \n
+ * --- Error 528: --- \n
+ * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n
+ * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n
+ * \n
+ * --- Error 751: --- \n
+ * } InterruptType_Type; \n
+ * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n
+ * \n
+ * \n
+ * Note: To re-enable a Message, insert a space before 'lint' * \n
+ *
+ */
+
+/*lint -save */
+/*lint -e10 */
+/*lint -e530 */
+/*lint -e550 */
+/*lint -e754 */
+/*lint -e750 */
+/*lint -e528 */
+/*lint -e751 */
+
+#include <stdint.h> /* Include standard types */
+
+/**
+ * @brief Return the Main Stack Pointer (current ARM7 stack)
+ *
+ * @param none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+extern uint32_t __get_MSP(void);
+
+
+
+#if defined (__ICCARM__)
+ #include <intrinsics.h> /* IAR Intrinsics */
+#endif
+
+
+#ifndef __NVIC_PRIO_BITS
+ #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */
+#endif
+
+typedef struct
+{
+ uint32_t IRQStatus;
+ uint32_t FIQStatus;
+ uint32_t RawIntr;
+ uint32_t IntSelect;
+ uint32_t IntEnable;
+ uint32_t IntEnClr;
+ uint32_t SoftInt;
+ uint32_t SoftIntClr;
+ uint32_t Protection;
+ uint32_t SWPriorityMask;
+ uint32_t RESERVED0[54];
+ uint32_t VectAddr[32];
+ uint32_t RESERVED1[32];
+ uint32_t VectPriority[32];
+ uint32_t RESERVED2[800];
+ uint32_t Address;
+} NVIC_TypeDef;
+
+#define NVIC_BASE (0xFFFFF000)
+#define NVIC (( NVIC_TypeDef *) NVIC_BASE)
+
+
+
+/**
+ * IO definitions
+ *
+ * define access restrictions to peripheral registers
+ */
+
+#ifdef __cplusplus
+#define __I volatile /*!< defines 'read only' permissions */
+#else
+#define __I volatile const /*!< defines 'read only' permissions */
+#endif
+#define __O volatile /*!< defines 'write only' permissions */
+#define __IO volatile /*!< defines 'read / write' permissions */
+
+
+
+
+
+#if defined ( __CC_ARM )
+ #define __ASM __asm /*!< asm keyword for ARM Compiler */
+ #define __INLINE __inline /*!< inline keyword for ARM Compiler */
+
+#elif defined ( __ICCARM__ )
+ #define __ASM __asm /*!< asm keyword for IAR Compiler */
+ #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
+
+#elif defined ( __GNUC__ )
+ #define __ASM __asm /*!< asm keyword for GNU Compiler */
+ #define __INLINE inline /*!< inline keyword for GNU Compiler */
+
+#elif defined ( __TASKING__ )
+ #define __ASM __asm /*!< asm keyword for TASKING Compiler */
+ #define __INLINE inline /*!< inline keyword for TASKING Compiler */
+
+#endif
+
+
+/* ################### Compiler specific Intrinsics ########################### */
+
+#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+#define __enable_fault_irq __enable_fiq
+#define __disable_fault_irq __disable_fiq
+
+#define __NOP __nop
+//#define __WFI __wfi
+//#define __WFE __wfe
+//#define __SEV __sev
+//#define __ISB() __isb(0)
+//#define __DSB() __dsb(0)
+//#define __DMB() __dmb(0)
+//#define __REV __rev
+//#define __RBIT __rbit
+#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr))
+#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr))
+#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr))
+#define __STREXB(value, ptr) __strex(value, ptr)
+#define __STREXH(value, ptr) __strex(value, ptr)
+#define __STREXW(value, ptr) __strex(value, ptr)
+
+
+#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
+
+#define __enable_irq __enable_interrupt /*!< global Interrupt enable */
+#define __disable_irq __disable_interrupt /*!< global Interrupt disable */
+#define __NOP __no_operation() /*!< no operation intrinsic in IAR Compiler */
+
+#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
+
+static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); }
+static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); }
+
+static __INLINE void __NOP() { __ASM volatile ("nop"); }
+
+#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
+/* TASKING carm specific functions */
+
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all instrinsics,
+ * Including the CMSIS ones.
+ */
+
+#endif
+
+
+/**
+ * @brief Enable Interrupt in NVIC Interrupt Controller
+ *
+ * @param IRQn_Type IRQn specifies the interrupt number
+ * @return none
+ *
+ * Enable a device specific interupt in the NVIC interrupt controller.
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ NVIC->IntEnable = 1 << (uint32_t)IRQn;
+}
+
+
+/**
+ * @brief Disable the interrupt line for external interrupt specified
+ *
+ * @param IRQn_Type IRQn is the positive number of the external interrupt
+ * @return none
+ *
+ * Disable a device specific interupt in the NVIC interrupt controller.
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+ NVIC->IntEnClr = 1 << (uint32_t)IRQn;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ARM7_CORE_H__ */
+
+/*lint -restore */
Binary file LPC2368/core_arm7.o has changed
Binary file LPC2368/mbed.ar has changed
Binary file LPC2368/mbed_capi.ar has changed
Binary file LPC2368/stackheap.o has changed
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LPC2368/system_LPC23xx.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,44 @@
+/* mbed Microcontroller Library
+ * Copyright (C) 2008-2009 ARM Limited. All rights reserved.
+ *
+ * ARM7 version of CMSIS-like functionality - not advised for use outside mbed!
+ * based on cmsis system_LPC17xx.h
+ */
+
+#ifndef __SYSTEM_LPC23xx_H
+#define __SYSTEM_LPC23xx_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
+
+/**
+ * Initialize the system
+ *
+ * @param none
+ * @return none
+ *
+ * @brief Setup the microcontroller system.
+ * Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param none
+ * @return none
+ *
+ * @brief Updates the SystemCoreClock with current core Clock
+ * retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
Binary file LPC2368/system_LPC23xx.o has changed
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LPC2368/vector_defns.h Fri Aug 28 12:10:11 2009 +0000 @@ -0,0 +1,76 @@ +/* mbed Microcontroller Library - Vectors + * Copyright (c) 2006-2009 ARM Limited. All rights reserved. + * sford, jbrawn + */ + +#ifndef MBED_VECTOR_DEFNS_H +#define MBED_VECTOR_DEFNS_H + +// Assember Macros +#ifdef __ARMCC_VERSION +#define EXPORT(x) EXPORT x +#define WEAK_EXPORT(x) EXPORT x [WEAK] +#define IMPORT(x) IMPORT x +#define LABEL(x) x +#else +#define EXPORT(x) .global x +#define WEAK_EXPORT(x) .weak x +#define IMPORT(x) .global x +#define LABEL(x) x: +#endif + +// RealMonitor +// Requires RAM (0x40000040-0x4000011F) to be allocated by the linker + +// RealMonitor entry points +#define rm_init_entry 0x7fffff91 +#define rm_undef_handler 0x7fffffa0 +#define rm_prefetchabort_handler 0x7fffffb0 +#define rm_dataabort_handler 0x7fffffc0 +#define rm_irqhandler2 0x7fffffe0 +//#define rm_RunningToStopped 0x7ffff808 // ARM - MBED64 +#define rm_RunningToStopped 0x7ffff820 // ARM - PHAT40 + +// Unofficial RealMonitor entry points and variables +#define RM_MSG_SWI 0x00940000 +#define StateP 0x40000040 + +// VIC register addresses +#define VIC_Base 0xfffff000 +#define VICAddress_Offset 0xf00 +#define VICVectAddr2_Offset 0x108 +#define VICVectAddr3_Offset 0x10c +#define VICIntEnClr_Offset 0x014 +#define VICIntEnClr (*(volatile unsigned long *)(VIC_Base + 0x014)) +#define VICVectAddr2 (*(volatile unsigned long *)(VIC_Base + 0x108)) +#define VICVectAddr3 (*(volatile unsigned long *)(VIC_Base + 0x10C)) + +// ARM Mode bits and Interrupt flags in PSRs +#define Mode_USR 0x10 +#define Mode_FIQ 0x11 +#define Mode_IRQ 0x12 +#define Mode_SVC 0x13 +#define Mode_ABT 0x17 +#define Mode_UND 0x1B +#define Mode_SYS 0x1F +#define I_Bit 0x80 // when I bit is set, IRQ is disabled +#define F_Bit 0x40 // when F bit is set, FIQ is disabled + +// MCU RAM +#define LPC2368_RAM_ADDRESS 0x40000000 // RAM Base +#define LPC2368_RAM_SIZE 0x8000 // 32KB + +// ISR Stack Allocation +#define UND_stack_size 0x00000040 +#define SVC_stack_size 0x00000040 +#define ABT_stack_size 0x00000040 +#define FIQ_stack_size 0x00000000 +#define IRQ_stack_size 0x00000040 + +#define ISR_stack_size (UND_stack_size + SVC_stack_size + ABT_stack_size + FIQ_stack_size + IRQ_stack_size) + +// Full Descending Stack, so top-most stack points to just above the top of RAM +#define LPC2368_STACK_TOP (LPC2368_RAM_ADDRESS + LPC2368_RAM_SIZE) +#define USR_STACK_TOP (LPC2368_STACK_TOP - ISR_stack_size) + +#endif
Binary file LPC2368/vector_functions.o has changed
Binary file LPC2368/vector_realmonitor.o has changed
Binary file LPC2368/vector_table.o has changed
--- a/LPC23xx.h Thu May 14 14:44:00 2009 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1132 +0,0 @@ -/****************************************************************************** - * LPC23xx.h: Header file for NXP LPC23xx/24xx Family Microprocessors - * The header file is the super set of all hardware definition of the - * peripherals for the LPC23xx/24xx family microprocessor. - * - * Copyright(C) 2006, NXP Semiconductor - * All rights reserved. - * - * History - * 2005.10.01 ver 1.00 Prelimnary version, first Release - * 2007.05.17 ver 1.01 several corrections - * -******************************************************************************/ - -#ifndef __LPC23xx_H -#define __LPC23xx_H - -/* Vectored Interrupt Controller (VIC) */ -#define VIC_BASE_ADDR 0xFFFFF000 -#define VICIRQStatus (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000)) -#define VICFIQStatus (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004)) -#define VICRawIntr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008)) -#define VICIntSelect (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C)) -#define VICIntEnable (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010)) -#define VICIntEnClr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014)) -#define VICSoftInt (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018)) -#define VICSoftIntClr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C)) -#define VICProtection (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020)) -#define VICSWPrioMask (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x024)) - -#define VICVectAddr0 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100)) -#define VICVectAddr1 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104)) -#define VICVectAddr2 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108)) -#define VICVectAddr3 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C)) -#define VICVectAddr4 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110)) -#define VICVectAddr5 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114)) -#define VICVectAddr6 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118)) -#define VICVectAddr7 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C)) -#define VICVectAddr8 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120)) -#define VICVectAddr9 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124)) -#define VICVectAddr10 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128)) -#define VICVectAddr11 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C)) -#define VICVectAddr12 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130)) -#define VICVectAddr13 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134)) -#define VICVectAddr14 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138)) -#define VICVectAddr15 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C)) -#define VICVectAddr16 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x140)) -#define VICVectAddr17 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x144)) -#define VICVectAddr18 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x148)) -#define VICVectAddr19 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x14C)) -#define VICVectAddr20 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x150)) -#define VICVectAddr21 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x154)) -#define VICVectAddr22 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x158)) -#define VICVectAddr23 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x15C)) -#define VICVectAddr24 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x160)) -#define VICVectAddr25 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x164)) -#define VICVectAddr26 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x168)) -#define VICVectAddr27 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x16C)) -#define VICVectAddr28 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x170)) -#define VICVectAddr29 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x174)) -#define VICVectAddr30 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x178)) -#define VICVectAddr31 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x17C)) - -/* The name convention below is from previous LPC2000 family MCUs, in LPC23xx/24xx, -these registers are known as "VICVectPriority(x)". */ -#define VICVectCntl0 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200)) -#define VICVectCntl1 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204)) -#define VICVectCntl2 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208)) -#define VICVectCntl3 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C)) -#define VICVectCntl4 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210)) -#define VICVectCntl5 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214)) -#define VICVectCntl6 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218)) -#define VICVectCntl7 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C)) -#define VICVectCntl8 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220)) -#define VICVectCntl9 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224)) -#define VICVectCntl10 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228)) -#define VICVectCntl11 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C)) -#define VICVectCntl12 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230)) -#define VICVectCntl13 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234)) -#define VICVectCntl14 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238)) -#define VICVectCntl15 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C)) -#define VICVectCntl16 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x240)) -#define VICVectCntl17 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x244)) -#define VICVectCntl18 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x248)) -#define VICVectCntl19 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x24C)) -#define VICVectCntl20 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x250)) -#define VICVectCntl21 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x254)) -#define VICVectCntl22 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x258)) -#define VICVectCntl23 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x25C)) -#define VICVectCntl24 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x260)) -#define VICVectCntl25 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x264)) -#define VICVectCntl26 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x268)) -#define VICVectCntl27 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x26C)) -#define VICVectCntl28 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x270)) -#define VICVectCntl29 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x274)) -#define VICVectCntl30 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x278)) -#define VICVectCntl31 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x27C)) - -#define VICVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0xF00)) - - -/* Pin Connect Block */ -#define PINSEL_BASE_ADDR 0xE002C000 -#define PINSEL0 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00)) -#define PINSEL1 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04)) -#define PINSEL2 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x08)) -#define PINSEL3 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x0C)) -#define PINSEL4 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x10)) -#define PINSEL5 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14)) -#define PINSEL6 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x18)) -#define PINSEL7 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x1C)) -#define PINSEL8 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x20)) -#define PINSEL9 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x24)) -#define PINSEL10 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x28)) - -#define PINMODE0 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x40)) -#define PINMODE1 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x44)) -#define PINMODE2 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x48)) -#define PINMODE3 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x4C)) -#define PINMODE4 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x50)) -#define PINMODE5 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x54)) -#define PINMODE6 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x58)) -#define PINMODE7 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x5C)) -#define PINMODE8 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x60)) -#define PINMODE9 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x64)) - -/* General Purpose Input/Output (GPIO) */ -#define GPIO_BASE_ADDR 0xE0028000 -#define IOPIN0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00)) -#define IOSET0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04)) -#define IODIR0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08)) -#define IOCLR0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C)) -#define IOPIN1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10)) -#define IOSET1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14)) -#define IODIR1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18)) -#define IOCLR1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C)) - -/* GPIO Interrupt Registers */ -#define IO0_INT_EN_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x90)) -#define IO0_INT_EN_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x94)) -#define IO0_INT_STAT_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x84)) -#define IO0_INT_STAT_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x88)) -#define IO0_INT_CLR (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x8C)) - -#define IO2_INT_EN_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB0)) -#define IO2_INT_EN_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB4)) -#define IO2_INT_STAT_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA4)) -#define IO2_INT_STAT_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA8)) -#define IO2_INT_CLR (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xAC)) - -#define IO_INT_STAT (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x80)) - -#define PARTCFG_BASE_ADDR 0x3FFF8000 -#define PARTCFG (*(volatile unsigned long *)(PARTCFG_BASE_ADDR + 0x00)) - -/* Fast I/O setup */ -#define FIO_BASE_ADDR 0x3FFFC000 -#define FIO0DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00)) -#define FIO0MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10)) -#define FIO0PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14)) -#define FIO0SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18)) -#define FIO0CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C)) - -#define FIO1DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20)) -#define FIO1MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30)) -#define FIO1PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34)) -#define FIO1SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38)) -#define FIO1CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C)) - -#define FIO2DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x40)) -#define FIO2MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x50)) -#define FIO2PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x54)) -#define FIO2SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x58)) -#define FIO2CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x5C)) - -#define FIO3DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x60)) -#define FIO3MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x70)) -#define FIO3PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x74)) -#define FIO3SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x78)) -#define FIO3CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x7C)) - -#define FIO4DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x80)) -#define FIO4MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x90)) -#define FIO4PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x94)) -#define FIO4SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x98)) -#define FIO4CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x9C)) - -/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */ -#define FIO0DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x00)) -#define FIO1DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x20)) -#define FIO2DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x40)) -#define FIO3DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x60)) -#define FIO4DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x80)) - -#define FIO0DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x01)) -#define FIO1DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) -#define FIO2DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x41)) -#define FIO3DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x61)) -#define FIO4DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x81)) - -#define FIO0DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x02)) -#define FIO1DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x22)) -#define FIO2DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x42)) -#define FIO3DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x62)) -#define FIO4DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x82)) - -#define FIO0DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x03)) -#define FIO1DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x23)) -#define FIO2DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x43)) -#define FIO3DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x63)) -#define FIO4DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x83)) - -#define FIO0DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00)) -#define FIO1DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20)) -#define FIO2DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40)) -#define FIO3DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60)) -#define FIO4DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80)) - -#define FIO0DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02)) -#define FIO1DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22)) -#define FIO2DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42)) -#define FIO3DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62)) -#define FIO4DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82)) - -#define FIO0MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10)) -#define FIO1MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30)) -#define FIO2MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x50)) -#define FIO3MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x70)) -#define FIO4MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x90)) - -#define FIO0MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11)) -#define FIO1MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) -#define FIO2MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x51)) -#define FIO3MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x71)) -#define FIO4MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x91)) - -#define FIO0MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12)) -#define FIO1MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32)) -#define FIO2MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x52)) -#define FIO3MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x72)) -#define FIO4MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x92)) - -#define FIO0MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13)) -#define FIO1MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33)) -#define FIO2MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x53)) -#define FIO3MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x73)) -#define FIO4MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x93)) - -#define FIO0MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10)) -#define FIO1MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30)) -#define FIO2MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50)) -#define FIO3MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70)) -#define FIO4MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90)) - -#define FIO0MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12)) -#define FIO1MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32)) -#define FIO2MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52)) -#define FIO3MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72)) -#define FIO4MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92)) - -#define FIO0PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14)) -#define FIO1PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34)) -#define FIO2PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x54)) -#define FIO3PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x74)) -#define FIO4PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x94)) - -#define FIO0PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15)) -#define FIO1PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x25)) -#define FIO2PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x55)) -#define FIO3PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x75)) -#define FIO4PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x95)) - -#define FIO0PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16)) -#define FIO1PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36)) -#define FIO2PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x56)) -#define FIO3PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x76)) -#define FIO4PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x96)) - -#define FIO0PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17)) -#define FIO1PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37)) -#define FIO2PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x57)) -#define FIO3PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x77)) -#define FIO4PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x97)) - -#define FIO0PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14)) -#define FIO1PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34)) -#define FIO2PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54)) -#define FIO3PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74)) -#define FIO4PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94)) - -#define FIO0PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16)) -#define FIO1PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36)) -#define FIO2PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56)) -#define FIO3PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76)) -#define FIO4PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96)) - -#define FIO0SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18)) -#define FIO1SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38)) -#define FIO2SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x58)) -#define FIO3SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x78)) -#define FIO4SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x98)) - -#define FIO0SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19)) -#define FIO1SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x29)) -#define FIO2SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x59)) -#define FIO3SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x79)) -#define FIO4SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x99)) - -#define FIO0SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A)) -#define FIO1SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A)) -#define FIO2SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5A)) -#define FIO3SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7A)) -#define FIO4SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9A)) - -#define FIO0SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B)) -#define FIO1SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B)) -#define FIO2SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5B)) -#define FIO3SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7B)) -#define FIO4SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9B)) - -#define FIO0SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18)) -#define FIO1SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38)) -#define FIO2SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58)) -#define FIO3SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78)) -#define FIO4SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98)) - -#define FIO0SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A)) -#define FIO1SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A)) -#define FIO2SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A)) -#define FIO3SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A)) -#define FIO4SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A)) - -#define FIO0CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C)) -#define FIO1CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C)) -#define FIO2CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5C)) -#define FIO3CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7C)) -#define FIO4CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9C)) - -#define FIO0CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D)) -#define FIO1CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x2D)) -#define FIO2CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5D)) -#define FIO3CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7D)) -#define FIO4CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9D)) - -#define FIO0CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E)) -#define FIO1CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E)) -#define FIO2CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5E)) -#define FIO3CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7E)) -#define FIO4CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9E)) - -#define FIO0CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F)) -#define FIO1CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F)) -#define FIO2CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5F)) -#define FIO3CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7F)) -#define FIO4CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9F)) - -#define FIO0CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C)) -#define FIO1CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C)) -#define FIO2CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C)) -#define FIO3CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C)) -#define FIO4CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C)) - -#define FIO0CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E)) -#define FIO1CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E)) -#define FIO2CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E)) -#define FIO3CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E)) -#define FIO4CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E)) - - -/* System Control Block(SCB) modules include Memory Accelerator Module, -Phase Locked Loop, VPB divider, Power Control, External Interrupt, -Reset, and Code Security/Debugging */ -#define SCB_BASE_ADDR 0xE01FC000 - -/* Memory Accelerator Module (MAM) */ -#define MAMCR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000)) -#define MAMTIM (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004)) -#define MEMMAP (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040)) - -/* Phase Locked Loop (PLL) */ -#define PLLCON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080)) -#define PLLCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084)) -#define PLLSTAT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088)) -#define PLLFEED (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C)) - -/* Power Control */ -#define PCON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0)) -#define PCONP (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4)) - -/* Clock Divider */ -// #define APBDIV (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100)) -#define CCLKCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x104)) -#define USBCLKCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x108)) -#define CLKSRCSEL (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x10C)) -#define PCLKSEL0 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A8)) -#define PCLKSEL1 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1AC)) - -/* External Interrupts */ -#define EXTINT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140)) -#define INTWAKE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144)) -#define EXTMODE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148)) -#define EXTPOLAR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C)) - -/* Reset, reset source identification */ -#define RSIR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180)) - -/* RSID, code security protection */ -#define CSPR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x184)) - -/* AHB configuration */ -#define AHBCFG1 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x188)) -#define AHBCFG2 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x18C)) - -/* System Controls and Status */ -#define SCS (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0)) - -/* MPMC(EMC) registers, note: all the external memory controller(EMC) registers -are for LPC24xx only. */ -#define STATIC_MEM0_BASE 0x80000000 -#define STATIC_MEM1_BASE 0x81000000 -#define STATIC_MEM2_BASE 0x82000000 -#define STATIC_MEM3_BASE 0x83000000 - -#define DYNAMIC_MEM0_BASE 0xA0000000 -#define DYNAMIC_MEM1_BASE 0xB0000000 -#define DYNAMIC_MEM2_BASE 0xC0000000 -#define DYNAMIC_MEM3_BASE 0xD0000000 - -/* External Memory Controller (EMC) */ -#define EMC_BASE_ADDR 0xFFE08000 -#define EMC_CTRL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x000)) -#define EMC_STAT (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x004)) -#define EMC_CONFIG (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x008)) - -/* Dynamic RAM access registers */ -#define EMC_DYN_CTRL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x020)) -#define EMC_DYN_RFSH (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x024)) -#define EMC_DYN_RD_CFG (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x028)) -#define EMC_DYN_RP (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x030)) -#define EMC_DYN_RAS (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x034)) -#define EMC_DYN_SREX (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x038)) -#define EMC_DYN_APR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x03C)) -#define EMC_DYN_DAL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x040)) -#define EMC_DYN_WR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x044)) -#define EMC_DYN_RC (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x048)) -#define EMC_DYN_RFC (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x04C)) -#define EMC_DYN_XSR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x050)) -#define EMC_DYN_RRD (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x054)) -#define EMC_DYN_MRD (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x058)) - -#define EMC_DYN_CFG0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x100)) -#define EMC_DYN_RASCAS0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x104)) -#define EMC_DYN_CFG1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x140)) -#define EMC_DYN_RASCAS1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x144)) -#define EMC_DYN_CFG2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x160)) -#define EMC_DYN_RASCAS2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x164)) -#define EMC_DYN_CFG3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x180)) -#define EMC_DYN_RASCAS3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x184)) - -/* static RAM access registers */ -#define EMC_STA_CFG0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x200)) -#define EMC_STA_WAITWEN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x204)) -#define EMC_STA_WAITOEN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x208)) -#define EMC_STA_WAITRD0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x20C)) -#define EMC_STA_WAITPAGE0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x210)) -#define EMC_STA_WAITWR0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x214)) -#define EMC_STA_WAITTURN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x218)) - -#define EMC_STA_CFG1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x220)) -#define EMC_STA_WAITWEN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x224)) -#define EMC_STA_WAITOEN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x228)) -#define EMC_STA_WAITRD1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x22C)) -#define EMC_STA_WAITPAGE1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x230)) -#define EMC_STA_WAITWR1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x234)) -#define EMC_STA_WAITTURN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x238)) - -#define EMC_STA_CFG2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x240)) -#define EMC_STA_WAITWEN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x244)) -#define EMC_STA_WAITOEN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x248)) -#define EMC_STA_WAITRD2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x24C)) -#define EMC_STA_WAITPAGE2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x250)) -#define EMC_STA_WAITWR2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x254)) -#define EMC_STA_WAITTURN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x258)) - -#define EMC_STA_CFG3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x260)) -#define EMC_STA_WAITWEN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x264)) -#define EMC_STA_WAITOEN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x268)) -#define EMC_STA_WAITRD3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x26C)) -#define EMC_STA_WAITPAGE3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x270)) -#define EMC_STA_WAITWR3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x274)) -#define EMC_STA_WAITTURN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x278)) - -#define EMC_STA_EXT_WAIT (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x880)) - - -/* Timer 0 */ -#define TMR0_BASE_ADDR 0xE0004000 -#define T0IR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00)) -#define T0TCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04)) -#define T0TC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08)) -#define T0PR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C)) -#define T0PC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10)) -#define T0MCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14)) -#define T0MR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18)) -#define T0MR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C)) -#define T0MR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20)) -#define T0MR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24)) -#define T0CCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28)) -#define T0CR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C)) -#define T0CR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30)) -#define T0CR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34)) -#define T0CR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38)) -#define T0EMR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C)) -#define T0CTCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70)) - -/* Timer 1 */ -#define TMR1_BASE_ADDR 0xE0008000 -#define T1IR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00)) -#define T1TCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04)) -#define T1TC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08)) -#define T1PR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C)) -#define T1PC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10)) -#define T1MCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14)) -#define T1MR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18)) -#define T1MR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C)) -#define T1MR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20)) -#define T1MR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24)) -#define T1CCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28)) -#define T1CR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C)) -#define T1CR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30)) -#define T1CR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34)) -#define T1CR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38)) -#define T1EMR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C)) -#define T1CTCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70)) - -/* Timer 2 */ -#define TMR2_BASE_ADDR 0xE0070000 -#define T2IR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x00)) -#define T2TCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x04)) -#define T2TC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x08)) -#define T2PR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x0C)) -#define T2PC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x10)) -#define T2MCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x14)) -#define T2MR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x18)) -#define T2MR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x1C)) -#define T2MR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x20)) -#define T2MR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x24)) -#define T2CCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x28)) -#define T2CR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x2C)) -#define T2CR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x30)) -#define T2CR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x34)) -#define T2CR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x38)) -#define T2EMR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x3C)) -#define T2CTCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x70)) - -/* Timer 3 */ -#define TMR3_BASE_ADDR 0xE0074000 -#define T3IR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x00)) -#define T3TCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x04)) -#define T3TC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x08)) -#define T3PR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x0C)) -#define T3PC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x10)) -#define T3MCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x14)) -#define T3MR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x18)) -#define T3MR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x1C)) -#define T3MR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x20)) -#define T3MR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x24)) -#define T3CCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x28)) -#define T3CR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x2C)) -#define T3CR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x30)) -#define T3CR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x34)) -#define T3CR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x38)) -#define T3EMR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x3C)) -#define T3CTCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x70)) - - -/* Pulse Width Modulator (PWM) */ -#define PWM0_BASE_ADDR 0xE0014000 -#define PWM0IR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x00)) -#define PWM0TCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x04)) -#define PWM0TC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x08)) -#define PWM0PR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x0C)) -#define PWM0PC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x10)) -#define PWM0MCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x14)) -#define PWM0MR0 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x18)) -#define PWM0MR1 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x1C)) -#define PWM0MR2 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x20)) -#define PWM0MR3 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x24)) -#define PWM0CCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x28)) -#define PWM0CR0 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x2C)) -#define PWM0CR1 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x30)) -#define PWM0CR2 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x34)) -#define PWM0CR3 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x38)) -#define PWM0EMR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x3C)) -#define PWM0MR4 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x40)) -#define PWM0MR5 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x44)) -#define PWM0MR6 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x48)) -#define PWM0PCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x4C)) -#define PWM0LER (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x50)) -#define PWM0CTCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x70)) - -#define PWM1_BASE_ADDR 0xE0018000 -#define PWM1IR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x00)) -#define PWM1TCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x04)) -#define PWM1TC (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x08)) -#define PWM1PR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x0C)) -#define PWM1PC (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x10)) -#define PWM1MCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x14)) -#define PWM1MR0 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x18)) -#define PWM1MR1 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x1C)) -#define PWM1MR2 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x20)) -#define PWM1MR3 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x24)) -#define PWM1CCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x28)) -#define PWM1CR0 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x2C)) -#define PWM1CR1 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x30)) -#define PWM1CR2 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x34)) -#define PWM1CR3 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x38)) -#define PWM1EMR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x3C)) -#define PWM1MR4 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x40)) -#define PWM1MR5 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x44)) -#define PWM1MR6 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x48)) -#define PWM1PCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x4C)) -#define PWM1LER (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x50)) -#define PWM1CTCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x70)) - - -/* Universal Asynchronous Receiver Transmitter 0 (UART0) */ -#define UART0_BASE_ADDR 0xE000C000 -#define U0RBR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) -#define U0THR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) -#define U0DLL (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) -#define U0DLM (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04)) -#define U0IER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04)) -#define U0IIR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08)) -#define U0FCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08)) -#define U0LCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C)) -#define U0LSR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14)) -#define U0SCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C)) -#define U0ACR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20)) -#define U0ICR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x24)) -#define U0FDR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28)) -#define U0TER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30)) - -/* Universal Asynchronous Receiver Transmitter 1 (UART1) */ -#define UART1_BASE_ADDR 0xE0010000 -#define U1RBR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) -#define U1THR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) -#define U1DLL (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) -#define U1DLM (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04)) -#define U1IER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04)) -#define U1IIR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08)) -#define U1FCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08)) -#define U1LCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C)) -#define U1MCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10)) -#define U1LSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14)) -#define U1MSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18)) -#define U1SCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C)) -#define U1ACR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20)) -#define U1FDR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28)) -#define U1TER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30)) - -/* Universal Asynchronous Receiver Transmitter 2 (UART2) */ -#define UART2_BASE_ADDR 0xE0078000 -#define U2RBR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) -#define U2THR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) -#define U2DLL (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) -#define U2DLM (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04)) -#define U2IER (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04)) -#define U2IIR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08)) -#define U2FCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08)) -#define U2LCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x0C)) -#define U2LSR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x14)) -#define U2SCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x1C)) -#define U2ACR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x20)) -#define U2ICR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x24)) -#define U2FDR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x28)) -#define U2TER (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x30)) - -/* Universal Asynchronous Receiver Transmitter 3 (UART3) */ -#define UART3_BASE_ADDR 0xE007C000 -#define U3RBR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) -#define U3THR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) -#define U3DLL (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) -#define U3DLM (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04)) -#define U3IER (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04)) -#define U3IIR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08)) -#define U3FCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08)) -#define U3LCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x0C)) -#define U3LSR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x14)) -#define U3SCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x1C)) -#define U3ACR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x20)) -#define U3ICR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x24)) -#define U3FDR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x28)) -#define U3TER (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x30)) - -/* I2C Interface 0 */ -#define I2C0_BASE_ADDR 0xE001C000 -#define I20CONSET (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00)) -#define I20STAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04)) -#define I20DAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08)) -#define I20ADR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C)) -#define I20SCLH (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10)) -#define I20SCLL (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14)) -#define I20CONCLR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18)) - -/* I2C Interface 1 */ -#define I2C1_BASE_ADDR 0xE005C000 -#define I21CONSET (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00)) -#define I21STAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04)) -#define I21DAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08)) -#define I21ADR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C)) -#define I21SCLH (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10)) -#define I21SCLL (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14)) -#define I21CONCLR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18)) - -/* I2C Interface 2 */ -#define I2C2_BASE_ADDR 0xE0080000 -#define I22CONSET (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x00)) -#define I22STAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x04)) -#define I22DAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x08)) -#define I22ADR (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x0C)) -#define I22SCLH (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x10)) -#define I22SCLL (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x14)) -#define I22CONCLR (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x18)) - -/* SPI0 (Serial Peripheral Interface 0) */ -#define SPI0_BASE_ADDR 0xE0020000 -#define S0SPCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00)) -#define S0SPSR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04)) -#define S0SPDR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08)) -#define S0SPCCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C)) -#define S0SPINT (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C)) - -/* SSP0 Controller */ -#define SSP0_BASE_ADDR 0xE0068000 -#define SSP0CR0 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x00)) -#define SSP0CR1 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x04)) -#define SSP0DR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x08)) -#define SSP0SR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x0C)) -#define SSP0CPSR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x10)) -#define SSP0IMSC (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x14)) -#define SSP0RIS (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x18)) -#define SSP0MIS (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x1C)) -#define SSP0ICR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x20)) -#define SSP0DMACR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x24)) - -/* SSP1 Controller */ -#define SSP1_BASE_ADDR 0xE0030000 -#define SSP1CR0 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x00)) -#define SSP1CR1 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x04)) -#define SSP1DR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x08)) -#define SSP1SR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x0C)) -#define SSP1CPSR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x10)) -#define SSP1IMSC (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x14)) -#define SSP1RIS (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x18)) -#define SSP1MIS (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x1C)) -#define SSP1ICR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x20)) -#define SSP1DMACR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x24)) - - -/* Real Time Clock */ -#define RTC_BASE_ADDR 0xE0024000 -#define RTC_ILR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00)) -#define RTC_CTC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04)) -#define RTC_CCR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08)) -#define RTC_CIIR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C)) -#define RTC_AMR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10)) -#define RTC_CTIME0 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14)) -#define RTC_CTIME1 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18)) -#define RTC_CTIME2 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C)) -#define RTC_SEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20)) -#define RTC_MIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24)) -#define RTC_HOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28)) -#define RTC_DOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C)) -#define RTC_DOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30)) -#define RTC_DOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34)) -#define RTC_MONTH (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38)) -#define RTC_YEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C)) -#define RTC_CISS (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x40)) -#define RTC_ALSEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60)) -#define RTC_ALMIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64)) -#define RTC_ALHOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68)) -#define RTC_ALDOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C)) -#define RTC_ALDOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70)) -#define RTC_ALDOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74)) -#define RTC_ALMON (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78)) -#define RTC_ALYEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C)) -#define RTC_PREINT (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80)) -#define RTC_PREFRAC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84)) - - -/* A/D Converter 0 (AD0) */ -#define AD0_BASE_ADDR 0xE0034000 -#define AD0CR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00)) -#define AD0GDR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04)) -#define AD0INTEN (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C)) -#define AD0DR0 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10)) -#define AD0DR1 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14)) -#define AD0DR2 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18)) -#define AD0DR3 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C)) -#define AD0DR4 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20)) -#define AD0DR5 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24)) -#define AD0DR6 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28)) -#define AD0DR7 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C)) -#define AD0STAT (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30)) - - -/* D/A Converter */ -#define DAC_BASE_ADDR 0xE006C000 -#define DACR (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00)) - - -/* Watchdog */ -#define WDG_BASE_ADDR 0xE0000000 -#define WDMOD (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00)) -#define WDTC (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04)) -#define WDFEED (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08)) -#define WDTV (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C)) -#define WDCLKSEL (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x10)) - -/* CAN CONTROLLERS AND ACCEPTANCE FILTER */ -#define CAN_ACCEPT_BASE_ADDR 0xE003C000 -#define CAN_AFMR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x00)) -#define CAN_SFF_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x04)) -#define CAN_SFF_GRP_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x08)) -#define CAN_EFF_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x0C)) -#define CAN_EFF_GRP_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x10)) -#define CAN_EOT (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x14)) -#define CAN_LUT_ERR_ADR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x18)) -#define CAN_LUT_ERR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x1C)) - -#define CAN_CENTRAL_BASE_ADDR 0xE0040000 -#define CAN_TX_SR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x00)) -#define CAN_RX_SR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x04)) -#define CAN_MSR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x08)) - -#define CAN1_BASE_ADDR 0xE0044000 -#define CAN1MOD (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x00)) -#define CAN1CMR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x04)) -#define CAN1GSR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x08)) -#define CAN1ICR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x0C)) -#define CAN1IER (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x10)) -#define CAN1BTR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x14)) -#define CAN1EWL (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x18)) -#define CAN1SR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x1C)) -#define CAN1RFS (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x20)) -#define CAN1RID (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x24)) -#define CAN1RDA (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x28)) -#define CAN1RDB (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x2C)) - -#define CAN1TFI1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x30)) -#define CAN1TID1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x34)) -#define CAN1TDA1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x38)) -#define CAN1TDB1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x3C)) -#define CAN1TFI2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x40)) -#define CAN1TID2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x44)) -#define CAN1TDA2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x48)) -#define CAN1TDB2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x4C)) -#define CAN1TFI3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x50)) -#define CAN1TID3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x54)) -#define CAN1TDA3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x58)) -#define CAN1TDB3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x5C)) - -#define CAN2_BASE_ADDR 0xE0048000 -#define CAN2MOD (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x00)) -#define CAN2CMR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x04)) -#define CAN2GSR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x08)) -#define CAN2ICR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x0C)) -#define CAN2IER (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x10)) -#define CAN2BTR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x14)) -#define CAN2EWL (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x18)) -#define CAN2SR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x1C)) -#define CAN2RFS (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x20)) -#define CAN2RID (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x24)) -#define CAN2RDA (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x28)) -#define CAN2RDB (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x2C)) - -#define CAN2TFI1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x30)) -#define CAN2TID1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x34)) -#define CAN2TDA1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x38)) -#define CAN2TDB1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x3C)) -#define CAN2TFI2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x40)) -#define CAN2TID2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x44)) -#define CAN2TDA2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x48)) -#define CAN2TDB2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x4C)) -#define CAN2TFI3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x50)) -#define CAN2TID3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x54)) -#define CAN2TDA3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x58)) -#define CAN2TDB3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x5C)) - - -/* MultiMedia Card Interface(MCI) Controller */ -#define MCI_BASE_ADDR 0xE008C000 -#define MCI_POWER (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x00)) -#define MCI_CLOCK (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x04)) -#define MCI_ARGUMENT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x08)) -#define MCI_COMMAND (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x0C)) -#define MCI_RESP_CMD (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x10)) -#define MCI_RESP0 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x14)) -#define MCI_RESP1 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x18)) -#define MCI_RESP2 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x1C)) -#define MCI_RESP3 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x20)) -#define MCI_DATA_TMR (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x24)) -#define MCI_DATA_LEN (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x28)) -#define MCI_DATA_CTRL (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x2C)) -#define MCI_DATA_CNT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x30)) -#define MCI_STATUS (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x34)) -#define MCI_CLEAR (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x38)) -#define MCI_MASK0 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x3C)) -#define MCI_MASK1 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x40)) -#define MCI_FIFO_CNT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x48)) -#define MCI_FIFO (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x80)) - - -/* I2S Interface Controller (I2S) */ -#define I2S_BASE_ADDR 0xE0088000 -#define I2S_DAO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x00)) -#define I2S_DAI (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x04)) -#define I2S_TX_FIFO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x08)) -#define I2S_RX_FIFO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x0C)) -#define I2S_STATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x10)) -#define I2S_DMA1 (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x14)) -#define I2S_DMA2 (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x18)) -#define I2S_IRQ (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x1C)) -#define I2S_TXRATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x20)) -#define I2S_RXRATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x24)) - - -/* General-purpose DMA Controller */ -#define DMA_BASE_ADDR 0xFFE04000 -#define GPDMA_INT_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x000)) -#define GPDMA_INT_TCSTAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x004)) -#define GPDMA_INT_TCCLR (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x008)) -#define GPDMA_INT_ERR_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x00C)) -#define GPDMA_INT_ERR_CLR (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x010)) -#define GPDMA_RAW_INT_TCSTAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x014)) -#define GPDMA_RAW_INT_ERR_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x018)) -#define GPDMA_ENABLED_CHNS (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x01C)) -#define GPDMA_SOFT_BREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x020)) -#define GPDMA_SOFT_SREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x024)) -#define GPDMA_SOFT_LBREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x028)) -#define GPDMA_SOFT_LSREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x02C)) -#define GPDMA_CONFIG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x030)) -#define GPDMA_SYNC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x034)) - -/* DMA channel 0 registers */ -#define GPDMA_CH0_SRC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x100)) -#define GPDMA_CH0_DEST (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x104)) -#define GPDMA_CH0_LLI (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x108)) -#define GPDMA_CH0_CTRL (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x10C)) -#define GPDMA_CH0_CFG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x110)) - -/* DMA channel 1 registers */ -#define GPDMA_CH1_SRC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x120)) -#define GPDMA_CH1_DEST (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x124)) -#define GPDMA_CH1_LLI (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x128)) -#define GPDMA_CH1_CTRL (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x12C)) -#define GPDMA_CH1_CFG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x130)) - - -/* USB Controller */ -#define USB_INT_BASE_ADDR 0xE01FC1C0 -#define USB_BASE_ADDR 0xFFE0C200 /* USB Base Address */ - -#define USB_INT_STAT (*(volatile unsigned long *)(USB_INT_BASE_ADDR + 0x00)) - -/* USB Device Interrupt Registers */ -#define DEV_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00)) -#define DEV_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04)) -#define DEV_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08)) -#define DEV_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C)) -#define DEV_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C)) - -/* USB Device Endpoint Interrupt Registers */ -#define EP_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30)) -#define EP_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34)) -#define EP_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38)) -#define EP_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C)) -#define EP_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40)) - -/* USB Device Endpoint Realization Registers */ -#define REALIZE_EP (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44)) -#define EP_INDEX (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48)) -#define MAXPACKET_SIZE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C)) - -/* USB Device Command Reagisters */ -#define CMD_CODE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10)) -#define CMD_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14)) - -/* USB Device Data Transfer Registers */ -#define RX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18)) -#define TX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C)) -#define RX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20)) -#define TX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24)) -#define USB_CTRL (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28)) - -/* USB Device DMA Registers */ -#define DMA_REQ_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x50)) -#define DMA_REQ_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x54)) -#define DMA_REQ_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x58)) -#define UDCA_HEAD (*(volatile unsigned long *)(USB_BASE_ADDR + 0x80)) -#define EP_DMA_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x84)) -#define EP_DMA_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x88)) -#define EP_DMA_DIS (*(volatile unsigned long *)(USB_BASE_ADDR + 0x8C)) -#define DMA_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x90)) -#define DMA_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x94)) -#define EOT_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA0)) -#define EOT_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA4)) -#define EOT_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA8)) -#define NDD_REQ_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xAC)) -#define NDD_REQ_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB0)) -#define NDD_REQ_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB4)) -#define SYS_ERR_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB8)) -#define SYS_ERR_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xBC)) -#define SYS_ERR_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xC0)) - -/* USB Host and OTG registers are for LPC24xx only */ -/* USB Host Controller */ -#define USBHC_BASE_ADDR 0xFFE0C000 -#define HC_REVISION (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x00)) -#define HC_CONTROL (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x04)) -#define HC_CMD_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x08)) -#define HC_INT_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x0C)) -#define HC_INT_EN (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x10)) -#define HC_INT_DIS (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x14)) -#define HC_HCCA (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x18)) -#define HC_PERIOD_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x1C)) -#define HC_CTRL_HEAD_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x20)) -#define HC_CTRL_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x24)) -#define HC_BULK_HEAD_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x28)) -#define HC_BULK_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x2C)) -#define HC_DONE_HEAD (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x30)) -#define HC_FM_INTERVAL (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x34)) -#define HC_FM_REMAINING (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x38)) -#define HC_FM_NUMBER (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x3C)) -#define HC_PERIOD_START (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x40)) -#define HC_LS_THRHLD (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x44)) -#define HC_RH_DESCA (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x48)) -#define HC_RH_DESCB (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x4C)) -#define HC_RH_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x50)) -#define HC_RH_PORT_STAT1 (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x54)) -#define HC_RH_PORT_STAT2 (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x58)) - -/* USB OTG Controller */ -#define USBOTG_BASE_ADDR 0xFFE0C100 -#define OTG_INT_STAT (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x00)) -#define OTG_INT_EN (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x04)) -#define OTG_INT_SET (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x08)) -#define OTG_INT_CLR (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x0C)) -/* On LPC23xx, the name is USBPortSel, on LPC24xx, the name is OTG_STAT_CTRL */ -#define OTG_STAT_CTRL (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x10)) -#define OTG_TIMER (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x14)) - -#define USBOTG_I2C_BASE_ADDR 0xFFE0C300 -#define OTG_I2C_RX (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x00)) -#define OTG_I2C_TX (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x00)) -#define OTG_I2C_STS (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x04)) -#define OTG_I2C_CTL (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x08)) -#define OTG_I2C_CLKHI (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x0C)) -#define OTG_I2C_CLKLO (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x10)) - -/* On LPC23xx, the names are USBClkCtrl and USBClkSt; on LPC24xx, the names are -OTG_CLK_CTRL and OTG_CLK_STAT respectively. */ -#define USBOTG_CLK_BASE_ADDR 0xFFE0CFF0 -#define OTG_CLK_CTRL (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x04)) -#define OTG_CLK_STAT (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x08)) - -/* Note: below three register name convention is for LPC23xx USB device only, match -with the spec. update in USB Device Section. */ -#define USBPortSel (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x10)) -#define USBClkCtrl (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x04)) -#define USBClkSt (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x08)) - -/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */ -#define MAC_BASE_ADDR 0xFFE00000 /* AHB Peripheral # 0 */ -#define MAC_MAC1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */ -#define MAC_MAC2 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */ -#define MAC_IPGT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */ -#define MAC_IPGR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */ -#define MAC_CLRT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */ -#define MAC_MAXF (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */ -#define MAC_SUPP (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */ -#define MAC_TEST (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */ -#define MAC_MCFG (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */ -#define MAC_MCMD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */ -#define MAC_MADR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */ -#define MAC_MWTD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */ -#define MAC_MRDD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */ -#define MAC_MIND (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */ - -#define MAC_SA0 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */ -#define MAC_SA1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */ -#define MAC_SA2 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */ - -#define MAC_COMMAND (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x100)) /* Command reg */ -#define MAC_STATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */ -#define MAC_RXDESCRIPTOR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */ -#define MAC_RXSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */ -#define MAC_RXDESCRIPTORNUM (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */ -#define MAC_RXPRODUCEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */ -#define MAC_RXCONSUMEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */ -#define MAC_TXDESCRIPTOR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */ -#define MAC_TXSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */ -#define MAC_TXDESCRIPTORNUM (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */ -#define MAC_TXPRODUCEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */ -#define MAC_TXCONSUMEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */ - -#define MAC_TSV0 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */ -#define MAC_TSV1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */ -#define MAC_RSV (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */ - -#define MAC_FLOWCONTROLCNT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */ -#define MAC_FLOWCONTROLSTS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */ - -#define MAC_RXFILTERCTRL (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */ -#define MAC_RXFILTERWOLSTS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */ -#define MAC_RXFILTERWOLCLR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */ - -#define MAC_HASHFILTERL (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */ -#define MAC_HASHFILTERH (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */ - -#define MAC_INTSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */ -#define MAC_INTENABLE (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg */ -#define MAC_INTCLEAR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */ -#define MAC_INTSET (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */ - -#define MAC_POWERDOWN (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */ -#define MAC_MODULEID (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */ - - -#endif // __LPC23xx_H -
--- a/LocalFileSystem.h Thu May 14 14:44:00 2009 +0000
+++ b/LocalFileSystem.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,7 +1,8 @@
-/* mbed Microcontroller Library - SemihostFileSystem
- * Copyright (c) 2007-2008, sford
- */
-
+/* mbed Microcontroller Library - LocalFileSystem
+ * Copyright (c) 2008-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
#ifndef MBED_LOCALFILESYSTEM_H
#define MBED_LOCALFILESYSTEM_H
@@ -10,7 +11,7 @@
namespace mbed {
/* Class: LocalFileSystem
- * A filesystem for accessing the local mbed Microcontroller USB disk drive.
+ * A filesystem for accessing the local mbed Microcontroller USB disk drive
*
* This allows programs to read and write files on the same disk drive that is used to program the
* mbed Microcontroller. Once created, the standard C file access functions are used to open,
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/PeripheralNames.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,90 @@
+/* mbed Microcontroller Library - PeripheralNames
+ * Copyright (C) 2008-2009 ARM Limited. All rights reserved.
+ *
+ * Provides the mappings for peripherals
+ * Implementation specific to the LPC1768/LPC2368
+ * sford
+ */
+
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum UARTName UARTName;
+enum UARTName {
+ UART_0 = (int)LPC_UART0_BASE
+ , UART_1 = (int)LPC_UART1_BASE
+ , UART_2 = (int)LPC_UART2_BASE
+ , UART_3 = (int)LPC_UART3_BASE
+};
+
+typedef enum ADCName ADCName;
+enum ADCName {
+ ADC0_0 = 0
+ , ADC0_1
+ , ADC0_2
+ , ADC0_3
+ , ADC0_4
+ , ADC0_5
+ , ADC0_6
+ , ADC0_7
+};
+
+typedef enum DACName DACName;
+enum DACName {
+ DAC_0 = 0
+};
+
+typedef enum SPIName SPIName;
+enum SPIName {
+ SPI_0 = (int)LPC_SSP0_BASE
+ , SPI_1 = (int)LPC_SSP1_BASE
+};
+
+typedef enum I2CName I2CName;
+enum I2CName {
+ I2C_0 = (int)LPC_I2C0_BASE
+ , I2C_1 = (int)LPC_I2C1_BASE
+ , I2C_2 = (int)LPC_I2C2_BASE
+};
+
+typedef enum PWMName PWMName;
+enum PWMName {
+ PWM_1 = 1
+ , PWM_2
+ , PWM_3
+ , PWM_4
+ , PWM_5
+ , PWM_6
+};
+
+typedef enum TimerName TimerName;
+enum TimerName {
+ TIMER_0 = (int)LPC_TIM0_BASE
+ , TIMER_1 = (int)LPC_TIM1_BASE
+ , TIMER_2 = (int)LPC_TIM2_BASE
+ , TIMER_3 = (int)LPC_TIM3_BASE
+};
+
+typedef enum CANName CANName;
+enum CANName {
+ CAN_1 = (int)LPC_CAN1_BASE,
+ CAN_2 = (int)LPC_CAN2_BASE
+};
+
+#define STDIO_UART_TX USBTX
+#define STDIO_UART_RX USBRX
+#define STDIO_UART UART_0
+#define US_TICKER_TIMER TIMER_3
+#define US_TICKER_TIMER_IRQn TIMER3_IRQn
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/PinNames.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,95 @@
+/* mbed Microcontroller Library - PinNames
+ * Copyright (C) 2008-2009 ARM Limited. All rights reserved.
+ *
+ * Provides the mapping of mbed DIP and LPC Pin Names
+ * This is an LPC1768/LPC2368 specific implementation
+ * sford
+ */
+
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum PinName PinName;
+enum PinName {
+
+ // LPC Pin Names
+ P0_0 = LPC_GPIO0_BASE, P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7
+ , P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15
+ , P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23
+ , P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31
+ , P1_0, P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7
+ , P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15
+ , P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23
+ , P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31
+ , P2_0, P2_1, P2_2, P2_3, P2_4, P2_5, P2_6, P2_7
+ , P2_8, P2_9, P2_10, P2_11, P2_12, P2_13, P2_14, P2_15
+ , P2_16, P2_17, P2_18, P2_19, P2_20, P2_21, P2_22, P2_23
+ , P2_24, P2_25, P2_26, P2_27, P2_28, P2_29, P2_30, P2_31
+ , P3_0, P3_1, P3_2, P3_3, P3_4, P3_5, P3_6, P3_7
+ , P3_8, P3_9, P3_10, P3_11, P3_12, P3_13, P3_14, P3_15
+ , P3_16, P3_17, P3_18, P3_19, P3_20, P3_21, P3_22, P3_23
+ , P3_24, P3_25, P3_26, P3_27, P3_28, P3_29, P3_30, P3_31
+ , P4_0, P4_1, P4_2, P4_3, P4_4, P4_5, P4_6, P4_7
+ , P4_8, P4_9, P4_10, P4_11, P4_12, P4_13, P4_14, P4_15
+ , P4_16, P4_17, P4_18, P4_19, P4_20, P4_21, P4_22, P4_23
+ , P4_24, P4_25, P4_26, P4_27, P4_28, P4_29, P4_30, P4_31
+
+ // mbed DIP Pin Names
+ , p5 = P0_9
+ , p6 = P0_8
+ , p7 = P0_7
+ , p8 = P0_6
+ , p9 = P0_0
+ , p10 = P0_1
+ , p11 = P0_18
+ , p12 = P0_17
+ , p13 = P0_15
+ , p14 = P0_16
+ , p15 = P0_23
+ , p16 = P0_24
+ , p17 = P0_25
+ , p18 = P0_26
+ , p19 = P1_30
+ , p20 = P1_31
+ , p21 = P2_5
+ , p22 = P2_4
+ , p23 = P2_3
+ , p24 = P2_2
+ , p25 = P2_1
+ , p26 = P2_0
+ , p27 = P0_11
+ , p28 = P0_10
+ , p29 = P0_5
+ , p30 = P0_4
+
+ // Other mbed Pin Names
+ , LED1 = P1_18
+ , LED2 = P1_20
+ , LED3 = P1_21
+ , LED4 = P1_23
+ , USBTX = P0_2
+ , USBRX = P0_3
+
+ // Not connected
+ , NC = (int)0xFFFFFFFF
+
+};
+
+typedef enum PinMode PinMode;
+enum PinMode {
+ PullUp = 0
+ , PullDown = 3
+ , PullNone = 2
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- a/PwmOut.h Thu May 14 14:44:00 2009 +0000
+++ b/PwmOut.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,10 +1,14 @@
/* mbed Microcontroller Library - PwmOut
- * Copyright (c) 2007-2008, sford
- */
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford
+ */
#ifndef MBED_PWMOUT_H
#define MBED_PWMOUT_H
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
#include "Base.h"
namespace mbed {
@@ -12,101 +16,112 @@
/* Class: PwmOut
* A pulse-width modulation digital output
*
- * Implementation Note:
- * The period is is common to all PwmOut's, so changing it on one PwmOut will change them all!
+ * Example
+ * > // Fade a led on.
+ * > #include "mbed.h"
+ * >
+ * > PwmOut led(LED1);
+ * >
+ * > int main() {
+ * > while(1) {
+ * > led = led + 0.01;
+ * > wait(0.2);
+ * > if(led == 1.0) {
+ * > led = 0;
+ * > }
+ * > }
+ * > }
*/
class PwmOut : public Base {
public:
- /* Constructor: PwmOut
- * Create a PwmOut connected to the specified pin
- *
- * Variables:
- * pin - PwmOut pin to connect to (21-26)
- */
- PwmOut(int pin, const char *name = NULL);
+ /* Constructor: PwmOut
+ * Create a PwmOut connected to the specified pin
+ *
+ * Variables:
+ * pin - PwmOut pin to connect to
+ */
+ PwmOut(PinName pin, const char *name = NULL);
- /* Function: write
- * Set the ouput duty-cycle, specified as a percentage (float)
- *
- * Variables:
- * percent - A floating-point value representing the output duty-cycle,
- * specified as a percentage. The value should lie between
- * 0.0f (representing 0v / on 0%) and 1.0f (representing 3.3v / on 100%).
- * Values outside this range will be saturated to 0.0f or 1.0f.
- */
- void write(float percent);
+ /* Function: write
+ * Set the ouput duty-cycle, specified as a percentage (float)
+ *
+ * Variables:
+ * value - A floating-point value representing the output duty-cycle,
+ * specified as a percentage. The value should lie between
+ * 0.0f (representing on 0%) and 1.0f (representing on 100%).
+ * Values outside this range will be saturated to 0.0f or 1.0f.
+ */
+ void write(float value);
-
- /* Function: read
- * Return the current output duty-cycle setting, measured as a percentage (float)
+ /* Function: read
+ * Return the current output duty-cycle setting, measured as a percentage (float)
*
* Variables:
- * returns - A floating-point value representing the current duty-cycle being output on the pin,
- * measured as a percentage. The returned value will lie between
- * 0.0f (representing 0v / 0% on) and 1.0f (representing 3.3v / 100% on).
- *
- * Note:
- * This value may not match exactly the value set by a previous <write>.
- */
+ * returns - A floating-point value representing the current duty-cycle being output on the pin,
+ * measured as a percentage. The returned value will lie between
+ * 0.0f (representing on 0%) and 1.0f (representing on 100%).
+ *
+ * Note:
+ * This value may not match exactly the value set by a previous <write>.
+ */
float read();
-
- /* Function: period
- * Set the PWM period, specified in seconds (float)
- */
- void period(float seconds);
+
+ /* Function: period
+ * Set the PWM period, specified in seconds (float)
+ */
+ void period(float seconds);
- /* Function: period_ms
- * Set the PWM period, specified in milli-seconds (int)
- */
- void period_ms(int ms);
+ /* Function: period_ms
+ * Set the PWM period, specified in milli-seconds (int)
+ */
+ void period_ms(int ms);
- /* Function: period_us
- * Set the PWM period, specified in micro-seconds (int)
- */
- void period_us(int us);
+ /* Function: period_us
+ * Set the PWM period, specified in micro-seconds (int)
+ */
+ void period_us(int us);
- /* Function: pulsewidth
- * Set the PWM pulsewidth, specified in seconds (float)
- */
- void pulsewidth(float seconds);
-
- /* Function: pulsewidth_ms
- * Set the PWM pulsewidth, specified in milli-seconds (int)
- */
- void pulsewidth_ms(int ms);
-
- /* Function: pulsewidth_us
- * Set the PWM pulsewidth, specified in micro-seconds (int)
- */
- void pulsewidth_us(int us);
+ /* Function: pulsewidth
+ * Set the PWM pulsewidth, specified in seconds (float)
+ */
+ void pulsewidth(float seconds);
+
+ /* Function: pulsewidth_ms
+ * Set the PWM pulsewidth, specified in milli-seconds (int)
+ */
+ void pulsewidth_ms(int ms);
+
+ /* Function: pulsewidth_us
+ * Set the PWM pulsewidth, specified in micro-seconds (int)
+ */
+ void pulsewidth_us(int us);
- /* Function: operator=
- * A operator shorthand for <write()>
- */
- PwmOut& operator= (float percent);
- PwmOut& operator= (PwmOut& rhs);
+#ifdef MBED_OPERATORS
+ /* Function: operator=
+ * A operator shorthand for <write()>
+ */
+ PwmOut& operator= (float value);
+ PwmOut& operator= (PwmOut& rhs);
- /* Function: operator float()
- * An operator shorthand for <read()>
- */
- operator float();
+ /* Function: operator float()
+ * An operator shorthand for <read()>
+ */
+ operator float();
+#endif
- // functions to be dropped in time...
- void write_v(float v);
- void write_mv(int mv);
-
+#ifdef MBED_RPC
virtual const struct rpc_method *get_rpc_methods();
static struct rpc_class *get_rpc_class();
+#endif
-
protected:
- int _id;
+ PWMName _pwm;
+
};
-}
+} // namespace mbed
#endif
-
--- a/SPI.h Thu May 14 14:44:00 2009 +0000
+++ b/SPI.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,108 +1,107 @@
-/* mbed Microcontroller Library - SPI
- * Copyright (c) 2006-2009 ARM Limited. All rights reserved.
- * sford
- */
-
-#ifndef MBED_SPI_H
-#define MBED_SPI_H
-
-#include "Base.h"
-#include "LPC2300.h"
-
-namespace mbed {
-
-/* Class: SPI
- * A SPI Master, used for communicating with SPI slave devices
- *
- * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
- *
- * Most SPI devices will also require Chip Select and Reset signals. These
- * can be controlled using <DigitalOut> pins
- *
- * Example:
- * > // Send a byte to a SPI slave, and record the response
- * >
- * > #include "mbed.h"
- * >
- * > SPI device(5, 6, 7); // mosi, miso, sclk
- * >
- * > int main() {
- * > int response = device.write(0xFF);
- * > }
- */
-class SPI : public Base {
-
-public:
-
- /* Constructor: SPI
- * Create a SPI master connected to the specified pins
- *
- * Variables:
- * mosi - SPI Master Out, Slave In pin
- * miso - SPI Master In, Slave Out pin
- * sclk - SPI Clock pin
- * name - (optional) A string to identify the object
- *
- * Pin Options:
- * (5, 6, 7) or (11, 12, 13)
- *
- * mosi and miso can each be specfied as NC (not connected) e.g. (5, NC, 7)
- */
- SPI(int mosi, int miso, int sclk, const char *name = NULL);
-
- /* Function: format
- * Configure the data transmission format
- *
- * Variables:
- * bits - Number of bits per SPI frame (4 - 16)
- * mode - Clock polarity and phase mode (0 - 3)
- *
- * > mode | POL PHA
- * > -----+--------
- * > 0 | 0 0
- * > 1 | 0 1
- * > 2 | 1 0
- * > 3 | 1 1
- */
- void format(int bits, int mode = 0);
-
- // old one, to be removed over time...
- void format(int bits, int polarity, int phase) __attribute__((deprecated));
-
- /* Function: frequency
- * Set the bus clock frequency
- *
- * Variables:
- * hz - SCLK frequency in hz (default = 1MHz)
- */
- void frequency(int hz = 1000000);
-
- /* Function: write
- * Write to the SPI Slave and return the response
- *
- * Variables:
- * value - Data to be sent to the SPI slave
- * returns - Response from the SPI slave
- */
- int write(int value);
-
- virtual const struct rpc_method *get_rpc_methods();
- static struct rpc_class *get_rpc_class();
-
-protected:
-
- void configure();
-
- int _id;
-
- int _uid;
- static int _uidcounter;
-
- int _bits, _polarity, _phase, _hz;
- static int _config[2];
-};
-
-}
-
-#endif
-
+/* mbed Microcontroller Library - SPI
+ * Copyright (c) 2006-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+#ifndef MBED_SPI_H
+#define MBED_SPI_H
+
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
+#include "Base.h"
+
+namespace mbed {
+
+/* Class: SPI
+ * A SPI Master, used for communicating with SPI slave devices
+ *
+ * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
+ *
+ * Most SPI devices will also require Chip Select and Reset signals. These
+ * can be controlled using <DigitalOut> pins
+ *
+ * Example:
+ * > // Send a byte to a SPI slave, and record the response
+ * >
+ * > #include "mbed.h"
+ * >
+ * > SPI device(p5, p6, p7); // mosi, miso, sclk
+ * >
+ * > int main() {
+ * > int response = device.write(0xFF);
+ * > }
+ */
+class SPI : public Base {
+
+public:
+
+ /* Constructor: SPI
+ * Create a SPI master connected to the specified pins
+ *
+ * Variables:
+ * mosi - SPI Master Out, Slave In pin
+ * miso - SPI Master In, Slave Out pin
+ * sclk - SPI Clock pin
+ * name - (optional) A string to identify the object
+ *
+ * Pin Options:
+ * (5, 6, 7) or (11, 12, 13)
+ *
+ * mosi or miso can be specfied as NOT_CONNECTED if not used
+ */
+ SPI(PinName mosi, PinName miso, PinName sclk, const char *name = NULL);
+
+ /* Function: format
+ * Configure the data transmission format
+ *
+ * Variables:
+ * bits - Number of bits per SPI frame (4 - 16)
+ * mode - Clock polarity and phase mode (0 - 3)
+ *
+ * > mode | POL PHA
+ * > -----+--------
+ * > 0 | 0 0
+ * > 1 | 0 1
+ * > 2 | 1 0
+ * > 3 | 1 1
+ */
+ void format(int bits, int mode = 0);
+
+ /* Function: frequency
+ * Set the spi bus clock frequency
+ *
+ * Variables:
+ * hz - SCLK frequency in hz (default = 1MHz)
+ */
+ void frequency(int hz = 1000000);
+
+ /* Function: write
+ * Write to the SPI Slave and return the response
+ *
+ * Variables:
+ * value - Data to be sent to the SPI slave
+ * returns - Response from the SPI slave
+ */
+ int write(int value);
+
+#ifdef MBED_RPC
+ virtual const struct rpc_method *get_rpc_methods();
+ static struct rpc_class *get_rpc_class();
+#endif
+
+protected:
+
+ SPIName _spi;
+
+ void aquire();
+ static SPI *_owner;
+ int _bits;
+ int _mode;
+ int _hz;
+
+};
+
+} // namespace mbed
+
+#endif
--- a/SPI3.h Thu May 14 14:44:00 2009 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,100 +0,0 @@
-/* mbed Microcontroller Library - SPI3
- * Copyright (c) 2007-2009, sford
- */
-
-#ifndef MBED_SPI3_H
-#define MBED_SPI3_H
-
-#include "Base.h"
-#include "LPC2300.h"
-
-namespace mbed {
-
-/* Class: SPI3
- * A SPI Master, used for communicating with 3-wire SPI slave devices
- *
- * 3-wire SPI devices use the same line for input an output, and should be connected to both
- * the mosi and miso pins on the mbed Microcontroller
- */
-
-class SPI3 : public Base {
-
-public:
-
- /* Constructor: SPI3
- * Create a 3-wire SPI master connected to the specified pins
- *
- * Variables:
- * mosi - SPI Master Out, Slave In pin
- * miso - SPI Master In, Slave Out pin
- * sclk - SPI Clock pin
- *
- * Pin Options:
- * (5, 6, 7) or (11, 12, 13)
- */
- SPI3(int mosi, int miso, int sclk, const char *name=NULL);
-
- /* Function: format
- * Configure the data transmission format
- *
- * Variables:
- * bits - Number of bits per SPI frame (4 - 16, default = 8)
- * mode - Clock polarity and phase mode (0 - 3, default = 0)
- *
- * > mode | POL PHA
- * > -----+--------
- * > 0 | 0 0
- * > 1 | 0 1
- * > 2 | 1 0
- * > 3 | 1 1
- */
- void format(int bits = 8, int mode = 0);
-
- // old one...
- void format(int bits = 8, int polarity = 0, int phase = 0);
-
- /* Function: frequency
- * Set the bus clock frequency
- *
- * Variables:
- * hz - SCLK frequency in hz (default = 1MHz)
- */
- void frequency(int hz = 1000000);
-
- /* Function: write
- * Set the direction to output and write to the SPI Slave
- *
- * Variables:
- * value - Data to be sent to the SPI slave
- */
- void write(int value);
-
- /* Function: read
- * Set the direction to input, read from the SPI Slave
- *
- * Variables:
- * returns - Response from the SPI slave
- */
- int read();
-
- virtual const struct rpc_method *get_rpc_methods();
- static struct rpc_class *get_rpc_class();
-
-protected:
-
- void configure();
-
- int _id;
-
- int _uid;
- static int _uidcounter;
-
- int _bits, _polarity, _phase, _hz;
- static int _config[2];
- const LPC2300::PortMap* mosi_portmap;
-};
-
-}
-
-#endif
-
--- a/Serial.h Thu May 14 14:44:00 2009 +0000
+++ b/Serial.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,131 +1,142 @@
-/* mbed Microcontroller Library - Serial
- * Copyright (c) 2007-2008, sford
- */
-
-#ifndef MBED_SERIAL_H
-#define MBED_SERIAL_H
-
-#include "Stream.h"
-
-namespace mbed {
-
-/* Class: Serial
- * A serial port (UART) for communication with other serial devices
- */
-class Serial : public Stream {
-
-public:
-
- /* Constructor: Serial
- * Create a Serial port, connected to the specified transmit and receive pins
- *
- * Variables:
- * tx - Transmit pin
- * rx - Receive pin
- *
- * Pin Options:
- * (USBTX, USBRX) or (9, 10) or (13, 14) or (28, 27)
- *
- * Either tx or rx may be specified as NC (not connected) e.g. (9, NC)
- */
- Serial(int tx, int rx, const char *name = NULL);
-
-
- /* Function: baud
- * Set the baud rate of the serial port
- *
- * Variables:
- * baudrate - The baudrate of the serial port (default = 9600).
- * Standard baud rates up to 921600 are supported.
- */
- void baud(int baudrate);
-
- enum Parity {
- None = 0,
- Odd = 1,
- Even = 2,
- Forced1 = 3,
- Forced0 = 4
- };
-
- /* Function: format
- * Set the transmission format used by the Serial port
- *
- * Variables:
- * bits - The number of bits in a word (5-8; default = 8)
- * parity - The type of parity used (None, Odd, Even, Forced1, Forced0; default = None)
- * stop - The number of stop bits (1 or 2; default = 1)
- */
- void format(int bits, int parity, int stop);
-
-
-#if 0 // Inhereted from Stream, for documentation only
-
- /* Function: putc
- * Write a character
- *
- * Variables:
- * c - The character to write to the serial port
- */
- int putc(int c);
-
- /* Function: getc
- * Read a character
- *
- * Variables:
- * returns - The character read from the serial port
- */
- int getc();
-
- /* Function: printf
- * Write a formated string
- *
- * Variables:
- * format - A printf-style format string, followed by the
- * variables to use in formating the string.
- */
- int printf(const char* format, ...);
-
- /* Function: scanf
- * Read a formated string
- *
- * Variables:
- * format - A scanf-style format string,
- * followed by the pointers to variables to store the results.
- */
- int scanf(const char* format, ...);
-
-#endif
-
- /* Function: readable
- * Determine if there is a character available to read
- *
- * Variables:
- * returns - 1 if there is a character available to read, else 0
- */
- int readable();
-
- /* Function: writeable
- * Determine if there is space available to write a character
- *
- * Variables:
- * returns - 1 if there is space to write a character, else 0
- */
- int writeable();
-
- virtual const struct rpc_method *get_rpc_methods();
- static struct rpc_class *get_rpc_class();
-
-protected:
-
- virtual int _getc();
- virtual int _putc(int c);
-
- int _id;
-
-};
-
-}
-
-#endif
-
+/* mbed Microcontroller Library - Serial
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+#ifndef MBED_SERIAL_H
+#define MBED_SERIAL_H
+
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
+#include "Stream.h"
+
+namespace mbed {
+
+/* Class: Serial
+ * A serial port (UART) for communication with other serial devices
+ *
+ * Example:
+ * > // Print "Hello World" to the PC
+ * >
+ * > #include "mbed.h"
+ * >
+ * > Serial pc(USBTX, USBRX);
+ * >
+ * > int main() {
+ * > pc.printf("Hello World\n");
+ * > }
+ */
+class Serial : public Stream {
+
+public:
+
+ /* Constructor: Serial
+ * Create a Serial port, connected to the specified transmit and receive pins
+ *
+ * Variables:
+ * tx - Transmit pin
+ * rx - Receive pin
+ *
+ * Note: Either tx or rx may be specified as NOT_CONNECTED if unused
+ */
+ Serial(PinName tx, PinName rx, const char *name = NULL);
+
+ /* Function: baud
+ * Set the baud rate of the serial port
+ *
+ * Variables:
+ * baudrate - The baudrate of the serial port (default = 9600).
+ */
+ void baud(int baudrate);
+
+ enum Parity {
+ None = 0
+ , Odd
+ , Even
+ , Forced1
+ , Forced0
+ };
+
+ /* Function: format
+ * Set the transmission format used by the Serial port
+ *
+ * Variables:
+ * bits - The number of bits in a word (5-8; default = 8)
+ * parity - The parity used (Serial::None, Serial::Odd, Serial::Even, Serial::Forced1, Serial::Forced0; default = Serial::None)
+ * stop - The number of stop bits (1 or 2; default = 1)
+ */
+ void format(int bits = 8, Parity parity = Serial::None, int stop_bits = 1);
+
+#if 0 // Inhereted from Stream, for documentation only
+
+ /* Function: putc
+ * Write a character
+ *
+ * Variables:
+ * c - The character to write to the serial port
+ */
+ int putc(int c);
+
+ /* Function: getc
+ * Read a character
+ *
+ * Variables:
+ * returns - The character read from the serial port
+ */
+ int getc();
+
+ /* Function: printf
+ * Write a formated string
+ *
+ * Variables:
+ * format - A printf-style format string, followed by the
+ * variables to use in formating the string.
+ */
+ int printf(const char* format, ...);
+
+ /* Function: scanf
+ * Read a formated string
+ *
+ * Variables:
+ * format - A scanf-style format string,
+ * followed by the pointers to variables to store the results.
+ */
+ int scanf(const char* format, ...);
+
+#endif
+
+ /* Function: readable
+ * Determine if there is a character available to read
+ *
+ * Variables:
+ * returns - 1 if there is a character available to read, else 0
+ */
+ int readable();
+
+ /* Function: writeable
+ * Determine if there is space available to write a character
+ *
+ * Variables:
+ * returns - 1 if there is space to write a character, else 0
+ */
+ int writeable();
+
+#ifdef MBED_RPC
+ virtual const struct rpc_method *get_rpc_methods();
+ static struct rpc_class *get_rpc_class();
+#endif
+
+protected:
+
+ virtual int _getc();
+ virtual int _putc(int c);
+
+ UARTName _uart;
+
+};
+
+} // namespace mbed
+
+#endif
+
--- a/Stream.h Thu May 14 14:44:00 2009 +0000
+++ b/Stream.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,11 +1,13 @@
/* mbed Microcontroller Library - Stream
- * Copyright (c) 2007-2008, sford
- */
-
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
#ifndef MBED_STREAM_H
#define MBED_STREAM_H
#include "FileLike.h"
+#include "platform.h"
#include <cstdio>
namespace mbed {
@@ -37,8 +39,10 @@
int scanf(const char* format, ...);
operator std::FILE*() { return _file; }
-
+
+#ifdef MBED_RPC
virtual const struct rpc_method *get_rpc_methods();
+#endif
protected:
--- a/Ticker.h Thu May 14 14:44:00 2009 +0000
+++ b/Ticker.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,12 +1,13 @@
/* mbed Microcontroller Library - Ticker
- * Copyright (c) 2007-2008, sford
- */
-
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
#ifndef MBED_TICKER_H
#define MBED_TICKER_H
#include "TimerEvent.h"
-#include "FunctionPointer.h"
+#include "FunctionPointer.h"
namespace mbed {
@@ -14,6 +15,34 @@
* A Ticker is used to call a function at a recurring interval
*
* You can use as many seperate Ticker objects as you require.
+ *
+ * Example:
+ * > // Toggle the blinking led after 5 seconds
+ * >
+ * > #include "mbed.h"
+ * >
+ * > Ticker timer;
+ * > DigitalOut led1(LED1);
+ * > DigitalOut led2(LED2);
+ * >
+ * > int flip = 0;
+ * >
+ * > void attime() {
+ * > flip = !flip;
+ * > }
+ * >
+ * > int main() {
+ * > timer.attach(&attime, 5);
+ * > while(1) {
+ * > if(flip == 0) {
+ * > led1 = !led1;
+ * > } else {
+ * > led2 = !led2;
+ * > }
+ * > wait(0.2);
+ * > }
+ * > }
+ *
*/
class Ticker : public TimerEvent {
@@ -73,17 +102,17 @@
* Detach the function
*/
void detach();
-
+
protected:
void setup(unsigned int t);
virtual void handler();
-
- unsigned int _delay;
- FunctionPointer _function;
+
+ unsigned int _delay;
+ FunctionPointer _function;
-};
+};
-}
+} // namespace mbed
#endif
--- a/Timeout.h Thu May 14 14:44:00 2009 +0000
+++ b/Timeout.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,7 +1,8 @@
/* mbed Microcontroller Library - Timeout
- * Copyright (c) 2007-2008, sford
- */
-
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
#ifndef MBED_TIMEOUT_H
#define MBED_TIMEOUT_H
@@ -13,6 +14,28 @@
* A Timeout is used to call a function at a point in the future
*
* You can use as many seperate Timeout objects as you require.
+ *
+ * Example:
+ * > // Blink until timeout.
+ * >
+ * > #include "mbed.h"
+ * >
+ * > Timeout timeout;
+ * > DigitalOut led(LED1);
+ * >
+ * > int on = 1;
+ * >
+ * > void attimeout() {
+ * > on = 0;
+ * > }
+ * >
+ * > int main() {
+ * > timeout.attach(&attimeout, 5);
+ * > while(on) {
+ * > led = !led;
+ * > wait(0.2);
+ * > }
+ * > }
*/
class Timeout : public Ticker {
@@ -77,10 +100,10 @@
protected:
- virtual void handler();
-
-};
+ virtual void handler();
-}
+};
+
+} // namespace mbed
#endif
--- a/Timer.h Thu May 14 14:44:00 2009 +0000
+++ b/Timer.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,71 +1,95 @@
-/* mbed Microcontroller Library - Timer
- * Copyright (c) 2007-2008, sford
- */
-
-#ifndef MBED_TIMER_H
-#define MBED_TIMER_H
-
-#include "Base.h"
-
-namespace mbed {
-
-/* Class: Timer
- * A general purpose timer
- */
-class Timer : public Base {
-
-public:
-
- Timer(const char *name = NULL);
-
- /* Group: Access Methods */
-
- /* Function: start
- * Start the timer
- */
- void start();
-
- /* Function: stop
- * Stop the timer
- */
- void stop();
-
- /* Function: reset
- * Reset the timer to 0.
- *
- * If it was already counting, it will continue
- */
- void reset();
-
- /* Function: read
- * Get the time passed in seconds
- */
- float read();
-
- /* Function: read_ms
- * Get the time passed in mili-seconds
- */
- int read_ms();
-
- /* Function: read_us
- * Get the time passed in micro-seconds
- */
- int read_us();
-
- operator float();
-
- int slicetime();
-
- int _running; // whether the timer is running
- unsigned int _start; // the start time of the latest slice
- int _time; // any accumulated time from previous slices
-
- virtual const struct rpc_method *get_rpc_methods();
- static struct rpc_class *get_rpc_class();
-
-};
-
-}
-
-#endif
-
+/* mbed Microcontroller Library - Timer
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+#ifndef MBED_TIMER_H
+#define MBED_TIMER_H
+
+#include "platform.h"
+#include "PinNames.h"
+#include "PeripheralNames.h"
+#include "Base.h"
+
+namespace mbed {
+
+/* Class: Timer
+ * A general purpose timer
+ *
+ * Example:
+ * > // Count the time to toggle a LED
+ * >
+ * > #include "mbed.h"
+ * >
+ * > Timer timer;
+ * > DigitalOut led(LED1);
+ * > int begin, end;
+ * >
+ * > int main() {
+ * > timer.start();
+ * > begin = timer.read_us();
+ * > led = !led;
+ * > end = timer.read_us();
+ * > printf("Toggle the led takes %d us", end - begin);
+ * > }
+ */
+class Timer : public Base {
+
+public:
+
+ Timer(const char *name = NULL);
+
+ /* Function: start
+ * Start the timer
+ */
+ void start();
+
+ /* Function: stop
+ * Stop the timer
+ */
+ void stop();
+
+ /* Function: reset
+ * Reset the timer to 0.
+ *
+ * If it was already counting, it will continue
+ */
+ void reset();
+
+ /* Function: read
+ * Get the time passed in seconds
+ */
+ float read();
+
+ /* Function: read_ms
+ * Get the time passed in mili-seconds
+ */
+ int read_ms();
+
+ /* Function: read_us
+ * Get the time passed in micro-seconds
+ */
+ int read_us();
+
+#ifdef MBED_OPERATORS
+ operator float();
+#endif
+
+#ifdef MBED_RPC
+ virtual const struct rpc_method *get_rpc_methods();
+ static struct rpc_class *get_rpc_class();
+#endif
+
+protected:
+
+ int slicetime();
+ int _running; // whether the timer is running
+ unsigned int _start; // the start time of the latest slice
+ int _time; // any accumulated time from previous slices
+
+};
+
+} // namespace mbed
+
+#endif
+
--- a/TimerEvent.h Thu May 14 14:44:00 2009 +0000
+++ b/TimerEvent.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,43 +1,46 @@
-/* mbed Microcontroller Library - TimerEvent
- * Copyright (c) 2007-2008, sford
- */
-
-#ifndef MBED_TIMEREVENT_H
-#define MBED_TIMEREVENT_H
-
-namespace mbed {
-
-// Base abstraction for timer interrupts
-class TimerEvent {
-
-public:
-
- // The handler registered with the underlying timer interrupt
- static void irq();
-
- // Destruction removes it...
- virtual ~TimerEvent();
-
-protected:
-
- // The handler called to service the timer event of the derived class
- virtual void handler() = 0;
-
- // insert in to linked list
- void insert(unsigned int timestamp);
-
- // remove from linked list, if in it
- void remove();
-
- // Get the current usec timestamp
- static unsigned int timestamp();
-
- static TimerEvent *_head; // The head of the list of the events, NULL if none
- TimerEvent *_next; // Pointer to the next in the list, NULL if last
- unsigned int _timestamp; // The timestamp at which the even should be triggered
-
-};
-
-}
-
-#endif
+/* mbed Microcontroller Library - TimerEvent
+ * Copyright (c) 2007-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+#ifndef MBED_TIMEREVENT_H
+#define MBED_TIMEREVENT_H
+
+namespace mbed {
+
+// Base abstraction for timer interrupts
+class TimerEvent {
+
+public:
+
+ TimerEvent();
+
+ // The handler registered with the underlying timer interrupt
+ static void irq();
+
+ // Destruction removes it...
+ virtual ~TimerEvent();
+
+protected:
+
+ // The handler called to service the timer event of the derived class
+ virtual void handler() = 0;
+
+ // insert in to linked list
+ void insert(unsigned int timestamp);
+
+ // remove from linked list, if in it
+ void remove();
+
+ // Get the current usec timestamp
+ static unsigned int timestamp();
+
+ static TimerEvent *_head; // The head of the list of the events, NULL if none
+ TimerEvent *_next; // Pointer to the next in the list, NULL if last
+ unsigned int _timestamp; // The timestamp at which the even should be triggered
+
+};
+
+} // namespace mbed
+
+#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/can_helper.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,38 @@
+/* mbed Microcontroller Library - can_helper
+ * Copyright (c) 2009 ARM Limited. All rights reserved.
+ * rmeyer
+ */
+
+#ifndef MBED_CAN_HELPER_H
+#define MBED_CAN_HELPER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum CANFormat CANFormat;
+enum CANFormat {
+ CANStandard = 0,
+ CANExtended = 1
+};
+
+typedef enum CANType CANType;
+enum CANType {
+ CANData = 0,
+ CANRemote = 1
+};
+
+typedef struct CAN_Message CAN_Message;
+struct CAN_Message {
+ unsigned int id; // 29 bit identifier
+ unsigned char data[8]; // Data field
+ unsigned char len; // Length of data field in bytes
+ CANFormat format; // 0 - STANDARD, 1- EXTENDED IDENTIFIER
+ CANType type; // 0 - DATA FRAME, 1 - REMOTE FRAME
+};
+
+#ifdef __cplusplus
+};
+#endif
+
+#endif // MBED_CAN_HELPER_H
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/cmsis.h Fri Aug 28 12:10:11 2009 +0000 @@ -0,0 +1,19 @@ +/* mbed Microcontroller Library - CMSIS + * Copyright (C) 2009 ARM Limited. All rights reserved. + * + * A generic CMSIS include header, pulling in the appropriate + * target specific CMSIS files + */ + +#ifndef MBED_CMSIS_H +#define MBED_CMSIS_H + +#if defined(TARGET_LPC1768) +#include "LPC17xx.h" +#elif defined(TARGET_LPC2368) +#include "LPC23xx.h" +#else +#error "CMSIS Target not recognised" +#endif + +#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/error.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,61 @@
+/* mbed Microcontroller Library - error
+ * Copyright (c) 2006-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+#ifndef MBED_ERROR_H
+#define MBED_ERROR_H
+
+/* Reporting Compile-Time Errors:
+ * To generate a fatal compile-time error, you can use the pre-processor #error directive.
+ *
+ * > #error "That shouldn't have happened!"
+ *
+ * If the compiler evaluates this line, it will report the error and stop the compile.
+ *
+ * For example, you could use this to check some user-defined compile-time variables:
+ *
+ * > #define NUM_PORTS 7
+ * > #if (NUM_PORTS > 4)
+ * > #error "NUM_PORTS must be less than 4"
+ * > #endif
+ *
+ * Reporting Run-Time Errors:
+ * To generate a fatal run-time error, you can use the mbed error() function.
+ *
+ * > error("That shouldn't have happened!");
+ *
+ * If the mbed running the program executes this function, it will print the
+ * message via the USB serial port, and then die with the blue lights of death!
+ *
+ * The message can use printf-style formatting, so you can report variables in the
+ * message too. For example, you could use this to check a run-time condition:
+ *
+ * > if(x >= 5) {
+ * > error("expected x to be less than 5, but got %d", x);
+ * > }
+ */
+
+#if 0 // for documentation only
+/* Function: error
+ * Report a fatal runtime error
+ *
+ * Outputs the specified error message to stderr so it will appear via the USB
+ * serial port, and then calls exit(1) to die with the blue lights of death.
+ *
+ * Variables:
+ * format - printf-style format string, followed by associated variables
+ */
+void error(const char* format, ...);
+#endif
+
+#include <stdlib.h>
+
+#ifdef NDEBUG
+ #define error(...) (exit(1))
+#else
+ #include <stdio.h>
+ #define error(...) (fprintf(stderr, __VA_ARGS__), exit(1))
+#endif
+
+#endif
--- a/helper.h Thu May 14 14:44:00 2009 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,47 +0,0 @@
-/* mbed Microcontroller Library - Helper
- * Copyright (c) 2007-2008, sford
- */
-
-#ifndef MBED_HELPER_H
-#define MBED_HELPER_H
-
-/* Section: helper
- * A collection of useful functions not found in the standard C libraries
- */
-
-namespace mbed {
-
-/* Function: min
- * Return the minimum of two integers
- */
-int min(int a, int b);
-
-/* Function: min
- * Return the minimum of two floating-point numbers
- */
-float min(float a, float b);
-
-/* Function: max
- * Return the maximum of two integers
- */
-int max(int a, int b);
-
-/* Function: max
- * Return the maximum of two floating-point numbers
- */
-float max(float a, float b);
-
-/* Function: clamp
- * Return the value, clamped between a minimum and maximum integer value
- */
-int clamp(int value, int minimum, int maximum);
-
-/* Function: clamp
- * Return the value, clamped between a minimum and maximum floating-point value
- */
-float clamp(float value, float minimum, float maximum);
-
-} // namespace mbed
-
-#endif
-
Binary file mbed.ar has changed
--- a/mbed.h Thu May 14 14:44:00 2009 +0000 +++ b/mbed.h Fri Aug 28 12:10:11 2009 +0000 @@ -1,11 +1,12 @@ /* mbed Microcontroller Library - * Copyright (c) 2007-2008, sford - */ - + * Copyright (c) 2006-2009 ARM Limited. All rights reserved. + * sford + */ + #ifndef MBED_H #define MBED_H -#define MBED_LIBRARY_VERSION 11 +#define MBED_LIBRARY_VERSION 12 // Useful C libraries #include <stdio.h> @@ -13,33 +14,38 @@ #include <string.h> #include <math.h> -#include "helper.h" +//#include "helper.h" // mbed Debug libraries -#include "Debug.h" -#include "stackheap.h" +//#include "Debug.h" +//#include "stackheap.h" // mbed Peripheral components #include "DigitalIn.h" #include "DigitalOut.h" +#include "DigitalInOut.h" #include "BusIn.h" #include "BusOut.h" +#include "BusInOut.h" #include "AnalogIn.h" #include "AnalogOut.h" #include "PwmOut.h" #include "Serial.h" #include "SPI.h" -#include "SPI3.h" +//#include "SPI3.h" #include "I2C.h" +#include "Ethernet.h" +#include "CAN.h" // mbed Internal components #include "Timer.h" -#include "wait.h" #include "Ticker.h" #include "Timeout.h" #include "LocalFileSystem.h" -#include "rpc.h" -#include "rtc.h" +#include "InterruptIn.h" +//#include "rpc.h" +//#include "rtc.h" +#include "wait_api.h" using namespace mbed; using namespace std;
--- a/mbed.sct Thu May 14 14:44:00 2009 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,26 +0,0 @@
-; Copyright 2008 ARM Limited. All rights reserved.
-
-FLASH_LOAD 0x0 0x00080000
-{
-
- ER_RESET +0
- {
- * (VECTOR_TABLE)
- }
-
- ER_RO +0
- {
- * (+RO)
- }
-
- ER_RW 0x40000120
- {
- * (+RW)
- }
-
- ER_ZI +0
- {
- * (+ZI)
- }
-
-}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/nvic_api.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,28 @@
+/* mbed Microcontroller Library - nvic_api
+ * Copyright (c) 2006-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+// GENERIC (M3 only? maybe also ARM7 abstraction)
+
+#ifndef MBED_NVIC_API_H
+#define MBED_NVIC_API_H
+
+#include "PinNames.h"
+#include "PeripheralNames.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum IRQn IRQn;
+
+void nvic_init();
+uint32_t nvic_read(IRQn irq);
+void NVIC_Vector(IRQn irq, uint32_t vector);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/platform.h Fri Aug 28 12:10:11 2009 +0000 @@ -0,0 +1,12 @@ +/* mbed Microcontroller Library - platform + * Copyright (c) 2009 ARM Limited. All rights reserved. + * sford + */ + +#ifndef MBED_PLATFORM_H +#define MBED_PLATFORM_H + +#define MBED_RPC +#define MBED_OPERATORS + +#endif
--- a/rpc.h Thu May 14 14:44:00 2009 +0000
+++ b/rpc.h Fri Aug 28 12:10:11 2009 +0000
@@ -1,526 +1,589 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2008 ARM Limited. All rights reserved.
- */
-
-#ifndef MBED_RPC_H
-#define MBED_RPC_H
-
-/* Section rpc
- * Helpers for rpc handling.
- */
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <ctype.h>
-#include "Base.h"
-
-namespace mbed {
-
-/* Function parse_arg
- * Parses and returns a value from a string.
- *
- * Variable
- * arg - The string to pase
- * next - If not NULL a pointer to after the last
- * character parsed is written here
- */
-template<typename T> T parse_arg(const char *arg, const char **next);
-
-inline char parse_char(const char *arg, const char **next) {
- char c = *arg++;
- if(c == '\\') {
- c = *arg++;
- switch(c) {
- case 'a': c = '\a'; break;
- case 'b': c = '\b'; break;
- case 't': c = '\t'; break;
- case 'n': c = '\n'; break;
- case 'v': c = '\v'; break;
- case 'f': c = '\f'; break;
- case 'r': c = '\r'; break;
- case 'x':
- {
- /* two-character hexadecimal */
- char buf[3];
- buf[0] = *arg++;
- buf[1] = *arg++;
- buf[2] = 0;
- c = strtol(buf, NULL, 16);
- }
- break;
- default:
- if(isdigit(c)) {
- /* three-character octal */
- char buf[4];
- buf[0] = c;
- buf[1] = *arg++;
- buf[2] = *arg++;
- buf[3] = 0;
- c = strtol(buf, NULL, 8);
- }
- break;
- }
- }
- *next = arg;
- return c;
-}
-
-/* signed integer types */
-
-template<> inline int parse_arg<int>(const char *arg, const char **next) {
- if(arg[0] == '\'') {
- char c = parse_char(arg+1, &arg);
- if(next != NULL) *next = arg+1;
- return c;
- } else {
- return strtol(arg, const_cast<char**>(next), 0);
- }
-}
-
-template<> inline char parse_arg<char>(const char *arg, const char **next) {
- return parse_arg<int>(arg,next);
-}
-
-template<> inline short int parse_arg<short int>(const char *arg, const char **next) {
- return parse_arg<int>(arg,next);
-}
-
-template<> inline long int parse_arg<long int>(const char *arg, const char **next) {
- return parse_arg<int>(arg,next);
-}
-
-template<> inline long long parse_arg<long long>(const char *arg, const char **next) {
- return strtoll(arg, const_cast<char**>(next), 0);
-}
-
-/* unsigned integer types */
-
-template<> inline unsigned int parse_arg<unsigned int>(const char *arg, const char **next) {
- if(arg[0] == '\'') {
- char c = parse_char(arg+1, &arg);
- if(next != NULL) *next = arg+1;
- return c;
- } else {
- return strtoul(arg, const_cast<char**>(next), 0);
- }
-}
-
-template<> inline unsigned char parse_arg<unsigned char>(const char *arg, const char **next) {
- return parse_arg<unsigned int>(arg,next);
-}
-
-template<> inline unsigned short int parse_arg<unsigned short int>(const char *arg, const char **next) {
- return parse_arg<unsigned int>(arg,next);
-}
-
-template<> inline unsigned long int parse_arg<unsigned long int>(const char *arg, const char **next) {
- return parse_arg<unsigned int>(arg,next);
-}
-
-template<> inline unsigned long long parse_arg<unsigned long long>(const char *arg, const char **next) {
- return strtoull(arg, const_cast<char**>(next), 0);
-}
-
-/* floating types */
-
-template<> inline float parse_arg<float>(const char *arg, const char **next) {
-#if !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 410000
- return strtof(arg,const_cast<char**>(next));
-#elif __ARMCC_VERSION >= 310000
- /* bug in header means no using declaration for strtof */
- return std::strtof(arg,const_cast<char**>(next));
-#else
- /* strtof not supported */
- return strtod(arg,const_cast<char**>(next));
-#endif
-}
-
-template<> inline double parse_arg<double>(const char *arg, const char **next) {
- return strtod(arg,const_cast<char**>(next));
-}
-
-template<> inline long double parse_arg<long double>(const char *arg, const char **next) {
- return strtod(arg,const_cast<char**>(next));
-}
-
-/* string */
-
-template<> inline char *parse_arg<char*>(const char *arg, const char **next) {
- const char *ptr = arg;
- char *res = NULL;
- if(*arg == '"') {
- /* quoted string */
- ptr = ++arg;
- int len = 0;
- /* find the end (and length) of the quoted string */
- for(char c = *ptr; c != 0 && c != '"'; c = *++ptr) {
- len++;
- if(c == '\\') {
- ptr++;
- }
- }
- /* copy the quoted string, and unescape characters */
- if(len != 0) {
- res = new char[len+1];
- char *resptr = res;
- while(arg != ptr) {
- *resptr++ = parse_char(arg, &arg);
- }
- *resptr = 0;
- }
- } else {
- /* unquoted string */
- while(isalnum(*ptr) || *ptr=='_') {
- ptr++;
- }
- int len = ptr-arg;
- if(len!=0) {
- res = new char[len+1];
- memcpy(res, arg, len);
- res[len] = 0;
- }
- }
-
- if(next != NULL) {
- *next = ptr;
- }
- return res;
-}
-
-template<> inline const char *parse_arg<const char*>(const char *arg, const char **next) {
- return parse_arg<char*>(arg,next);
-}
-
-
-/* Function write_result
- * Writes a value in to a result string in an appropriate manner
- *
- * Variable
- * val - The value to write
- * result - A pointer to the array to write the value into
- */
-template<typename T> void write_result(T val, char *result);
-
-/* signed integer types */
-
-template<> inline void write_result<char>(char val, char *result) {
- result[0] = val;
- result[1] = '\0';
-}
-
-template<> inline void write_result<short int>(short int val, char *result) {
- sprintf(result, "%hi", val);
-}
-
-template<> inline void write_result<int>(int val, char *result) {
- sprintf(result, "%i", val);
-}
-
-template<> inline void write_result<long int>(long int val, char *result) {
- sprintf(result, "%li", val);
-}
-
-template<> inline void write_result<long long int>(long long int val, char *result) {
- sprintf(result, "%lli", val);
-}
-
-/* unsigned integer types */
-
-template<> inline void write_result<unsigned char>(unsigned char val, char *result) {
- result[0] = val;
- result[1] = '\0';
-}
-
-template<> inline void write_result<unsigned short int>(unsigned short int val, char *result) {
- sprintf(result, "%hu", val);
-}
-
-template<> inline void write_result<unsigned int>(unsigned int val, char *result) {
- sprintf(result, "%u", val);
-}
-
-template<> inline void write_result<unsigned long int>(unsigned long int val, char *result) {
- sprintf(result, "%lu", val);
-}
-
-template<> inline void write_result<unsigned long long int>(unsigned long long int val, char *result) {
- sprintf(result, "%llu", val);
-}
-
-/* floating types */
-
-template<> inline void write_result<float>(float val, char *result) {
- sprintf(result, "%.17g", val);
-}
-
-template<> inline void write_result<double>(double val, char *result) {
- sprintf(result, "%.17g", val);
-}
-
-template<> inline void write_result<long double>(long double val, char *result) {
- sprintf(result, "%.17Lg", val);
-}
-
-
-/* string */
-
-template<> inline void write_result<char*>(char *val, char *result) {
- if(val==NULL) {
- result[0] = 0;
- } else {
- strcpy(result, val);
- }
-}
-
-template<> inline void write_result<const char*>(const char *val, char *result) {
- if(val==NULL) {
- result[0] = 0;
- } else {
- strcpy(result, val);
- }
-}
-
-
-inline const char *next_arg(const char* next) {
- while(*next == ' ') next++;
- if(*next == ',' || *next == '?') next++;
- while(*next == ' ') next++;
- return next;
-}
-
-
-/* Function rpc_method_caller
- */
-template<class T, void (T::*member)(const char *,char *)>
-void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
- (static_cast<T*>(this_ptr)->*member)(arguments,result);
-}
-
-
-/* Function rpc_method_caller
- */
-template<class T, void (T::*member)()>
-void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
- (static_cast<T*>(this_ptr)->*member)();
- if(result != NULL) {
- result[0] = '\0';
- }
-}
-
-
-/* Function rpc_method_caller
- */
-template<class T, typename A1, void (T::*member)(A1)>
-void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
-
- const char *next = arguments;
- A1 arg1 = parse_arg<A1>(next_arg(next),NULL);
-
- (static_cast<T*>(this_ptr)->*member)(arg1);
- if(result != NULL) {
- result[0] = '\0';
- }
-}
-
-
-/* Function rpc_method_caller
- */
-template<class T, typename A1, typename A2, void (T::*member)(A1,A2)>
-void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
-
- const char *next = arguments;
- A1 arg1 = parse_arg<A1>(next_arg(next),&next);
- A2 arg2 = parse_arg<A2>(next_arg(next),NULL);
-
- (static_cast<T*>(this_ptr)->*member)(arg1,arg2);
- if(result != NULL) {
- result[0] = '\0';
- }
-}
-
-
-/* Function rpc_method_caller
- */
-template<class T, typename A1, typename A2, typename A3, void (T::*member)(A1,A2,A3)>
-void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
-
- const char *next = arguments;
- A1 arg1 = parse_arg<A1>(next_arg(next),&next);
- A2 arg2 = parse_arg<A2>(next_arg(next),&next);
- A3 arg3 = parse_arg<A3>(next_arg(next),NULL);
-
- (static_cast<T*>(this_ptr)->*member)(arg1,arg2,arg3);
- if(result != NULL) {
- result[0] = '\0';
- }
-}
-
-
-/* Function rpc_method_caller
- */
-template<typename R, class T, R (T::*member)()>
-void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
- R res = (static_cast<T*>(this_ptr)->*member)();
- if(result != NULL) {
- write_result<R>(res, result);
- }
-}
-
-
-/* Function rpc_method_caller
- */
-template<typename R, class T, typename A1, R (T::*member)(A1)>
-void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
-
- const char *next = arguments;
- A1 arg1 = parse_arg<A1>(next_arg(next),NULL);
-
- R res = (static_cast<T*>(this_ptr)->*member)(arg1);
- if(result != NULL) {
- write_result<R>(res, result);
- }
-}
-
-
-/* Function rpc_method_caller
- */
-template<typename R, class T, typename A1, typename A2, R (T::*member)(A1,A2)>
-void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
-
- const char *next = arguments;
- A1 arg1 = parse_arg<A1>(next_arg(next),&next);
- A2 arg2 = parse_arg<A2>(next_arg(next),NULL);
-
- R res = (static_cast<T*>(this_ptr)->*member)(arg1,arg2);
- if(result != NULL) {
- write_result<R>(res, result);
- }
-}
-
-
-/* Function rpc_method_caller
- */
-template<typename R, class T, typename A1, typename A2, typename A3, R (T::*member)(A1,A2,A3)>
-void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
-
- const char *next = arguments;
- A1 arg1 = parse_arg<A1>(next_arg(next),&next);
- A2 arg2 = parse_arg<A2>(next_arg(next),&next);
- A3 arg3 = parse_arg<A3>(next_arg(next),NULL);
-
- R res = (static_cast<T*>(this_ptr)->*member)(arg1,arg2,arg3);
- if(result != NULL) {
- write_result<R>(res, result);
- }
-}
-
-
-/* Function rpc_function caller
- */
-template<typename R, R (*func)()>
-void rpc_function_caller(const char *arguments, char *result) {
- R res = (*func)();
- if(result != NULL) {
- write_result<R>(res, result);
- }
-}
-
-
-/* Function rpc_function caller
- */
-template<typename R, typename A1, R (*func)(A1)>
-void rpc_function_caller(const char *arguments, char *result) {
- A1 arg1 = parse_arg<A1>(next_arg(arguments),NULL);
- R res = (*func)(arg1);
- if(result != NULL) {
- write_result<R>(res, result);
- }
-}
-
-
-/* Function rpc_function caller
- */
-template<typename R, typename A1, typename A2, R (*func)(A1,A2)>
-void rpc_function_caller(const char *arguments, char *result) {
-
- const char *next = arguments;
- A1 arg1 = parse_arg<A1>(next_arg(next),&next);
- A2 arg2 = parse_arg<A2>(next_arg(next),NULL);
-
- R res = (*func)(arg1,arg2);
- if(result != NULL) {
- write_result<R>(res, result);
- }
-}
-
-
-/* Function rpc_function caller
- */
-template<typename R, typename A1, typename A2, typename A3, R (*func)(A1,A2,A3)>
-void rpc_function_caller(const char *arguments, char *result) {
-
- const char *next = arguments;
- A1 arg1 = parse_arg<A1>(next_arg(next),&next);
- A2 arg2 = parse_arg<A2>(next_arg(next),&next);
- A3 arg3 = parse_arg<A3>(next_arg(next),NULL);
-
- R res = (*func)(arg1,arg2,arg3);
- if(result != NULL) {
- write_result<R>(res, result);
- }
-}
-
-
-/* Function rpc_function caller
- */
-template<typename R, typename A1, typename A2, typename A3, typename A4, R (*func)(A1,A2,A3,A4)>
-void rpc_function_caller(const char *arguments, char *result) {
-
- const char *next = arguments;
- A1 arg1 = parse_arg<A1>(next_arg(next),&next);
- A2 arg2 = parse_arg<A2>(next_arg(next),&next);
- A3 arg3 = parse_arg<A3>(next_arg(next),&next);
- A4 arg4 = parse_arg<A4>(next_arg(next),NULL);
-
- R res = (*func)(arg1,arg2,arg3,arg4);
- if(result != NULL) {
- write_result<R>(res, result);
- }
-}
-
-
-struct rpc_method {
- const char *name;
- typedef void (*caller_t)(Base*, const char*, char*);
- typedef const struct rpc_method *(*super_t)(Base*);
- union {
- caller_t caller;
- super_t super;
- };
-};
-
-template<class C>
-const struct rpc_method *rpc_super(Base *this_ptr) {
- return static_cast<C*>(this_ptr)->C::get_rpc_methods();
-}
-
-#define RPC_METHOD_END { NULL, NULL }
-#define RPC_METHOD_SUPER(C) { NULL, (rpc_method::caller_t)(rpc_method::super_t)rpc_super<C> }
-
-/* Function rpc
- * Parse a string describing a call and then do it
- *
- * Variables
- * call - A pointer to a string describing the call, which has
- * the form /object/method arg ... argn. Arguments are
- * delimited by space characters, and the string is terminated
- * by a null character.
- * result - A pointer to an array to write the result into.
- */
-bool rpc(const char *buf, char *result = 0);
-
-
-} /* namespace mbed */
-
-#endif
+/* mbed Microcontroller Library - RPC
+ * Copyright (c) 2008-2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+#ifndef MBED_RPC_H
+#define MBED_RPC_H
+
+/* Section rpc
+ * Helpers for rpc handling.
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <ctype.h>
+#include "Base.h"
+
+#include "PinNames.h"
+#include <stdint.h>
+
+namespace mbed {
+
+/* Function parse_arg
+ * Parses and returns a value from a string.
+ *
+ * Variable
+ * arg - The string to pase
+ * next - If not NULL a pointer to after the last
+ * character parsed is written here
+ */
+template<typename T> T parse_arg(const char *arg, const char **next);
+
+inline char parse_char(const char *arg, const char **next) {
+ char c = *arg++;
+ if(c == '\\') {
+ c = *arg++;
+ switch(c) {
+ case 'a': c = '\a'; break;
+ case 'b': c = '\b'; break;
+ case 't': c = '\t'; break;
+ case 'n': c = '\n'; break;
+ case 'v': c = '\v'; break;
+ case 'f': c = '\f'; break;
+ case 'r': c = '\r'; break;
+ case 'x':
+ {
+ /* two-character hexadecimal */
+ char buf[3];
+ buf[0] = *arg++;
+ buf[1] = *arg++;
+ buf[2] = 0;
+ c = strtol(buf, NULL, 16);
+ }
+ break;
+ default:
+ if(isdigit(c)) {
+ /* three-character octal */
+ char buf[4];
+ buf[0] = c;
+ buf[1] = *arg++;
+ buf[2] = *arg++;
+ buf[3] = 0;
+ c = strtol(buf, NULL, 8);
+ }
+ break;
+ }
+ }
+ *next = arg;
+ return c;
+}
+
+/* signed integer types */
+
+template<> inline int parse_arg<int>(const char *arg, const char **next) {
+ if(arg[0] == '\'') {
+ char c = parse_char(arg+1, &arg);
+ if(next != NULL) *next = arg+1;
+ return c;
+ } else {
+ return strtol(arg, const_cast<char**>(next), 0);
+ }
+}
+
+template<> inline char parse_arg<char>(const char *arg, const char **next) {
+ return parse_arg<int>(arg,next);
+}
+
+template<> inline short int parse_arg<short int>(const char *arg, const char **next) {
+ return parse_arg<int>(arg,next);
+}
+
+template<> inline long int parse_arg<long int>(const char *arg, const char **next) {
+ return parse_arg<int>(arg,next);
+}
+
+template<> inline long long parse_arg<long long>(const char *arg, const char **next) {
+ return strtoll(arg, const_cast<char**>(next), 0);
+}
+
+/* unsigned integer types */
+
+template<> inline unsigned int parse_arg<unsigned int>(const char *arg, const char **next) {
+ if(arg[0] == '\'') {
+ char c = parse_char(arg+1, &arg);
+ if(next != NULL) *next = arg+1;
+ return c;
+ } else {
+ return strtoul(arg, const_cast<char**>(next), 0);
+ }
+}
+
+template<> inline unsigned char parse_arg<unsigned char>(const char *arg, const char **next) {
+ return parse_arg<unsigned int>(arg,next);
+}
+
+template<> inline unsigned short int parse_arg<unsigned short int>(const char *arg, const char **next) {
+ return parse_arg<unsigned int>(arg,next);
+}
+
+template<> inline unsigned long int parse_arg<unsigned long int>(const char *arg, const char **next) {
+ return parse_arg<unsigned int>(arg,next);
+}
+
+template<> inline unsigned long long parse_arg<unsigned long long>(const char *arg, const char **next) {
+ return strtoull(arg, const_cast<char**>(next), 0);
+}
+
+/* floating types */
+
+template<> inline float parse_arg<float>(const char *arg, const char **next) {
+#if !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 410000
+ return strtof(arg,const_cast<char**>(next));
+#elif __ARMCC_VERSION >= 310000
+ /* bug in header means no using declaration for strtof */
+ return std::strtof(arg,const_cast<char**>(next));
+#else
+ /* strtof not supported */
+ return strtod(arg,const_cast<char**>(next));
+#endif
+}
+
+template<> inline double parse_arg<double>(const char *arg, const char **next) {
+ return strtod(arg,const_cast<char**>(next));
+}
+
+template<> inline long double parse_arg<long double>(const char *arg, const char **next) {
+ return strtod(arg,const_cast<char**>(next));
+}
+
+/* string */
+
+template<> inline char *parse_arg<char*>(const char *arg, const char **next) {
+ const char *ptr = arg;
+ char *res = NULL;
+ if(*arg == '"') {
+ /* quoted string */
+ ptr = ++arg;
+ int len = 0;
+ /* find the end (and length) of the quoted string */
+ for(char c = *ptr; c != 0 && c != '"'; c = *++ptr) {
+ len++;
+ if(c == '\\') {
+ ptr++;
+ }
+ }
+ /* copy the quoted string, and unescape characters */
+ if(len != 0) {
+ res = new char[len+1];
+ char *resptr = res;
+ while(arg != ptr) {
+ *resptr++ = parse_char(arg, &arg);
+ }
+ *resptr = 0;
+ }
+ } else {
+ /* unquoted string */
+ while(isalnum(*ptr) || *ptr=='_') {
+ ptr++;
+ }
+ int len = ptr-arg;
+ if(len!=0) {
+ res = new char[len+1];
+ memcpy(res, arg, len);
+ res[len] = 0;
+ }
+ }
+
+ if(next != NULL) {
+ *next = ptr;
+ }
+ return res;
+}
+
+template<> inline const char *parse_arg<const char*>(const char *arg, const char **next) {
+ return parse_arg<char*>(arg,next);
+}
+
+/* Pins */
+
+
+inline PinName parse_pins(const char *str) {
+ const PinName pin_names[] = {p5, p6, p7, p8, p9, p10, p11, p12, p13, p14
+ , p15, p16, p17, p18, p19, p20, p21, p22, p23
+ , p24, p25, p26, p27, p28, p29, p30};
+
+ if(str[0] == 'P') { // Pn_n
+ uint32_t port = str[1] - '0';
+ uint32_t pin = str[3] - '0'; // Pn_n
+ uint32_t pin2 = str[4] - '0'; // Pn_nn
+ if(pin2 <= 9) {
+ pin = pin * 10 + pin2;
+ }
+ return (PinName)(LPC_GPIO0_BASE + port * 32 + pin);
+ } else if(str[0] == 'p') { // pn
+ uint32_t pin = str[1] - '0'; // pn
+ uint32_t pin2 = str[2] - '0'; // pnn
+ if(pin2 <= 9) {
+ pin = pin * 10 + pin2;
+ }
+ if(pin < 5 || pin > 30) {
+ return NC;
+ }
+ return pin_names[pin - 5];
+ } else if(str[0] == 'L') { // LEDn
+ switch(str[3]) {
+ case '1' : return LED1;
+ case '2' : return LED2;
+ case '3' : return LED3;
+ case '4' : return LED4;
+ }
+ } else if(str[0] == 'U') { // USB?X
+ switch(str[3]) {
+ case 'T' : return USBTX;
+ case 'R' : return USBRX;
+ }
+ }
+ return NC;
+}
+
+template<> inline PinName parse_arg<PinName>(const char *arg, const char **next) {
+ const char *ptr = arg;
+ PinName pinname = NC;
+ while(isalnum(*ptr) || *ptr=='_') {
+ ptr++;
+ }
+ int len = ptr-arg;
+ if(len!=0) {
+ pinname = parse_pins(arg);
+
+ }
+ if(next != NULL) {
+ *next = ptr;
+ }
+ return pinname;
+}
+
+
+/* Function write_result
+ * Writes a value in to a result string in an appropriate manner
+ *
+ * Variable
+ * val - The value to write
+ * result - A pointer to the array to write the value into
+ */
+template<typename T> void write_result(T val, char *result);
+
+/* signed integer types */
+
+template<> inline void write_result<char>(char val, char *result) {
+ result[0] = val;
+ result[1] = '\0';
+}
+
+template<> inline void write_result<short int>(short int val, char *result) {
+ sprintf(result, "%hi", val);
+}
+
+template<> inline void write_result<int>(int val, char *result) {
+ sprintf(result, "%i", val);
+}
+
+template<> inline void write_result<long int>(long int val, char *result) {
+ sprintf(result, "%li", val);
+}
+
+template<> inline void write_result<long long int>(long long int val, char *result) {
+ sprintf(result, "%lli", val);
+}
+
+/* unsigned integer types */
+
+template<> inline void write_result<unsigned char>(unsigned char val, char *result) {
+ result[0] = val;
+ result[1] = '\0';
+}
+
+template<> inline void write_result<unsigned short int>(unsigned short int val, char *result) {
+ sprintf(result, "%hu", val);
+}
+
+template<> inline void write_result<unsigned int>(unsigned int val, char *result) {
+ sprintf(result, "%u", val);
+}
+
+template<> inline void write_result<unsigned long int>(unsigned long int val, char *result) {
+ sprintf(result, "%lu", val);
+}
+
+template<> inline void write_result<unsigned long long int>(unsigned long long int val, char *result) {
+ sprintf(result, "%llu", val);
+}
+
+/* floating types */
+
+template<> inline void write_result<float>(float val, char *result) {
+ sprintf(result, "%.17g", val);
+}
+
+template<> inline void write_result<double>(double val, char *result) {
+ sprintf(result, "%.17g", val);
+}
+
+template<> inline void write_result<long double>(long double val, char *result) {
+ sprintf(result, "%.17Lg", val);
+}
+
+
+/* string */
+
+template<> inline void write_result<char*>(char *val, char *result) {
+ if(val==NULL) {
+ result[0] = 0;
+ } else {
+ strcpy(result, val);
+ }
+}
+
+template<> inline void write_result<const char*>(const char *val, char *result) {
+ if(val==NULL) {
+ result[0] = 0;
+ } else {
+ strcpy(result, val);
+ }
+}
+
+
+inline const char *next_arg(const char* next) {
+ while(*next == ' ') next++;
+ if(*next == ',' || *next == '?') next++;
+ while(*next == ' ') next++;
+ return next;
+}
+
+
+/* Function rpc_method_caller
+ */
+template<class T, void (T::*member)(const char *,char *)>
+void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
+ (static_cast<T*>(this_ptr)->*member)(arguments,result);
+}
+
+
+/* Function rpc_method_caller
+ */
+template<class T, void (T::*member)()>
+void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
+ (static_cast<T*>(this_ptr)->*member)();
+ if(result != NULL) {
+ result[0] = '\0';
+ }
+}
+
+
+/* Function rpc_method_caller
+ */
+template<class T, typename A1, void (T::*member)(A1)>
+void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
+
+ const char *next = arguments;
+ A1 arg1 = parse_arg<A1>(next_arg(next),NULL);
+
+ (static_cast<T*>(this_ptr)->*member)(arg1);
+ if(result != NULL) {
+ result[0] = '\0';
+ }
+}
+
+
+/* Function rpc_method_caller
+ */
+template<class T, typename A1, typename A2, void (T::*member)(A1,A2)>
+void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
+
+ const char *next = arguments;
+ A1 arg1 = parse_arg<A1>(next_arg(next),&next);
+ A2 arg2 = parse_arg<A2>(next_arg(next),NULL);
+
+ (static_cast<T*>(this_ptr)->*member)(arg1,arg2);
+ if(result != NULL) {
+ result[0] = '\0';
+ }
+}
+
+
+/* Function rpc_method_caller
+ */
+template<class T, typename A1, typename A2, typename A3, void (T::*member)(A1,A2,A3)>
+void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
+
+ const char *next = arguments;
+ A1 arg1 = parse_arg<A1>(next_arg(next),&next);
+ A2 arg2 = parse_arg<A2>(next_arg(next),&next);
+ A3 arg3 = parse_arg<A3>(next_arg(next),NULL);
+
+ (static_cast<T*>(this_ptr)->*member)(arg1,arg2,arg3);
+ if(result != NULL) {
+ result[0] = '\0';
+ }
+}
+
+
+/* Function rpc_method_caller
+ */
+template<typename R, class T, R (T::*member)()>
+void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
+ R res = (static_cast<T*>(this_ptr)->*member)();
+ if(result != NULL) {
+ write_result<R>(res, result);
+ }
+}
+
+
+/* Function rpc_method_caller
+ */
+template<typename R, class T, typename A1, R (T::*member)(A1)>
+void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
+
+ const char *next = arguments;
+ A1 arg1 = parse_arg<A1>(next_arg(next),NULL);
+
+ R res = (static_cast<T*>(this_ptr)->*member)(arg1);
+ if(result != NULL) {
+ write_result<R>(res, result);
+ }
+}
+
+
+/* Function rpc_method_caller
+ */
+template<typename R, class T, typename A1, typename A2, R (T::*member)(A1,A2)>
+void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
+
+ const char *next = arguments;
+ A1 arg1 = parse_arg<A1>(next_arg(next),&next);
+ A2 arg2 = parse_arg<A2>(next_arg(next),NULL);
+
+ R res = (static_cast<T*>(this_ptr)->*member)(arg1,arg2);
+ if(result != NULL) {
+ write_result<R>(res, result);
+ }
+}
+
+
+/* Function rpc_method_caller
+ */
+template<typename R, class T, typename A1, typename A2, typename A3, R (T::*member)(A1,A2,A3)>
+void rpc_method_caller(Base *this_ptr, const char *arguments, char *result) {
+
+ const char *next = arguments;
+ A1 arg1 = parse_arg<A1>(next_arg(next),&next);
+ A2 arg2 = parse_arg<A2>(next_arg(next),&next);
+ A3 arg3 = parse_arg<A3>(next_arg(next),NULL);
+
+ R res = (static_cast<T*>(this_ptr)->*member)(arg1,arg2,arg3);
+ if(result != NULL) {
+ write_result<R>(res, result);
+ }
+}
+
+
+/* Function rpc_function caller
+ */
+template<typename R, R (*func)()>
+void rpc_function_caller(const char *arguments, char *result) {
+ R res = (*func)();
+ if(result != NULL) {
+ write_result<R>(res, result);
+ }
+}
+
+
+/* Function rpc_function caller
+ */
+template<typename R, typename A1, R (*func)(A1)>
+void rpc_function_caller(const char *arguments, char *result) {
+ A1 arg1 = parse_arg<A1>(next_arg(arguments),NULL);
+ R res = (*func)(arg1);
+ if(result != NULL) {
+ write_result<R>(res, result);
+ }
+}
+
+
+/* Function rpc_function caller
+ */
+template<typename R, typename A1, typename A2, R (*func)(A1,A2)>
+void rpc_function_caller(const char *arguments, char *result) {
+
+ const char *next = arguments;
+ A1 arg1 = parse_arg<A1>(next_arg(next),&next);
+ A2 arg2 = parse_arg<A2>(next_arg(next),NULL);
+
+ R res = (*func)(arg1,arg2);
+ if(result != NULL) {
+ write_result<R>(res, result);
+ }
+}
+
+
+/* Function rpc_function caller
+ */
+template<typename R, typename A1, typename A2, typename A3, R (*func)(A1,A2,A3)>
+void rpc_function_caller(const char *arguments, char *result) {
+
+ const char *next = arguments;
+ A1 arg1 = parse_arg<A1>(next_arg(next),&next);
+ A2 arg2 = parse_arg<A2>(next_arg(next),&next);
+ A3 arg3 = parse_arg<A3>(next_arg(next),NULL);
+
+ R res = (*func)(arg1,arg2,arg3);
+ if(result != NULL) {
+ write_result<R>(res, result);
+ }
+}
+
+
+/* Function rpc_function caller
+ */
+template<typename R, typename A1, typename A2, typename A3, typename A4, R (*func)(A1,A2,A3,A4)>
+void rpc_function_caller(const char *arguments, char *result) {
+
+ const char *next = arguments;
+ A1 arg1 = parse_arg<A1>(next_arg(next),&next);
+ A2 arg2 = parse_arg<A2>(next_arg(next),&next);
+ A3 arg3 = parse_arg<A3>(next_arg(next),&next);
+ A4 arg4 = parse_arg<A4>(next_arg(next),NULL);
+
+ R res = (*func)(arg1,arg2,arg3,arg4);
+ if(result != NULL) {
+ write_result<R>(res, result);
+ }
+}
+
+
+struct rpc_method {
+ const char *name;
+ typedef void (*caller_t)(Base*, const char*, char*);
+ typedef const struct rpc_method *(*super_t)(Base*);
+ union {
+ caller_t caller;
+ super_t super;
+ };
+};
+
+template<class C>
+const struct rpc_method *rpc_super(Base *this_ptr) {
+ return static_cast<C*>(this_ptr)->C::get_rpc_methods();
+}
+
+#define RPC_METHOD_END { NULL, NULL }
+#define RPC_METHOD_SUPER(C) { NULL, (rpc_method::caller_t)(rpc_method::super_t)rpc_super<C> }
+
+/* Function rpc
+ * Parse a string describing a call and then do it
+ *
+ * Variables
+ * call - A pointer to a string describing the call, which has
+ * the form /object/method arg ... argn. Arguments are
+ * delimited by space characters, and the string is terminated
+ * by a null character.
+ * result - A pointer to an array to write the result into.
+ */
+bool rpc(const char *buf, char *result = 0);
+
+
+} // namespace mbed
+
+#endif
--- a/rtc.h Thu May 14 14:44:00 2009 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,84 +0,0 @@
-/* mbed Microcontroller Library - rtc
- * Copyright (c) 2008, sford
- */
-
-#ifndef MBED_RTC_TIME_H
-#define MBED_RTC_TIME_H
-
-#include <time.h>
-
-using namespace std;
-
-#ifdef __ARMCC_VERSION
-
-typedef unsigned long clockid_t;
-struct timespec {
- time_t tv_sec;
- long tv_nsec;
-};
-#define CLOCK_REALTIME (clockid_t)1
-
-#endif
-
-/* Section: rtc
- * Functions for manipulating the RTC (real-time clock).
- */
-
-extern "C" {
-
-namespace std {
-
-/* Function: time
- * Returns the number of seconds since the epoch (00:00:00 UTC,
- * January 1, 1970), and also stores the return value in the address
- * pointed to by timer if it is non-NULL.
- */
-time_t time(time_t *timer);
-
-/* Function: stime
- * Sets the current time, measured in seconds since the epoch, using
- * the value pointed to by timer.
- */
-void stime(const time_t *timer);
-
-}
-
-/* Function: time_str
- * Returns a pointer to a string representing the current time
- * in human readable form, as generated by ctime()
- */
-char *time_str();
-
-
-/* Function: set_time
- * Sets the current time, specifying year through to day
- */
-void set_time(int year, int month, int day, int hour, int minute, int second);
-
-/* Function: clock_settime
- * Sets the time of the clock specified by clock_id, which must be
- * CLOCK_REALTIME, according to the value of *tp.
- */
-int clock_settime(clockid_t clock_id, const struct timespec *tp);
-
-/* Function: clock_gettime
- * Sets *tp to be the current time of the clock specified by
- * clock_id, which must be CLOCK_REALTIME.
- */
-int clock_gettime(clockid_t clock_id, struct timespec *tp);
-
-/* Function: clock_getres
- * Sets *tp to be the resolution of the clock specified by clock_id,
- * which must be CLOCK_REALTIME.
- */
-int clock_getres(clockid_t clock_id, struct timespec *tp);
-
-/* Function: create_time
- * A convenience function for constructing a time_t value.
- */
-time_t create_time(int year, int month, int day, int hour, int minute, int second);
-
-}
-
-#endif
-
--- a/stackheap.h Thu May 14 14:44:00 2009 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,90 +0,0 @@
-/* mbed Microcontroller Library - stackheap
- * Copyright (c) 2007-2008, sford
- */
-
-#ifndef MBED_STACKHEAP_H
-#define MBED_STACKHEAP_H
-
-namespace mbed {
-
-/* Section: stackheap
- * Useful functions for seeing what is going on with the stack and heap
- */
-
-/* Function: code_base
- * Return the address of the fixed base of the code region
- */
-int code_base();
-
-/* Function: code_limit
- * Return the address of the top of the code region
- */
-int code_limit();
-
-/* Function: rw_base
- * Return the address of the fixed base of the rw region
- */
-int rw_base();
-
-/* Function: rw_limit
- * Return the address of the top of the rw region
- */
-int rw_limit();
-
-/* Function: heap_base
- * Return the address of the fixed base of the heap
- */
-int heap_base();
-
-/* Function: heap_limit
- * Return the address of the current top of the heap
- */
-int heap_limit();
-
-/* Function: stack_base
- * Return the address of the fixed base of the stack
- */
-int stack_base();
-
-/* Function: stack_limit
- * Return the address of the current top of the stack
- */
-//int stack_limit();
-
-/* Function: code_size
- * Return the size of the code region
- */
-int code_size();
-
-/* Function: rw_size
- * Return the size of the rw region
- */
-int rw_size();
-
-/* Function: heap_size
- * Return the current size of the heap pool allocated
- */
-int heap_size();
-
-/* Function: stack_size
- * Return the current size of the stack used
- */
-//int stack_size();
-
-
-inline int stack_limit() {
-#ifdef __GNUC__
- return (unsigned)__builtin_frame_address(0);
-#else
- return __current_sp();
-#endif
-}
-
-inline int stack_size() {
- return stack_base() - stack_limit();
-}
-
-} // namespace mbed
-
-#endif
-
--- a/wait.h Thu May 14 14:44:00 2009 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,32 +0,0 @@
-/* mbed Microcontroller Library - wait
- * Copyright (c) 2007-2008, sford
- */
-
-#ifndef MBED_WAIT_H
-#define MBED_WAIT_H
-
-namespace mbed {
-
-/* Section: wait
- * Useful waiting around functions
- */
-
-/* Function: wait
- * Wait the specified number of seconds (float)
- */
-void wait(float s);
-
-/* Function: wait_ms
- * Wait the specified number of milli-seconds (int)
- */
-void wait_ms(int ms);
-
-/* Function: wait_us
- * Wait the specified number of micro-seconds (int)
- */
-void wait_us(int us);
-
-}
-
-#endif
-
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/wait_api.h Fri Aug 28 12:10:11 2009 +0000
@@ -0,0 +1,23 @@
+/* mbed Microcontroller Library - wait_api
+ * Copyright (c) 2009 ARM Limited. All rights reserved.
+ * sford
+ */
+
+// GENERIC
+
+#ifndef MBED_WAIT_API_H
+#define MBED_WAIT_API_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void wait(float s);
+void wait_ms(int ms);
+void wait_us(int us);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
