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mbed library sources

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Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

Files at this revision

API Documentation at this revision

Revision 35:371630885ad6, committed 2013-10-21

Comitter:
mbed_official
Date:
Mon Oct 21 11:45:04 2013 +0100
Parent:
34:a3c7023e45de
Child:
36:ab3ee77451e7
Commit message:
Synchronized with git revision 38eb79e9cce7811dee9a4d2b30c4bba468323393

Changed in this revision

api/InterruptIn.h Show annotated file Show diff for this revision Revisions of this file
common/InterruptIn.cpp Show annotated file Show diff for this revision Revisions of this file
hal/gpio_irq_api.h Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Freescale/TARGET_KL05Z/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Freescale/TARGET_KL25Z/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_Freescale/TARGET_KL46Z/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_NXP/TARGET_LPC11UXX/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_NXP/TARGET_LPC13XX/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_NXP/TARGET_LPC23XX/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_NXP/TARGET_LPC408X/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_NXP/TARGET_LPC43XX/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file
targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_irq_api.c Show annotated file Show diff for this revision Revisions of this file 
--- a/api/InterruptIn.h	Fri Oct 11 13:30:08 2013 +0100
+++ b/api/InterruptIn.h	Mon Oct 21 11:45:04 2013 +0100
@@ -167,7 +167,7 @@
      *
      *  @returns
      *  The function object created for 'fptr'
-     */   
+     */
     pFunctionPointer_t fall_add(void (*fptr)(void)) {
         return fall_add_common(fptr);
     }
@@ -240,6 +240,14 @@
      */
     void mode(PinMode pull);
 
+    /** Enable IRQ
+     */
+    void enable_irq();
+
+    /** Disable IRQ
+     */
+    void disable_irq();
+
     static void _irq_handler(uint32_t id, gpio_irq_event event);
 
 protected:

--- a/common/InterruptIn.cpp	Fri Oct 11 13:30:08 2013 +0100
+++ b/common/InterruptIn.cpp	Mon Oct 21 11:45:04 2013 +0100
@@ -99,6 +99,14 @@
     }
 }
 
+void InterruptIn::enable_irq() {
+    gpio_irq_enable(&gpio_irq);
+}
+
+void InterruptIn::disable_irq() {
+    gpio_irq_disable(&gpio_irq);
+}
+
 #ifdef MBED_OPERATORS
 InterruptIn::operator int() {
     return read();

--- a/hal/gpio_irq_api.h	Fri Oct 11 13:30:08 2013 +0100
+++ b/hal/gpio_irq_api.h	Mon Oct 21 11:45:04 2013 +0100
@@ -37,6 +37,8 @@
 int  gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id);
 void gpio_irq_free(gpio_irq_t *obj);
 void gpio_irq_set (gpio_irq_t *obj, gpio_irq_event event, uint32_t enable);
+void gpio_irq_enable(gpio_irq_t *obj);
+void gpio_irq_disable(gpio_irq_t *obj);
 
 #ifdef __cplusplus
 }

--- a/targets/hal/TARGET_Freescale/TARGET_KL05Z/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KL05Z/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -154,3 +154,19 @@
     // Interrupt configuration and clear interrupt
     port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    if (obj->port == PortA) {
+        NVIC_EnableIRQ(PORTA_IRQn);
+    } else if (obj->port == PortB) {
+        NVIC_EnableIRQ(PORTB_IRQn);
+    }
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    if (obj->port == PortA) {
+        NVIC_DisableIRQ(PORTA_IRQn);
+    } else if (obj->port == PortB) {
+        NVIC_DisableIRQ(PORTB_IRQn);
+    }
+}

--- a/targets/hal/TARGET_Freescale/TARGET_KL25Z/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KL25Z/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -143,3 +143,19 @@
     // Interrupt configuration and clear interrupt
     port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    if (obj->port == PortA) {
+        NVIC_EnableIRQ(PORTA_IRQn);
+    } else if (obj->port == PortD) {
+        NVIC_EnableIRQ(PORTD_IRQn);
+    }
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    if (obj->port == PortA) {
+        NVIC_DisableIRQ(PORTA_IRQn);
+    } else if (obj->port == PortD) {
+        NVIC_DisableIRQ(PORTD_IRQn);
+    }
+}

--- a/targets/hal/TARGET_Freescale/TARGET_KL46Z/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KL46Z/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -143,3 +143,19 @@
     // Interrupt configuration and clear interrupt
     port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    if (obj->port == PortA) {
+        NVIC_EnableIRQ(PORTA_IRQn);
+    } else if (obj->port == PortD) {
+        NVIC_EnableIRQ(PORTD_IRQn);
+    }
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    if (obj->port == PortA) {
+        NVIC_DisableIRQ(PORTA_IRQn);
+    } else if (obj->port == PortD) {
+        NVIC_DisableIRQ(PORTD_IRQn);
+    }
+}

--- a/targets/hal/TARGET_NXP/TARGET_LPC11UXX/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC11UXX/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -131,3 +131,11 @@
         }
     }
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    NVIC_DisableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
+}

--- a/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -174,3 +174,43 @@
     }
 
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    uint32_t port_num = ((obj->pin & 0xF000) >> PORT_SHIFT);
+    switch (port_num) {
+        case 0:
+            NVIC_EnableIRQ(EINT0_IRQn);
+            break;
+        case 1:
+            NVIC_EnableIRQ(EINT1_IRQn);
+            break;
+        case 2:
+            NVIC_EnableIRQ(EINT2_IRQn);
+            break;
+        case 3:
+            NVIC_EnableIRQ(EINT3_IRQn);
+            break;
+        default:
+            break;
+    }
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    uint32_t port_num = ((obj->pin & 0xF000) >> PORT_SHIFT);
+    switch (port_num) {
+        case 0:
+            NVIC_DisableIRQ(EINT0_IRQn);
+            break;
+        case 1:
+            NVIC_DisableIRQ(EINT1_IRQn);
+            break;
+        case 2:
+            NVIC_DisableIRQ(EINT2_IRQn);
+            break;
+        case 3:
+            NVIC_DisableIRQ(EINT3_IRQn);
+            break;
+        default:
+            break;
+    }
+}

--- a/targets/hal/TARGET_NXP/TARGET_LPC13XX/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC13XX/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -131,3 +131,12 @@
         }
     }
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    NVIC_DisableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
+}
+

--- a/targets/hal/TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -150,3 +150,12 @@
         }
     }
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    NVIC_EnableIRQ(EINT3_IRQn);
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    NVIC_DisableIRQ(EINT3_IRQn);
+}
+

--- a/targets/hal/TARGET_NXP/TARGET_LPC23XX/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC23XX/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -143,3 +143,12 @@
         }
     }
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    NVIC_EnableIRQ(EINT3_IRQn);
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    NVIC_DisableIRQ(EINT3_IRQn);
+}
+

--- a/targets/hal/TARGET_NXP/TARGET_LPC408X/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC408X/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -164,3 +164,11 @@
         }
     }
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    NVIC_EnableIRQ(GPIO_IRQn);
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    NVIC_DisableIRQ(GPIO_IRQn);
+}

--- a/targets/hal/TARGET_NXP/TARGET_LPC43XX/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC43XX/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -134,3 +134,19 @@
         }
     }
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+#if !defined(CORE_M0)
+    NVIC_EnableIRQ((IRQn_Type)(PIN_INT0_IRQn + obj->ch));
+#else
+    NVIC_EnableIRQ((IRQn_Type)(PIN_INT4_IRQn + obj->ch));
+#endif
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+#if !defined(CORE_M0)
+    NVIC_DisableIRQ((IRQn_Type)(PIN_INT0_IRQn + obj->ch));
+#else
+    NVIC_DisableIRQ((IRQn_Type)(PIN_INT4_IRQn + obj->ch));
+#endif
+}

--- a/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -125,3 +125,11 @@
         }
     }
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    NVIC_DisableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
+}