Revision 129:8a86d1aafce0, committed 2016-05-16

Comitter:

mbed_official

Date:

Mon May 16 12:00:12 2016 +0100

Parent:

128:c31e94a47539

Child:

130:cd421b1c9b67

Commit message:

Synchronized with git revision 1d1f7ab1330d44cc5697c682173f7090a7d6b1cb

Full URL: https://github.com/mbedmicro/mbed/commit/1d1f7ab1330d44cc5697c682173f7090a7d6b1cb/

* [STM32F4] Get PCLK1 clock and set initial CAN frequency

CAN bus opperates on APB1 peripheral clock due to that we need to get PCLK1 freq
in *can_frequency()* function to properly calculate CAN speed and reconfigure
BS1, BS2, SJW bits.

Also to fully communicate with other ST platform we set the initical CAN
frequency to 100kb/s to be able to work with the slowest platform which supports
CAN, which is NUCLEO_F303K8 (APB1 is 32MHz).

Change-Id: I10af3aa8d715dd61c9d1b216ef813193449fecbd

* [STM32F4] Fix for CAN2 interrupt index

CAN2 interrupt index was wrong leading to not properly registering interrupt.
Having this fix allow us to pass MBED_30 test.

Change-Id: I33f9ca7c81286f7746a8f8352619e213bdf9756a

Changed in this revision

--- a/targets/hal/TARGET_STM/TARGET_STM32F4/can_api.c	Fri May 13 16:00:11 2016 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F4/can_api.c	Mon May 16 12:00:12 2016 +0100
@@ -42,7 +42,7 @@
         obj->index = 0;
     } else {
         __HAL_RCC_CAN2_CLK_ENABLE();
-        obj->index = 0;
+        obj->index = 1;
     }
 
     // Configure the CAN pins
@@ -75,6 +75,9 @@
 
     filter_number = (obj->can == CAN_1) ? 0 : 14;
 
+    // Set initial CAN frequency to 100kb/s
+    can_frequency(obj, 100000);
+
     can_filter(obj, 0, 0, CANStandard, filter_number);
 }
 
@@ -177,7 +180,7 @@
 
 int can_frequency(can_t *obj, int f) 
 {
-    int pclk ; //= PeripheralClock;
+    int pclk = HAL_RCC_GetPCLK1Freq();
     int btr = can_speed(pclk, (unsigned int)f, 1);
     CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);