NXP's driver library for LPC17xx, ported to mbed's online compiler. Not tested! I had to fix a lot of warings and found a couple of pretty obvious bugs, so the chances are there are more. Original: http://ics.nxp.com/support/documents/microcontrollers/zip/lpc17xx.cmsis.driver.library.zip

Dependencies:   mbed

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SSP_CFG_Type Struct Reference

SSP_CFG_Type Struct Reference
[SSP_Public_Types]

SSP configuration structure. More...

#include <lpc17xx_ssp.h>

Data Fields

uint32_t CPHA
 Databit number, should be SSP_DATABIT_x, where x is in range from 4 - 16.
uint32_t CPOL
 Clock phase, should be:

  • SSP_CPHA_FIRST: first clock edge
  • SSP_CPHA_SECOND: second clock edge.

uint32_t Mode
 Clock polarity, should be:

  • SSP_CPOL_HI: high level
  • SSP_CPOL_LO: low level.

uint32_t FrameFormat
 SSP mode, should be:

  • SSP_MASTER_MODE: Master mode
  • SSP_SLAVE_MODE: Slave mode.

uint32_t ClockRate
 Frame Format:

  • SSP_FRAME_SPI: Motorola SPI frame format
  • SSP_FRAME_TI: TI frame format
  • SSP_FRAME_MICROWIRE: National Microwire frame format.


Detailed Description

SSP configuration structure.

Definition at line 205 of file lpc17xx_ssp.h.


Field Documentation

uint32_t ClockRate

Frame Format:

  • SSP_FRAME_SPI: Motorola SPI frame format
  • SSP_FRAME_TI: TI frame format
  • SSP_FRAME_MICROWIRE: National Microwire frame format.

Definition at line 221 of file lpc17xx_ssp.h.

uint32_t CPHA

Databit number, should be SSP_DATABIT_x, where x is in range from 4 - 16.

Definition at line 208 of file lpc17xx_ssp.h.

uint32_t CPOL

Clock phase, should be:

  • SSP_CPHA_FIRST: first clock edge
  • SSP_CPHA_SECOND: second clock edge.

Definition at line 211 of file lpc17xx_ssp.h.

uint32_t FrameFormat

SSP mode, should be:

  • SSP_MASTER_MODE: Master mode
  • SSP_SLAVE_MODE: Slave mode.

Definition at line 217 of file lpc17xx_ssp.h.

uint32_t Mode

Clock polarity, should be:

  • SSP_CPOL_HI: high level
  • SSP_CPOL_LO: low level.

Definition at line 214 of file lpc17xx_ssp.h.