lpc17xx_nvic.c

00001 /**
00002  * @file    : lpc17xx_nvic.c
00003  * @brief   : Contains all expansion functions support for
00004  *              NVIC firmware library on LPC17xx. The main
00005  *              NVIC functions are defined in core_cm3.h
00006  * @version : 1.0
00007  * @date    : 18. Mar. 2009
00008  * @author  : HieuNguyen
00009  **************************************************************************
00010  * Software that is described herein is for illustrative purposes only
00011  * which provides customers with programming information regarding the
00012  * products. This software is supplied "AS IS" without any warranties.
00013  * NXP Semiconductors assumes no responsibility or liability for the
00014  * use of the software, conveys no license or title under any patent,
00015  * copyright, or mask work right to the product. NXP Semiconductors
00016  * reserves the right to make changes in the software without
00017  * notification. NXP Semiconductors also make no representation or
00018  * warranty that such application will be suitable for the specified
00019  * use without further testing or modification.
00020  **********************************************************************/
00021 
00022 /* Peripheral group ----------------------------------------------------------- */
00023 /** @addtogroup NVIC
00024  * @{
00025  */
00026 
00027 /* Includes ------------------------------------------------------------------- */
00028 #include "lpc17xx_nvic.h"
00029 
00030 
00031 /* Private Macros ------------------------------------------------------------- */
00032 /** @addtogroup NVIC_Private_Macros
00033  * @{
00034  */
00035 
00036 /* Vector table offset bit mask */
00037 #define NVIC_VTOR_MASK              0x3FFFFF80
00038 
00039 /**
00040  * @}
00041  */
00042 
00043 
00044 /* Public Functions ----------------------------------------------------------- */
00045 /** @addtogroup NVIC_Public_Functions
00046  * @{
00047  */
00048 
00049 
00050 /*****************************************************************************//**
00051  * @brief       De-initializes the NVIC peripheral registers to their default
00052  *              reset values.
00053  * @param       None
00054  * @return      None
00055  *
00056  * These following NVIC peripheral registers will be de-initialized:
00057  * - Disable Interrupt (32 IRQ interrupt sources that matched with LPC17xx)
00058  * - Clear all Pending Interrupts (32 IRQ interrupt source that matched with LPC17xx)
00059  * - Clear all Interrupt Priorities (32 IRQ interrupt source that matched with LPC17xx)
00060  *******************************************************************************/
00061 void NVIC_DeInit(void)
00062 {
00063     uint8_t tmp;
00064 
00065     /* Disable all interrupts */
00066     NVIC->ICER[0] = 0xFFFFFFFF;
00067     NVIC->ICER[1] = 0x00000001;
00068     /* Clear all pending interrupts */
00069     NVIC->ICPR[0] = 0xFFFFFFFF;
00070     NVIC->ICPR[1] = 0x00000001;
00071 
00072     /* Clear all interrupt priority */
00073     for (tmp = 0; tmp < 32; tmp++) {
00074         NVIC->IP[tmp] = 0x00;
00075     }
00076 }
00077 
00078 /*****************************************************************************//**
00079  * @brief           De-initializes the SCB peripheral registers to their default
00080  *                  reset values.
00081  * @param           none
00082  * @return          none
00083  *
00084  * These following SCB NVIC peripheral registers will be de-initialized:
00085  * - Interrupt Control State register
00086  * - Interrupt Vector Table Offset register
00087  * - Application Interrupt/Reset Control register
00088  * - System Control register
00089  * - Configuration Control register
00090  * - System Handlers Priority Registers
00091  * - System Handler Control and State Register
00092  * - Configurable Fault Status Register
00093  * - Hard Fault Status Register
00094  * - Debug Fault Status Register
00095  *******************************************************************************/
00096 void NVIC_SCBDeInit(void)
00097 {
00098     uint8_t tmp;
00099 
00100     SCB->ICSR = 0x0A000000;
00101     SCB->VTOR = 0x00000000;
00102     SCB->AIRCR = 0x05FA0000;
00103     SCB->SCR = 0x00000000;
00104     SCB->CCR = 0x00000000;
00105 
00106     for (tmp = 0; tmp < 32; tmp++) {
00107         SCB->SHP[tmp] = 0x00;
00108     }
00109 
00110     SCB->SHCSR = 0x00000000;
00111     SCB->CFSR = 0xFFFFFFFF;
00112     SCB->HFSR = 0xFFFFFFFF;
00113     SCB->DFSR = 0xFFFFFFFF;
00114 }
00115 
00116 
00117 /*****************************************************************************//**
00118  * @brief       Set Vector Table Offset value
00119  * @param       offset Offset value
00120  * @return      None
00121  *******************************************************************************/
00122 void NVIC_SetVTOR(uint32_t offset)
00123 {
00124     SCB->VTOR  = (offset & NVIC_VTOR_MASK);
00125 }
00126 
00127 /**
00128  * @}
00129  */
00130 
00131 /**
00132  * @}
00133  */
00134 
00135 /* --------------------------------- End Of File ------------------------------ */