FastAnalogIn.h

00001 #ifndef __included_fast_analog_in_h
00002 #define __included_fast_analog_in_h
00003 
00004 #include "mbed.h"
00005 
00006 namespace NK
00007 {
00008 
00009 using namespace mbed;
00010 extern "C" void ADC0_IRQHandler(void);
00011 
00012 class FastAnalogIn: public mbed::AnalogIn
00013 {
00014 public:
00015     void start_read() {
00016         ADC0->SC1[0] = ADC_SC1_ADCH(_adc.adc)
00017                        | ADC_SC1_AIEN_MASK;     // enable interrupt
00018     }
00019 
00020     void abort_read() {
00021         ADC0->SC1[0] = ADC_SC1_ADCH(0x1F);
00022     }
00023 
00024     uint16_t read_u16() {
00025         // Wait Conversion Complete
00026         while ((ADC0->SC1[0] & ADC_SC1_COCO_MASK) != ADC_SC1_COCO_MASK);
00027 
00028         // Return value
00029         return (uint16_t)ADC0->R[0];
00030     }
00031 
00032     uint16_t read_u16_nowait() {
00033         return (uint16_t)ADC0->R[0];
00034     }
00035 
00036     // 0x0000 => 0x80 (-128)
00037     // 0x7fff => 0xFF (-1)
00038     // 0x8000 => 0x00 (0)
00039     // 0xffff => 0x7f (127)
00040     int8_t read_s8_nowait() {
00041         int32_t val = read_u16_nowait();
00042         return (val + 0x80 - 0x8000) >> 8;
00043     }
00044 
00045     FastAnalogIn(PinName pin)
00046         : mbed::AnalogIn(pin) {
00047 
00048         NVIC_SetVector(ADC0_IRQn, (uint32_t)&ADC0_IRQHandler);
00049         NVIC_DisableIRQ(ADC0_IRQn);
00050 
00051         ADC0->CFG1 = ADC_CFG1_ADLPC_MASK    // Low-Power Configuration
00052                      | ADC_CFG1_ADIV(4)       // Clock Divide Select: (Input Clock)/4
00053                      | ADC_CFG1_ADLSMP_MASK   // Long Sample Time
00054                      | ADC_CFG1_MODE(3)       // (16)bits Resolution
00055                      | ADC_CFG1_ADICLK(1);    // Input Clock: (Bus Clock)/2
00056 
00057         ADC0->CFG2 = 0   // ADxxA channels are selected
00058                      | ADC_CFG2_ADACKEN_MASK    // Asynchronous Clock Output Enable
00059                      | ADC_CFG2_ADHSC_MASK      // High-Speed Configuration
00060                      | ADC_CFG2_ADLSTS(0);      // Long Sample Time Select
00061 
00062         ADC0->SC2 = ADC_SC2_REFSEL(0);      // Default Voltage Reference
00063 
00064         ADC0->SC3 = ADC_SC3_AVGE_MASK       // Hardware Average Enable
00065                     | ADC_SC3_AVGS(3);        // 16 Samples Averaged
00066 
00067         ADC0->SC1[0] = ADC_SC1_ADCH(_adc.adc)
00068                        | ADC_SC1_AIEN_MASK;     // enable interrupt
00069     }
00070 
00071     void enable_interrupt() {
00072         NVIC_EnableIRQ(ADC0_IRQn);
00073     }
00074     void disable_interrupt() {
00075         NVIC_DisableIRQ(ADC0_IRQn);
00076     }
00077 
00078 };
00079 
00080 }
00081 
00082 #endif