Tick Tock
Attempts to merge SPI_TFT2 & SPI_TFT_ILI9341
Dependencies: SPI_TFTx2 TFT_fonts TOUCH_TFTx2 mbed
Revision 146:88f7bda79d8e, committed 2013-08-07
- Comitter:
- TickTock
- Date:
- Wed Aug 07 12:35:04 2013 +0000
- Parent:
- 145:47cdacc468a4
- Child:
- 147:e0f1c84c62a6
- Commit message:
- restored support libraries
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/PowerControl/EthernetPowerControl.cpp Wed Aug 07 12:35:04 2013 +0000
@@ -0,0 +1,138 @@
+#include "EthernetPowerControl.h"
+
+static void write_PHY (unsigned int PhyReg, unsigned short Value) {
+ /* Write a data 'Value' to PHY register 'PhyReg'. */
+ unsigned int tout;
+ /* Hardware MII Management for LPC176x devices. */
+ LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
+ LPC_EMAC->MWTD = Value;
+
+ /* Wait utill operation completed */
+ for (tout = 0; tout < MII_WR_TOUT; tout++) {
+ if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
+ break;
+ }
+ }
+}
+
+static unsigned short read_PHY (unsigned int PhyReg) {
+ /* Read a PHY register 'PhyReg'. */
+ unsigned int tout, val;
+
+ LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
+ LPC_EMAC->MCMD = MCMD_READ;
+
+ /* Wait until operation completed */
+ for (tout = 0; tout < MII_RD_TOUT; tout++) {
+ if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
+ break;
+ }
+ }
+ LPC_EMAC->MCMD = 0;
+ val = LPC_EMAC->MRDD;
+
+ return (val);
+}
+
+void EMAC_Init()
+{
+ unsigned int tout,regv;
+ /* Power Up the EMAC controller. */
+ Peripheral_PowerUp(LPC1768_PCONP_PCENET);
+
+ LPC_PINCON->PINSEL2 = 0x50150105;
+ LPC_PINCON->PINSEL3 &= ~0x0000000F;
+ LPC_PINCON->PINSEL3 |= 0x00000005;
+
+ /* Reset all EMAC internal modules. */
+ LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
+ MAC1_SIM_RES | MAC1_SOFT_RES;
+ LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
+
+ /* A short delay after reset. */
+ for (tout = 100; tout; tout--);
+
+ /* Initialize MAC control registers. */
+ LPC_EMAC->MAC1 = MAC1_PASS_ALL;
+ LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
+ LPC_EMAC->MAXF = ETH_MAX_FLEN;
+ LPC_EMAC->CLRT = CLRT_DEF;
+ LPC_EMAC->IPGR = IPGR_DEF;
+
+ /* Enable Reduced MII interface. */
+ LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
+
+ /* Reset Reduced MII Logic. */
+ LPC_EMAC->SUPP = SUPP_RES_RMII;
+ for (tout = 100; tout; tout--);
+ LPC_EMAC->SUPP = 0;
+
+ /* Put the DP83848C in reset mode */
+ write_PHY (PHY_REG_BMCR, 0x8000);
+
+ /* Wait for hardware reset to end. */
+ for (tout = 0; tout < 0x100000; tout++) {
+ regv = read_PHY (PHY_REG_BMCR);
+ if (!(regv & 0x8000)) {
+ /* Reset complete */
+ break;
+ }
+ }
+}
+
+
+void PHY_PowerDown()
+{
+ if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
+ EMAC_Init(); //init EMAC if it is not already init'd
+
+ unsigned int regv;
+ regv = read_PHY(PHY_REG_BMCR);
+ write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_BMCR_POWERDOWN));
+ regv = read_PHY(PHY_REG_BMCR);
+
+ //shouldn't need the EMAC now.
+ Peripheral_PowerDown(LPC1768_PCONP_PCENET);
+
+ //and turn off the PHY OSC
+ LPC_GPIO1->FIODIR |= 0x8000000;
+ LPC_GPIO1->FIOCLR = 0x8000000;
+}
+
+void PHY_PowerUp()
+{
+ if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
+ EMAC_Init(); //init EMAC if it is not already init'd
+
+ LPC_GPIO1->FIODIR |= 0x8000000;
+ LPC_GPIO1->FIOSET = 0x8000000;
+
+ //wait for osc to be stable
+ wait_ms(200);
+
+ unsigned int regv;
+ regv = read_PHY(PHY_REG_BMCR);
+ write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_BMCR_POWERDOWN));
+ regv = read_PHY(PHY_REG_BMCR);
+}
+
+void PHY_EnergyDetect_Enable()
+{
+ if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
+ EMAC_Init(); //init EMAC if it is not already init'd
+
+ unsigned int regv;
+ regv = read_PHY(PHY_REG_EDCR);
+ write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_EDCR_ENABLE));
+ regv = read_PHY(PHY_REG_EDCR);
+}
+
+void PHY_EnergyDetect_Disable()
+{
+ if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
+ EMAC_Init(); //init EMAC if it is not already init'd
+ unsigned int regv;
+ regv = read_PHY(PHY_REG_EDCR);
+ write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_EDCR_ENABLE));
+ regv = read_PHY(PHY_REG_EDCR);
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/PowerControl/EthernetPowerControl.h Wed Aug 07 12:35:04 2013 +0000 @@ -0,0 +1,299 @@ +/* mbed PowerControl Library + * Copyright (c) 2010 Michael Wei + */ + +#ifndef MBED_POWERCONTROL_ETH_H +#define MBED_POWERCONTROL_ETH_H + +#include "mbed.h" +#include "PowerControl.h" + +#define PHY_REG_BMCR_POWERDOWN 0xB +#define PHY_REG_EDCR_ENABLE 0xF + + +void EMAC_Init(); +static unsigned short read_PHY (unsigned int PhyReg); +static void write_PHY (unsigned int PhyReg, unsigned short Value); + +void PHY_PowerDown(void); +void PHY_PowerUp(void); +void PHY_EnergyDetect_Enable(void); +void PHY_EnergyDetect_Disable(void); + +//From NXP Sample Code .... Probably from KEIL sample code +/* EMAC Memory Buffer configuration for 16K Ethernet RAM. */ +#define NUM_RX_FRAG 4 /* Num.of RX Fragments 4*1536= 6.0kB */ +#define NUM_TX_FRAG 3 /* Num.of TX Fragments 3*1536= 4.6kB */ +#define ETH_FRAG_SIZE 1536 /* Packet Fragment size 1536 Bytes */ + +#define ETH_MAX_FLEN 1536 /* Max. Ethernet Frame Size */ + +/* EMAC variables located in 16K Ethernet SRAM */ +#define RX_DESC_BASE 0x20080000 +#define RX_STAT_BASE (RX_DESC_BASE + NUM_RX_FRAG*8) +#define TX_DESC_BASE (RX_STAT_BASE + NUM_RX_FRAG*8) +#define TX_STAT_BASE (TX_DESC_BASE + NUM_TX_FRAG*8) +#define RX_BUF_BASE (TX_STAT_BASE + NUM_TX_FRAG*4) +#define TX_BUF_BASE (RX_BUF_BASE + NUM_RX_FRAG*ETH_FRAG_SIZE) + +/* RX and TX descriptor and status definitions. */ +#define RX_DESC_PACKET(i) (*(unsigned int *)(RX_DESC_BASE + 8*i)) +#define RX_DESC_CTRL(i) (*(unsigned int *)(RX_DESC_BASE+4 + 8*i)) +#define RX_STAT_INFO(i) (*(unsigned int *)(RX_STAT_BASE + 8*i)) +#define RX_STAT_HASHCRC(i) (*(unsigned int *)(RX_STAT_BASE+4 + 8*i)) +#define TX_DESC_PACKET(i) (*(unsigned int *)(TX_DESC_BASE + 8*i)) +#define TX_DESC_CTRL(i) (*(unsigned int *)(TX_DESC_BASE+4 + 8*i)) +#define TX_STAT_INFO(i) (*(unsigned int *)(TX_STAT_BASE + 4*i)) +#define RX_BUF(i) (RX_BUF_BASE + ETH_FRAG_SIZE*i) +#define TX_BUF(i) (TX_BUF_BASE + ETH_FRAG_SIZE*i) + +/* MAC Configuration Register 1 */ +#define MAC1_REC_EN 0x00000001 /* Receive Enable */ +#define MAC1_PASS_ALL 0x00000002 /* Pass All Receive Frames */ +#define MAC1_RX_FLOWC 0x00000004 /* RX Flow Control */ +#define MAC1_TX_FLOWC 0x00000008 /* TX Flow Control */ +#define MAC1_LOOPB 0x00000010 /* Loop Back Mode */ +#define MAC1_RES_TX 0x00000100 /* Reset TX Logic */ +#define MAC1_RES_MCS_TX 0x00000200 /* Reset MAC TX Control Sublayer */ +#define MAC1_RES_RX 0x00000400 /* Reset RX Logic */ +#define MAC1_RES_MCS_RX 0x00000800 /* Reset MAC RX Control Sublayer */ +#define MAC1_SIM_RES 0x00004000 /* Simulation Reset */ +#define MAC1_SOFT_RES 0x00008000 /* Soft Reset MAC */ + +/* MAC Configuration Register 2 */ +#define MAC2_FULL_DUP 0x00000001 /* Full Duplex Mode */ +#define MAC2_FRM_LEN_CHK 0x00000002 /* Frame Length Checking */ +#define MAC2_HUGE_FRM_EN 0x00000004 /* Huge Frame Enable */ +#define MAC2_DLY_CRC 0x00000008 /* Delayed CRC Mode */ +#define MAC2_CRC_EN 0x00000010 /* Append CRC to every Frame */ +#define MAC2_PAD_EN 0x00000020 /* Pad all Short Frames */ +#define MAC2_VLAN_PAD_EN 0x00000040 /* VLAN Pad Enable */ +#define MAC2_ADET_PAD_EN 0x00000080 /* Auto Detect Pad Enable */ +#define MAC2_PPREAM_ENF 0x00000100 /* Pure Preamble Enforcement */ +#define MAC2_LPREAM_ENF 0x00000200 /* Long Preamble Enforcement */ +#define MAC2_NO_BACKOFF 0x00001000 /* No Backoff Algorithm */ +#define MAC2_BACK_PRESSURE 0x00002000 /* Backoff Presurre / No Backoff */ +#define MAC2_EXCESS_DEF 0x00004000 /* Excess Defer */ + +/* Back-to-Back Inter-Packet-Gap Register */ +#define IPGT_FULL_DUP 0x00000015 /* Recommended value for Full Duplex */ +#define IPGT_HALF_DUP 0x00000012 /* Recommended value for Half Duplex */ + +/* Non Back-to-Back Inter-Packet-Gap Register */ +#define IPGR_DEF 0x00000012 /* Recommended value */ + +/* Collision Window/Retry Register */ +#define CLRT_DEF 0x0000370F /* Default value */ + +/* PHY Support Register */ +#define SUPP_SPEED 0x00000100 /* Reduced MII Logic Current Speed */ +#define SUPP_RES_RMII 0x00000800 /* Reset Reduced MII Logic */ + +/* Test Register */ +#define TEST_SHCUT_PQUANTA 0x00000001 /* Shortcut Pause Quanta */ +#define TEST_TST_PAUSE 0x00000002 /* Test Pause */ +#define TEST_TST_BACKP 0x00000004 /* Test Back Pressure */ + +/* MII Management Configuration Register */ +#define MCFG_SCAN_INC 0x00000001 /* Scan Increment PHY Address */ +#define MCFG_SUPP_PREAM 0x00000002 /* Suppress Preamble */ +#define MCFG_CLK_SEL 0x0000001C /* Clock Select Mask */ +#define MCFG_RES_MII 0x00008000 /* Reset MII Management Hardware */ + +/* MII Management Command Register */ +#define MCMD_READ 0x00000001 /* MII Read */ +#define MCMD_SCAN 0x00000002 /* MII Scan continuously */ + +#define MII_WR_TOUT 0x00050000 /* MII Write timeout count */ +#define MII_RD_TOUT 0x00050000 /* MII Read timeout count */ + +/* MII Management Address Register */ +#define MADR_REG_ADR 0x0000001F /* MII Register Address Mask */ +#define MADR_PHY_ADR 0x00001F00 /* PHY Address Mask */ + +/* MII Management Indicators Register */ +#define MIND_BUSY 0x00000001 /* MII is Busy */ +#define MIND_SCAN 0x00000002 /* MII Scanning in Progress */ +#define MIND_NOT_VAL 0x00000004 /* MII Read Data not valid */ +#define MIND_MII_LINK_FAIL 0x00000008 /* MII Link Failed */ + +/* Command Register */ +#define CR_RX_EN 0x00000001 /* Enable Receive */ +#define CR_TX_EN 0x00000002 /* Enable Transmit */ +#define CR_REG_RES 0x00000008 /* Reset Host Registers */ +#define CR_TX_RES 0x00000010 /* Reset Transmit Datapath */ +#define CR_RX_RES 0x00000020 /* Reset Receive Datapath */ +#define CR_PASS_RUNT_FRM 0x00000040 /* Pass Runt Frames */ +#define CR_PASS_RX_FILT 0x00000080 /* Pass RX Filter */ +#define CR_TX_FLOW_CTRL 0x00000100 /* TX Flow Control */ +#define CR_RMII 0x00000200 /* Reduced MII Interface */ +#define CR_FULL_DUP 0x00000400 /* Full Duplex */ + +/* Status Register */ +#define SR_RX_EN 0x00000001 /* Enable Receive */ +#define SR_TX_EN 0x00000002 /* Enable Transmit */ + +/* Transmit Status Vector 0 Register */ +#define TSV0_CRC_ERR 0x00000001 /* CRC error */ +#define TSV0_LEN_CHKERR 0x00000002 /* Length Check Error */ +#define TSV0_LEN_OUTRNG 0x00000004 /* Length Out of Range */ +#define TSV0_DONE 0x00000008 /* Tramsmission Completed */ +#define TSV0_MCAST 0x00000010 /* Multicast Destination */ +#define TSV0_BCAST 0x00000020 /* Broadcast Destination */ +#define TSV0_PKT_DEFER 0x00000040 /* Packet Deferred */ +#define TSV0_EXC_DEFER 0x00000080 /* Excessive Packet Deferral */ +#define TSV0_EXC_COLL 0x00000100 /* Excessive Collision */ +#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occured */ +#define TSV0_GIANT 0x00000400 /* Giant Frame */ +#define TSV0_UNDERRUN 0x00000800 /* Buffer Underrun */ +#define TSV0_BYTES 0x0FFFF000 /* Total Bytes Transferred */ +#define TSV0_CTRL_FRAME 0x10000000 /* Control Frame */ +#define TSV0_PAUSE 0x20000000 /* Pause Frame */ +#define TSV0_BACK_PRESS 0x40000000 /* Backpressure Method Applied */ +#define TSV0_VLAN 0x80000000 /* VLAN Frame */ + +/* Transmit Status Vector 1 Register */ +#define TSV1_BYTE_CNT 0x0000FFFF /* Transmit Byte Count */ +#define TSV1_COLL_CNT 0x000F0000 /* Transmit Collision Count */ + +/* Receive Status Vector Register */ +#define RSV_BYTE_CNT 0x0000FFFF /* Receive Byte Count */ +#define RSV_PKT_IGNORED 0x00010000 /* Packet Previously Ignored */ +#define RSV_RXDV_SEEN 0x00020000 /* RXDV Event Previously Seen */ +#define RSV_CARR_SEEN 0x00040000 /* Carrier Event Previously Seen */ +#define RSV_REC_CODEV 0x00080000 /* Receive Code Violation */ +#define RSV_CRC_ERR 0x00100000 /* CRC Error */ +#define RSV_LEN_CHKERR 0x00200000 /* Length Check Error */ +#define RSV_LEN_OUTRNG 0x00400000 /* Length Out of Range */ +#define RSV_REC_OK 0x00800000 /* Frame Received OK */ +#define RSV_MCAST 0x01000000 /* Multicast Frame */ +#define RSV_BCAST 0x02000000 /* Broadcast Frame */ +#define RSV_DRIB_NIBB 0x04000000 /* Dribble Nibble */ +#define RSV_CTRL_FRAME 0x08000000 /* Control Frame */ +#define RSV_PAUSE 0x10000000 /* Pause Frame */ +#define RSV_UNSUPP_OPC 0x20000000 /* Unsupported Opcode */ +#define RSV_VLAN 0x40000000 /* VLAN Frame */ + +/* Flow Control Counter Register */ +#define FCC_MIRR_CNT 0x0000FFFF /* Mirror Counter */ +#define FCC_PAUSE_TIM 0xFFFF0000 /* Pause Timer */ + +/* Flow Control Status Register */ +#define FCS_MIRR_CNT 0x0000FFFF /* Mirror Counter Current */ + +/* Receive Filter Control Register */ +#define RFC_UCAST_EN 0x00000001 /* Accept Unicast Frames Enable */ +#define RFC_BCAST_EN 0x00000002 /* Accept Broadcast Frames Enable */ +#define RFC_MCAST_EN 0x00000004 /* Accept Multicast Frames Enable */ +#define RFC_UCAST_HASH_EN 0x00000008 /* Accept Unicast Hash Filter Frames */ +#define RFC_MCAST_HASH_EN 0x00000010 /* Accept Multicast Hash Filter Fram.*/ +#define RFC_PERFECT_EN 0x00000020 /* Accept Perfect Match Enable */ +#define RFC_MAGP_WOL_EN 0x00001000 /* Magic Packet Filter WoL Enable */ +#define RFC_PFILT_WOL_EN 0x00002000 /* Perfect Filter WoL Enable */ + +/* Receive Filter WoL Status/Clear Registers */ +#define WOL_UCAST 0x00000001 /* Unicast Frame caused WoL */ +#define WOL_BCAST 0x00000002 /* Broadcast Frame caused WoL */ +#define WOL_MCAST 0x00000004 /* Multicast Frame caused WoL */ +#define WOL_UCAST_HASH 0x00000008 /* Unicast Hash Filter Frame WoL */ +#define WOL_MCAST_HASH 0x00000010 /* Multicast Hash Filter Frame WoL */ +#define WOL_PERFECT 0x00000020 /* Perfect Filter WoL */ +#define WOL_RX_FILTER 0x00000080 /* RX Filter caused WoL */ +#define WOL_MAG_PACKET 0x00000100 /* Magic Packet Filter caused WoL */ + +/* Interrupt Status/Enable/Clear/Set Registers */ +#define INT_RX_OVERRUN 0x00000001 /* Overrun Error in RX Queue */ +#define INT_RX_ERR 0x00000002 /* Receive Error */ +#define INT_RX_FIN 0x00000004 /* RX Finished Process Descriptors */ +#define INT_RX_DONE 0x00000008 /* Receive Done */ +#define INT_TX_UNDERRUN 0x00000010 /* Transmit Underrun */ +#define INT_TX_ERR 0x00000020 /* Transmit Error */ +#define INT_TX_FIN 0x00000040 /* TX Finished Process Descriptors */ +#define INT_TX_DONE 0x00000080 /* Transmit Done */ +#define INT_SOFT_INT 0x00001000 /* Software Triggered Interrupt */ +#define INT_WAKEUP 0x00002000 /* Wakeup Event Interrupt */ + +/* Power Down Register */ +#define PD_POWER_DOWN 0x80000000 /* Power Down MAC */ + +/* RX Descriptor Control Word */ +#define RCTRL_SIZE 0x000007FF /* Buffer size mask */ +#define RCTRL_INT 0x80000000 /* Generate RxDone Interrupt */ + +/* RX Status Hash CRC Word */ +#define RHASH_SA 0x000001FF /* Hash CRC for Source Address */ +#define RHASH_DA 0x001FF000 /* Hash CRC for Destination Address */ + +/* RX Status Information Word */ +#define RINFO_SIZE 0x000007FF /* Data size in bytes */ +#define RINFO_CTRL_FRAME 0x00040000 /* Control Frame */ +#define RINFO_VLAN 0x00080000 /* VLAN Frame */ +#define RINFO_FAIL_FILT 0x00100000 /* RX Filter Failed */ +#define RINFO_MCAST 0x00200000 /* Multicast Frame */ +#define RINFO_BCAST 0x00400000 /* Broadcast Frame */ +#define RINFO_CRC_ERR 0x00800000 /* CRC Error in Frame */ +#define RINFO_SYM_ERR 0x01000000 /* Symbol Error from PHY */ +#define RINFO_LEN_ERR 0x02000000 /* Length Error */ +#define RINFO_RANGE_ERR 0x04000000 /* Range Error (exceeded max. size) */ +#define RINFO_ALIGN_ERR 0x08000000 /* Alignment Error */ +#define RINFO_OVERRUN 0x10000000 /* Receive overrun */ +#define RINFO_NO_DESCR 0x20000000 /* No new Descriptor available */ +#define RINFO_LAST_FLAG 0x40000000 /* Last Fragment in Frame */ +#define RINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */ + +#define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_CRC_ERR | RINFO_SYM_ERR | \ + RINFO_LEN_ERR | RINFO_ALIGN_ERR | RINFO_OVERRUN) + +/* TX Descriptor Control Word */ +#define TCTRL_SIZE 0x000007FF /* Size of data buffer in bytes */ +#define TCTRL_OVERRIDE 0x04000000 /* Override Default MAC Registers */ +#define TCTRL_HUGE 0x08000000 /* Enable Huge Frame */ +#define TCTRL_PAD 0x10000000 /* Pad short Frames to 64 bytes */ +#define TCTRL_CRC 0x20000000 /* Append a hardware CRC to Frame */ +#define TCTRL_LAST 0x40000000 /* Last Descriptor for TX Frame */ +#define TCTRL_INT 0x80000000 /* Generate TxDone Interrupt */ + +/* TX Status Information Word */ +#define TINFO_COL_CNT 0x01E00000 /* Collision Count */ +#define TINFO_DEFER 0x02000000 /* Packet Deferred (not an error) */ +#define TINFO_EXCESS_DEF 0x04000000 /* Excessive Deferral */ +#define TINFO_EXCESS_COL 0x08000000 /* Excessive Collision */ +#define TINFO_LATE_COL 0x10000000 /* Late Collision Occured */ +#define TINFO_UNDERRUN 0x20000000 /* Transmit Underrun */ +#define TINFO_NO_DESCR 0x40000000 /* No new Descriptor available */ +#define TINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */ + +/* DP83848C PHY Registers */ +#define PHY_REG_BMCR 0x00 /* Basic Mode Control Register */ +#define PHY_REG_BMSR 0x01 /* Basic Mode Status Register */ +#define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */ +#define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */ +#define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */ +#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */ +#define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */ +#define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */ + +/* PHY Extended Registers */ +#define PHY_REG_STS 0x10 /* Status Register */ +#define PHY_REG_MICR 0x11 /* MII Interrupt Control Register */ +#define PHY_REG_MISR 0x12 /* MII Interrupt Status Register */ +#define PHY_REG_FCSCR 0x14 /* False Carrier Sense Counter */ +#define PHY_REG_RECR 0x15 /* Receive Error Counter */ +#define PHY_REG_PCSR 0x16 /* PCS Sublayer Config. and Status */ +#define PHY_REG_RBR 0x17 /* RMII and Bypass Register */ +#define PHY_REG_LEDCR 0x18 /* LED Direct Control Register */ +#define PHY_REG_PHYCR 0x19 /* PHY Control Register */ +#define PHY_REG_10BTSCR 0x1A /* 10Base-T Status/Control Register */ +#define PHY_REG_CDCTRL1 0x1B /* CD Test Control and BIST Extens. */ +#define PHY_REG_EDCR 0x1D /* Energy Detect Control Register */ + +#define PHY_FULLD_100M 0x2100 /* Full Duplex 100Mbit */ +#define PHY_HALFD_100M 0x2000 /* Half Duplex 100Mbit */ +#define PHY_FULLD_10M 0x0100 /* Full Duplex 10Mbit */ +#define PHY_HALFD_10M 0x0000 /* Half Duplex 10MBit */ +#define PHY_AUTO_NEG 0x3000 /* Select Auto Negotiation */ + +#define DP83848C_DEF_ADR 0x0100 /* Default PHY device address */ +#define DP83848C_ID 0x20005C90 /* PHY Identifier */ +#endif \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/PowerControl/PowerControl.h Wed Aug 07 12:35:04 2013 +0000
@@ -0,0 +1,192 @@
+/* mbed PowerControl Library
+ * Copyright (c) 2010 Michael Wei
+ */
+
+#ifndef MBED_POWERCONTROL_H
+#define MBED_POWERCONTROL_H
+
+//shouldn't have to include, but fixes weird problems with defines
+#include "LPC1768/LPC17xx.h"
+
+//System Control Register
+// bit 0: Reserved
+// bit 1: Sleep on Exit
+#define LPC1768_SCR_SLEEPONEXIT 0x2
+// bit 2: Deep Sleep
+#define LPC1768_SCR_SLEEPDEEP 0x4
+// bit 3: Resereved
+// bit 4: Send on Pending
+#define LPC1768_SCR_SEVONPEND 0x10
+// bit 5-31: Reserved
+
+//Power Control Register
+// bit 0: Power mode control bit 0 (power-down mode)
+#define LPC1768_PCON_PM0 0x1
+// bit 1: Power mode control bit 1 (deep power-down mode)
+#define LPC1768_PCON_PM1 0x2
+// bit 2: Brown-out reduced power mode
+#define LPC1768_PCON_BODRPM 0x4
+// bit 3: Brown-out global disable
+#define LPC1768_PCON_BOGD 0x8
+// bit 4: Brown-out reset disable
+#define LPC1768_PCON_BORD 0x10
+// bit 5-7 : Reserved
+// bit 8: Sleep Mode Entry Flag
+#define LPC1768_PCON_SMFLAG 0x100
+// bit 9: Deep Sleep Entry Flag
+#define LPC1768_PCON_DSFLAG 0x200
+// bit 10: Power Down Entry Flag
+#define LPC1768_PCON_PDFLAG 0x400
+// bit 11: Deep Power Down Entry Flag
+#define LPC1768_PCON_DPDFLAG 0x800
+// bit 12-31: Reserved
+
+//"Sleep Mode" (WFI).
+inline void Sleep(void)
+{
+ __WFI();
+}
+
+//"Deep Sleep" Mode
+inline void DeepSleep(void)
+{
+ SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
+ __WFI();
+}
+
+//"Power-Down" Mode
+inline void PowerDown(void)
+{
+ SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
+ LPC_SC->PCON &= ~LPC1768_PCON_PM1;
+ LPC_SC->PCON |= LPC1768_PCON_PM0;
+ __WFI();
+ //reset back to normal
+ LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
+}
+
+//"Deep Power-Down" Mode
+inline void DeepPowerDown(void)
+{
+ SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
+ LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
+ __WFI();
+ //reset back to normal
+ LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
+}
+
+//shut down BOD during power-down/deep sleep
+inline void BrownOut_ReducedPowerMode_Enable(void)
+{
+ LPC_SC->PCON |= LPC1768_PCON_BODRPM;
+}
+
+//turn on BOD during power-down/deep sleep
+inline void BrownOut_ReducedPowerMode_Disable(void)
+{
+ LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
+}
+
+//turn off brown out circutry
+inline void BrownOut_Global_Disable(void)
+{
+ LPC_SC->PCON |= LPC1768_PCON_BOGD;
+}
+
+//turn on brown out circutry
+inline void BrownOut_Global_Enable(void)
+{
+ LPC_SC->PCON &= !LPC1768_PCON_BOGD;
+}
+
+//turn off brown out reset circutry
+inline void BrownOut_Reset_Disable(void)
+{
+ LPC_SC->PCON |= LPC1768_PCON_BORD;
+}
+
+//turn on brown outreset circutry
+inline void BrownOut_Reset_Enable(void)
+{
+ LPC_SC->PCON &= ~LPC1768_PCON_BORD;
+}
+//Peripheral Control Register
+// bit 0: Reserved
+// bit 1: PCTIM0: Timer/Counter 0 power/clock enable
+#define LPC1768_PCONP_PCTIM0 0x2
+// bit 2: PCTIM1: Timer/Counter 1 power/clock enable
+#define LPC1768_PCONP_PCTIM1 0x4
+// bit 3: PCUART0: UART 0 power/clock enable
+#define LPC1768_PCONP_PCUART0 0x8
+// bit 4: PCUART1: UART 1 power/clock enable
+#define LPC1768_PCONP_PCUART1 0x10
+// bit 5: Reserved
+// bit 6: PCPWM1: PWM 1 power/clock enable
+#define LPC1768_PCONP_PCPWM1 0x40
+// bit 7: PCI2C0: I2C interface 0 power/clock enable
+#define LPC1768_PCONP_PCI2C0 0x80
+// bit 8: PCSPI: SPI interface power/clock enable
+#define LPC1768_PCONP_PCSPI 0x100
+// bit 9: PCRTC: RTC power/clock enable
+#define LPC1768_PCONP_PCRTC 0x200
+// bit 10: PCSSP1: SSP interface 1 power/clock enable
+#define LPC1768_PCONP_PCSSP1 0x400
+// bit 11: Reserved
+// bit 12: PCADC: A/D converter power/clock enable
+#define LPC1768_PCONP_PCADC 0x1000
+// bit 13: PCCAN1: CAN controller 1 power/clock enable
+#define LPC1768_PCONP_PCCAN1 0x2000
+// bit 14: PCCAN2: CAN controller 2 power/clock enable
+#define LPC1768_PCONP_PCCAN2 0x4000
+// bit 15: PCGPIO: GPIOs power/clock enable
+#define LPC1768_PCONP_PCGPIO 0x8000
+// bit 16: PCRIT: Repetitive interrupt timer power/clock enable
+#define LPC1768_PCONP_PCRIT 0x10000
+// bit 17: PCMCPWM: Motor control PWM power/clock enable
+#define LPC1768_PCONP_PCMCPWM 0x20000
+// bit 18: PCQEI: Quadrature encoder interface power/clock enable
+#define LPC1768_PCONP_PCQEI 0x40000
+// bit 19: PCI2C1: I2C interface 1 power/clock enable
+#define LPC1768_PCONP_PCI2C1 0x80000
+// bit 20: Reserved
+// bit 21: PCSSP0: SSP interface 0 power/clock enable
+#define LPC1768_PCONP_PCSSP0 0x200000
+// bit 22: PCTIM2: Timer 2 power/clock enable
+#define LPC1768_PCONP_PCTIM2 0x400000
+// bit 23: PCTIM3: Timer 3 power/clock enable
+#define LPC1768_PCONP_PCQTIM3 0x800000
+// bit 24: PCUART2: UART 2 power/clock enable
+#define LPC1768_PCONP_PCUART2 0x1000000
+// bit 25: PCUART3: UART 3 power/clock enable
+#define LPC1768_PCONP_PCUART3 0x2000000
+// bit 26: PCI2C2: I2C interface 2 power/clock enable
+#define LPC1768_PCONP_PCI2C2 0x4000000
+// bit 27: PCI2S: I2S interface power/clock enable
+#define LPC1768_PCONP_PCI2S 0x8000000
+// bit 28: Reserved
+// bit 29: PCGPDMA: GP DMA function power/clock enable
+#define LPC1768_PCONP_PCGPDMA 0x20000000
+// bit 30: PCENET: Ethernet block power/clock enable
+#define LPC1768_PCONP_PCENET 0x40000000
+// bit 31: PCUSB: USB interface power/clock enable
+#define LPC1768_PCONP_PCUSB 0x80000000
+
+//Powers Up specified Peripheral(s)
+inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
+{
+ return LPC_SC->PCONP |= bitMask;
+}
+
+//Powers Down specified Peripheral(s)
+inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
+{
+ return LPC_SC->PCONP &= ~bitMask;
+}
+
+//returns if the peripheral is on or off
+inline bool Peripheral_GetStatus(unsigned int peripheral)
+{
+ return (LPC_SC->PCONP & peripheral) ? true : false;
+}
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/USBHostLite/usbhost_cpu.h Wed Aug 07 12:35:04 2013 +0000 @@ -0,0 +1,35 @@ +/* +************************************************************************************************************** +* NXP USB Host Stack +* +* (c) Copyright 2008, NXP SemiConductors +* (c) Copyright 2008, OnChip Technologies LLC +* All Rights Reserved +* +* www.nxp.com +* www.onchiptech.com +* +* File : usbhost_cpu.h +* Programmer(s) : Ravikanth.P +* Version : +* +************************************************************************************************************** +*/ + +#ifndef USBHOST_CPU_H +#define USBHOST_CPU_H + +/* +************************************************************************************************************** +* TYPE DEFINITIONS OF DATA TYPES +************************************************************************************************************** +*/ + +typedef unsigned int USB_INT32U; +typedef signed int USB_INT32S; +typedef unsigned short USB_INT16U; +typedef signed short USB_INT16S; +typedef unsigned char USB_INT08U; +typedef signed char USB_INT08S; + +#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/USBHostLite/usbhost_err.h Wed Aug 07 12:35:04 2013 +0000 @@ -0,0 +1,63 @@ +/* +************************************************************************************************************** +* NXP USB Host Stack +* +* (c) Copyright 2008, NXP SemiConductors +* (c) Copyright 2008, OnChip Technologies LLC +* All Rights Reserved +* +* www.nxp.com +* www.onchiptech.com +* +* File : usbhost_err.h +* Programmer(s) : Ravikanth.P +* Version : +* +************************************************************************************************************** +*/ + +#ifndef USBHOST_ERR_H +#define USBHOST_ERR_H + + +/* +************************************************************************************************************** +* GENERAL DEFINITIONS +************************************************************************************************************** +*/ + +#define OK 0 +#define MATCH_FOUND 0 + +/* +************************************************************************************************************** +* HOST CONTROLLER SPECIFIC ERROR CODES +************************************************************************************************************** +*/ + +#define ERR_TD_FAIL -1 + +/* +************************************************************************************************************** +* MASS STORAGE SPECIFIC ERROR CODES +************************************************************************************************************** +*/ + +#define ERR_MS_CMD_FAILED -10 +#define ERR_BAD_CONFIGURATION -11 +#define ERR_NO_MS_INTERFACE -12 + +/* +************************************************************************************************************** +* FAT SPECIFIC ERROR CODES +************************************************************************************************************** +*/ + +#define MATCH_NOT_FOUND -20 +#define ERR_FAT_NOT_SUPPORTED -21 +#define ERR_OPEN_LIMIT_REACHED -22 +#define ERR_INVALID_BOOT_SIG -23 +#define ERR_INVALID_BOOT_SEC -24 +#define ERR_ROOT_DIR_FULL -25 + +#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/USBHostLite/usbhost_inc.h Wed Aug 07 12:35:04 2013 +0000 @@ -0,0 +1,39 @@ +/* +************************************************************************************************************** +* NXP USB Host Stack +* +* (c) Copyright 2008, NXP SemiConductors +* (c) Copyright 2008, OnChip Technologies LLC +* All Rights Reserved +* +* www.nxp.com +* www.onchiptech.com +* +* File : usbhost_inc.h +* Programmer(s) : Ravikanth.P +* Version : +* +************************************************************************************************************** +*/ + +#ifndef USBHOST_INC_H +#define USBHOST_INC_H + +/* +************************************************************************************************************** +* INCLUDE HEADER FILES +************************************************************************************************************** +*/ + +#include "usbhost_cpu.h" +#include "usbhost_err.h" +#include "usbhost_lpc17xx.h" +#include "usbhost_ms.h" +#include "mbed.h" + + +#ifdef TARGET_LPC2368 +#error "There is no USB host on the LPC2368!" +#endif + +#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHostLite/usbhost_lpc17xx.cpp Wed Aug 07 12:35:04 2013 +0000
@@ -0,0 +1,820 @@
+/*
+**************************************************************************************************************
+* NXP USB Host Stack
+*
+* (c) Copyright 2008, NXP SemiConductors
+* (c) Copyright 2008, OnChip Technologies LLC
+* All Rights Reserved
+*
+* www.nxp.com
+* www.onchiptech.com
+*
+* File : usbhost_lpc17xx.c
+* Programmer(s) : Ravikanth.P
+* Version :
+*
+**************************************************************************************************************
+*/
+
+/*
+**************************************************************************************************************
+* INCLUDE HEADER FILES
+**************************************************************************************************************
+*/
+
+#include "usbhost_lpc17xx.h"
+
+/*
+**************************************************************************************************************
+* GLOBAL VARIABLES
+**************************************************************************************************************
+*/
+int gUSBConnected;
+
+volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
+volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
+volatile USB_INT08U HOST_TDControlStatus = 0;
+volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
+volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
+volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
+volatile HCTD *TDHead; /* Head transfer descriptor structure */
+volatile HCTD *TDTail; /* Tail transfer descriptor structure */
+volatile HCCA *Hcca; /* Host Controller Communications Area structure */
+ USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
+volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
+
+// USB host structures
+// AHB SRAM block 1
+#define HOSTBASEADDR 0x2007C000
+// reserve memory for the linker
+static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
+/*
+**************************************************************************************************************
+* DELAY IN MILLI SECONDS
+*
+* Description: This function provides a delay in milli seconds
+*
+* Arguments : delay The delay required
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void Host_DelayMS (USB_INT32U delay)
+{
+ volatile USB_INT32U i;
+
+
+ for (i = 0; i < delay; i++) {
+ Host_DelayUS(1000);
+ }
+}
+
+/*
+**************************************************************************************************************
+* DELAY IN MICRO SECONDS
+*
+* Description: This function provides a delay in micro seconds
+*
+* Arguments : delay The delay required
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void Host_DelayUS (USB_INT32U delay)
+{
+ volatile USB_INT32U i;
+
+
+ for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
+ ;
+ }
+}
+
+// bits of the USB/OTG clock control register
+#define HOST_CLK_EN (1<<0)
+#define DEV_CLK_EN (1<<1)
+#define PORTSEL_CLK_EN (1<<3)
+#define AHB_CLK_EN (1<<4)
+
+// bits of the USB/OTG clock status register
+#define HOST_CLK_ON (1<<0)
+#define DEV_CLK_ON (1<<1)
+#define PORTSEL_CLK_ON (1<<3)
+#define AHB_CLK_ON (1<<4)
+
+// we need host clock, OTG/portsel clock and AHB clock
+#define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
+
+/*
+**************************************************************************************************************
+* INITIALIZE THE HOST CONTROLLER
+*
+* Description: This function initializes lpc17xx host controller
+*
+* Arguments : None
+*
+* Returns :
+*
+**************************************************************************************************************
+*/
+void Host_Init (void)
+{
+ PRINT_Log("In Host_Init\n");
+ NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
+
+ // turn on power for USB
+ LPC_SC->PCONP |= (1UL<<31);
+ // Enable USB host clock, port selection and AHB clock
+ LPC_USB->USBClkCtrl |= CLOCK_MASK;
+ // Wait for clocks to become available
+ while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
+ ;
+
+ // it seems the bits[0:1] mean the following
+ // 0: U1=device, U2=host
+ // 1: U1=host, U2=host
+ // 2: reserved
+ // 3: U1=host, U2=device
+ // NB: this register is only available if OTG clock (aka "port select") is enabled!!
+ // since we don't care about port 2, set just bit 0 to 1 (U1=host)
+ LPC_USB->OTGStCtrl |= 1;
+
+ // now that we've configured the ports, we can turn off the portsel clock
+ LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
+
+ // power pins are not connected on mbed, so we can skip them
+ /* P1[18] = USB_UP_LED, 01 */
+ /* P1[19] = /USB_PPWR, 10 */
+ /* P1[22] = USB_PWRD, 10 */
+ /* P1[27] = /USB_OVRCR, 10 */
+ /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
+ LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
+ */
+
+ // configure USB D+/D- pins
+ /* P0[29] = USB_D+, 01 */
+ /* P0[30] = USB_D-, 01 */
+ LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
+ LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
+
+ PRINT_Log("Initializing Host Stack\n");
+
+ Hcca = (volatile HCCA *)(HostBuf+0x000);
+ TDHead = (volatile HCTD *)(HostBuf+0x100);
+ TDTail = (volatile HCTD *)(HostBuf+0x110);
+ EDCtrl = (volatile HCED *)(HostBuf+0x120);
+ EDBulkIn = (volatile HCED *)(HostBuf+0x130);
+ EDBulkOut = (volatile HCED *)(HostBuf+0x140);
+ TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
+
+ /* Initialize all the TDs, EDs and HCCA to 0 */
+ Host_EDInit(EDCtrl);
+ Host_EDInit(EDBulkIn);
+ Host_EDInit(EDBulkOut);
+ Host_TDInit(TDHead);
+ Host_TDInit(TDTail);
+ Host_HCCAInit(Hcca);
+
+ Host_DelayMS(50); /* Wait 50 ms before apply reset */
+ LPC_USB->HcControl = 0; /* HARDWARE RESET */
+ LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
+ LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
+
+ /* SOFTWARE RESET */
+ LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
+ LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
+
+ /* Put HC in operational state */
+ LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
+ LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
+
+ LPC_USB->HcHCCA = (USB_INT32U)Hcca;
+ LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
+
+
+ LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
+ OR_INTR_ENABLE_WDH |
+ OR_INTR_ENABLE_RHSC;
+
+ NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
+ /* Enable the USB Interrupt */
+ NVIC_EnableIRQ(USB_IRQn);
+ PRINT_Log("Host Initialized\n");
+}
+
+/*
+**************************************************************************************************************
+* INTERRUPT SERVICE ROUTINE
+*
+* Description: This function services the interrupt caused by host controller
+*
+* Arguments : None
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void USB_IRQHandler (void) __irq
+{
+ USB_INT32U int_status;
+ USB_INT32U ie_status;
+
+ int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
+ ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
+
+ if (!(int_status & ie_status)) {
+ return;
+ } else {
+
+ int_status = int_status & ie_status;
+ if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
+ if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
+ if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
+ /*
+ * When DRWE is on, Connect Status Change
+ * means a remote wakeup event.
+ */
+ HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
+ }
+ else {
+ /*
+ * When DRWE is off, Connect Status Change
+ * is NOT a remote wakeup event
+ */
+ if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
+ if (!gUSBConnected) {
+ HOST_TDControlStatus = 0;
+ HOST_WdhIntr = 0;
+ HOST_RhscIntr = 1;
+ gUSBConnected = 1;
+ }
+ else
+ PRINT_Log("Spurious status change (connected)?\n");
+ } else {
+ if (gUSBConnected) {
+ LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
+ HOST_RhscIntr = 0;
+ gUSBConnected = 0;
+ }
+ else
+ PRINT_Log("Spurious status change (disconnected)?\n");
+ }
+ }
+ LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
+ }
+ if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
+ LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
+ }
+ }
+ if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
+ HOST_WdhIntr = 1;
+ HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
+ }
+ LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
+ }
+ return;
+}
+
+/*
+**************************************************************************************************************
+* PROCESS TRANSFER DESCRIPTOR
+*
+* Description: This function processes the transfer descriptor
+*
+* Arguments : ed Endpoint descriptor that contains this transfer descriptor
+* token SETUP, IN, OUT
+* buffer Current Buffer Pointer of the transfer descriptor
+* buffer_len Length of the buffer
+*
+* Returns : OK if TD submission is successful
+* ERROR if TD submission fails
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S Host_ProcessTD (volatile HCED *ed,
+ volatile USB_INT32U token,
+ volatile USB_INT08U *buffer,
+ USB_INT32U buffer_len)
+{
+ volatile USB_INT32U td_toggle;
+
+
+ if (ed == EDCtrl) {
+ if (token == TD_SETUP) {
+ td_toggle = TD_TOGGLE_0;
+ } else {
+ td_toggle = TD_TOGGLE_1;
+ }
+ } else {
+ td_toggle = 0;
+ }
+ TDHead->Control = (TD_ROUNDING |
+ token |
+ TD_DELAY_INT(0) |
+ td_toggle |
+ TD_CC);
+ TDTail->Control = 0;
+ TDHead->CurrBufPtr = (USB_INT32U) buffer;
+ TDTail->CurrBufPtr = 0;
+ TDHead->Next = (USB_INT32U) TDTail;
+ TDTail->Next = 0;
+ TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
+ TDTail->BufEnd = 0;
+
+ ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
+ ed->TailTd = (USB_INT32U)TDTail;
+ ed->Next = 0;
+
+ if (ed == EDCtrl) {
+ LPC_USB->HcControlHeadED = (USB_INT32U)ed;
+ LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
+ LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
+ } else {
+ LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
+ LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
+ LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
+ }
+
+ Host_WDHWait();
+
+// if (!(TDHead->Control & 0xF0000000)) {
+ if (!HOST_TDControlStatus) {
+ return (OK);
+ } else {
+ return (ERR_TD_FAIL);
+ }
+}
+
+/*
+**************************************************************************************************************
+* ENUMERATE THE DEVICE
+*
+* Description: This function is used to enumerate the device connected
+*
+* Arguments : None
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S Host_EnumDev (void)
+{
+ USB_INT32S rc;
+
+ PRINT_Log("Connect a Mass Storage device\n");
+ while (!HOST_RhscIntr)
+ __WFI();
+ Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
+ LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
+ while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
+ __WFI(); // Wait for port reset to complete...
+ LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
+ Host_DelayMS(200); /* Wait for 100 MS after port reset */
+
+ EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
+ /* Read first 8 bytes of device desc */
+ rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
+ if (rc != OK) {
+ PRINT_Err(rc);
+ return (rc);
+ }
+ EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
+ rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
+ if (rc != OK) {
+ PRINT_Err(rc);
+ return (rc);
+ }
+ Host_DelayMS(2);
+ EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
+ /* Get the configuration descriptor */
+ rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
+ if (rc != OK) {
+ PRINT_Err(rc);
+ return (rc);
+ }
+ /* Get the first configuration data */
+ rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
+ if (rc != OK) {
+ PRINT_Err(rc);
+ return (rc);
+ }
+ rc = MS_ParseConfiguration(); /* Parse the configuration */
+ if (rc != OK) {
+ PRINT_Err(rc);
+ return (rc);
+ }
+ rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
+ if (rc != OK) {
+ PRINT_Err(rc);
+ }
+ Host_DelayMS(100); /* Some devices may require this delay */
+ return (rc);
+}
+
+/*
+**************************************************************************************************************
+* RECEIVE THE CONTROL INFORMATION
+*
+* Description: This function is used to receive the control information
+*
+* Arguments : bm_request_type
+* b_request
+* w_value
+* w_index
+* w_length
+* buffer
+*
+* Returns : OK if Success
+* ERROR if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
+ USB_INT08U b_request,
+ USB_INT16U w_value,
+ USB_INT16U w_index,
+ USB_INT16U w_length,
+ volatile USB_INT08U *buffer)
+{
+ USB_INT32S rc;
+
+
+ Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
+ rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
+ if (rc == OK) {
+ if (w_length) {
+ rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
+ }
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
+ }
+ }
+ return (rc);
+}
+
+/*
+**************************************************************************************************************
+* SEND THE CONTROL INFORMATION
+*
+* Description: This function is used to send the control information
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERR_INVALID_BOOTSIG if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
+ USB_INT08U b_request,
+ USB_INT16U w_value,
+ USB_INT16U w_index,
+ USB_INT16U w_length,
+ volatile USB_INT08U *buffer)
+{
+ USB_INT32S rc;
+
+
+ Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
+
+ rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
+ if (rc == OK) {
+ if (w_length) {
+ rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
+ }
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
+ }
+ }
+ return (rc);
+}
+
+/*
+**************************************************************************************************************
+* FILL SETUP PACKET
+*
+* Description: This function is used to fill the setup packet
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERR_INVALID_BOOTSIG if Failed
+*
+**************************************************************************************************************
+*/
+
+void Host_FillSetup (USB_INT08U bm_request_type,
+ USB_INT08U b_request,
+ USB_INT16U w_value,
+ USB_INT16U w_index,
+ USB_INT16U w_length)
+{
+ int i;
+ for (i=0;i<w_length;i++)
+ TDBuffer[i] = 0;
+
+ TDBuffer[0] = bm_request_type;
+ TDBuffer[1] = b_request;
+ WriteLE16U(&TDBuffer[2], w_value);
+ WriteLE16U(&TDBuffer[4], w_index);
+ WriteLE16U(&TDBuffer[6], w_length);
+}
+
+
+
+/*
+**************************************************************************************************************
+* INITIALIZE THE TRANSFER DESCRIPTOR
+*
+* Description: This function initializes transfer descriptor
+*
+* Arguments : Pointer to TD structure
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void Host_TDInit (volatile HCTD *td)
+{
+
+ td->Control = 0;
+ td->CurrBufPtr = 0;
+ td->Next = 0;
+ td->BufEnd = 0;
+}
+
+/*
+**************************************************************************************************************
+* INITIALIZE THE ENDPOINT DESCRIPTOR
+*
+* Description: This function initializes endpoint descriptor
+*
+* Arguments : Pointer to ED strcuture
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void Host_EDInit (volatile HCED *ed)
+{
+
+ ed->Control = 0;
+ ed->TailTd = 0;
+ ed->HeadTd = 0;
+ ed->Next = 0;
+}
+
+/*
+**************************************************************************************************************
+* INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
+*
+* Description: This function initializes host controller communications area
+*
+* Arguments : Pointer to HCCA
+*
+* Returns :
+*
+**************************************************************************************************************
+*/
+
+void Host_HCCAInit (volatile HCCA *hcca)
+{
+ USB_INT32U i;
+
+
+ for (i = 0; i < 32; i++) {
+
+ hcca->IntTable[i] = 0;
+ hcca->FrameNumber = 0;
+ hcca->DoneHead = 0;
+ }
+
+}
+
+/*
+**************************************************************************************************************
+* WAIT FOR WDH INTERRUPT
+*
+* Description: This function is infinite loop which breaks when ever a WDH interrupt rises
+*
+* Arguments : None
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void Host_WDHWait (void)
+{
+ while (!HOST_WdhIntr)
+ __WFI();
+
+ HOST_WdhIntr = 0;
+}
+
+/*
+**************************************************************************************************************
+* READ LE 32U
+*
+* Description: This function is used to read an unsigned integer from a character buffer in the platform
+* containing little endian processor
+*
+* Arguments : pmem Pointer to the character buffer
+*
+* Returns : val Unsigned integer
+*
+**************************************************************************************************************
+*/
+
+USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
+{
+ USB_INT32U val = *(USB_INT32U*)pmem;
+#ifdef __BIG_ENDIAN
+ return __REV(val);
+#else
+ return val;
+#endif
+}
+
+/*
+**************************************************************************************************************
+* WRITE LE 32U
+*
+* Description: This function is used to write an unsigned integer into a charecter buffer in the platform
+* containing little endian processor.
+*
+* Arguments : pmem Pointer to the charecter buffer
+* val Integer value to be placed in the charecter buffer
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void WriteLE32U (volatile USB_INT08U *pmem,
+ USB_INT32U val)
+{
+#ifdef __BIG_ENDIAN
+ *(USB_INT32U*)pmem = __REV(val);
+#else
+ *(USB_INT32U*)pmem = val;
+#endif
+}
+
+/*
+**************************************************************************************************************
+* READ LE 16U
+*
+* Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
+* containing little endian processor
+*
+* Arguments : pmem Pointer to the charecter buffer
+*
+* Returns : val Unsigned short integer
+*
+**************************************************************************************************************
+*/
+
+USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
+{
+ USB_INT16U val = *(USB_INT16U*)pmem;
+#ifdef __BIG_ENDIAN
+ return __REV16(val);
+#else
+ return val;
+#endif
+}
+
+/*
+**************************************************************************************************************
+* WRITE LE 16U
+*
+* Description: This function is used to write an unsigned short integer into a charecter buffer in the
+* platform containing little endian processor
+*
+* Arguments : pmem Pointer to the charecter buffer
+* val Value to be placed in the charecter buffer
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void WriteLE16U (volatile USB_INT08U *pmem,
+ USB_INT16U val)
+{
+#ifdef __BIG_ENDIAN
+ *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
+#else
+ *(USB_INT16U*)pmem = val;
+#endif
+}
+
+/*
+**************************************************************************************************************
+* READ BE 32U
+*
+* Description: This function is used to read an unsigned integer from a charecter buffer in the platform
+* containing big endian processor
+*
+* Arguments : pmem Pointer to the charecter buffer
+*
+* Returns : val Unsigned integer
+*
+**************************************************************************************************************
+*/
+
+USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
+{
+ USB_INT32U val = *(USB_INT32U*)pmem;
+#ifdef __BIG_ENDIAN
+ return val;
+#else
+ return __REV(val);
+#endif
+}
+
+/*
+**************************************************************************************************************
+* WRITE BE 32U
+*
+* Description: This function is used to write an unsigned integer into a charecter buffer in the platform
+* containing big endian processor
+*
+* Arguments : pmem Pointer to the charecter buffer
+* val Value to be placed in the charecter buffer
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void WriteBE32U (volatile USB_INT08U *pmem,
+ USB_INT32U val)
+{
+#ifdef __BIG_ENDIAN
+ *(USB_INT32U*)pmem = val;
+#else
+ *(USB_INT32U*)pmem = __REV(val);
+#endif
+}
+
+/*
+**************************************************************************************************************
+* READ BE 16U
+*
+* Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
+* containing big endian processor
+*
+* Arguments : pmem Pointer to the charecter buffer
+*
+* Returns : val Unsigned short integer
+*
+**************************************************************************************************************
+*/
+
+USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
+{
+ USB_INT16U val = *(USB_INT16U*)pmem;
+#ifdef __BIG_ENDIAN
+ return val;
+#else
+ return __REV16(val);
+#endif
+}
+
+/*
+**************************************************************************************************************
+* WRITE BE 16U
+*
+* Description: This function is used to write an unsigned short integer into the charecter buffer in the
+* platform containing big endian processor
+*
+* Arguments : pmem Pointer to the charecter buffer
+* val Value to be placed in the charecter buffer
+*
+* Returns : None
+*
+**************************************************************************************************************
+*/
+
+void WriteBE16U (volatile USB_INT08U *pmem,
+ USB_INT16U val)
+{
+#ifdef __BIG_ENDIAN
+ *(USB_INT16U*)pmem = val;
+#else
+ *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
+#endif
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHostLite/usbhost_lpc17xx.h Wed Aug 07 12:35:04 2013 +0000
@@ -0,0 +1,254 @@
+/*
+**************************************************************************************************************
+* NXP USB Host Stack
+*
+* (c) Copyright 2008, NXP SemiConductors
+* (c) Copyright 2008, OnChip Technologies LLC
+* All Rights Reserved
+*
+* www.nxp.com
+* www.onchiptech.com
+*
+* File : usbhost_lpc17xx.h
+* Programmer(s) : Ravikanth.P
+* Version :
+*
+**************************************************************************************************************
+*/
+
+#ifndef USBHOST_LPC17xx_H
+#define USBHOST_LPC17xx_H
+
+/*
+**************************************************************************************************************
+* INCLUDE HEADER FILES
+**************************************************************************************************************
+*/
+
+#include "usbhost_inc.h"
+
+/*
+**************************************************************************************************************
+* PRINT CONFIGURATION
+**************************************************************************************************************
+*/
+
+#define PRINT_ENABLE 0
+
+#if PRINT_ENABLE
+#define PRINT_Log(...) printf(__VA_ARGS__)
+#define PRINT_Err(rc) printf("ERROR: In %s at Line %u - rc = %d\n", __FUNCTION__, __LINE__, rc)
+
+#else
+#define PRINT_Log(...) do {} while(0)
+#define PRINT_Err(rc) do {} while(0)
+
+#endif
+
+/*
+**************************************************************************************************************
+* GENERAL DEFINITIONS
+**************************************************************************************************************
+*/
+
+#define DESC_LENGTH(x) x[0]
+#define DESC_TYPE(x) x[1]
+
+
+#define HOST_GET_DESCRIPTOR(descType, descIndex, data, length) \
+ Host_CtrlRecv(USB_DEVICE_TO_HOST | USB_RECIPIENT_DEVICE, GET_DESCRIPTOR, \
+ (descType << 8)|(descIndex), 0, length, data)
+
+#define HOST_SET_ADDRESS(new_addr) \
+ Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_ADDRESS, \
+ new_addr, 0, 0, NULL)
+
+#define USBH_SET_CONFIGURATION(configNum) \
+ Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_CONFIGURATION, \
+ configNum, 0, 0, NULL)
+
+#define USBH_SET_INTERFACE(ifNum, altNum) \
+ Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_INTERFACE, SET_INTERFACE, \
+ altNum, ifNum, 0, NULL)
+
+/*
+**************************************************************************************************************
+* OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
+**************************************************************************************************************
+*/
+
+ /* ------------------ HcControl Register --------------------- */
+#define OR_CONTROL_CLE 0x00000010
+#define OR_CONTROL_BLE 0x00000020
+#define OR_CONTROL_HCFS 0x000000C0
+#define OR_CONTROL_HC_OPER 0x00000080
+ /* ----------------- HcCommandStatus Register ----------------- */
+#define OR_CMD_STATUS_HCR 0x00000001
+#define OR_CMD_STATUS_CLF 0x00000002
+#define OR_CMD_STATUS_BLF 0x00000004
+ /* --------------- HcInterruptStatus Register ----------------- */
+#define OR_INTR_STATUS_WDH 0x00000002
+#define OR_INTR_STATUS_RHSC 0x00000040
+ /* --------------- HcInterruptEnable Register ----------------- */
+#define OR_INTR_ENABLE_WDH 0x00000002
+#define OR_INTR_ENABLE_RHSC 0x00000040
+#define OR_INTR_ENABLE_MIE 0x80000000
+ /* ---------------- HcRhDescriptorA Register ------------------ */
+#define OR_RH_STATUS_LPSC 0x00010000
+#define OR_RH_STATUS_DRWE 0x00008000
+ /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
+#define OR_RH_PORT_CCS 0x00000001
+#define OR_RH_PORT_PRS 0x00000010
+#define OR_RH_PORT_CSC 0x00010000
+#define OR_RH_PORT_PRSC 0x00100000
+
+
+/*
+**************************************************************************************************************
+* FRAME INTERVAL
+**************************************************************************************************************
+*/
+
+#define FI 0x2EDF /* 12000 bits per frame (-1) */
+#define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
+
+/*
+**************************************************************************************************************
+* TRANSFER DESCRIPTOR CONTROL FIELDS
+**************************************************************************************************************
+*/
+
+#define TD_ROUNDING (USB_INT32U) (0x00040000) /* Buffer Rounding */
+#define TD_SETUP (USB_INT32U)(0) /* Direction of Setup Packet */
+#define TD_IN (USB_INT32U)(0x00100000) /* Direction In */
+#define TD_OUT (USB_INT32U)(0x00080000) /* Direction Out */
+#define TD_DELAY_INT(x) (USB_INT32U)((x) << 21) /* Delay Interrupt */
+#define TD_TOGGLE_0 (USB_INT32U)(0x02000000) /* Toggle 0 */
+#define TD_TOGGLE_1 (USB_INT32U)(0x03000000) /* Toggle 1 */
+#define TD_CC (USB_INT32U)(0xF0000000) /* Completion Code */
+
+/*
+**************************************************************************************************************
+* USB STANDARD REQUEST DEFINITIONS
+**************************************************************************************************************
+*/
+
+#define USB_DESCRIPTOR_TYPE_DEVICE 1
+#define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
+#define USB_DESCRIPTOR_TYPE_INTERFACE 4
+#define USB_DESCRIPTOR_TYPE_ENDPOINT 5
+ /* ----------- Control RequestType Fields ----------- */
+#define USB_DEVICE_TO_HOST 0x80
+#define USB_HOST_TO_DEVICE 0x00
+#define USB_REQUEST_TYPE_CLASS 0x20
+#define USB_RECIPIENT_DEVICE 0x00
+#define USB_RECIPIENT_INTERFACE 0x01
+ /* -------------- USB Standard Requests -------------- */
+#define SET_ADDRESS 5
+#define GET_DESCRIPTOR 6
+#define SET_CONFIGURATION 9
+#define SET_INTERFACE 11
+
+/*
+**************************************************************************************************************
+* TYPE DEFINITIONS
+**************************************************************************************************************
+*/
+
+typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
+ volatile USB_INT32U Control; /* Endpoint descriptor control */
+ volatile USB_INT32U TailTd; /* Physical address of tail in Transfer descriptor list */
+ volatile USB_INT32U HeadTd; /* Physcial address of head in Transfer descriptor list */
+ volatile USB_INT32U Next; /* Physical address of next Endpoint descriptor */
+} HCED;
+
+typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
+ volatile USB_INT32U Control; /* Transfer descriptor control */
+ volatile USB_INT32U CurrBufPtr; /* Physical address of current buffer pointer */
+ volatile USB_INT32U Next; /* Physical pointer to next Transfer Descriptor */
+ volatile USB_INT32U BufEnd; /* Physical address of end of buffer */
+} HCTD;
+
+typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
+ volatile USB_INT32U IntTable[32]; /* Interrupt Table */
+ volatile USB_INT32U FrameNumber; /* Frame Number */
+ volatile USB_INT32U DoneHead; /* Done Head */
+ volatile USB_INT08U Reserved[116]; /* Reserved for future use */
+ volatile USB_INT08U Unknown[4]; /* Unused */
+} HCCA;
+
+/*
+**************************************************************************************************************
+* EXTERN DECLARATIONS
+**************************************************************************************************************
+*/
+
+extern volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
+extern volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
+extern volatile HCTD *TDHead; /* Head transfer descriptor structure */
+extern volatile HCTD *TDTail; /* Tail transfer descriptor structure */
+extern volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
+
+/*
+**************************************************************************************************************
+* FUNCTION PROTOTYPES
+**************************************************************************************************************
+*/
+
+void Host_Init (void);
+
+extern "C" void USB_IRQHandler(void) __irq;
+
+USB_INT32S Host_EnumDev (void);
+
+USB_INT32S Host_ProcessTD(volatile HCED *ed,
+ volatile USB_INT32U token,
+ volatile USB_INT08U *buffer,
+ USB_INT32U buffer_len);
+
+void Host_DelayUS ( USB_INT32U delay);
+void Host_DelayMS ( USB_INT32U delay);
+
+
+void Host_TDInit (volatile HCTD *td);
+void Host_EDInit (volatile HCED *ed);
+void Host_HCCAInit (volatile HCCA *hcca);
+
+USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
+ USB_INT08U b_request,
+ USB_INT16U w_value,
+ USB_INT16U w_index,
+ USB_INT16U w_length,
+ volatile USB_INT08U *buffer);
+
+USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
+ USB_INT08U b_request,
+ USB_INT16U w_value,
+ USB_INT16U w_index,
+ USB_INT16U w_length,
+ volatile USB_INT08U *buffer);
+
+void Host_FillSetup( USB_INT08U bm_request_type,
+ USB_INT08U b_request,
+ USB_INT16U w_value,
+ USB_INT16U w_index,
+ USB_INT16U w_length);
+
+
+void Host_WDHWait (void);
+
+
+USB_INT32U ReadLE32U (volatile USB_INT08U *pmem);
+void WriteLE32U (volatile USB_INT08U *pmem,
+ USB_INT32U val);
+USB_INT16U ReadLE16U (volatile USB_INT08U *pmem);
+void WriteLE16U (volatile USB_INT08U *pmem,
+ USB_INT16U val);
+USB_INT32U ReadBE32U (volatile USB_INT08U *pmem);
+void WriteBE32U (volatile USB_INT08U *pmem,
+ USB_INT32U val);
+USB_INT16U ReadBE16U (volatile USB_INT08U *pmem);
+void WriteBE16U (volatile USB_INT08U *pmem,
+ USB_INT16U val);
+
+#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHostLite/usbhost_ms.cpp Wed Aug 07 12:35:04 2013 +0000
@@ -0,0 +1,455 @@
+/*
+**************************************************************************************************************
+* NXP USB Host Stack
+*
+* (c) Copyright 2008, NXP SemiConductors
+* (c) Copyright 2008, OnChip Technologies LLC
+* All Rights Reserved
+*
+* www.nxp.com
+* www.onchiptech.com
+*
+* File : usbhost_ms.c
+* Programmer(s) : Ravikanth.P
+* Version :
+*
+**************************************************************************************************************
+*/
+
+/*
+**************************************************************************************************************
+* INCLUDE HEADER FILES
+**************************************************************************************************************
+*/
+
+#include "usbhost_ms.h"
+
+/*
+**************************************************************************************************************
+* GLOBAL VARIABLES
+**************************************************************************************************************
+*/
+
+USB_INT32U MS_BlkSize;
+
+/*
+**************************************************************************************************************
+* INITIALIZE MASS STORAGE INTERFACE
+*
+* Description: This function initializes the mass storage interface
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERR_INVALID_BOOTSIG if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S MS_Init (USB_INT32U *blkSize, USB_INT32U *numBlks, USB_INT08U *inquiryResult)
+{
+ USB_INT08U retry;
+ USB_INT32S rc;
+
+ MS_GetMaxLUN(); /* Get maximum logical unit number */
+ retry = 80;
+ while(retry) {
+ rc = MS_TestUnitReady(); /* Test whether the unit is ready */
+ if (rc == OK) {
+ break;
+ }
+ MS_GetSenseInfo(); /* Get sense information */
+ retry--;
+ }
+ if (rc != OK) {
+ PRINT_Err(rc);
+ return (rc);
+ }
+ rc = MS_ReadCapacity(numBlks, blkSize); /* Read capacity of the disk */
+ MS_BlkSize = *blkSize; // Set global
+ rc = MS_Inquire (inquiryResult);
+ return (rc);
+}
+/*
+**************************************************************************************************************
+* PARSE THE CONFIGURATION
+*
+* Description: This function is used to parse the configuration
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERR_INVALID_BOOTSIG if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S MS_ParseConfiguration (void)
+{
+ volatile USB_INT08U *desc_ptr;
+ USB_INT08U ms_int_found;
+
+
+ desc_ptr = TDBuffer;
+ ms_int_found = 0;
+
+ if (desc_ptr[1] != USB_DESCRIPTOR_TYPE_CONFIGURATION) {
+ return (ERR_BAD_CONFIGURATION);
+ }
+ desc_ptr += desc_ptr[0];
+
+ while (desc_ptr != TDBuffer + ReadLE16U(&TDBuffer[2])) {
+
+ switch (desc_ptr[1]) {
+
+ case USB_DESCRIPTOR_TYPE_INTERFACE: /* If it is an interface descriptor */
+ if (desc_ptr[5] == MASS_STORAGE_CLASS && /* check if the class is mass storage */
+ desc_ptr[6] == MASS_STORAGE_SUBCLASS_SCSI && /* check if the subclass is SCSI */
+ desc_ptr[7] == MASS_STORAGE_PROTOCOL_BO) { /* check if the protocol is Bulk only */
+ ms_int_found = 1;
+ desc_ptr += desc_ptr[0]; /* Move to next descriptor start */
+ }
+ break;
+
+ case USB_DESCRIPTOR_TYPE_ENDPOINT: /* If it is an endpoint descriptor */
+ if ((desc_ptr[3] & 0x03) == 0x02) { /* If it is Bulk endpoint */
+ if (desc_ptr[2] & 0x80) { /* If it is In endpoint */
+ EDBulkIn->Control = 1 | /* USB address */
+ ((desc_ptr[2] & 0x7F) << 7) | /* Endpoint address */
+ (2 << 11) | /* direction */
+ (ReadLE16U(&desc_ptr[4]) << 16); /* MaxPkt Size */
+ desc_ptr += desc_ptr[0]; /* Move to next descriptor start */
+ } else { /* If it is Out endpoint */
+ EDBulkOut->Control = 1 | /* USB address */
+ ((desc_ptr[2] & 0x7F) << 7) | /* Endpoint address */
+ (1 << 11) | /* direction */
+ (ReadLE16U(&desc_ptr[4]) << 16); /* MaxPkt Size */
+ desc_ptr += desc_ptr[0]; /* Move to next descriptor start */
+ }
+ } else { /* If it is not bulk end point */
+ desc_ptr += desc_ptr[0]; /* Move to next descriptor start */
+ }
+ break;
+
+ default: /* If the descriptor is neither interface nor endpoint */
+ desc_ptr += desc_ptr[0]; /* Move to next descriptor start */
+ break;
+ }
+ }
+ if (ms_int_found) {
+ PRINT_Log("Mass Storage device connected\n");
+ return (OK);
+ } else {
+ PRINT_Log("Not a Mass Storage device\n");
+ return (ERR_NO_MS_INTERFACE);
+ }
+}
+
+/*
+**************************************************************************************************************
+* GET MAXIMUM LOGICAL UNIT
+*
+* Description: This function returns the maximum logical unit from the device
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERR_INVALID_BOOTSIG if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S MS_GetMaxLUN (void)
+{
+ USB_INT32S rc;
+
+
+ rc = Host_CtrlRecv(USB_DEVICE_TO_HOST | USB_REQUEST_TYPE_CLASS | USB_RECIPIENT_INTERFACE,
+ MS_GET_MAX_LUN_REQ,
+ 0,
+ 0,
+ 1,
+ TDBuffer);
+ return (rc);
+}
+
+/*
+**************************************************************************************************************
+* GET SENSE INFORMATION
+*
+* Description: This function is used to get sense information from the device
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERROR if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S MS_GetSenseInfo (void)
+{
+ USB_INT32S rc;
+
+
+ Fill_MSCommand(0, 0, 0, MS_DATA_DIR_IN, SCSI_CMD_REQUEST_SENSE, 6);
+ rc = Host_ProcessTD(EDBulkOut, TD_OUT, TDBuffer, CBW_SIZE);
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, TDBuffer, 18);
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, TDBuffer, CSW_SIZE);
+ if (rc == OK) {
+ if (TDBuffer[12] != 0) {
+ rc = ERR_MS_CMD_FAILED;
+ }
+ }
+ }
+ }
+ return (rc);
+}
+
+/*
+**************************************************************************************************************
+* TEST UNIT READY
+*
+* Description: This function is used to test whether the unit is ready or not
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERROR if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S MS_TestUnitReady (void)
+{
+ USB_INT32S rc;
+
+
+ Fill_MSCommand(0, 0, 0, MS_DATA_DIR_NONE, SCSI_CMD_TEST_UNIT_READY, 6);
+ rc = Host_ProcessTD(EDBulkOut, TD_OUT, TDBuffer, CBW_SIZE);
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, TDBuffer, CSW_SIZE);
+ if (rc == OK) {
+ if (TDBuffer[12] != 0) {
+ rc = ERR_MS_CMD_FAILED;
+ }
+ }
+ }
+ return (rc);
+}
+
+/*
+**************************************************************************************************************
+* READ CAPACITY
+*
+* Description: This function is used to read the capacity of the mass storage device
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERROR if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S MS_ReadCapacity (USB_INT32U *numBlks, USB_INT32U *blkSize)
+{
+ USB_INT32S rc;
+
+
+ Fill_MSCommand(0, 0, 0, MS_DATA_DIR_IN, SCSI_CMD_READ_CAPACITY, 10);
+ rc = Host_ProcessTD(EDBulkOut, TD_OUT, TDBuffer, CBW_SIZE);
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, TDBuffer, 8);
+ if (rc == OK) {
+ if (numBlks)
+ *numBlks = ReadBE32U(&TDBuffer[0]);
+ if (blkSize)
+ *blkSize = ReadBE32U(&TDBuffer[4]);
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, TDBuffer, CSW_SIZE);
+ if (rc == OK) {
+ if (TDBuffer[12] != 0) {
+ rc = ERR_MS_CMD_FAILED;
+ }
+ }
+ }
+ }
+ return (rc);
+}
+
+
+
+USB_INT32S MS_Inquire (USB_INT08U *response)
+{
+ USB_INT32S rc;
+ USB_INT32U i;
+
+ Fill_MSCommand(0, 0, 0, MS_DATA_DIR_IN, SCSI_CMD_INQUIRY, 6);
+ rc = Host_ProcessTD(EDBulkOut, TD_OUT, TDBuffer, CBW_SIZE);
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, TDBuffer, INQUIRY_LENGTH);
+ if (rc == OK) {
+ if (response) {
+ for ( i = 0; i < INQUIRY_LENGTH; i++ )
+ *response++ = *TDBuffer++;
+#if 0
+ MemCpy (response, TDBuffer, INQUIRY_LENGTH);
+ StrNullTrailingSpace (response->vendorID, SCSI_INQUIRY_VENDORCHARS);
+ StrNullTrailingSpace (response->productID, SCSI_INQUIRY_PRODUCTCHARS);
+ StrNullTrailingSpace (response->productRev, SCSI_INQUIRY_REVCHARS);
+#endif
+ }
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, TDBuffer, CSW_SIZE);
+ if (rc == OK) {
+ if (TDBuffer[12] != 0) { // bCSWStatus byte
+ rc = ERR_MS_CMD_FAILED;
+ }
+ }
+ }
+ }
+ return (rc);
+}
+
+/*
+**************************************************************************************************************
+* RECEIVE THE BULK DATA
+*
+* Description: This function is used to receive the bulk data
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERR_INVALID_BOOTSIG if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S MS_BulkRecv ( USB_INT32U block_number,
+ USB_INT16U num_blocks,
+ volatile USB_INT08U *user_buffer)
+{
+ USB_INT32S rc;
+ int i;
+ volatile USB_INT08U *c = user_buffer;
+ for (i=0;i<MS_BlkSize*num_blocks;i++)
+ *c++ = 0;
+
+
+ Fill_MSCommand(block_number, MS_BlkSize, num_blocks, MS_DATA_DIR_IN, SCSI_CMD_READ_10, 10);
+
+ rc = Host_ProcessTD(EDBulkOut, TD_OUT, TDBuffer, CBW_SIZE);
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, user_buffer, MS_BlkSize * num_blocks);
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, TDBuffer, CSW_SIZE);
+ if (rc == OK) {
+ if (TDBuffer[12] != 0) {
+ rc = ERR_MS_CMD_FAILED;
+ }
+ }
+ }
+ }
+ return (rc);
+}
+
+/*
+**************************************************************************************************************
+* SEND BULK DATA
+*
+* Description: This function is used to send the bulk data
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERR_INVALID_BOOTSIG if Failed
+*
+**************************************************************************************************************
+*/
+
+USB_INT32S MS_BulkSend ( USB_INT32U block_number,
+ USB_INT16U num_blocks,
+ volatile USB_INT08U *user_buffer)
+{
+ USB_INT32S rc;
+
+
+ Fill_MSCommand(block_number, MS_BlkSize, num_blocks, MS_DATA_DIR_OUT, SCSI_CMD_WRITE_10, 10);
+
+ rc = Host_ProcessTD(EDBulkOut, TD_OUT, TDBuffer, CBW_SIZE);
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDBulkOut, TD_OUT, user_buffer, MS_BlkSize * num_blocks);
+ if (rc == OK) {
+ rc = Host_ProcessTD(EDBulkIn, TD_IN, TDBuffer, CSW_SIZE);
+ if (rc == OK) {
+ if (TDBuffer[12] != 0) {
+ rc = ERR_MS_CMD_FAILED;
+ }
+ }
+ }
+ }
+ return (rc);
+}
+
+/*
+**************************************************************************************************************
+* FILL MASS STORAGE COMMAND
+*
+* Description: This function is used to fill the mass storage command
+*
+* Arguments : None
+*
+* Returns : OK if Success
+* ERR_INVALID_BOOTSIG if Failed
+*
+**************************************************************************************************************
+*/
+
+void Fill_MSCommand (USB_INT32U block_number,
+ USB_INT32U block_size,
+ USB_INT16U num_blocks,
+ MS_DATA_DIR direction,
+ USB_INT08U scsi_cmd,
+ USB_INT08U scsi_cmd_len)
+{
+ USB_INT32U data_len;
+ static USB_INT32U tag_cnt = 0;
+ USB_INT32U cnt;
+
+
+ for (cnt = 0; cnt < CBW_SIZE; cnt++) {
+ TDBuffer[cnt] = 0;
+ }
+ switch(scsi_cmd) {
+
+ case SCSI_CMD_TEST_UNIT_READY:
+ data_len = 0;
+ break;
+ case SCSI_CMD_READ_CAPACITY:
+ data_len = 8;
+ break;
+ case SCSI_CMD_REQUEST_SENSE:
+ data_len = 18;
+ break;
+ case SCSI_CMD_INQUIRY:
+ data_len = 36;
+ break;
+ default:
+ data_len = block_size * num_blocks;
+ break;
+ }
+ WriteLE32U(TDBuffer, CBW_SIGNATURE);
+ WriteLE32U(&TDBuffer[4], tag_cnt);
+ WriteLE32U(&TDBuffer[8], data_len);
+ TDBuffer[12] = (direction == MS_DATA_DIR_NONE) ? 0 : direction;
+ TDBuffer[14] = scsi_cmd_len; /* Length of the CBW */
+ TDBuffer[15] = scsi_cmd;
+ if ((scsi_cmd == SCSI_CMD_REQUEST_SENSE)
+ || (scsi_cmd == SCSI_CMD_INQUIRY)) {
+ TDBuffer[19] = (USB_INT08U)data_len;
+ } else {
+ WriteBE32U(&TDBuffer[17], block_number);
+ }
+ WriteBE16U(&TDBuffer[22], num_blocks);
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHostLite/usbhost_ms.h Wed Aug 07 12:35:04 2013 +0000
@@ -0,0 +1,101 @@
+/*
+**************************************************************************************************************
+* NXP USB Host Stack
+*
+* (c) Copyright 2008, NXP SemiConductors
+* (c) Copyright 2008, OnChip Technologies LLC
+* All Rights Reserved
+*
+* www.nxp.com
+* www.onchiptech.com
+*
+* File : usbhost_ms.h
+* Programmer(s) : Ravikanth.P
+* Version :
+*
+**************************************************************************************************************
+*/
+
+#ifndef USBHOST_MS_H
+#define USBHOST_MS_H
+
+/*
+**************************************************************************************************************
+* INCLUDE HEADER FILES
+**************************************************************************************************************
+*/
+
+#include "usbhost_inc.h"
+
+/*
+**************************************************************************************************************
+* MASS STORAGE SPECIFIC DEFINITIONS
+**************************************************************************************************************
+*/
+
+#define MS_GET_MAX_LUN_REQ 0xFE
+#define MASS_STORAGE_CLASS 0x08
+#define MASS_STORAGE_SUBCLASS_SCSI 0x06
+#define MASS_STORAGE_PROTOCOL_BO 0x50
+
+#define INQUIRY_LENGTH 36
+/*
+**************************************************************************************************************
+* SCSI SPECIFIC DEFINITIONS
+**************************************************************************************************************
+*/
+
+#define CBW_SIGNATURE 0x43425355
+#define CSW_SIGNATURE 0x53425355
+#define CBW_SIZE 31
+#define CSW_SIZE 13
+#define CSW_CMD_PASSED 0x00
+#define SCSI_CMD_REQUEST_SENSE 0x03
+#define SCSI_CMD_TEST_UNIT_READY 0x00
+#define SCSI_CMD_INQUIRY 0x12
+#define SCSI_CMD_READ_10 0x28
+#define SCSI_CMD_READ_CAPACITY 0x25
+#define SCSI_CMD_WRITE_10 0x2A
+
+/*
+**************************************************************************************************************
+* TYPE DEFINITIONS
+**************************************************************************************************************
+*/
+
+typedef enum ms_data_dir {
+
+ MS_DATA_DIR_IN = 0x80,
+ MS_DATA_DIR_OUT = 0x00,
+ MS_DATA_DIR_NONE = 0x01
+
+} MS_DATA_DIR;
+
+/*
+**************************************************************************************************************
+* FUNCTION PROTOTYPES
+**************************************************************************************************************
+*/
+
+USB_INT32S MS_BulkRecv ( USB_INT32U block_number,
+ USB_INT16U num_blocks,
+ volatile USB_INT08U *user_buffer);
+
+USB_INT32S MS_BulkSend ( USB_INT32U block_number,
+ USB_INT16U num_blocks,
+ volatile USB_INT08U *user_buffer);
+USB_INT32S MS_ParseConfiguration(void);
+USB_INT32S MS_TestUnitReady (void);
+USB_INT32S MS_ReadCapacity (USB_INT32U *numBlks, USB_INT32U *blkSize);
+USB_INT32S MS_GetMaxLUN (void);
+USB_INT32S MS_GetSenseInfo (void);
+USB_INT32S MS_Init (USB_INT32U *blkSize, USB_INT32U *numBlks, USB_INT08U *inquiryResult);
+USB_INT32S MS_Inquire (USB_INT08U *response);
+
+void Fill_MSCommand ( USB_INT32U block_number,
+ USB_INT32U block_size,
+ USB_INT16U num_blocks,
+ MS_DATA_DIR direction,
+ USB_INT08U scsi_cmd,
+ USB_INT08U scsi_cmd_len);
+#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Util/mbedUtils.cpp Wed Aug 07 12:35:04 2013 +0000
@@ -0,0 +1,16 @@
+
+#include "mbedUtils.h"
+
+#include "mbed.h"
+
+
+int getFreeMemory()
+{
+ // Return the difference between the heap pointer and stack pointer.
+ char stackVar = '\0';
+ char* stackPtr = &stackVar;
+ char* heapPtr = (char*)malloc(sizeof(char));
+ int memFree = stackPtr - heapPtr;
+ free(heapPtr);
+ return memFree;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/Util/mbedUtils.h Wed Aug 07 12:35:04 2013 +0000 @@ -0,0 +1,31 @@ +/* +Copyright (c) 2011 Robert Ellis (holistic [at] robellis [dot] org [dot] uk) + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. +*/ + +#ifndef MBED_UTILS_H +#define MBED_UTILS_H + +/** + * Get the amount of free RAM left on the mbed in bytes. + */ +int getFreeMemory(); + +#endif \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Util/stringUtils.cpp Wed Aug 07 12:35:04 2013 +0000
@@ -0,0 +1,44 @@
+
+
+#include "stringUtils.h"
+
+using namespace std;
+
+string trim(const string& src, const string& c)
+{
+ int p2 = src.find_last_not_of(c);
+ if (p2 == string::npos)
+ {
+ return string();
+ }
+
+ int p1 = src.find_first_not_of(c);
+ if (p1 == string::npos)
+ {
+ p1 = 0;
+ }
+
+ return src.substr(p1, (p2-p1)+1);
+}
+
+vector<string> tokenize(const string& str, const string& delimiters)
+{
+ vector<string> tokens;
+
+ // Skip delimiters at beginning.
+ string::size_type lastPos = str.find_first_not_of(delimiters, 0);
+ // Find first "non-delimiter".
+ string::size_type pos = str.find_first_of(delimiters, lastPos);
+
+ while (string::npos != pos || string::npos != lastPos)
+ {
+ // Found a token, add it to the vector.
+ tokens.push_back(str.substr(lastPos, pos - lastPos));
+ // Skip delimiters. Note the "not_of"
+ lastPos = str.find_first_not_of(delimiters, pos);
+ // Find next "non-delimiter"
+ pos = str.find_first_of(delimiters, lastPos);
+ }
+
+ return tokens;
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/Util/stringUtils.h Wed Aug 07 12:35:04 2013 +0000 @@ -0,0 +1,40 @@ +/* +Copyright (c) 2011 Robert Ellis (holistic [at] robellis [dot] org [dot] uk) + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. +*/ + +#ifndef STRING_UTILS_H +#define STRING_UTILS_H + +#include <string> +#include <vector> +using namespace std; + +/** + * Trims whitespace characters from beginning and end of given string. + */ +string trim(const string& src, const string& c = " \r\n"); + +/** + * Tokenize given string delimmted by given delimter into a vector of seprate strings. + */ +vector<string> tokenize(const string& str, const string& delimiters = " "); + +#endif
--- a/main.cpp Tue Aug 06 03:19:24 2013 +0000
+++ b/main.cpp Wed Aug 07 12:35:04 2013 +0000
@@ -1,7 +1,6 @@
// main.cpp
//
//To Do:
-// * Audible friction brake feedback
// * User-configurable watchpoint
// * Add 50% charge option
// * Add coasting regen to regen/braking display
@@ -9,9 +8,11 @@
// * Add additional 79b bank readouts
// * Subtract accessory power from efficiency history (add back in when displaying)
// * Add trip history display
+// * Add in-device config editor
+// * Add temperature to efficiency lookup table
+// * Add debug screen
-// rev144
-// fixed compiler error
+// rev146
#include "mbed.h"
#include "CAN.h"
@@ -22,7 +23,7 @@
#include "utility.h"
#include "displayModes.h"
#include "TOUCH_TFTx2.h"
-char revStr[7] = "145"; // gg - revision string, max 6 characters
+char revStr[7] = "146"; // gg - revision string, max 6 characters
FATFS USBdrive;
LocalFileSystem local("local");