This Automatic mode is the most simple lib for MCU Gear with LPC1114FN28. You don't need to think about Bank.

Dependents:   MCUGearALPC1114FN28

Fork of MCUGearA by mille feuille

Files at this revision

API Documentation at this revision

Comitter:
Info
Date:
Sat May 03 16:56:16 2014 +0000
Parent:
0:12d93184b350
Child:
2:aa2e471e8317
Commit message:
sample code for MCU Gear with LPC1114FN28. This code is easier than other our sample code.

Changed in this revision

MCUGearA.cpp Show annotated file Show diff for this revision Revisions of this file
MCUGearA.h Show annotated file Show diff for this revision Revisions of this file
MCUGearBaseA.cpp Show annotated file Show diff for this revision Revisions of this file
MCUGearBaseA.h Show annotated file Show diff for this revision Revisions of this file
commonA.h Show annotated file Show diff for this revision Revisions of this file
--- a/MCUGearA.cpp	Sun Mar 09 09:33:14 2014 +0000
+++ b/MCUGearA.cpp	Sat May 03 16:56:16 2014 +0000
@@ -27,7 +27,7 @@
 
 MCUGear::MCUGear(PinName scl, PinName sda, char addr)
      : _i2c(scl, sda) {
-    _i2c.frequency(FPGA_I2C_CLOCK);
+    //_i2c.frequency(FPGA_I2C_CLOCK);
     _addr = addr;   //save address
     write(0xff);    //close Module gate
     _counter = 0;
--- a/MCUGearA.h	Sun Mar 09 09:33:14 2014 +0000
+++ b/MCUGearA.h	Sat May 03 16:56:16 2014 +0000
@@ -28,7 +28,7 @@
         MCUGear(PinName sda, PinName scl, char addr);
         void disconnectModule(void);
         void connectModuleA(void);
-        void savePinSetting(uint8_t number, unsigned char CPUPin, unsigned char Direction ,unsigned char ModulePin);
+        //void savePinSetting(uint8_t number, unsigned char CPUPin, unsigned char Direction ,unsigned char ModulePin);
         uint8_t detectModule(void);
         //void startReg(char bank);
         uint8_t setWireA(uint8_t mcuIO, uint8_t direction, uint8_t moduleIO);
--- a/MCUGearBaseA.cpp	Sun Mar 09 09:33:14 2014 +0000
+++ b/MCUGearBaseA.cpp	Sat May 03 16:56:16 2014 +0000
@@ -23,19 +23,13 @@
 #include "mbed.h"
 #include "MCUGearBaseA.h"
 
-#if defined TARGET_LPC1768
-I2C fpga_i2c(p28, p27);
-#endif
-
-#if defined TARGET_KL25Z
-I2C fpga_i2c(PTE0, PTE1);
-#endif
+I2C fpga_i2c(dp5, dp27);
 
 void fpga_write(int dev_adr,unsigned char adr, unsigned char data) {
   char cmd[2];
   cmd[0] = adr;
   cmd[1] = data;
-  fpga_i2c.frequency (FPGA_I2C_CLOCK);
+  //fpga_i2c.frequency (FPGA_I2C_CLOCK);
   fpga_i2c.write(dev_adr, cmd, 2);
 
 }
--- a/MCUGearBaseA.h	Sun Mar 09 09:33:14 2014 +0000
+++ b/MCUGearBaseA.h	Sat May 03 16:56:16 2014 +0000
@@ -40,53 +40,48 @@
 // FGPGA CPU I/O
 typedef enum {
 
-#if defined TARGET_LPC1768
-  IO_MBED_P15 = 0x80,
-  IO_MBED_P13,
-  IO_MBED_P16,
-  IO_MBED_P12,
-  IO_MBED_P5,
-  IO_MBED_P11,
-  IO_MBED_P23,
-  IO_MBED_P22,
-  IO_MBED_P26,
-  IO_MBED_P10,
-  IO_MBED_P21,
-  IO_MBED_P9,
-  IO_MBED_P6,
-  IO_MBED_P7,
-  IO_MBED_P8,
-  IO_MBED_P14,
-  IO_MBED_P24,
-  IO_MBED_P25,
-  IO_MBED_P28,
-  IO_MBED_P27
-#endif
-
- #if defined TARGET_KL25Z
-
-  IO_MBED_PTA5 = 0x80,
-  IO_MBED_PTC8,
-  IO_MBED_PTC9,
-  IO_MBED_PTD5,
-  IO_MBED_PTA13,
-  IO_MBED_PTD2,
-  IO_MBED_PTB1,
-  IO_MBED_PTB2,
-  IO_MBED_PTA2,
-  IO_MBED_PTD4,
-  IO_MBED_PTB3,
-  IO_MBED_PTA12,
-  IO_MBED_PTD0,
-  IO_MBED_PTD3,
-  IO_MBED_PTD1,
-  IO_MBED_PTA4,
-  IO_MBED_PTB0,
-  IO_MBED_PTA1,
-  IO_MBED_PTE0, //SDA
-  IO_MBED_PTE1  //SCL
-#endif
-  
+    IOMOSI = 0x80,//P0_9
+    IOSCK,//P0_6
+    IOMISO,//P0_8
+    IOout4,//P1_0
+    NC1,//NC1
+    IOout5,//P1_1
+    IOout2,//P0_7
+    IORX,//P1_6
+    NC2,//NC2
+    IOin2,//P1_9
+    IOTX,//P1_7
+    IOin1,//P1_8
+    IOout7,//P1_5
+    IOout8,//P1_4
+    IOout6,//P1_2
+    IOout3,//P0_11
+    IOout1,//P0_3
+    IOCS,//P0_2
+    IOSDA,//P0_5
+    IOSCL//0_4
+            
+/*  IOP0_9 = 0x80,//P0_9
+    IOP0_6,//P0_6
+    IOP0_8,//P0_8
+    IOP1_0,//P1_0
+    NC1,//NC1
+    IOP1_1,//P1_1
+    IOP0_7,//P0_7
+    IOP1_6,//P1_6
+    NC2,//NC2
+    IOP1_9,//P1_9
+    IOP1_7,//P1_7
+    IOP1_8,//P1_8
+    IOP1_5,//P1_5
+    IOP1_4,//P1_4
+    IOP1_2,//P1_2
+    IOP0_11,//P0_11
+    IOP0_3,//P0_3
+    IOP0_2,//P0_2
+    IOP0_5,//P0_5
+    IO0_4//0_4
+*/
 } en_cpu_io;
 
 // FPGA EXT I/O
--- a/commonA.h	Sun Mar 09 09:33:14 2014 +0000
+++ b/commonA.h	Sat May 03 16:56:16 2014 +0000
@@ -23,8 +23,13 @@
 #define numBaseboardIO 48
 #define numMaxModuleIO 12
 
+
+#define BaudRate 9600
+#define FPGA_I2C_CLOCK    2000000
+#define MODULE_I2C_CLOCK    2000000
+
 //#define DEBUG //If you need to debug, define this.
-#if defined TARGET_LPC1768
+/*#if defined TARGET_LPC1768
 
 #define BaudRate 9600
 #define FPGA_I2C_CLOCK    1000000
@@ -39,7 +44,7 @@
 #define MODULE_I2C_CLOCK    2000000
 
 #endif
-
+*/
 
 #define FPGA_I2C_ADR 0x78