CMSIS DSP Software Library: arm_power_q31.c Source File

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# arm_power_q31.c

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    00001 /* ----------------------------------------------------------------------
    00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
    00003 *
    00004 * $Date:        15. July 2011
    00005 * $Revision:    V1.0.10
    00006 *
    00007 * Project:      CMSIS DSP Library
    00008 * Title:        arm_power_q31.c
    00009 *
    00010 * Description:  Sum of the squares of the elements of a Q31 vector.
    00011 *
    00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
    00013 *
    00014 * Version 1.0.10 2011/7/15
    00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
    00016 *
    00017 * Version 1.0.3 2010/11/29
    00018 *    Re-organized the CMSIS folders and updated documentation.
    00019 *
    00020 * Version 1.0.2 2010/11/11
    00021 *    Documentation updated.
    00022 *
    00023 * Version 1.0.1 2010/10/05
    00024 *    Production release and review comments incorporated.
    00025 *
    00026 * Version 1.0.0 2010/09/20
    00027 *    Production release and review comments incorporated.
    00028 * -------------------------------------------------------------------- */
    00029
    00030 #include "arm_math.h"
    00031
    00063 void arm_power_q31(
    00064   q31_t * pSrc,
    00065   uint32_t blockSize,
    00066   q63_t * pResult)
    00067 {
    00068   q63_t sum = 0;                                 /* Temporary result storage */
    00069   q31_t in;
    00070   uint32_t blkCnt;                               /* loop counter */
    00071
    00072
    00073 #ifndef ARM_MATH_CM0
    00074
    00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
    00076
    00077   /*loop Unrolling */
    00078   blkCnt = blockSize >> 2u;
    00079
    00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    00081    ** a second loop below computes the remaining 1 to 3 samples. */
    00082   while(blkCnt > 0u)
    00083   {
    00084     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
    00085     /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
    00086     in = *pSrc++;
    00087     sum += ((q63_t) in * in) >> 14u;
    00088
    00089     in = *pSrc++;
    00090     sum += ((q63_t) in * in) >> 14u;
    00091
    00092     in = *pSrc++;
    00093     sum += ((q63_t) in * in) >> 14u;
    00094
    00095     in = *pSrc++;
    00096     sum += ((q63_t) in * in) >> 14u;
    00097
    00098     /* Decrement the loop counter */
    00099     blkCnt--;
    00100   }
    00101
    00102   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    00103    ** No loop unrolling is used. */
    00104   blkCnt = blockSize % 0x4u;
    00105
    00106 #else
    00107
    00108   /* Run the below code for Cortex-M0 */
    00109
    00110   /* Loop over blockSize number of values */
    00111   blkCnt = blockSize;
    00112
    00113 #endif /* #ifndef ARM_MATH_CM0 */
    00114
    00115   while(blkCnt > 0u)
    00116   {
    00117     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
    00118     /* Compute Power and then store the result in a temporary variable, sum. */
    00119     in = *pSrc++;
    00120     sum += ((q63_t) in * in) >> 14u;
    00121
    00122     /* Decrement the loop counter */
    00123     blkCnt--;
    00124   }
    00125
    00126   /* Store the results in 16.48 format  */
    00127   *pResult = sum;
    00128 }
    00129

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