CMSIS DSP Software Library: arm_shift_q15.c Source File

- Main Page
- Modules
- Data Structures
- Files
- Examples

- File List
- Globals

# arm_shift_q15.c

Go to the documentation of this file.

    00001 /* ----------------------------------------------------------------------
    00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
    00003 *
    00004 * $Date:        15. July 2011
    00005 * $Revision:    V1.0.10
    00006 *
    00007 * Project:      CMSIS DSP Library
    00008 * Title:        arm_shift_q15.c
    00009 *
    00010 * Description:  Shifts the elements of a Q15 vector by a specified number of bits.
    00011 *
    00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
    00013 *
    00014 * Version 1.0.10 2011/7/15
    00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
    00016 *
    00017 * Version 1.0.3 2010/11/29
    00018 *    Re-organized the CMSIS folders and updated documentation.
    00019 *
    00020 * Version 1.0.2 2010/11/11
    00021 *    Documentation updated.
    00022 *
    00023 * Version 1.0.1 2010/10/05
    00024 *    Production release and review comments incorporated.
    00025 *
    00026 * Version 1.0.0 2010/09/20
    00027 *    Production release and review comments incorporated.
    00028 *
    00029 * Version 0.0.7  2010/06/10
    00030 *    Misra-C changes done
    00031 * -------------------------------------------------------------------- */
    00032
    00033 #include "arm_math.h"
    00034
    00058 void arm_shift_q15(
    00059   q15_t * pSrc,
    00060   int8_t shiftBits,
    00061   q15_t * pDst,
    00062   uint32_t blockSize)
    00063 {
    00064   uint32_t blkCnt;                               /* loop counter */
    00065   uint8_t sign;                                  /* Sign of shiftBits */
    00066
    00067 #ifndef ARM_MATH_CM0
    00068
    00069 /* Run the below code for Cortex-M4 and Cortex-M3 */
    00070
    00071   q15_t in1, in2;                                /* Temporary variables */
    00072
    00073
    00074   /*loop Unrolling */
    00075   blkCnt = blockSize >> 2u;
    00076
    00077   /* Getting the sign of shiftBits */
    00078   sign = (shiftBits & 0x80);
    00079
    00080   /* If the shift value is positive then do right shift else left shift */
    00081   if(sign == 0u)
    00082   {
    00083     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    00084      ** a second loop below computes the remaining 1 to 3 samples. */
    00085     while(blkCnt > 0u)
    00086     {
    00087       /* Read 2 inputs */
    00088       in1 = *pSrc++;
    00089       in2 = *pSrc++;
    00090       /* C = A << shiftBits */
    00091       /* Shift the inputs and then store the results in the destination buffer. */
    00092 #ifndef  ARM_MATH_BIG_ENDIAN
    00093
    00094       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
    00095                                   __SSAT((in2 << shiftBits), 16), 16);
    00096
    00097 #else
    00098
    00099       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
    00100                                   __SSAT((in1 << shiftBits), 16), 16);
    00101
    00102 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
    00103
    00104       in1 = *pSrc++;
    00105       in2 = *pSrc++;
    00106
    00107 #ifndef  ARM_MATH_BIG_ENDIAN
    00108
    00109       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
    00110                                   __SSAT((in2 << shiftBits), 16), 16);
    00111
    00112 #else
    00113
    00114       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
    00115                                   __SSAT((in1 << shiftBits), 16), 16);
    00116
    00117 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
    00118
    00119       /* Decrement the loop counter */
    00120       blkCnt--;
    00121     }
    00122
    00123     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    00124      ** No loop unrolling is used. */
    00125     blkCnt = blockSize % 0x4u;
    00126
    00127     while(blkCnt > 0u)
    00128     {
    00129       /* C = A << shiftBits */
    00130       /* Shift and then store the results in the destination buffer. */
    00131       *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
    00132
    00133       /* Decrement the loop counter */
    00134       blkCnt--;
    00135     }
    00136   }
    00137   else
    00138   {
    00139     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    00140      ** a second loop below computes the remaining 1 to 3 samples. */
    00141     while(blkCnt > 0u)
    00142     {
    00143       /* Read 2 inputs */
    00144       in1 = *pSrc++;
    00145       in2 = *pSrc++;
    00146       /* C = A >> shiftBits */
    00147       /* Shift the inputs and then store the results in the destination buffer. */
    00148 #ifndef  ARM_MATH_BIG_ENDIAN
    00149
    00150       *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
    00151                                   (in2 >> -shiftBits), 16);
    00152
    00153 #else
    00154
    00155       *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
    00156                                   (in1 >> -shiftBits), 16);
    00157
    00158 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
    00159
    00160       in1 = *pSrc++;
    00161       in2 = *pSrc++;
    00162
    00163 #ifndef  ARM_MATH_BIG_ENDIAN
    00164
    00165       *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
    00166                                   (in2 >> -shiftBits), 16);
    00167
    00168 #else
    00169
    00170       *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
    00171                                   (in1 >> -shiftBits), 16);
    00172
    00173 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
    00174
    00175       /* Decrement the loop counter */
    00176       blkCnt--;
    00177     }
    00178
    00179     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    00180      ** No loop unrolling is used. */
    00181     blkCnt = blockSize % 0x4u;
    00182
    00183     while(blkCnt > 0u)
    00184     {
    00185       /* C = A >> shiftBits */
    00186       /* Shift the inputs and then store the results in the destination buffer. */
    00187       *pDst++ = (*pSrc++ >> -shiftBits);
    00188
    00189       /* Decrement the loop counter */
    00190       blkCnt--;
    00191     }
    00192   }
    00193
    00194 #else
    00195
    00196   /* Run the below code for Cortex-M0 */
    00197
    00198   /* Getting the sign of shiftBits */
    00199   sign = (shiftBits & 0x80);
    00200
    00201   /* If the shift value is positive then do right shift else left shift */
    00202   if(sign == 0u)
    00203   {
    00204     /* Initialize blkCnt with number of samples */
    00205     blkCnt = blockSize;
    00206
    00207     while(blkCnt > 0u)
    00208     {
    00209       /* C = A << shiftBits */
    00210       /* Shift and then store the results in the destination buffer. */
    00211       *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
    00212
    00213       /* Decrement the loop counter */
    00214       blkCnt--;
    00215     }
    00216   }
    00217   else
    00218   {
    00219     /* Initialize blkCnt with number of samples */
    00220     blkCnt = blockSize;
    00221
    00222     while(blkCnt > 0u)
    00223     {
    00224       /* C = A >> shiftBits */
    00225       /* Shift the inputs and then store the results in the destination buffer. */
    00226       *pDst++ = (*pSrc++ >> -shiftBits);
    00227
    00228       /* Decrement the loop counter */
    00229       blkCnt--;
    00230     }
    00231   }
    00232
    00233 #endif /* #ifndef ARM_MATH_CM0 */
    00234
    00235 }
    00236

All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines